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Making process of flat-topped gold lug

A bump and flat top technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of lower yield, extremely time-consuming, damage to components and bumps, etc., and achieve process productivity improvement Effect

Inactive Publication Date: 2003-08-20
ADVANCED MICRO CHIP TECHNOLOGECO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method will subject the IC wafer to a mechanical stress, which will easily damage the components and bumps on the IC wafer, thereby reducing the yield rate, and this grinding method is extremely time-consuming

Method used

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  • Making process of flat-topped gold lug
  • Making process of flat-topped gold lug
  • Making process of flat-topped gold lug

Examples

Experimental program
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Effect test

Embodiment Construction

[0033] The rim of the gold bump will cause serious troubles in subsequent processes, especially in the fabrication of COG. In the subsequent process, when the chip is packaged, the protrusion will cause insufficient adhesion of the entire IC chip, and then in the subsequent process, problems such as peeling will occur, seriously affecting the yield. This is more serious on COG, because in COG, the chip must be attached to the glass plane, and the chip is attached to the glass plane with the gold bump as a bridge, so the bump will make the gold bump stick to the glass plane. The adhesion area is only limited to the raised portion, not the entire top plane of the gold bump, resulting in poor overall adhesion.

[0034] However, the current method used to solve this problem is to grind the gold bump to remove the protrusion of the gold bump. However, this method will cause the IC wafer to bear a mechanical stress, which will easily damage the components and gold bumps on the IC w...

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PUM

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Abstract

The making process of flat-topped gold lug includes etching gold lug and subsequent flattening the top surface of the gold lug. Owing to the fast etching rate in the lug part than in the plane part, there will be faster eliminating rate in the lug part than in the plane part.

Description

technical field [0001] The invention relates to a method for manufacturing a chip package, in particular to a method for manufacturing flat-top gold bumps. Background technique [0002] With the thinner, lighter and smaller electronic products, the packaging technology of the chip is also changing according to its requirements, especially in the packaging of liquid crystal display screens (Liquid Crystal Display; LCD), including tape automated bonding (Tape Automated Bonding; TAB ) and chip-glass bonding technology (Chip on Glass; COG) and other bonding technologies. [0003] In the field of COG packaging technology, one of the key steps is the production of bumps, and the most commonly used bumps, especially on LCD packaging, are still gold bumps, although their cost Compared with another kind of bump, tin-lead bump has higher force. [0004] The current production process of gold bumps is briefly described as follows: First, two layers of metal are vacuum sputtered on th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/60
CPCH01L24/11H01L2224/11H01L2924/00012
Inventor 王俊恒
Owner ADVANCED MICRO CHIP TECHNOLOGECO