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Method for making semiconductor

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problem of increased leakage current between source and drain

Inactive Publication Date: 2004-06-09
RENESAS TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, when the source and drain regions formed on the silicon layer of the SOI substrate are silicided, there is more silicon than the area below the silicided region, so a large amount of silicon grows toward the channel region below the gate. Silicide, which increases the leakage current between source and drain
[0016] Furthermore, even when the technique described in Patent Document 1 is applied to an SOI substrate, since atoms are suppressed from being introduced only below the exposed surface of the source and drain regions, when the source and drain regions are silicided from above , produces the same problem

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Embodiment 1

[0045] Figure 1-9 , 12, and 13 are cross-sectional views showing the manufacturing method of the semiconductor device according to Embodiment 1 of the present invention in process order. Next, a method of manufacturing the semiconductor device of the first embodiment will be described with reference to these figures.

[0046] First, if figure 1 As shown, an element isolation insulating film 2 is formed, for example, on a semiconductor substrate 1 of a p-type silicon substrate by using a well-known LOCOS isolation technique or trench isolation technique. Furthermore, a silicon oxide film 3 is formed on the exposed semiconductor substrate 1 .

[0047] The element isolation insulating film 2 is formed of, for example, a silicon oxide film, and divides the semiconductor substrate 1 into a region where a p-channel MOS transistor is formed (hereinafter referred to as a "pMOS transistor formation region") and a region where an n-channel MOS transistor is formed (hereinafter referred...

Embodiment 2

[0091] As described above, when the semiconductor layer of the SOI substrate is thinned due to the miniaturization of semiconductor devices and the source and drain regions are silicided, there is a problem that the silicide grows greatly to the channel region below the gate. Therefore, in the second embodiment, a manufacturing method is proposed that can prevent the silicide reaction from proceeding to the channel region.

[0092] Figures 18-24 It is a sectional view showing the manufacturing method of the semiconductor device of the second embodiment in order of steps. In this second embodiment, as an example, a method of manufacturing an SOI substrate in which the semiconductor layer and the silicide film are formed to have the same thickness will be described.

[0093] First, if Figure 18 As shown, an SOI substrate 60 is prepared, and an element isolation insulating film 2 is formed on a semiconductor layer 63. The SOI substrate 60 is a substrate formed by sequentially...

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Abstract

A method of manufacturing a semiconductor device is provided which can suppress leakage current increases by making into silicide. Impurity that suppresses silicide formation reaction (suppression impurity), such as germanium, is introduced into source / drain regions (16, 36) from their upper surfaces. In the source / drain regions (16, 36), a region shallower than a region where the suppression impurity is distributed (50) is made into silicide, so that a silicide film (51) is formed in the source / drain regions (16, 36). Thus, by making the region shallower than the region (50) into silicide, it is possible to suppress that silicide formation reaction extends to the underside of the region to be made into silicide. This enables to reduce the junction leakage between the source / drain regions (16, 36) and a well region.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor device having a silicide film. Background technique [0002] Semiconductor devices tend to be highly integrated in recent years, and many elements are mounted on one chip. Most of these elements are MOS transistors, and among the MOS transistors, there are nMOS transistors (negative MOS transistors) through which electrons flow and pMOS transistors (positive MOS transistors) through which holes flow. In semiconductor devices, circuits are formed by combining transistors with different polarities. [0003] In conventional MOS transistors, a silicide film is formed thereon in order to reduce the resistance of the source-drain region and the gate. In general, a silicide film is formed by directly silicided source-drain regions and gate electrodes. When the gate is silicided, since a gate insulating film is formed under it, the reaction to become silicide does not reach the semic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/265H01L21/285H01L21/336H01L21/8234H01L21/8238H01L27/08H01L27/088H01L27/092H01L29/417H01L29/78H01L29/786
CPCH01L21/28518H01L21/823835H01L29/6659H01L21/26506H01L21/823814H01L29/665H01L21/8238H01L21/26513
Inventor 尾田秀一佐山弘和太田和伸杉原浩平
Owner RENESAS TECH CORP