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Semiconductor memory device and method for correcting memory cell data

A storage unit and storage device technology, applied in information storage, static memory, read-only memory, etc., can solve the problems of early detection of threshold displacement, time required, and no write operation.

Inactive Publication Date: 2004-06-16
III 控股10有限责任公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, although an example in which the memory cell is in an intermediate state has been described, in the case of a cell in a normal state, the operation in step S24 ends, and no write operation is performed.
[0007] In the above-mentioned prior art, since it is necessary to perform an operation for confirming the holding state of data in each memory cell for all the memory cells, it takes time, and it is impossible to detect the threshold value caused by the variation of the charge amount as an example of the physical quantity at an early stage. Displacement, and can not achieve the purpose of low power consumption and other issues
In addition, when detecting the threshold shift, stress is applied to the memory cell, and there is also a problem that the possibility of the threshold exceeding a predetermined range increases.
In addition, although in the prior art, an external input such as a command is required to start the algorithm, it will not be executed unless the command is input. In this case, there is also a problem that the reliability of the device deteriorates.
Also, in the flash memory, since the write operation to the memory cells displaced from the distribution range by the charge loss is performed for every 1 bit, erasing can only be done for each block (memory cells that are erased at the same time) cluster), so there is also a problem that the correction in units of 1 bit (bit) cannot be performed in memory cells displaced from the threshold distribution due to charge loss.

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  • Semiconductor memory device and method for correcting memory cell data
  • Semiconductor memory device and method for correcting memory cell data
  • Semiconductor memory device and method for correcting memory cell data

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Embodiment Construction

[0027] Hereinafter, an embodiment of a semiconductor memory device according to the present invention will be described with reference to the drawings.

[0028] like image 3 As shown, the semiconductor memory device is configured as follows: a memory array 1 in which a plurality of memory cells that store and rewritable N-value data (N is a natural number greater than 2) are arranged in a matrix in one cell; The reference array 2 of the reference data that one side of 3 inputs; The row decoder 4 of the word line selection signal of output selection word line; The column decoder 5 of the bit line selection signal of output selection bit line; Corresponding to programming, erasing, reading The voltage switch 14 as a voltage switching circuit that also has the function of switching the voltage boosted inside the device or the high voltage supplied from the outside; recognizes commands input from the outside (respectively) Assigned to programming, erasing, reading, etc.), an ins...

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Abstract

A semiconductor memory device comprises a plurality of memory cells (1), each of which is capable of storing N-level data and being reprogrammed; and a plurality of monitor cells (6 and 9) that separately store individual data values of the N-level data by using the same scheme as that used for the memory cells. Sensing means (12) senses whether a physical quantity of the monitor cell which corresponds to the data value stored in the monitor cell is within a preset range; verification means (16) verifies whether the physical quantity of the memory cell which corresponds to the data value stored in the memory cell is within the preset range when the sensing means has sensed that the physical quantity of the monitor cell is out of the preset range; correction means (16) corrects the physical quantity. Consequently, a physical quantity variation can be efficiently detected without overstressing memory cells (1), and correction can be implemented for not only a downward variation due to charge loss and / or the like but also a variation in an upward physical quantity variation due to charge gain and / or the like in a specified range.

Description

technical field [0001] The present invention relates to a method for correcting data stored in a semiconductor storage device and a storage unit. Background technique [0002] Flash memory (flash memory), which is an electronically writable and erasable non-volatile memory, due to the passage of time or the stress caused by the current or voltage when data is read, causes the data corresponding to the data to be stored in the memory cell As an example of the physical quantity, the charge state changes, the threshold value distribution may deviate from the predetermined range, and in this case, it may cause a delay in access time or a wrong read. Therefore, according to USP 5,835,413, a technique of correcting a cell in which the state of the memory cell changes due to the stress and the threshold distribution exceeds the predetermined range to enter the original predetermined range has been proposed. [0003] Hereinafter, data correction of a NOR flash memory will be descri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/10G11C11/15G11C11/56G11C13/00G11C16/02G11C16/34G11C29/00G11C29/42
CPCG11C29/00G11C13/0069G11C11/5685G11C2213/31G11C16/3431G11C13/0007G11C11/5678G11C13/0033G11C13/0064G11C13/0004G11C16/10
Inventor 滨口弘治
Owner III 控股10有限责任公司