Integrated circuit device and its mfg. method
A technology of integrated circuits and devices, which is applied in the field of metal oxide semiconductor transistors and their manufacturing, and can solve the problems of increasing the area of circuits
Active Publication Date: 2004-08-11
SAMSUNG ELECTRONICS CO LTD
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Problems solved by technology
However, circuits modified using the methods discussed by Juengling may have increased area due, for example, to the inclusion of one or more additional gate lines that provide spacing for the modified circuit layout
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[0015] The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different ways and should not be limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to the art Technical staff. In the drawings, the thickness of layers and regions are exaggerated for clarity. It will be understood that when an element such as a layer, region or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. It will be understood that when an element such as a layer, region or substrate is referred to as being "under" or "beneath" another element, it can be directly under the other element or intervening elements may also be pres...
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Integrated circuit devices are provided including an integrated circuit substrate and first, second and third spaced apart insulating regions in the integrated circuit substrate that define first and second active regions. A first gate electrode is provided on the first active region. The first gate electrode has a first portion on the first active region that extends onto the first insulating region and a second portion at an end of the first portion on the first insulating region. A second gate electrode is provided on the second active region. An insulating layer is provided on the first, second and third active regions defining a first gate contact hole that exposes at least a portion of the second portion of the first gate electrode. The first gate electrode is free of a gate contact hole on the first portion of the first gate electrode. A second gate contact hole is provided on the second active region that exposes at least a portion of the second gate electrode. Related methods of fabricating integrated circuit devices are also provided.
Description
[0001] This application is related to and claims priority from Korean Patent Application No. 2003-006598 filed on February 3, 2003, which is hereby incorporated by reference in its entirety. technical field [0002] The present invention relates to an integrated circuit device and a manufacturing method thereof, and more particularly, to a metal oxide semiconductor (MOS) transistor and a manufacturing method thereof. Background technique [0003] Conventional metal oxide semiconductor (MOS) transistors are widely used in memory devices such as integrated circuits. Typically, MOS transistors are disposed on active regions in an integrated circuit substrate. Also, a MOS transistor typically includes a source, a drain, and a gate. The source and drain regions are spaced apart from each other to provide a channel region between the source and drain regions. An insulated gate including a gate insulating layer (eg, an oxide layer) and a gate electrode is typically disposed on th...
Claims
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IPC IPC(8): H01L27/04H01L21/8234H01L27/02H01L27/105H01L27/148H01L29/78
CPCH01L21/823481H01L21/823437H01L21/823475H01L27/04
Inventor 朴曾焕曹明宽
Owner SAMSUNG ELECTRONICS CO LTD