Liquid crystal display possessing capacitance compensation structure
A liquid crystal display, capacitance compensation technology, applied in instruments, circuits, transistors, etc., can solve problems such as uneven picture
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no. 1 example
[0041] Figure 3A and Figure 3B is a first embodiment of the present invention with a C gd Top view of the capacitive compensation structure, where, Figure 3AMake schematic diagrams for M1 and M2 without any overlapping bias, Figure 3B Make a schematic diagram of the overlap bias occurring for M1 and M2. Figure 4 for Figure 3B Sectional view of the 4-4' tangent. Figure 5 is the equivalent circuit diagram corresponding to Figs. 3A and 3B.
[0042] In this embodiment, for compensating the gate-drain parasitic capacitance (C gd ) compensation structure includes 102a and 102b. Wherein, the compensation structure 102a extends from an end of the gate G far away from the gate line 102 (at 120) to an end at which the drain D overlaps with the pixel electrode 114 (at 124), and is connected to this end (at 124). The drain D is partially overlapped. The compensation structure 102 b extends from the gate line 102 to an end (at 124 ) where the drain D overlaps with the pixel...
no. 2 example
[0046] Figure 6 is a second embodiment of the present invention with a C gd The top view of the capacitance compensation structure, in which the dotted line indicates the situation without overlapping deviation in the fabrication of M1 and M2, and the solid line indicates the situation after the fabrication of M1 and M2 with overlapping deviation.
[0047] In this embodiment, for compensating the gate-drain parasitic capacitance (C gd ) is 102a, which extends from the end of the gate G away from the gate line 102 (at 120) to the end where the drain D overlaps with the pixel electrode 114 (at 124), and is connected to this end (at 124 at) the drain D partially overlaps. When an overlap deviation occurs, the parasitic capacitance C A terminal deviation, there will be a parasitic capacitance C C end is compensated. In this case, the parasitic capacitance C between the gate-drain gd =C A +C C , the amount of change in parasitic capacitance Δ ...
no. 3 example
[0050] Figure 7 is a third embodiment of the present invention with a C gd The top view of the capacitance compensation structure, in which the dotted line indicates the situation without overlapping deviation in the fabrication of M1 and M2, and the solid line indicates the situation after the fabrication of M1 and M2 with overlapping deviation.
[0051] In this embodiment, for compensating the gate-drain parasitic capacitance (C gd ) is 102b, which extends from the gate line 102 to an end (at 124) where the drain D overlaps with the pixel electrode 114, and partially overlaps with the drain D at this end (at 124). When an overlap deviation occurs, the parasitic capacitance C A terminal deviation, there will be a parasitic capacitance C B end is compensated. In this case, the parasitic capacitance C between the gate-drain gd =C A +C B , the amount of change in parasitic capacitance Δ C 1 + Δ ...
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