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Refresh scheme for dynamic page programming

A reprogramming and segment technology, applied in the field of storage systems, can solve problems such as the inability to read CBD and zero normal sensing methods

Inactive Publication Date: 2005-07-27
CYPRESS SEMICONDUCTOR
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

So after the cycle and roast, the normal sensing method of reading CBD and zero cannot be used

Method used

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  • Refresh scheme for dynamic page programming
  • Refresh scheme for dynamic page programming
  • Refresh scheme for dynamic page programming

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Embodiment Construction

[0027] Reference will now be made in detail to a specific embodiment or embodiments of the invention which illustrate the best mode or modes presently contemplated by the inventors for carrying out the invention.

[0028] Referring now to the accompanying drawings, figure 1An exemplary dual bit memory cell 10 is illustrated in which one or more of the various aspects of the present invention may be implemented. The memory cell 10 includes a silicon nitride layer 16 sandwiched between a top silicon dioxide layer 14 and a bottom silicon dioxide layer 18 to form an ONO layer 30 . A polysilicon layer 12 is present on the ONO layer 30 providing word lines connected to the memory cell 10 . A first bit line 32 runs under the ONO layer 30 under the first region 4 , and a second bit line 34 runs under the ONO layer 30 under the second region 6 . Bit lines 32 and 34 are formed from conductive portion 24 and selective oxide portion 22 . The boron implant 20 is placed at the end of the...

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PUM

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Abstract

A flash memory array having multiple dual bit memory cells (10, 210, 212, 214, 216, 220, 222) divided into section attached to a wordline (12, 202, 208) and a pair of reference cells (218) logically associated with each section. A method of reprogramming a section or sections of words that are required to be changed includes inputting allowed changes to the flash memory array, reading word or words to be changed in each section, programming bits in word or words to be changed in each section, refreshing previously programmed bits in the word or words that are changed, refreshing previously programmed bits in the word or words changed in each section, refreshing previously programmed bits in the remaining word or words in each section and refreshing previously programmed in each pair of reference cells (10, 210, 212, 214, 216, 220, 222) in the section in which changes have been made.

Description

technical field [0001] The present invention relates generally to storage systems, and more particularly to storage system architectures having reference units, and a method of ensuring that data units are of the same age as reference units. Background technique [0002] Flash memory is an electronic storage medium that is rewritable and maintains its contents without consuming power. Flash memory devices typically have a lifetime of 100K to 300K write cycles. Unlike dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices, which can be erased by a single byte, flash memory devices are typically erased and written in fixed multi-bit blocks or sectors . Flash memory technology evolved from electrically erasable read-only memory (EEPROM) chip technology, which can be erased in place. Flash memory devices are less expensive and denser, which means that flash memory devices can hold more data per cell area. This new type of EEPROM (Electrica...

Claims

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Application Information

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IPC IPC(8): G11C16/02G11C16/04G11C16/34H01L21/8247H01L27/115H01L29/788H01L29/792
CPCG11C16/3431G11C16/3418G11C16/0475G11C16/04G11C16/10G11C16/28
Inventor 李宾宽钟成智陈伯苓
Owner CYPRESS SEMICONDUCTOR
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