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Method of reading a flash memory device

一种闪存、存储单元的技术，应用在读取闪存及NAND型闪存装置领域，能够解决瞬时峰值电流高、芯片断电、芯片错误操作等问题

Inactive Publication Date: 2006-05-24
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If all the 2k+64 byte paging buffers are active and there is a maximum current flowing, the instantaneous peak current becomes too high, causing a power outage in the chip
This causes the chip to malfunction

Method used

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  • Method of reading a flash memory device
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  • Method of reading a flash memory device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] figure 1 A portion of a flash memory device is schematically illustrated to illustrate the disclosed method of reading a NAND type flash memory device. The plurality of paging buffers 11 to 1 n are divided into two groups and driven according to the first and second control signals S1 and S2 generated from the paging controller 10 . That is, the odd page buffers 11, 13, . . . 12n−1 are driven according to the first control signal S1, and the even page buffers 12, 14, .

[0026] figure 2 The configuration of the page buffer is shown to illustrate the disclosed method of reading the NAND-type flash memory device. figure 2 for figure 1 Detail view of the . although figure 2 The paging buffer controller is not shown in , but it should be understood that all signals input to these paging buffers are generated by the paging buffer controller. Also, for ease of explanation, figure 2 Only four of these multiple pager buffers are shown in . The configuration of these...

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PUM

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Abstract

The present invention provides a method for reading a flash memory device, wherein the state of a predetermined cell is read by dividing a plurality of page buffers connected to a memory cell array via a plurality of bit lines into at least two groups, and the page buffers Driven sequentially on a group basis. Power loss problems caused by excessive current consumption due to all paging buffers operating simultaneously are avoided. Therefore, the method disclosed in the present invention can prevent erroneous operation due to power loss.

Description

technical field [0001] The present invention relates to a method of reading flash memory and NAND type flash memory devices, in which a plurality of page buffers are divided into predetermined groups, and then these page buffers are sequentially driven on a group basis to prevent erroneous operations due to excessive power consumption . Background technique [0002] There is an increasing need for a semiconductor memory device in which electrical programming and electrical erasure is allowed but in which a refresh function capable of rewriting data at a constant cycle is not required. In addition, in order to develop a large-capacity storage device capable of storing large amounts of data, the integration of memory cells has been increased. To satisfy higher integration of memory cells, a NAND type flash memory device has been developed in which a plurality of cells are connected in series to form a string and two strings share a joint. The programming and erasing of the N...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/06G11C7/00G11C16/26
CPCG11C16/26G11C16/0483G11C16/24G11C16/30
Inventor 金德柱
Owner SK HYNIX INC