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Method for making copper dual-damascene structure

A mosaic structure, double damascene technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve the effect of optimizing electrical properties

Inactive Publication Date: 2006-11-22
UNITED MICROELECTRONICS CORP
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Problems solved by technology

[0007] Therefore, the main purpose of the present invention is to provide a method for fabricating a copper dual damascene structure, which forms a substrate protection layer before forming a barrier layer, and uses special process conditions to process a barrier layer with good adhesion, so as to Solve the above-mentioned problems of the existing copper dual damascene structure

Method used

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  • Method for making copper dual-damascene structure
  • Method for making copper dual-damascene structure
  • Method for making copper dual-damascene structure

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Embodiment Construction

[0031] Please refer to Figure 2 to Figure 8 , Figure 2 to Figure 8 It is a process schematic diagram of the first embodiment of the method for fabricating a copper dual damascene structure of the present invention, wherein the copper dual damascene structure in this embodiment is directly fabricated on a semiconductor substrate. Such as figure 2 As shown, first, a semiconductor substrate 40 is provided. The surface of the semiconductor substrate 40 includes at least one dielectric layer 42 and at least one dual damascene hole 44 provided in the dielectric layer 42. in figure 2 Only a dielectric layer 42 and a dual damascene hole 44 are shown as an illustration, and the semiconductor substrate 40 is a silicon substrate. It should be noted that a part of the semiconductor substrate 40 is exposed at the bottom of the dual damascene hole 44, and the exposed surface of the semiconductor substrate 40 may further include a conductive layer 46 composed of a metal silicide layer or an ...

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Abstract

The invention discloses a making method of copper double-mosaic structure, which comprises the following steps: providing semiconductor substrate with double-mosaic hole in the dielectric layer; exposing partial semiconductor substrate at the bottom of hole; proceeding physical gas-phase sediment technology in the double-mosaic hole to form substrate protective layer; proceeding atomic chemical gas-phase sediment on the substrate protective layer to form tantalum nitride layer as barrier layer; forming copper metal layer in the double-mosaic hole.

Description

Technical field [0001] The invention provides a method for manufacturing a copper dual-damascene structure, in particular to a method of forming a barrier layer by an atomic chemical vapor deposition method to fabricate a copper dual-damascene structure. Background technique [0002] With the increase in the integration of integrated circuits, the production of multilevel interconnects has gradually become a necessary method for many semiconductor integrated circuit processes. The copper dual damascene (dual damascene) technology combined with the inter metal dielectric layer (IMD) composed of low dielectric constant materials is currently the most popular metal interconnection process combination, especially for high integration and high speed. (High-speed) logic integrated circuit chip manufacturing and deep sub-micro (deep sub-micro) semiconductor technology below 0.18 microns, copper metal dual damascene interconnection technology has become increasingly important in integrat...

Claims

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Application Information

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IPC IPC(8): H01L21/768
Inventor 邓宪哲林进富陈孟祺
Owner UNITED MICROELECTRONICS CORP
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