Thin tungsten silicide layer deposition and gate metal integration

Abstract

A method for depositing layers of a gate electrode is provided. The method includes depositing a doped polysilicon layer, a thin tungsten silicide layer, and a metal layer. In one aspect, the doped polysilicon layer and the thin tungsten silicide layer are deposited within an integrated processing system. In a further aspect, depositing the thin tungsten silicide layer includes exposing a polysilicon layer to a silicon source, depositing a tungsten silicide layer, and exposing the tungsten silicide layer to a silicon source.

Description

technical field [0001] Embodiments of the invention relate to methods of depositing gate layers. Background technique [0002] Integrated circuits are made up of millions of various devices such as transistors, capacitors and resistors. Transistors, such as field effect transistors, generally include source, drain and gate stacks. A gate stack generally includes a substrate, such as a silicon substrate, a gate dielectric, such as silicon dioxide, on the substrate, and a gate on the gate dielectric. [0003] Materials that have been used for the gate include metals such as aluminum and polysilicon. Doped polysilicon has become the preferred material for the gate due to its lower threshold voltage than aluminum. Threshold voltage is the voltage value required to form a channel under the gate connecting the source and drain of a transistor. A lower threshold voltage is a preferable threshold voltage because it reduces the amount of power required by the transistor and incre...

AI Technical Summary

Problems solved by technology

Reaction between the polysilicon layer and the tungsten or tungsten nitride layer can also affect the resistance of the gate and the reliability of the device

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