A driving chip circuit, a display panel, a display control system and a display device

Abstract

This invention relates to the field of display technology, providing a driver chip circuit, a display panel, a display control system, and a display device. The driver chip circuit includes: a first driver chip string group, comprising a plurality of first driver chips connected in series sequentially; and a plurality of second driver chip string groups, each second driver chip string group comprising a plurality of second driver chips connected in series sequentially, wherein any one of the second driver chips in each second driver chip string group is connected to one of the first driver chips in the first driver chip string group. The driver chip circuit of this invention can effectively reduce the number of cascade stages, reduce signal transmission distortion, and improve signal transmission quality without increasing the number of control device interfaces.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a driver chip circuit, a display panel, a display control system, and a display device. Background Technology

[0002] Currently, display technologies include backlighting technology and direct-view technology, such as dynamic backlighting and zone control, and the lamps used include LED, Mini LED, and Micro LED. High resolution and ultra-large size have always been the development direction of display technology.

[0003] However, due to the increasing number of LEDs on the display board and the limitations of PCB board area and wiring, existing technologies typically use a series connection of all driver chips to form a series string for signal transmission. However, this method of connecting driver chips will lead to an increase in the number of cascade stages, resulting in a deterioration in signal transmission quality. After many stages of transmission, signal distortion will be very obvious and difficult to recover.

[0004] Therefore, improving the quality of signal transmission on a cascaded driver chip is crucial. Summary of the Invention

[0005] This invention provides a driver chip circuit that, by connecting multiple first driver chips in series to form a first driver chip string group, and connecting multiple second driver chip string groups to one of the first driver chips in the first driver chip string group respectively, and connecting the control device to any one of the first driver chips, can effectively reduce the number of cascade stages and improve signal transmission distortion without increasing the number of control device interfaces.

[0006] According to the present invention, the aforementioned task is solved by a driver chip circuit, the driver chip circuit comprising: The first driver chip array includes a plurality of first driver chips connected in series sequentially; and Multiple second driver chip string groups, each second driver chip string group includes multiple second driver chips connected in series in sequence, wherein any one of the second driver chips in each second driver chip string group is connected to a first driver chip in the first driver chip string group; The signal transmission method on the target transmission link in the driver chip circuit includes at least one of the following: Unidirectional serial transmission; Unidirectional parallel transmission; Bidirectional serial transmission; Bidirectional parallel transmission; The target transmission link is used to receive and transmit the target signal so as to deliver the target signal to the target driver chip. The target transmission link includes: All or part of the first driver chips in the first driver chip string group; and / or All or part of the second driver chips in the second driver chip string group.

[0007] Furthermore, each first driver chip in the first driver chip string group is connected to one or more second driver chip strings, and at least one second driver chip at the end of a second driver chip string group is connected to one of the first driver chips in the first driver chip string group.

[0008] Furthermore, each first driver chip in the first driver chip string group is connected to one or more second driver chip strings, and at least one second driver chip in the middle of the second driver chip string group is connected to one of the first driver chips in the first driver chip string group.

[0009] Furthermore, multiple first driver chips are connected in series via a second serial line; Multiple second driver chips in each second driver chip string group are connected in series via a first serial line, and the first serial line is also connected to a first driver chip in the first driver chip string group.

[0010] Furthermore, the target signal includes: a display control signal and / or a display data signal; The second serial line includes signal traces and / or power traces.

[0011] The present invention also provides a display control system, characterized in that it includes: a control device and one or more driver chip circuits; The control device is used to provide target signals to the driver chip circuit.

[0012] The present invention also provides a display panel, characterized in that it includes: one or more driver chip circuits; and A connection interface installed on the display panel, the connection interface being connected to any one of the first driver chips in the first driver chip string group.

[0013] Furthermore, the connection interface is HDMI, I2C, SPI, LVDS, or MIPI.

[0014] The present invention also provides a display device, comprising: Multiple display panels; One or more connection boards, each connection board having one or more external interfaces, the external interfaces matching the connection interfaces of the display panel, and the external interfaces being connected to the connection interfaces; and A control device is mounted on the connecting plate.

[0015] The present invention also provides a display device, comprising: Multiple display panels; and One or more connection boards, each connection board having one or more external interfaces, the external interfaces matching the connection interfaces of the display panel, and the external interfaces being connected to the connection interfaces.

[0016] The present invention has at least the following beneficial effects: This invention forms a two-dimensional signal link structure by connecting multiple first driver chips in series to form a first driver chip string group, and connecting multiple second driver chip string groups to one of the first driver chips in the first driver chip string group, thereby forming a two-dimensional signal link structure. The control device is connected to any one of the first driver chips. This can effectively reduce the number of cascading stages without increasing the number of control device interfaces, improve signal transmission distortion, improve signal transmission quality, and reduce costs. Attached Figure Description

[0017] To further illustrate the above and other advantages and features of the various embodiments of the present invention, a more specific description of the embodiments of the invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by identical or similar reference numerals for clarity.

[0018] Figure 1 A schematic diagram of a driver chip circuit according to a first embodiment of the present invention is shown.

[0019] Figure 2 A schematic diagram of another driver chip circuit according to a first embodiment of the present invention is shown.

[0020] Figure 3 A schematic diagram of a driver chip circuit according to a second embodiment of the present invention is shown.

[0021] Figure 4 A schematic diagram of a driver chip circuit according to a third embodiment of the present invention is shown.

[0022] Figure 5 A schematic diagram of a driver chip circuit according to a fourth embodiment of the present invention is shown.

[0023] Figure 6 A schematic diagram of the pin distribution of a first driver chip according to an embodiment of the present invention is shown.

[0024] Figure 7 A schematic diagram of the pin distribution of a second driver chip according to an embodiment of the present invention is shown.

[0025] Figure 8 A schematic diagram of a driver chip circuit according to a fifth embodiment of the present invention is shown.

[0026] Figure 9 A schematic diagram of a driver chip circuit according to a sixth embodiment of the present invention is shown.

[0027] Figure 10 A schematic diagram of the signal serial transmission mode of the driver chip circuit according to the seventh embodiment of the present invention is shown.

[0028] Figure 11 A schematic diagram of parallel signal transmission of a driver chip circuit according to an eighth embodiment of the present invention is shown.

[0029] Figure 12 A schematic diagram of a serial-parallel combined signal transmission method of a driver chip according to a ninth embodiment of the present invention is shown.

[0030] Figure 13 A schematic diagram of a serial-parallel combined signal transmission method of a driver chip according to the tenth embodiment of the present invention is shown.

[0031] Figure 14 A schematic diagram of a driver chip circuit according to the eleventh embodiment of the present invention is shown.

[0032] Figure 15 A schematic diagram of a display control system according to a twelfth embodiment of the present invention is shown.

[0033] Figure 16 A schematic diagram of a display module according to a thirteenth embodiment of the present invention is shown.

[0034] Figure 17 A schematic diagram of the structure of a display device according to the fourteenth embodiment of the present invention is shown.

[0035] Figure 18 A schematic diagram of the structure of a display panel according to the fifteenth embodiment of the present invention is shown.

[0036] Figure 19 A schematic diagram of a display device according to a sixteenth embodiment of the present invention is shown.

[0037] Figure 20 A schematic diagram of a display device according to the seventeenth embodiment of the present invention is shown.

[0038] Figure 21 A schematic diagram of a display device according to the eighteenth embodiment of the present invention is shown.

[0039] Figure 22 A schematic diagram of a device with a display function according to the nineteenth embodiment of the present invention is shown.

[0040] Figure 23 A schematic diagram of a device with display function according to the twentieth embodiment of the present invention is shown.

[0041] Figure 24 A schematic diagram of a device with display function according to the twenty-first embodiment of the present invention is shown.

[0042] Figure 25 A schematic diagram of a device with display function according to the twenty-second embodiment of the present invention is shown.

[0043] Figure 26 A schematic diagram of a device with display function according to the twenty-third embodiment of the present invention is shown. Detailed Implementation

[0044] It should be noted that the components in the accompanying drawings may be shown exaggerated for illustrative purposes and may not be to scale.

[0045] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0046] In this invention, unless otherwise specified, the quantifiers “a” and “one” do not exclude scenarios involving multiple elements.

[0047] It should also be noted that, in the embodiments of the present invention, only a portion of the parts or components may be shown for clarity and simplicity. However, those skilled in the art will understand that, under the teachings of the present invention, the required parts or components can be added as needed for specific scenarios.

[0048] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0049] It should also be noted that in the description of this invention, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not explicitly or implicitly suggest that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0050] Furthermore, the embodiments of the present invention describe the process steps in a specific order. However, this is only for the convenience of distinguishing each step, and is not a limitation on the order of each step. In different embodiments of the present invention, the order of each step can be adjusted according to the process.

[0051] In some examples, all the driver chips are connected in series to form a series string. The number of cascaded stages of the driver chips depends entirely on the total number n of driver chips in the series string. For example, if there are n driver chips in the series circuit, then the number of cascaded stages is n.

[0052] In some examples, all the driver chips are connected in series. The control device transmits display data, control signals, etc., to the driver chips through signal input A, and then each driver chip receives the required signal in turn. Because the series string of driver chips is too long and the number of cascaded stages is too large, the signal will be significantly distorted during transmission. After multiple stages of transmission, when the signal reaches the driver chips at the end of the series string, especially the last few stages, the signal distortion will be very obvious and difficult to recover.

[0053] In some examples, to overcome this signal transmission distortion problem, multiple signal inputs are set on the serial string of driver chips, such as signal input A, signal input B, signal input C, and so on. Compared to a single signal input, the number of driver chip strings corresponding to multiple signal inputs is shortened, reducing the number of cascade stages and improving signal transmission quality while reducing signal transmission distortion. For example, if there are a total of 90 driver chips in series, with 3 signal inputs, and each signal input corresponds to a string of 30 driver chips, then the number of cascade stages is 30. However, due to the increased number of signal inputs, the control device requires a greater number of interfaces to support them. Therefore, although the number of cascade stages is reduced, the number of interfaces of the control device will increase significantly, which is undesirable in the industry. This will cause many problems, such as increased complexity and cost of the control device, increased traces on the PCB board, and difficulties in PCB routing.

[0054] Therefore, there is a need for a driver chip circuit that can reduce the number of cascade stages and improve signal transmission distortion without increasing the number of control device interfaces.

[0055] A driver chip circuit includes a first driver chip string group and multiple second driver chip string groups, wherein: The first driver chip string group includes multiple first driver chips connected in series sequentially. Each second driver chip string group includes a plurality of second driver chips connected in series in sequence, wherein any one of the second driver chips in each second driver chip string group is connected to a first driver chip in a first driver chip string group.

[0056] Here, sequential connection refers to connecting the first driver chips one by one end to form a continuous path from the first first driver chip to the last first driver chip.

[0057] The signal transmission method on the target transmission link in the driver chip circuit includes at least one of the following: unidirectional serial transmission; unidirectional parallel transmission; bidirectional serial transmission; bidirectional parallel transmission; wherein the target transmission link is used to receive and transmit the target signal to deliver the target signal to the target driver chip; the target transmission link includes: all or part of the first driver chips in the first driver chip string group; and / or all or part of the second driver chips in the second driver chip string group.

[0058] In some examples, the first driver chip string group and the second driver chip string group can form an m×n two-dimensional signal link structure, and the longest cascade number can be m+n-1 stages.

[0059] The control device connects to any one of the first driver chips in the first driver chip string group to transmit signals to the driver chip circuit. The control device only needs one interface to meet the signal transmission requirements. Only one external wire is needed to connect the control device and any one of the first driver chips, reducing external wiring and thus reducing signal interference between external wires, thereby improving signal transmission quality.

[0060] In some examples, the control device may be a control chip.

[0061] Compared to the case where a series of driver chips are connected to form a cascade, such as an m×n array of driver chips connected in series to form a cascade, the longest cascade number is m×n (the total number of driver chips in the array). The number of cascaded driver chips in this invention is greatly reduced, which reduces signal transmission distortion. Furthermore, it does not require an increase in the number of interfaces of the control device, reduces the number of traces, and lowers the wiring difficulty.

[0062] In this embodiment, the driver chip is a controlled object, used to be controlled by the control device to drive the LED display according to the obtained target signal. The control device is the control subject, used to control the behavior of each driver chip in the driver chip circuit with a two-dimensional signal link structure. For example, the control device sends an ID allocation instruction to the driver chip circuit and allocates driver chip IDs according to the feedback from the driver chip circuit, while the driver chip cannot allocate driver chip IDs itself.

[0063] Figure 1 A schematic diagram of a driver chip circuit according to a first embodiment of the present invention is shown. Figure 2 A schematic diagram of another driver chip circuit according to a first embodiment of the present invention is shown.

[0064] like Figure 1As shown, a driver chip circuit includes a first driver chip string group 100 and a plurality of second driver chip string groups 200, wherein: the first driver chip string group 100 includes a plurality of first driver chips 101 connected in series in sequence; each second driver chip string group 200 includes a plurality of second driver chips 201 connected in series in sequence, wherein any one of the second driver chips 201 in each second driver chip string group 200 is connected to one of the first driver chips 101 in the first driver chip string group 100.

[0065] In some examples, each first driver chip 101 in the first driver chip string group 100 is connected to one or more second driver chip strings 200, and at least one second driver chip 201 at the end of the second driver chip string group 200 is connected to one of the first driver chips 101 in the first driver chip string group 100.

[0066] In some examples, the number of second driver chips 201 contained in multiple second driver chip string groups 200 may be the same or different.

[0067] In some examples, any one of the first driver chips 101 can be connected to the control device 300. For example... Figure 1 As shown, the control device 300 can be connected to the first driver chip 101 located at the end of the first driver chip string group 100. Furthermore, the control device 300 can externally connect to the first driver chip 101 at the end of the first driver chip string group 100. Because the first driver chip string group and the second driver chip string group form at least two signal transmission paths starting from the first driver chip 101 at that end, i.e., a two-dimensional signal link structure, compared to connecting all the driver chips in series to form a single, continuous string, creating only one signal transmission path starting from the driver chip at the end, the two-dimensional signal link structure of this invention can reduce the number of cascade stages and lower signal transmission distortion.

[0068] The first serial line 102 is used to connect multiple first driver chips 101 in the first driver chip string group 100 in series sequentially, and the second serial line 202 is used to connect multiple second driver chips 201 in each second driver chip string group 200 in series sequentially, and connect to any one of the first driver chips 101 in the first driver chip string group 100.

[0069] The first serial line 102 and the second serial line 202 are arranged vertically and horizontally without crossing each other, which can reduce jumpers and line crossings, optimize wiring, reduce wiring complexity and difficulty, realize the use of single-layer or fewer-layer wiring circuit boards and simplify board layout, reduce assembly difficulty, reduce costs and improve production efficiency.

[0070] In some examples, such as Figure 2As shown, the control device 300 can be connected to the first driver chip 101 located in the middle of the first driver chip string group 100, and the longest cascade number in the formed two-dimensional signal link structure can be less than m+n-1 stages, and with Figure 1 Compared to the connection method shown, the number of cascade stages is further reduced, which further reduces signal transmission distortion.

[0071] Both the first driver chip 101 and the second driver chip 201 have driver pins for connecting to LEDs. The driver pins are distributed on both sides or one side of the first driver chip 101 and the second driver chip 201.

[0072] In this application embodiment, the term "LED" can refer to any system capable of receiving a signal and generating light color in response to that signal. Therefore, the term "LED" can be understood to include all types of light-emitting diodes, light-emitting polymers, semiconductor dies that generate light in response to current, organic LEDs, electroluminescent strips, light-emitting silicon-based structures, and other such systems. In some examples, "LED" can refer to a single light-emitting diode package having multiple individually controlled semiconductor dies. It should be understood that the term "LED" does not limit the type of LED package. The term "LED" can include packaged LEDs, unpackaged LEDs, surface-mount LEDs, chip-on-a-board LEDs, and all other configurations of LEDs. The term "LED" can also include LEDs packaged with or associated with a phosphor, wherein the phosphor can convert energy from the LED into different wavelengths. In some examples, the LED can be implemented as an RGB LED, and an RGB LED can include red LEDs, green LEDs, and blue LEDs. Furthermore, in addition to RGB LEDs, LEDs can also include white LEDs. In some examples, the LED can be implemented as a MiniLED, for example, a MiniLED can be an LED using a size of 100 to 200 micrometers. In some examples, LEDs can be implemented as MicroLEDs, employing self-emissive technology, and can be MicroLEDs that do not require a backlight or color filter. For example, a MicroLED can be an LED with a size of 100 micrometers or less.

[0073] Figure 3 A schematic diagram of a driver chip circuit according to a second embodiment of the present invention is shown.

[0074] like Figure 3 As shown, each first driver chip 101 in the first driver chip string group 100 is connected to multiple second driver chip string groups 200, and the second driver chip 201 at the end of the second driver chip string group 200 is connected to one of the first driver chips 101 in the first driver chip string group 100. Furthermore, each first driver chip 101 has a second driver chip string group 200 connected to both opposite sides.

[0075] In some examples, the control device may be connected to the first driver chip 101 located in the middle or at the end of the first driver chip string 100. For example, after receiving a signal from the control device, the first driver chip 101 in the middle transmits the signal step by step in the left-right or up-down direction.

[0076] Compared to Figure 1 The connection method shown in this embodiment, where the first driver chip string group 100 and the second driver chip string group 200 are connected, can reduce the maximum number of cascaded stages by half, further reducing signal transmission distortion, and does not require an additional interface for the control device.

[0077] Figure 4 A schematic diagram of a driver chip circuit according to a third embodiment of the present invention is shown.

[0078] In some examples, such as Figure 4 As shown, each first driver chip 101 in the first driver chip string group 100 can be connected to one or more second driver chip string groups 200, and at least one second driver chip 201 in the middle of the second driver chip string group 200 is connected to one of the first driver chips 101 in the first driver chip string group 100. For example, the first driver chip 101 located at the end of the first driver chip string group 100 can be connected to the control device 300.

[0079] and Figure 1 Compared to the connection method shown, in this embodiment, the number of cascaded stages of the second driver chip 201 at the end of the second driver chip string group 200 can be reduced. Therefore, the connection method of the first driver chip string group 100 and the second driver chip string group 200 can further reduce the number of cascaded stages, further reduce signal transmission distortion, and does not require an additional interface for the control device.

[0080] Figure 5 A schematic diagram of a driver chip circuit according to a fourth embodiment of the present invention is shown.

[0081] like Figure 5 As shown, the driver chip circuit includes: multiple driver chips distributed in a two-dimensional array, a first serial line 102 and a second serial line 202, wherein the second serial line 202 is used to sequentially connect each driver chip in each row of the two-dimensional array so that each row in the two-dimensional array is a string of driver chips; the first serial line 102 is used to connect the driver chips in any two adjacent string groups of driver chips to each other so that all the string groups of driver chips are connected to obtain the two-dimensional cascaded transmission link of the display driver circuit; wherein the maximum number of cascaded stages of the two-dimensional cascaded transmission link is less than or equal to the stage threshold.

[0082] In some examples, the number of stages is less than the number of cascaded stages when all the driver chips in the display driver circuit are connected in series. Alternatively, the number of stages is less than the total number of driver chips in the display driver circuit. Preferably, the number of stages = number of columns in the two-dimensional array + number of rows in the two-dimensional array - 1.

[0083] In some examples, all driver chips connected by the first serial line may be located in the same column or different columns in a two-dimensional array. In some examples, the first serial line connects driver chips at the same end of all driver chip strings; or the first serial line connects driver chips located in the middle of all driver chip strings.

[0084] In this embodiment, the driver chips in the driver chip string group include a first driver chip 101 that is simultaneously connected to the first serial line 102 and the second serial line 202, and a second driver chip 201 that is only connected to the second serial line 202.

[0085] like Figure 5 As shown, the first serial line 102 may include a first trace segment 1031 and a second trace segment 1032, wherein the first trace segment 1031 and the second trace segment 1032 are in different columns of the two-dimensional array. The first trace segment 1031 connects to one driver chip in each of the driver chip string groups in one part, and the second trace segment 1032 connects to one driver chip in each of the driver chip string groups in another part. On a single driver chip string group, the number of driver chips spaced between the first trace segment 1031 and the second trace segment 1032 is less than the difference between the total number of driver chips in the single driver chip string group and 2.

[0086] When the first serial line 102 cannot be arranged in a single column, the second serial line can be divided into multiple staggered routing segments to meet actual needs and to run the wiring in the blank wiring area of ​​the display board, thereby improving the rationality of the wiring.

[0087] The methods for setting the first serial line 102 in staggered configuration include, but are not limited to, the following: Figure 5 As shown in the figure.

[0088] In some examples, the second serial line 202 connects each row of driver chips in series to form a driver chip string group, and the driver chips in the driver chip string group can be arranged in a basically straight line. In some examples, multiple driver chip string groups are connected by the first serial line 102. The first serial line 102 and the second serial line 202 connect all the driver chips, presenting a two-dimensional cascaded connection in a two-dimensional array arrangement, and there is a signal path between each two driver chip string groups.

[0089] In some examples, the first serial line 102 and / or the second serial line 202 may include signal traces and / or power traces.

[0090] In some examples, the driver chip may include a first pin pair and a second pin pair. The first pin pair is located on a first side and a second side opposite to each other on the driver chip, and is used to connect to the first serial line 102, respectively; the second pin pair is located on a third side and a fourth side opposite to each other on the driver chip, and is used to connect to the second serial line 202, respectively; the first side and the second side are the lateral sides of the driver chip, perpendicular to the arrangement direction of the first serial line 102; the third side and the fourth side are the longitudinal sides of the driver chip, perpendicular to the arrangement direction of the second serial line 202.

[0091] In some examples, for multiple driver chips in a display driver circuit, at least one driver chip may include a first pin pair and a second pin pair, and at least one driver chip may include a third pin pair. The first pin pair is located on opposite first and second sides of the driver chip and is used to connect to the first serial line 102, respectively. The second pin pair is located on opposite third and fourth sides of the driver chip and is used to connect to the second serial line 202, respectively. The third pin pair is located on adjacent first and third sides or adjacent second and fourth sides of the driver chip, wherein if one pin of the third pin pair is connected to the first serial line 102, the other pin is connected to the second serial line 202.

[0092] In the display driving circuit of the present invention, multiple driving chips are arranged in a two-dimensional array. Since each driving chip is in a different position in the two-dimensional array, the arrangement of the first serial line 102 and the second serial line 202 is different, and the pin settings of the multiple driving chips are different. The above two pin setting methods may exist in the same display driving circuit, or the display driving circuit may only contain one of the above two pin setting methods.

[0093] Figure 6 A schematic diagram of the pin distribution of a first driver chip according to an embodiment of the present invention is shown. Figure 7 A schematic diagram of the pin distribution of a second driver chip according to an embodiment of the present invention is shown.

[0094] In some examples, such as Figure 6As shown, the first driver chip 101 has driver pins 301, first pin pairs, and second pin pairs. Multiple driver pins 301 are located on the third and / or fourth side of the first driver chip 101. Each first pin pair includes a first pin 302 and a second pin 303, located on the first and second sides of the second driver chip, respectively. The first pins 302 and 303 can be connected to a first serial line 102. Each second pin pair includes a third pin 304 and a fourth pin 305, located on the third and fourth sides of the first driver chip 101, respectively. The third pins 304 and 305 are connected to a second serial line 202. The first driver chip 101, with driver pins 301, first pin pairs, and second pin pairs, can be a driver chip located in the center of a two-dimensional array, for example... Figure 5 The driver chip A in the middle.

[0095] In other examples, the first driver chip 101 may have multiple driver pins and third pin pairs. The third pin pairs are located on adjacent first and third sides, or adjacent second and fourth sides, or adjacent first and fourth sides, or adjacent second and third sides of the first driver chip 101. In one case, one pin in the third pin pair is connected to a second serial line, while the other pin is connected to a first serial line. The multiple driver pins are located on the third and / or fourth sides of the first driver chip 101. The first driver chip 101 having multiple driver pins and third pin pairs may be... Figure 5 Driver chip B and driver chip C are included.

[0096] In some examples, such as Figure 7 As shown, the second driver chip 201 has multiple driver pins and second pin pairs. The multiple driver pins 301 are located on the third and / or fourth side of the second driver chip 201, and the second pin pairs include a third pin 304 and a fourth pin 305. The third pin 304 and the fourth pin 305 are located on the third and fourth sides of the second driver chip 201, respectively, and are connected by a second serial line 202. The second driver chip 201, having multiple driver pins and second pin pairs, can be a first driver chip without a row terminal.

[0097] In some examples, the second driver chip 201 located at the end of the row has multiple driver pins and a third pin 304 or a fourth pin 305, with the multiple driver pins 301 located on the third and / or fourth side of the second driver chip 201.

[0098] In some examples, the first and second pins can be signal pins and / or power pins; the third and fourth pins can be signal pins and / or power pins.

[0099] In some examples, the driver pins are used to connect to the LEDs. Depending on the location of the driver pins, the LED array can be arranged on the front of the display panel and located on one or both sides of the driver chip projected onto the front of the display panel.

[0100] The pin configuration of the first driver chip 101 and the second driver chip 201 can optimize the wiring layout, reduce jumpers, and lower wiring complexity. Depending on the different positions of the driver chips in the two-dimensional array or different requirements, unnecessary pins can be reduced or additional pins can be added. By increasing or decreasing the number of pins and / or changing the pin layout of some driver chips on the display board, the distribution and connection form of the driver chips in the two-dimensional array can be formed. Signal pins, power pins, etc., can be symmetrically or asymmetrically distributed relative to the driver chips. Signal pins are used to transmit display control signals and / or display data signals.

[0101] In some examples, the first serial line 102 and / or the second serial line 103 may include signal traces and / or power traces.

[0102] Figure 8 A schematic diagram of a driver chip circuit according to a fifth embodiment of the present invention is shown.

[0103] like Figure 8 As shown, the communication methods between the first driver chips 101, between the second driver chips 201, and between the first driver chip 101 and the second driver chip 201 support bidirectional communication, thereby reducing the complexity of two-dimensional serial routing. The first serial line 102 connecting the first driver chip 101 and the second serial line 202 connecting the second driver chip 201 are bidirectional transmission signal lines. The driver chip circuit supports bidirectional communication, which can reduce the complexity of two-dimensional serial routing and lower the wiring difficulty.

[0104] In other examples, the communication methods between the first driver chips 101, between the second driver chips 201, and between the first driver chip 101 and the second driver chip 201 support unidirectional communication.

[0105] Figure 9 A schematic diagram of a driver chip circuit according to a sixth embodiment of the present invention is shown.

[0106] like Figure 9 As shown, multiple first driver chips 101 in the first driver chip string group 100 are connected in series by a first serial line 102. In some examples, a parallel signal line 103 can connect each first driver chip 101 in the first driver chip string group 100.

[0107] The target transmission link in the driver chip circuit is used to receive and transmit the target signal to deliver it to the target driver chip. In some examples, the target transmission link includes: All or part of the first driver chips in the first driver chip string group; and / or All or part of the second driver chips in the second driver chip string group.

[0108] For example, refer to Figure 9 When any first driver chip in the first driver chip string 100 needs to obtain a target signal sent by the control device (hereinafter referred to as forward transmission), or when any first driver chip in the first driver chip string 100 needs to obtain a target signal fed back to the control device (hereinafter referred to as reverse transmission), there are first driver chips on the target transmission link, and the number of first driver chips that the target signal passes through during transmission can depend on the position of the target driver chip.

[0109] When any second driver chip in the second driver chip string needs to obtain the target signal for forward transmission, there are first driver chips and second driver chips on the target transmission link. The number of first driver chips and second driver chips that the target signal passes through during transmission can also depend on the position of the target driver chip.

[0110] When any second driver chip in the second driver chip string needs to obtain the target signal transmitted in reverse, there is a second driver chip on the target transmission link, and the number of second driver chips that the target signal transmission passes through can also depend on the location of the target driver chip.

[0111] For example, refer to Figure 1 For driver chip 2n, the target transmission link can be: driver chip 11 → driver chip 21 → driver chip 22 → … → driver chip 2n, achieving "S"-shaped signal transmission, with a cascade number of 1+n stages. Compared to using a single serial string, which would require 2n stages of transmission links, this significantly reduces the number of cascade stages, thereby reducing signal transmission distortion. Furthermore, reducing the number of cascade stages in the target transmission link also reduces the cumulative effect of transmission delay, lowering the latency of the display and improving the display response speed.

[0112] In some examples, the target signals include: display control signals and / or display data signals.

[0113] For example, the display control signal can be used to coordinate or control the driver chip's signal transmission, reception, and processing. For instance, the display control signal may include a synchronization clock signal.

[0114] Display data signals can be used to characterize the display status of LEDs driven by driver chips. For example, display data signals can include RGB data signals (red, green, and blue).

[0115] In some examples, where the target driver chip includes a first driver chip, the first driver chip is configured as follows: Receive first data information from the display data signal transmitted serially, delete the data information corresponding to the target driver chip from the first data information to obtain second data information, and output the second data information to provide to the next-level driver chip of the target driver chip; and / or The third data information is received from the display data signal transmitted serially, and the third data information is output to provide to the next-level driver chip of the target driver chip.

[0116] In some examples, the signal transmission between the target driver chip and its next-level driver chip can be unidirectional serial or bidirectional serial. Bidirectional communication can reduce the complexity of two-dimensional serial routing and lower the difficulty of wiring.

[0117] In some examples, where the target driver chip includes a first driver chip, the first driver chip is configured to implement at least one of the following: The system receives display data signals transmitted in parallel, deletes the data information corresponding to the target driver chip from the display data signals to obtain the remaining data information, and outputs the remaining data information to provide to the next-level driver chip of the target driver chip. It receives display data signals transmitted in parallel and outputs display data signals to provide to the next-level driver chip of the target driver chip; Receive display control signals transmitted in parallel.

[0118] In some examples, signal transmission between the target driver chip and its next-level driver chip can be either unidirectional or bidirectional parallel. Bidirectional communication can reduce the complexity of two-dimensional serial routing and lower the difficulty of wiring.

[0119] In some examples, where the target driver chip includes a second driver chip, the second driver chip is configured as follows: Receives the fourth data information from the display data signal transmitted serially, deletes the data information corresponding to the target driver chip from the fourth data information to obtain the fifth data information, and outputs the fifth data information to provide to the next-level driver chip of the target driver chip; and / or It receives the sixth data information from the display data signal transmitted serially and outputs the sixth data information to provide to the next-level driver chip of the target driver chip.

[0120] In some examples, where the target driver chip includes a second driver chip, the second driver chip is configured to implement at least one of the following: It receives display data signals transmitted in parallel mode, deletes the data information corresponding to the target driver chip from the display data signal to obtain the remaining data information, and outputs the remaining data information to provide to the next-level driver chip of the target driver chip. It receives display data signals transmitted in parallel and outputs display data signals to provide to the next-level driver chip of the target driver chip; Receive display control signals transmitted in parallel.

[0121] Figure 10 A schematic diagram of the signal serial transmission mode of the driver chip circuit according to the seventh embodiment of the present invention is shown.

[0122] In some examples, such as Figure 10 As shown, the first driver chip 101 located at the left end of the first driver chip group 100 receives the first data information in the display data signal transmitted serially, and then deletes the data information corresponding to the first driver chip 101 to form the second data information and transmits it to the next level of the first driver chip. In this way, the display data signal can be transmitted to each first driver chip 101.

[0123] like Figure 10 As shown, the first signal contains multiple data segments. The transmission of data segments ①, ②, ③, ④, ⑤… of the first signal on the first serial line 102 of the multiple first driver chips 101 connected in series in the first driver chip string group 100 can be as follows: data segments ①, ②, ③, ④, ⑤… are transmitted to one driver chip, which receives data segment ① and sends data segments ②, ③, ④, ⑤… Then, another driver chip receives data segment ② and sends data segments ③, ④, ⑤… Then, yet another driver chip receives data segment ③ and sends data segments ④, ⑤… This continues. It should be understood that… Figure 10 Only the data transmission method on the first driver chip string group 100 is shown. The data transmission methods between the first driver chip string group and the second driver chip string group, as well as on the second driver chip string group, can be the same as the data transmission method on the first driver chip string group, and will not be described again here.

[0124] For example, the first signal can be transmitted serially via a single signal line, but is not limited to this.

[0125] In other examples, the first driver chip 101 located at the left end of the first driver chip group 100 receives the third data information in the display data signal transmitted serially, and then transmits it to the next level of the first driver chip, and so on, so that the display data signal can be transmitted to each first driver chip 101.

[0126] In some examples, the first driver chips 101 can transmit signals in either unidirectional or bidirectional directions. Bidirectional communication can reduce the complexity of two-dimensional serial routing and lower the difficulty of wiring.

[0127] In some examples, multiple first driver chips 101 in the first driver chip string 100 can receive display control signals using parallel signal lines 103.

[0128] Figure 11 A schematic diagram of parallel signal transmission of a driver chip circuit according to an eighth embodiment of the present invention is shown.

[0129] like Figure 11 As shown, the first signal contains multiple data information, which can be transmitted in parallel through multiple parallel signal lines. In this case, the first serial line 102 includes multiple parallel signal lines.

[0130] For example, the transmission of data segments ①, ②, ③, ④, ⑤… of the first signal on multiple parallel signal lines among multiple first driver chips 101 in the first driver chip serial group 100 can be as follows: data segments ①, ②, ③, ④, ⑤… are transmitted to one driver chip, which receives data segment ① and sends data segments ①, ②, ③, ④, ⑤… Then, another driver chip receives data segment ② and sends data segments ①, ②, ③, ④, ⑤… Then, yet another driver chip receives data segment ③ and sends data segments ①, ②, ③, ④, ⑤… This continues. It should be understood that… Figure 11 Only the data transmission method on the first driver chip string group is shown. The data transmission methods between the first driver chip string group and the second driver chip string group, as well as on the second driver chip string group, can be the same as the data transmission method on the first driver chip string group, and will not be described again here.

[0131] In some examples, the number of signal lines in a parallel signal line can be the same as the number of driver chips on the target transmission link.

[0132] In some examples, multiple first driver chips 101 in the first driver chip string 100 can receive display control signals using parallel signal lines 103.

[0133] Figure 12 A schematic diagram of a serial-parallel combined signal transmission method of a driver chip according to a ninth embodiment of the present invention is shown.

[0134] like Figure 12As shown, the serial and parallel transmission methods described above can be used in combination. The first serial line 102, which connects multiple first driver chips 101 in the first driver chip group 100, can contain multiple signal lines. Some of these signal lines are used for serial transmission and are serial signal lines, while others are used for parallel transmission and are parallel signal lines. The first signal is transmitted to each of the first driver chips 101 in the first driver chip group 100 in a combined serial and parallel manner through these multiple signal lines. In other words, both serial and parallel transmission can be achieved simultaneously using multiple first serial lines. The first signal contains multiple data information.

[0135] One signal line in the first serial line 102 transmits a portion of the first signal to the first driver chip 101 in a serial manner, while the remaining signal lines transmit the other portion of the first signal to the first driver chip 101 in a parallel manner. The first signal can be a display data signal.

[0136] In some examples, such as Figure 12 As shown, the first driver chip 101 located at the left end of the first driver chip string 100 receives the first data information in the display data signal transmitted serially, then deletes the data information corresponding to the first driver chip 101 to form the second data information, which is transmitted to the next level first driver chip through the serial signal line, and so on.

[0137] In some examples, such as Figure 12 As shown, the first driver chip 101, located at the left end of the first driver chip string 100, receives the third data information from the display data signal transmitted serially, and then outputs the third data information to the next-level first driver chip through a parallel signal line, and so on. In some examples, the third data information contains multiple data information, each of which is transmitted through a parallel signal line.

[0138] In some examples, the number of serial signal lines and parallel signal lines can be set according to the signals that need to be transmitted.

[0139] The first driver chips 101 can use unidirectional or bidirectional signal transmission.

[0140] In some examples, multiple first driver chips 101 of the first driver chip string 100 can receive control signals using parallel signal lines 103.

[0141] In this embodiment of the invention, the transmission of signals between the second driver chips in the second driver chip string group and between the first driver chip and the second driver chip can be the same as the transmission of signals between the first driver chips in the first driver chip string group, and will not be described again here.

[0142] Figure 13 A schematic diagram of a serial-parallel combined signal transmission method of a driver chip according to the tenth embodiment of the present invention is shown.

[0143] like Figure 13 As shown, the first signal contains multiple data information, which can be transmitted serially or in parallel via serial signal lines and multiple parallel signal lines, respectively. Serial signal lines and multiple parallel signal lines connect the multiple first driver chips 101. The first driver chip 101 is connected to the second driver chip 201, and the multiple second driver chips 201 are connected via multiple parallel signal lines.

[0144] For example, data segments ①, ②, ③, ④… of the first signal are transmitted to the first driver chip 101 via serial signal lines, and data segments ⑤, ⑥… of the first signal are transmitted to the first driver chip 101 via multiple parallel signal lines. Here, the term "first driver chip" refers to the first driver chip that receives signals from the outside.

[0145] The first driver chip 101 receives data segment ① and sends data segments ③, ④... to the adjacent first driver chip via a serial signal line, and sends data segments ⑤, ⑥... to the adjacent first driver chip via a parallel signal line. The first driver chip 101 then sends data segments ②, ⑤, ⑥... to the second driver chip connected to it.

[0146] The first driver chip adjacent to the first first driver chip 101 acquires data segment ③, sends data segments ④, ⑤, ⑥... to the second driver chip 201 adjacent to it, and sends data segments ⑤, ⑥... to the next level first driver chip.

[0147] The present invention also provides a display control system including a control device and a driver chip circuit. The control device is connected to any one of the first driver chips in the driver chip circuit through its interface. The control device is used to provide target signals to the driver chip circuit. The target signals include display control signals and / or display data signals.

[0148] The control device provides display control signals, display data signals, and other signals to the driver chip circuit, and controls the transmission of target signals on the target transmission link, which can realize display control such as dynamic backlighting and zone control of each lamp.

[0149] The control device of the present invention only needs to provide chip interfaces corresponding to one or a few driver chips connected to it, which greatly reduces the number of interfaces.

[0150] The control device can be a master control unit (SOC) or can be connected to a master control unit (SOC). The master control unit (SOC) can be used to send display data, control signals, and other signals to the control device.

[0151] In the case where the display control system includes multiple driver chip circuits, the control device can be connected to each driver chip circuit individually, or multiple driver chip circuits can be connected together and any one driver chip circuit can be selected to be connected to the control device.

[0152] Figure 14 A schematic diagram of a driver chip circuit according to the eleventh embodiment of the present invention is shown.

[0153] like Figure 14 As shown, the driver chip circuit includes a first driver chip circuit 10 and a second driver chip circuit 20. The first driver chip circuit 10 and the second driver chip circuit 20 can be connected via a first series line 102 and a parallel signal line 103. In some examples, the first series line connects each first driver chip of the first driver chip circuit 10 and each first driver chip of the second driver chip circuit 20 in series. In some examples, the parallel signal line connects any one of the first driver chips of the first driver chip circuit 10 and any one of the first driver chips of the second driver chip circuit 20.

[0154] In some examples, the signal transmission between the first driver chip circuit and the second driver chip circuit includes at least one of the following: The first driver chip circuit receives the target signal transmitted in serial mode and / or parallel mode, and outputs it to the second driver chip circuit after deleting the data information corresponding to the first driver chip in the target signal. The first driver chip circuit receives the target signal transmitted serially and / or in parallel, and outputs the target signal to the second driver chip circuit. The first driver chip circuit and the second driver chip circuit simultaneously receive target signals transmitted in serial mode and / or parallel mode.

[0155] In this embodiment of the application, the target signal may include at least one of a first signal and a second signal.

[0156] In some examples, the signal transmission between the first driver chip circuit and the second driver chip circuit includes at least one of the following: The first driver chip circuit 10 receives the first signal transmitted in serial mode and / or parallel mode, deletes the data information corresponding to the first driver chip circuit 10 in the first signal, and then outputs it to the second driver chip circuit 20. The first driver chip circuit 10 receives the first signal transmitted in serial mode and / or parallel mode, and outputs the first signal to the second driver chip circuit 20.

[0157] In some examples, the first driver chip circuit 10 and the second driver chip circuit 20 receive the second signal.

[0158] In some examples, multiple driver chip circuits can be disposed on different backlight boards. For example, the first driver chip circuit is disposed on the first backlight board, the second driver chip circuit is disposed on the second backlight board, and so on. The communication signals between the backlight boards include a first signal and / or a second signal.

[0159] In some examples, the first signal may be a display data signal. The display data signal can be transmitted serially and / or in parallel.

[0160] The second signal can be a display data signal and / or a display control signal, which is transmitted to the first driver chip in the first driver chip serial group through the parallel signal line 103.

[0161] Figure 15 A schematic diagram of a display control system according to a twelfth embodiment of the present invention is shown.

[0162] In some examples, such as Figure 15 As shown, any one of the first driver chips in the first driver chip circuit 10 is connected to the first control device 30, and any one of the first driver chips in the second driver chip circuit 20 is connected to the second control device 40. The first control device 30 and the second control device 40 are connected together. In some examples, the main control device 50 can be connected to either the first control device 30 or the second control device 40, for example, to the first control device 30.

[0163] Figure 16 A schematic diagram of a display module according to a thirteenth embodiment of the present invention is shown.

[0164] In some examples, such as Figure 16 As shown, the display module includes a display panel 01, a control device 300, and a power supply 60.

[0165] The display panel 01 includes a substrate 011 and one or more display driving circuits disposed on the substrate 011.

[0166] The control device 300 is connected to any one of the first driver chips in the display driver circuit via an external wiring connection to the display panel 01. The control device 300 can receive signals such as the display data sequence from the main control device, and then distribute them to each driver chip in sequence according to the data arrangement order in the display data sequence.

[0167] Power supply 60 is used to power the display panel. In some examples, power supply 60 is connected to any one of the first driver chips in the display driver circuit, and can power all the driver chips. In other examples, power supply 60 is connected to all the driver chips via separate power lines to power the driver chips.

[0168] Figure 17A schematic diagram of the structure of a display device according to the fourteenth embodiment of the present invention is shown.

[0169] like Figure 17 As shown, a display device includes multiple display modules 400 connected in series. In some examples, a control device is connected between two adjacent display modules 400 to realize the series connection of multiple display modules 400. In some examples, a main control device 50 is connected to any one of the display modules 400.

[0170] In some examples, the main control device 50 is located outside the display device and can be a host computer, a control center, etc. The main control board and the display device can be deployed in different locations or in a similar location. For example, a different location deployment would be like that between an outdoor display screen and an indoor control center.

[0171] In other examples, the main control unit 50 is located inside the display device, such as in the case of an all-in-one television.

[0172] Figure 18 A schematic diagram of the structure of a display panel according to the fifteenth embodiment of the present invention is shown.

[0173] like Figure 18 As shown, a display panel may include a driver chip circuit and a connection interface 02. The connection interface 02 is connected to any one of the first driver chips 101 in the driver chip circuit, and is used to acquire external signals and output the external signals to the first driver chip 101, so that the external signals are transmitted step by step through the first driver chip 101.

[0174] The driver chip circuit in this embodiment and Figure 1 The driver chip circuit shown in the embodiment is the same. The driver chip circuit in this embodiment can also be replaced with... Figures 2 to 5 The driving chip circuit of the embodiment shown.

[0175] In some examples, the connection interface 02 can be an HDMI (High Definition Multimedia Interface), an I2C (Integrated Circuit Bus) interface, an SPI (Serial Peripheral Interface), an LVDS (Low Voltage Differential Signaling) interface, or a MIPI (Mobile Industry Processor Interface).

[0176] Figure 19 A schematic diagram of a display device according to a sixteenth embodiment of the present invention is shown.

[0177] like Figure 19 As shown, the display device includes multiple display panels 01 and a connecting plate 03. The connecting plate 03 has multiple external interfaces 031, and the connecting interfaces 02 of the display panels 01 are connected to the external interfaces 031 of the connecting plate 03.

[0178] In some examples, connection interface 02 and external interface 031 are matching plug-in interfaces, connected by plugging. Display panel 01 can be directly connected to connection board 03, theoretically without external wiring, through the connection of the cathode and anode of the connector.

[0179] The connection interface 02 is located on the back of the display panel 01, and the front of the display panel 01 has LEDs that emit light.

[0180] The display panel 01 can be protected by an encapsulated shell, which improves safety and facilitates transportation and assembly.

[0181] Figure 20 A schematic diagram of a display device according to the seventeenth embodiment of the present invention is shown.

[0182] like Figure 20 As shown, the display device includes multiple display panels 01 and multiple connecting plates 03. The multiple connecting plates 03 are connected in series, and each connecting plate 03 can connect to a portion of the multiple display panels 01.

[0183] Using multiple connection boards 03 to connect multiple display panels, instead of using a single connection board to connect all display panels, can reduce the size of the connection boards, further reduce costs, and improve connection flexibility.

[0184] In other examples, most of the connection boards 03 can be directly connected to all the display panels 01 by plugging them in. The remaining few display panels 01 can be connected to the connection boards 03 by external wiring, which can further reduce the area of ​​the connection boards.

[0185] The present invention also provides a display device, comprising: a plurality of display panels; one or more connecting plates, the connecting plates having one or more external interfaces, the external interfaces matching the connection interfaces of the display panels, and the external interfaces and the connection interfaces being connected; and a control device disposed on the connecting plate. The control device is integrated on the connecting plate, eliminating the need for external wiring between the connecting plate and the control device, further reducing the number of connections.

[0186] Figure 21 A schematic diagram of a display device according to the eighteenth embodiment of the present invention is shown.

[0187] like Figure 21 As shown, the display device includes: multiple display panels 01, a connection plate 03, and a control device 300. The connection plate 03 may have multiple external interfaces, which are matched with the connection interfaces of the display panels 01, and the external interfaces and the connection interfaces are connected. The control device 300 may be mounted on the connection plate.

[0188] In other examples, there are multiple connection boards connected in series, and the control device is integrated on one of the connection boards.

[0189] By mounting the control device on the connection board and using the connection board for conversion, the number of external wires between the display panel and the control device can be reduced. Furthermore, multiple display panels can be powered only by connecting the power supply through the connection board. Compared to each display panel having to connect to the control device and power supply through external wires, this reduces the number of wires and signal interference, improves power supply stability, and saves costs.

[0190] Figure 22 A schematic diagram of a device with a display function according to the nineteenth embodiment of the present invention is shown.

[0191] like Figure 22 As shown, a device with display function includes: a plurality of display panels 01; one or more connecting plates 03, the connecting plates 03 having one or more external interfaces 031, the external interfaces 031 matching the connecting interfaces 02 of the display panels 01, and the external interfaces 031 and the connecting interfaces 02 being connected; a control device 300 connected to the connecting plates; and a main control device 50 connected to the control device.

[0192] In some examples, the connection board 03 has multiple external interfaces 031 that can be connected to multiple display panels 01.

[0193] The control device 300 can receive signals such as display data sequence from the main control device 50, and then distribute them sequentially to each driver chip of each display panel 01 according to the data arrangement order in the display data sequence.

[0194] The control device 300 processes the display data and other signals from the self-control device 50 and sends them to each display panel via the connection board 03.

[0195] In one embodiment, the main control device 50 can be a host computer, a computer, a control center, etc. The main control device 50, the display panel 01, the connection board 03, and the control device 300 can be deployed in different locations or in a similar location. For example, a different location deployment would be like that between an outdoor display screen and an indoor control center.

[0196] Figure 23 A schematic diagram of a device with display function according to the twentieth embodiment of the present invention is shown.

[0197] like Figure 23 As shown, with Figure 22 Compared to the device shown, the device with display function in this embodiment also includes a power supply 60, which is connected to the connecting plate 03 and supplies power to the display panel 01.

[0198] The power supply can be connected to an external power supply (mains power) to convert the voltage of the external power supply into a voltage that can be supplied to the display panel 01 and the connection board 03, thus providing power to the display panel 01, the connection board 03, etc.

[0199] As can be seen, this invention requires only a small number of external wires, such as ribbon cables or multi-core cables, between the connection board, control board, and power supply to complete the assembly, greatly reducing the number of external wires, or even eliminating the need for external wires altogether, and lowering the assembly difficulty and cost. Furthermore, the uniform length and distribution of the power lines reduce voltage drop, thereby reducing power consumption.

[0200] Figure 24 A schematic diagram of a device with display function according to the twenty-first embodiment of the present invention is shown.

[0201] like Figure 24 As shown, the device with display function includes: multiple display panels 01, a connection board 03, a control device 300, and a main control device 50. The connection board 03 may have multiple external interfaces, which match the connection interfaces of the display panels 01, and the external interfaces and the connection interfaces are connected. The control device 300 may be mounted on the connection board. The main control device 50 is connected to the control device 300. The control device is integrated on the connection board, eliminating the need for external wiring between the connection board and the control device, further reducing the number of connections.

[0202] Figure 25 A schematic diagram of a device with display function according to the twenty-second embodiment of the present invention is shown.

[0203] like Figure 25 As shown, the device with display function includes: multiple display panels 01, multiple connection plates 03, control device 300 and main control device 50.

[0204] Multiple connecting plates 03 are connected in series, and each connecting plate 03 can connect a portion of multiple display panels 01. Using multiple connecting plates 03 to connect multiple display panels, instead of a single connecting plate connecting all display panels, can reduce the size of the connecting plates, further reduce costs, and improve connection flexibility.

[0205] The device with display functionality also includes a power supply 60, which is connected to one of the connection boards 03.

[0206] Figure 26 A schematic diagram of a device with display function according to the twenty-third embodiment of the present invention is shown.

[0207] like Figure 26 As shown, the device with display function includes multiple display panels 01, a connection plate 03, a control device 300, a power supply 60, and a housing 700.

[0208] The device with display functionality also includes a main control unit (not shown). The control unit 300 is mounted on the connection plate 03. The control unit 300 is connected to the main control unit via a network cable or fiber optic cable, so that the main control unit can transmit display data and / or control signals to the control unit 300.

[0209] The connecting plate 03 is connected to the power supply 60, which can be connected to an external power supply (mains power).

[0210] The display panel 01, connecting plate 03, and power supply 60 are packaged in a 700-type housing. The display panel 01, connecting plate 03, and power supply 60 are all encapsulated within the housing.

[0211] While some embodiments of the present invention have been described in this application, those skilled in the art will understand that these embodiments are merely illustrative. Numerous variations, alternatives, and improvements will arise in those skilled in the art under the teachings of this invention without departing from its scope. The appended claims are intended to define the scope of the invention and thereby cover methods and structures within the scope of the claims themselves and their equivalents.

Claims

1. A driver chip circuit, characterized in that, include: The first driver chip string group includes multiple first driver chips connected in series sequentially. as well as Multiple second driver chip string groups, each second driver chip string group includes multiple second driver chips connected in series in sequence, wherein any one of the second driver chips in each second driver chip string group is connected to a first driver chip in the first driver chip string group; The signal transmission method on the target transmission link in the driver chip circuit includes at least one of the following: Unidirectional serial transmission; Unidirectional parallel transmission; Bidirectional serial transmission; Bidirectional parallel transmission; The target transmission link is used to receive and transmit the target signal so as to deliver the target signal to the target driver chip. The target transmission link includes: All or part of the first driver chips in the first driver chip string group; and / or All or part of the second driver chips in the second driver chip string group.

2. The driver chip circuit according to claim 1, characterized in that, Each first driver chip in the first driver chip string group is connected to one or more second driver chip strings, and at least one second driver chip at the end of a second driver chip string group is connected to a first driver chip in the first driver chip string group.

3. The driver chip circuit according to claim 1, characterized in that, Each first driver chip in the first driver chip string group is connected to one or more second driver chip strings, and at least one second driver chip in the middle of the second driver chip string group is connected to one of the first driver chips in the first driver chip string group.

4. The driver chip circuit according to claim 1, characterized in that, Multiple first driver chips are connected in series via a second serial line; Multiple second driver chips in each second driver chip string group are connected in series via a first serial line, and the first serial line is also connected to a first driver chip in the first driver chip string group.

5. The driver chip circuit according to claim 4, characterized in that, The target signal includes: a display control signal and / or a display data signal; The second serial line includes signal traces and / or power traces.

6. A display control system, characterized in that, include: A control device and one or more driver chip circuits as described in any one of claims 1-5; The control device is used to provide target signals to the driver chip circuit.

7. A display panel, characterized in that, include: One or more driver chip circuits as described in any one of claims 1-5; as well as A connection interface installed on the display panel, the connection interface being connected to any one of the first driver chips in the first driver chip string group.

8. The display panel according to claim 7, characterized in that, The connection interface is HDMI, I2C, SPI, LVDS, or MIPI.

9. A display device, characterized in that, include: Multiple display panels as described in claim 7; One or more connection boards, each connection board having one or more external interfaces, the external interfaces matching the connection interfaces of the display panel, and the external interfaces being connected to the connection interfaces; and A control device is mounted on the connecting plate.

10. A display device, characterized in that, include: Multiple display panels as described in claim 7; as well as One or more connection boards, each connection board having one or more external interfaces, the external interfaces matching the connection interfaces of the display panel, and the external interfaces being connected to the connection interfaces.

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