Optoelectronic semiconductor chip and method for manufacturing an optoelectronic semiconductor chip

Abstract

Optoelectronic semiconductor chip (100) with a radiation main side (101), comprising: - at least one n-doped semiconductor layer (21), - at least one p-doped semiconductor layer (23), and - an active layer (22) arranged between the at least one n-doped semiconductor layer (21) and the at least one p-doped semiconductor layer (23), which is configured to emit radiation, - a structured support (1) arranged on the side of the semiconductor chip (100) facing away from the radiation main side (101), - wherein the p-doped semiconductor layer (23) is electrically contacted by means of a first contact layer (3) and the n-doped semiconductor layer (21) is electrically contacted by means of a second contact layer (4), - wherein the first contact layer (3) is electrically contacted by means of a first contact layer (5) and the second contact layer (4) is electrically contacted by means of a second contact layer (6),wherein the first and second contact layers (5, 6) completely penetrate the support (1) and the first contact layer (5) is arranged laterally spaced from the second contact layer (6), and wherein the support (1) consists of a stabilizing material that is a photoresist, an inorganic-organic hybrid material, a spin-on material, an insulating material applied by screen printing, or a dielectric material, wherein the support (1) has a maximum thickness that is at least six times greater than the maximum thickness of a semiconductor layer sequence (2), wherein the semiconductor layer sequence (2) comprises at least the n-doped semiconductor layer (21), at least the p-doped semiconductor layer (23), and the active layer (22), wherein the first and second contact layers (5, 6) project laterally beyond the support in a direction away from the main radiation face (101),wherein one side of the support (1) facing away from the active layer (22) is free from the first and second contact layers (5, 6).

Description

[0001] The invention relates to an optoelectronic semiconductor chip. Furthermore, the invention relates to a method for manufacturing an optoelectronic semiconductor chip.

[0002] Optoelectronic semiconductor chips typically use substrates to ensure sufficient stability after the semiconductor layers have been detached from the growth substrate. Currently, optoelectronic semiconductor chips are stabilized using a molding process with epoxies, silicones, or other plastics. A disadvantage of this molding process is that, after encapsulation, the contact layers, especially the backside contacts, which are usually deposited electroplated beforehand, must be ground down.

[0003] One object of the invention is to provide an optoelectronic semiconductor chip that can be manufactured simply and / or cost-effectively. A further object of the invention is to provide a cost-effective method for manufacturing an optoelectronic semiconductor chip. In particular, a method is provided that avoids the exposure of the electroplated contact layers. Furthermore, the method avoids a so-called molding process.

[0004] These problems are solved by an optoelectronic semiconductor chip according to independent claim 1. Advantageous embodiments and further developments of the invention are the subject of the dependent claims. Furthermore, these problems are solved by a method for manufacturing an optoelectronic semiconductor chip according to independent claim 9. Advantageous embodiments and further developments of the method are the subject of dependent claims 10 to 13.

[0005] In at least one embodiment, the optoelectronic semiconductor chip has a primary radiation face. The optoelectronic semiconductor chip comprises a sequence of semiconductor layers, including at least one n-doped semiconductor layer, at least one p-doped semiconductor layer, and an active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer. In particular, the primary radiation face is oriented perpendicular to a growth direction of the semiconductor layer sequence of the optoelectronic semiconductor chip. Radiation is emitted from the primary radiation face. The active layer is configured to emit radiation. The optoelectronic semiconductor chip has a structured support arranged on or at the side of the semiconductor chip facing away from the primary radiation face.

[0006] The p-doped semiconductor layer is electrically contacted via a first connection layer. The n-doped semiconductor layer is electrically contacted via a second connection layer. The first connection layer is electrically contacted via a first contact layer.

[0007] The second connection layer is electrically contacted by means of a second contact layer. The first and second contact layers completely penetrate the substrate. The first contact layer is laterally spaced from the second contact layer. The substrate comprises a stabilizing material selected from the group consisting of or comprising a photoresist, an inorganic-organic hybrid material, a spin-on material, an insulating material applied by screen printing, and a dielectric material.

[0008] The semiconductor layer sequence of the optoelectronic semiconductor chip is preferably based on a III-V compound semiconductor material. The semiconductor material can preferably be a nitride compound semiconductor material, such as Al. n In 1-n-m Ga m N or a phosphide compound semiconductor material, such as Al n In 1-n-m Ga m P or an arsenide compound semiconductor material, such as Al n In 1-n-m Ga m As based, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1 and m + n ≤ 1. "Based on a nitride compound semiconductor material" in this context means that the semiconductor layer sequence, or at least one layer thereof, is a III nitride compound semiconductor material, preferably In x Al y Ga 1-x-yN comprises, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and x + y ≤ 1. This material does not necessarily have to have a mathematically exact composition according to the formula above. Rather, it can contain one or more dopants as well as additional components that impart the characteristic physical properties of the in x Al y Ga 1-x-y The N-materials do not change substantially. For the sake of simplicity, however, the formula above only includes the essential components of the crystal lattice (In, Al, Ga, N), even though these may be partially replaced by small amounts of other substances.

[0009] The semiconductor layer sequence includes an active layer with at least one pn junction and / or with one or more quantum well structures. During operation of the semiconductor chip, electromagnetic radiation is generated in the active layer. The active layer is specifically configured for the emission of radiation. A wavelength or wavelength maximum of the radiation preferably lies in the ultraviolet and / or visible and / or infrared spectral range, particularly at wavelengths between 420 nm and 800 nm inclusive, for example, between 420 nm and 480 nm inclusive.

[0010] According to at least one embodiment, the optoelectronic semiconductor chip is a light-emitting diode chip, or LED for short. The semiconductor chip is then preferably configured to emit blue light, green light, red light, yellow light, or white light.

[0011] According to at least one embodiment, the optoelectronic semiconductor chip is a thin-film semiconductor chip, in particular a thin-film light-emitting diode chip.

[0012] According to at least one embodiment, the p-doped semiconductor layer is electrically contacted by means of a first connection layer. In other words, the first connection layer forms the p-contact of the optoelectronic semiconductor chip. The first connection layer can, in particular, be arranged on the side of the optoelectronic semiconductor chip facing away from the main radiation side.

[0013] The first contact layer can consist of or comprise a metal. The first contact layer can have a layered structure. For example, the first contact layer can comprise a first layer of a first metal or alloy and a second layer of a second metal or alloy. In particular, the first metal is different from the second metal.

[0014] Alternatively or additionally, the n-doped semiconductor layer can be electrically contacted by means of a second contact layer. In other words, the second contact layer then forms the n-contact of the optoelectronic semiconductor chip. The second contact layer can be located, in particular, on the side facing away from the main radiation-facing side of the optoelectronic semiconductor chip. The second contact layer can have a sequence of layers. For example, the second contact layer can comprise or consist of a first metal layer, an adhesion-promoting layer, and a metal. The second contact layer can have a conductive oxide. In particular, the second contact layer then has the conductive oxide in conjunction with a metal layer.

[0015] According to at least one embodiment, the first connection layer is electrically contacted by means of a first contact layer. In other words, the first contact layer enables current flow via the p-contact of the optoelectronic semiconductor chip.

[0016] According to at least one embodiment, the second connection layer is electrically contacted by means of a second contact layer. In other words, the second contact layer is configured to transport current or charge carriers from the n-contact.

[0017] According to at least one embodiment, the first and / or second contact layer each comprises or consists of at least one material made of gold (Au), silver (Ag), titanium (Ti), platinum (Pt), palladium (Pd), copper (Cu), nickel (Ni), indium (In), rhenium (Rh), chromium (Cr), aluminum (Al), tungsten (W), tin (Sn), lead (Pb), germanium (Ge), bismuth (Bi), antimony (Sb), zinc (Zn), combinations or alloys, oxides, or nitrides thereof. Alternatively or additionally, the first and / or second contact layer each comprises or consists of at least one metal made of the aforementioned metals, a combination of these metals, or alloys thereof.

[0018] According to at least one embodiment, the first and / or second contact layer completely penetrates the structured carrier. In particular, the carrier is structured and applied directly or indirectly to or onto the second contact layer. "Direct" here and in the following refers to direct mechanical and / or electrical contact. In particular, no further elements or layers are arranged between the carrier and the second contact layer. "Indirect" here and in the following refers to immediate mechanical and / or electrical contact. In particular, at least one element or layer, for example an insulating layer, is arranged between the carrier and the second contact layer. The first and / or second contact layer penetrates the carrier, thus extending from the underside of the carrier through the carrier to its top surface.The first contact layer can be arranged laterally spaced from the second contact layer. That is, in a direction that runs, for example, parallel to the surface of the substrate or parallel to the main radiation direction, a second contact layer is created at a distance from the first contact layer. In other words, the first and / or second contact layer is embedded in the substrate.

[0019] According to at least one embodiment, the first and / or second contact layer, in side view or cross-section, projects beyond the substrate of the optoelectronic semiconductor chip in a direction away from the main radiation side. In other words, an optoelectronic semiconductor chip is produced whose contact layers do not terminate flush with the surface of the substrate facing away from the main radiation side, but rather have edges that project beyond the substrate surface. This makes the first and second contact layers easier to solder in a subsequent process step. This projecting first and / or second contact layer can be created by a two-layer photoresist and / or a two-layer dielectric. In particular, the two-layer photoresist and / or the two-layer dielectric comprise the substrate and a photoresist layer or a metal layer. In a first step, the substrate can be structured.The photoresist layer or the metal layer can then be applied. The metal layer can be a stencil or mask. In a subsequent process step, the photoresist layer or metal layer can be selectively removed. In particular, the selective removal of the photoresist layer or metal layer takes place after the sintering of the first and / or second contact layer. This leaves the first and / or second contact layer raised above the surface of the substrate.

[0020] According to at least one embodiment, the first and / or second contact layer comprises a metal. Alternatively or additionally, the first and / or second contact layer may comprise a paste solder. Here, paste solder or solder paste refers in particular to a pasty mixture of a solder metal powder, for example, tin, silver, copper, gold, indium, lead, nickel, germanium, bismuth, antimony, and a flux. Alternatively or additionally, the first and / or second contact layer may comprise or consist of a metal powder. The metal powder may also contain additives. The metal powder can be sintered in a single process step. In particular, sintering takes place at low temperatures, i.e., at temperatures < 400 °C, < 450 °C, or < 500 °C. Alternatively, the sintering of the metal powder can also be carried out selectively, for example, by laser sintering.

[0021] According to at least one embodiment, the support has a stabilizing material or consists of this stabilizing material. The stabilizing material can be selected from a group that includes a photoresist, an inorganic-organic hybrid material, a spin-on material, an insulating material applied by screen printing, and a dielectric material.

[0022] According to at least one embodiment, the stabilizing material is a photoresist. In particular, the photoresist is photostructurable and / or thermally structurable. Specifically, the photoresist is stabilized by overloading and / or overexposure. The photoresist can be a negative or a positive resist. The negative resist polymerizes upon exposure and a subsequent optional heating step for stabilization. This means that after development, the exposed areas remain intact. In the case of a positive resist, the already solidified resist becomes soluble again upon exposure to appropriate developer solutions. This means that after development, only those areas remain that are protected from further irradiation by a mask and are therefore not exposed.In particular, resins, such as Novalack resins, are used as positive resists together with a photoactive component, for example, polymeric diazo compounds, and a solvent. These can be applied from a liquid phase to a first and / or second substrate layer by rotary coating. The positive resists undergo a heating step, during which the solvent and the resist harden. Subsequently, the resist can be exposed to UV light, depending on the desired structure. During this exposure, the photoactive component breaks down under the influence of the light, and the resist becomes soluble in the exposed areas. After exposure, these areas can be washed away with a suitable developer solution, leaving behind the unexposed parts of the photoresist. After development, an additional heating step can be performed, either alternatively or additionally, to stabilize the photoresist.

[0023] Any photoresist can be used. According to at least one embodiment, the photoresist can be a permanent photoresist. The photoresist can be selected from a group that includes an epoxy-based photoresist, a siloxane-based photoresist, polyimide materials, BCB (bisbenzocyclobutene), and bisbenzocyclobutene fluorinated polymer.

[0024] According to at least one embodiment, the photoresist is a permanent photoresist, for example a permanent epoxy negative photoresist.

[0025] According to at least one embodiment, the stabilizing material of the support comprises or consists of an inorganic-organic hybrid material. The hybrid polymer has organic and inorganic regions that are covalently linked. In particular, the hybrid polymer exhibits strong covalent bonds between the inorganic and organic regions. In this way, the properties of very contrasting materials, such as glass or ceramics, are combined with those of organic polymers or silicones at the molecular level. In particular, the hybrid polymer exhibits high mechanical stability. Hybrid polymers are compounds produced by crosslinking functional organic regions with inorganic regions using chemical nanotechnology.In particular, the hybrid polymer consists of an inorganic-based network, for example, a silicone Si-O-Si backbone, plus additional organic regions, components, or networks.

[0026] The hybrid polymer can also be used, for example, as an ormocer ® (Organic Modified Ceramics).

[0027] According to at least one embodiment, the stabilizing material of the support is a spin-on material, or the support incorporates this spin-on material. The spin-on material can, for example, be a spin-on glass. Spin-on materials can be applied, for example, by rotational coating, in particular by spin coating, or by spin-on application. The stabilizing material can be a glass, or consist of a glass, wherein the glass is produced by physical vapor deposition (PVD), in particular plasma-enhanced PVD.

[0028] According to at least one embodiment, the stabilizing material of the support comprises or consists of an insulating material. In particular, the insulating material is applied by means of a screen printing process. The insulating material is, for example, a polyester-based material or a polymer material.

[0029] According to at least one embodiment, the stabilizing material is dielectric and selected from the group comprising silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, titanium oxide, titanium nitride, and parylene. The dielectric stabilizing material can be doped, for example, with boron or phosphorus. The dielectric stabilizing material can be applied by chemical vapor deposition (CVD) or as a spin-on glass.

[0030] The substrate can first be applied across the entire surface and then structured in a subsequent process step using photographic techniques and / or an etching process. This results in a structured substrate.

[0031] According to at least one embodiment, the support has a maximum thickness that is at least or exactly three, four, five, six, seven, eight, nine, ten, or thirty times greater than the maximum thickness of the semiconductor layer sequence. In particular, the semiconductor layer sequence comprises at least the n-doped semiconductor layer, at least the p-doped semiconductor layer, and the active layer. In particular, the support has a thickness greater than 20 µm, 30 µm, 40 µm, 50 µm, 60 µm, 70 µm, 80 µm, 90 µm, 100 µm, 110 µm, 120 µm, 130 µm, 140 µm, or 200 µm. In particular, the support is formed as a layer and has a layer thickness of at least 100 µm. In particular, the substrate layer is structured, meaning it has areas penetrated by the first and / or second contact layer. The layer can have a homogeneous or inhomogeneous thickness.In the case that the substrate has an inhomogeneous layer thickness, a layer thickness of at least 100 µm means that the thickest or greatest thickness of the substrate is at least 100 µm.

[0032] According to at least one embodiment, the carrier is formed as a structured layer and has a layer thickness of at least 100 µm.

[0033] The inventors have recognized that, compared to conventional semiconductor chips, an optoelectronic semiconductor chip according to the invention can eliminate process steps during manufacturing, leading to a simplification of the process and thus to cost reduction. In particular, the electroplated contact layers no longer need to be exposed using a thinning process when a substrate according to the invention is used. Furthermore, molding processes for stabilizing the optoelectronic semiconductor chip can be avoided, as the substrate exhibits sufficient stability. Thick contact layers for electroplating can also be avoided. This saves costs and material. Additionally, the processing of mold material in the front end, which represents a potential source of particle contamination, can be avoided.

[0034] Furthermore, a method for manufacturing an optoelectronic semiconductor chip is disclosed. The method for manufacturing the optoelectronic semiconductor chip preferably produces an optoelectronic semiconductor chip. That is, all features disclosed for the method are also disclosed for the optoelectronic semiconductor chip and vice versa.

[0035] According to at least one embodiment, the method for manufacturing an optoelectronic semiconductor chip with a radiation main side comprises the following steps: A) Providing at least one n-doped semiconductor layer, at least one p-doped semiconductor layer, and an active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer. The active layer is configured, in particular, to emit radiation. In particular, the active layer emits radiation during operation of the optoelectronic semiconductor chip. B) Application of a first contact layer to the side of a p-doped semiconductor layer facing away from the main radiation side for electrical contact. C) Application of a second contact layer to the side of an n-doped semiconductor layer facing away from the main radiation side for electrical contact. D) Application of a structured support to the first and / or second connection layer. The support comprises, in particular, a stabilizing material selected from the group consisting of a photoresist, an inorganic-organic hybrid material, a spin-on material, an insulating material applied by screen printing, and a dielectric material. E) Applying a first and / or second contact layer such that the first and / or second contact layer completely penetrates the carrier, the first contact layer being spaced laterally from the second contact layer.

[0036] The substrate is applied in particular by spraying, centrifuging, or laminating. Specifically, the substrate is applied using spin-on or photolithography.

[0037] According to at least one embodiment, in step D) the support is applied over its entire surface to the first and / or second bonding layer. In particular, the support is then structured. Structuring can be achieved using a mask and selective application. In the case of a photoresist, development of the photoresist can then take place. This enables fixation. Fixation can be achieved by a subsequent hard bake step. This leads to chemical stabilization of the structure. Development can be carried out, for example, with oxides, carbonates, or hydroxides of potassium or sodium. The subsequent hard bake can be performed at temperatures above 150 °C, for example, 250 °C.

[0038] According to at least one embodiment, the first and / or second contact layer is produced in step E) from a paste of powder or from spheres of at least one metal or alloy. The metals or alloys of metals already described above for the first and / or second contact layer are suitable. In the case of a powder, subsequent sintering of the powder at temperatures below 500 °C, for example at 450 °C, can be carried out. Alternatively, sintering can be performed using a laser. The paste, powder, and / or spheres can include further additives, for example, a solder paste or solder spheres. The first and / or second contact layer can be applied via screen printing, stencil printing, or doctor blade processes. The introduced metals of the first and / or second contact layer can be solidified by reflow, sintering, chemical treatment, selective laser treatment, and / or selective laser melting.In particular, the paste can be a soldering paste.

[0039] The first and / or second contact layer can alternatively be produced lithographically.

[0040] According to at least one embodiment, a photoresist layer or metal layer is applied to the structured substrate after step D). In particular, the photoresist layer or metal layer is applied directly to the structured substrate. The photoresist layer or metal layer can be applied to the structured substrate at least partially, such that the side surfaces of the substrate project beyond the photoresist layer or metal layer. Alternatively, the photoresist layer or metal layer completely covers the structured substrate. The photoresist layer or metal layer can also project beyond the substrate. After step E), the photoresist layer or metal layer can be removed, so that the first and / or the second contact layer project beyond the substrate in a side view, in the direction away from the main radiation side.In other words, a layer, particularly of photoresist or metal, is used that is temporarily applied to the structured substrate. After the first and / or second contact layer is applied in process step E), this temporary layer is removed. This allows for different structure heights of the first and / or second contact layer compared to the surface of the substrate. In particular, the first and / or second contact layer protrudes above the substrate in the direction away from the main radiation face.

[0041] According to at least one embodiment, the photoresist layer comprises a photoresist that is soluble and removed after step E). In other words, a photoresist is provided that, unlike the substrate, is not permanently present in the optoelectronic semiconductor chip. The photoresist layer serves to create an edge, that is, a different height profile, between the contact layers and the substrate surface. This facilitates the easy attachment of the first and / or second contact layer, for example, by soldering. The photoresist of the photoresist layer and the substrate can be made of the same material, differing only in their solubility. For example, the substrate photoresist can be insoluble, while the same photoresist of the photoresist layer can be made soluble in a suitable solvent through overexposure or thermal treatment.

[0042] Further advantages, advantageous embodiments and further developments result from the exemplary embodiments described below in conjunction with the figures.

[0043] They show:

[0044] The Fig. 1A and Fig. 1B each a side view of an optoelectronic semiconductor chip 100 according to one embodiment,

[0045] the Fig. 2A to Fig. 2C a method for manufacturing an optoelectronic semiconductor chip 100 according to one embodiment, and

[0046] the Fig. 3A to Fig. 3D is a method for manufacturing an optoelectronic semiconductor chip. 100 according to one embodiment.

[0047] In the exemplary embodiments and figures, identical, similar, or similarly functioning elements may be designated with the same reference numerals. The depicted elements and their relative sizes are not to be considered to scale. Rather, individual elements, such as layers, components, building elements, and areas, may be exaggerated in size for better clarity and / or understanding.

[0048] The Fig. 1A and Fig. Figure 1B shows a schematic side view of an optoelectronic semiconductor chip. 100 according to one embodiment. The optoelectronic semiconductor chip has a sequence of semiconductor layers. 2 on. The semiconductor layer sequence 2 has an n-doped semiconductor layer 21 , an active layer 22 and downstream a p-doped semiconductor layer 23 on. The n-doped semiconductor layer 21is by means of a second connection layer 4 electrically contacted. The second connection layer 4 can a shift system 41 , 42 , 43 made of different metals or alloys. The p-doped semiconductor layer 23 is by means of a first connection layer 3 electrically contacted. The first connection layer 3 can a shift system 31 , 32 made of different or the same metals. The optoelectronic semiconductor chip 100 has a main radiation side 101 on. The main radiation side 101 is in particular perpendicular to a growth direction of a semiconductor layer sequence 2 of the semiconductor chip 100 oriented. The semiconductor chip 100is specifically designed to emit ultraviolet, visible and / or near-infrared light during operation via the main radiation face, particularly in the direction away from the carrier 1 , to emit. For example, the semiconductor chip emits 100 blue light, approximately in the spectral range between 430 and 480 nm inclusive. The first and second connection layers 3 , 4 are particularly on the main radiation side 101 far side of the semiconductor layer sequence 2 arranged. The second connection layer 4 is a second contact layer 6 directly subordinate. The second contact layer 6 It serves for electrical contact and enables current flow. The first connection layer 3 is a first contact layer 5directly downstream. The first contact layer enables electrical contact and thus current flow. The first and second contact layers are located within a structured substrate. 1 arranged. The structured support 1 The device comprises or at least consists of a stabilizing material. The stabilizing material is, in particular, a photoresist, an inorganic-organic hybrid material, a spin-on material, or an insulating material applied by screen printing. Alternatively, it can also be a dielectric material. In particular, the stabilizing material is a photoresist, especially a photostructurable photoresist, which is permanently embedded in the optoelectronic semiconductor chip. 100 is arranged. The structured support 1 It serves to stabilize the optoelectronic semiconductor chip 100 In particular, the first and second contact layers are penetrated. 5 , 6 the carrier1 complete.

[0049] The Fig. Figure 1B shows a schematic side view of an optoelectronic semiconductor chip. 100 according to one embodiment. The optoelectronic semiconductor chip 100 the Fig. 1B differs from the optoelectronic semiconductor chip of the Fig. 1A by the fact that the first and second contact layers 5 , 6 in side view across the support in the direction away from the main radiation side 101 protrude. In other words, the structured support forms 1 and the first and second contact layers 5 , 6 not a uniform surface, but the first and second contact layers 5 , 6 are opposite to the surface of the support 1 Raised. This makes soldering the first and second contact layers easier. 5 , 6 possible in a further process step.

[0050] The Fig. 2A to Fig. 2C demonstrate a method for manufacturing an optoelectronic semiconductor chip 100 according to one embodiment. Fig. 2A shows the provision of at least one n-doped semiconductor layer 21 , at least one p-doped semiconductor layer 23 and one between the at least one n-doped semiconductor layer 21 and the at least one p-doped semiconductor layer 23 arranged active layer 22 These layers 21 , 22 , 23 form the semiconductor layer sequence 2 The active layer 22 is designed to emit radiation, particularly during the operation of the semiconductor chip. Furthermore, the Fig. 2A the completed process step B), in which a first connection layer 3 on the main radiation side 101 far side of a p-doped semiconductor layer 23was applied. Furthermore, the Fig. 2A already completed process step C), in which the second connection layer 4 on the main radiation side 101 far side of an n-doped semiconductor layer 21 It was applied for electrical contact. In particular, the optoelectronic semiconductor chip is 100 a flip chip, i.e. a chip that is flipped from one side, in particular the back side of the semiconductor layer sequence 2 , is electrically contacted.

[0051] In the optoelectronic semiconductor chip 100 the Fig. 2A became the carrier 1 applied across the entire surface. The carrier 1 It includes, in particular, a stabilizing material. Specifically, the stabilizing material is applied by spraying, centrifuging, laminating, or printing. The stabilizing material may be liquid. The carrier 1Therefore, the entire surface is applied to the first and second connection layers. 3 , 4 agitated. In other words, the carrier is upset. 1 at least partially in direct contact with the second and first connecting layers 3 , 4 Between the first and / or second connection layer 3 , 4 and the carrier 1 Additional insulation layers can be added, as illustrated here by the insulation layer. 9 shown, arranged. The insulation layers. 9 prevent a short circuit. In the subsequent process step, here in Fig. As shown in 2B, the carrier can be structured. For example, the carrier 1 They contain a photostructurable photoresist. In particular, the photoresist is stabilized by overexposure or thermal treatment. The substrate is formed over its entire surface. 1It can then be exposed to light. Masks can be used in particular. Depending on whether it is a positive or negative photoresist, the substrate can be exposed to light accordingly. 1 The substrate is structured. The photoresist can then be developed. In a further step, the photoresist can be cured to give it its mechanical stability. After the process step of structuring the substrate, a further process step, here in Fig. 2C, the first and / or second contact layer is applied. In particular, the first and second contact layers are embedded in the structured substrate. 1 The first and / or second contact layer can consist of a metal and / or paste solder and / or metal powder. For example, the first and / or second contact layer can be created by embedding metal spheres in the structured substrate. 1The material is filled, then heated so that the metal spheres melt and the first and / or second contact layer forms. This creates an optoelectronic semiconductor chip. 100 generated, which the Fig. 1A is identical.

[0052] The Fig. 3A to Fig. 3D images show a method for manufacturing an optoelectronic component according to one embodiment. Fig. 3A essentially corresponds to the Fig. 2A. The Fig. 3B essentially corresponds to the Fig. 2B with the exception that additionally the structured carrier 1 structures a photoresist layer or metal layer 7 to be applied. In particular, the photoresist layer. 7 a non-permanent photoresist layer or can be removed again, in particular after process step E). After application of the photoresist layer or metal layer 7Process step E) is carried out by creating the first and / or second contact layer. The first and / or second contact layer 5 , 6 penetrate both the structured carrier 1 as well as the structured photoresist layer or metal layer 7 Structured here means that the layer has sub-areas made up of smaller layers, with smaller areas of the sub-layer forming a structured photoresist layer or metal layer. In a subsequent process step, as in Fig. Shown in 3D, the photoresist layer or metal layer is shown 7 removed again. In other words, the photoresist layer or metal layer is a temporary layer. The metal layer 7 This could be, for example, a template or mask. This allows an optoelectronic semiconductor chip to be used. 100 are generated, as in Fig.3D shown, showing a first and second contact layer 5 , 6 exhibits features that, in side view, point away from the main radiation side 101 about the carrier 1 protrudes. This can lead to a slight bonding of the first and second contact layers in a further process step, for example by soldering.

[0053] According to at least one embodiment, it is possible for the substrate to be applied over its entire surface, structured, exposed, and then the photoresist layer or metal layer can be applied. 7 The substrate is applied, exposed, and then developed. In a further process step, the structured substrate can then be removed. 1 to be developed.

[0054] Alternatively, the structured substrate can be applied, exposed, and developed, and in a subsequent process, the photoresist layer or metal layer can be applied, exposed, and developed. The photoresist layer or metal layer 7 It can be applied, for example, by spray coating or by photographic technique.

[0055] The inventors have recognized that the optoelectronic semiconductor chip according to the invention 100 No electroplating is required. Furthermore, the optoelectronic semiconductor chip does not need to be molded, i.e., encapsulated with silicone or epoxy. Grinding off the mold or a molded substrate is also unnecessary to expose the first and / or second contact layer.

[0056] According to one embodiment, instead of a photoresist layer or metal layer, 7 the structured carrier 1The material is removed. This removal can be done, for example, mechanically and / or chemically. This creates a first and second contact layer that, in a side view, extend beyond the substrate in the direction away from the main radiation side.

[0057] The embodiments and their features described in connection with the figures can also be combined with one another according to further embodiments, even if such combinations are not explicitly shown in the figures. Furthermore, the embodiments described in connection with the figures can have additional or alternative features as described in the general section.

[0058] The invention is not limited to the description provided by means of the exemplary embodiments. Rather, the invention encompasses every new feature as well as every combination of features, which in particular includes every combination of features in the claims, even if that feature or combination itself is not explicitly stated in the claims or exemplary embodiments.

Claims

[1] Optoelectronic semiconductor chip ( 100 ) with a main radiation side ( 101 ), comprehensive – at least one n-doped semiconductor layer ( 21 ), – at least one p-doped semiconductor layer ( 23 ) and – one between the at least one n-doped semiconductor layer ( 21 ) and the at least one p-doped semiconductor layer ( 23 ) arranged active layer ( 22 ), which is designed to emit radiation, – a structured carrier ( 1 ), which is located on the main radiation side ( 101 ) opposite side of the semiconductor chip ( 100 ) is arranged, – wherein the p-doped semiconductor layer ( 23 ) by means of a first connection layer ( 3 ) is electrically contacted and the n-doped semiconductor layer ( 21 ) by means of a second connection layer ( 4 ) is electrically contacted, – where the first connection layer ( 3 ) by means of a first contact layer ( 5 ) is electrically contacted and the second connection layer ( 4 ) by means of a second contact layer ( 6 ) is electrically contacted, with the first and second contact layers ( 5 , 6 ) the carrier ( 1 ) penetrate completely and the first contact layer ( 5 ) laterally spaced from the second contact layer ( 6 ) is arranged, and wherein the carrier ( 1 ) comprises a stabilizing material selected from the group which includes a photoresist, an inorganic-organic hybrid material, a spin-on material, an insulating material applied by screen printing, and a dielectric material. [2] Optoelectronic semiconductor chip ( 100) according to claim 1, wherein the stabilizing material is a photostructurable or thermally structurable photoresist. [3] Optoelectronic semiconductor chip ( 100 ) according to one of the preceding claims, wherein the carrier ( 1 ) has a maximum thickness that is at least six times greater than the maximum thickness of a semiconductor layer sequence ( 2 ) is, where the semiconductor layer sequence ( 2 ) at least the n-doped semiconductor layer ( 21 ), at least the p-doped semiconductor layer ( 23 ) and the active layer ( 22 ) includes. [4] Optoelectronic semiconductor chip ( 100 ) according to one of the preceding claims, wherein the connecting layers ( 3 , 4 ) and / or the contact layers ( 5 , 6) each contains at least one material consisting of Au, Ag, Ti, Pt, Pd, Cu, Ni, In, Rh, Cr, Al, W, Sn, Pb, Ge, Bi, Sb, Zn, combinations or alloys or oxides thereof. [5] Optoelectronic semiconductor chip ( 100 ) according to one of the preceding claims, wherein the carrier ( 1 ) is formed as a layer and has a layer thickness of at least 80 µm. [6] Optoelectronic semiconductor chip ( 100 ) according to one of the preceding claims, wherein the stabilizing material of the support ( 1 ) is an inorganic-organic hybrid material or a spin-on material. [7] Optoelectronic semiconductor chip ( 100 ) according to any of the preceding claims, wherein the stabilizing material is dielectric and is selected from a group that includes silicon oxide, Silicon nitride, aluminum oxide, aluminum nitride, titanium oxide and titanium nitride are included. [8] Optoelectronic semiconductor chip ( 100 ) according to one of the preceding claims, wherein the first and second contact layers ( 5 , 6 ) in a side view over the carrier in the direction away from the main radiation side ( 101 ) protrudes. [9] Method for manufacturing an optoelectronic semiconductor chip ( 100 ) with a main radiation side ( 101 ) with the following steps: A) Providing at least one n-doped semiconductor layer ( 21 ), at least one p-doped semiconductor layer ( 23 ) and one between the at least one n-doped semiconductor layer ( 21 ) and the at least one p-doped semiconductor layer ( 23 ) arranged active layer ( 22 ), which is designed to emit radiation, B) Applying a first bonding layer ( 3 ) on the main radiation side ( 101) opposite side of a p-doped semiconductor layer ( 23 ) for electrical contacting, C) Applying a second bonding layer ( 4 ) on the main radiation side ( 101 ) opposite side of an n-doped semiconductor layer ( 21 ) for electrical contacting, D) Applying a structured carrier ( 1 ) to the first and / or second connection layer ( 3 , 4 ), wherein the carrier ( 1 ) comprises a stabilizing material selected from the group which includes a photoresist, an inorganic-organic hybrid material, a spin-on material, a screen-printed insulating material and a dielectric material, and E) Applying a first and second contact layer ( 5 , 6 ), so that the first and second contact layers ( 5 , 6 ) the carrier ( 1) completely penetrate, with the first contact layer ( 5 ) laterally to the second contact layer ( 6 ) is arranged at a distance. [10] Method according to claim 9, wherein in step D) the carrier ( 1 ) across the entire surface of the first and second connection layers ( 3 , 4 ) is applied and then the carrier ( 1 ) is structured. [11] Method according to claim 9, wherein after step D) a photoresist layer or metal layer ( 7 ) on the structured carrier ( 1 ) is applied and after step E) the photoresist layer or metal layer ( 7 ) is removed, so that the first and second contact layers ( 5 , 6 ) in a side view in the direction away from the main radiation side ( 101 ) via the carrier ( 1 ) protrude. [12] Method according to at least one of claims 10 to 11, wherein the photoresist layer ( 7) includes a photoresist that is soluble and is removed after step E). [13] Method according to at least one of claims 9 to 12, wherein the first and second contact layer ( 5 , 6 ) in step E) is produced from a paste, a powder or spheres of at least a metal or an alloy, wherein in the case of a powder a subsequent sintering of the powder at temperatures below 500 °C or sintering by means of a laser takes place.

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