VALUE SIGNAL PROCESSING DEVICE AND VALUE SIGNAL

Abstract

Value transmitter signal processing device (D) which performs signal processing on analog signals, which are periodically generated according to a movement of the measurement target, in order to generate position data corresponding to a position of a measurement target, wherein the value transmitter signal processing device (D) comprises: a position data acquisition unit (1a, 1b, 2a, 2b, 3) which samples the analog signals to determine the position data corresponding to the position of the measurement target; an error data calculation unit (4) which calculates error data on the basis of a difference between a predetermined number of position data elements among the position data determined by the position data acquisition unit (1a, 1b, 2a, 2b, 3) in one cycle and ideal position data, where it is assumed that the position moves linearly in one cycle;and a compensation unit (5) that compensates the position data determined by the position data determination unit (1a, 1b, 2a, 2b, 3) on the basis of the error data calculated by the error data calculation unit (4), wherein the error data calculation unit (4): calculates first error data on the basis of a difference between a predetermined number of position data sampled in a cycle in first predetermined time intervals ΔTn and the ideal position data and defines the first error data as error data, calculates second error data on the basis of a difference between position data sampled in each of the first predetermined time intervals ΔTn in second predetermined time intervals ΔTk and the ideal position data;and according to an error characteristic of the first error data and the second error data, if second error data are present that are closer than the first error data to a local extremum or inflection point of the error characteristic, modify a time interval of the error data without increasing or decreasing the specified number of error data elements by the time interval of the second error data and replace the first error data in the first specified time interval ΔTn of the first error data with the second error data in the second specified time interval ΔTk of the second error data that are closest to the local extremum or inflection point of the error characteristic.

Description

BACKGROUND OF THE INVENTION Area of ​​the invention

[0001] The present invention relates to a value transmitter signal processing device and a value transmitter. Related technology

[0002] A value transmitter is known that detects the position (or rotational speed) of a motor or table (a measurement target) of a machine tool or industrial machine, and the like. Examples of such a value transmitter include a rotary encoder that detects an angle of rotation (a position) and a linear scale that detects linear movement positions. This type of value transmitter signal processing device samples analog signals corresponding to the position of the measurement target to generate position data. These signals are periodically generated in accordance with the movement of the measurement target. In this case, the value transmitter signal processing device performs interpolation to compensate for interpolation errors (see, for example, patent specifications 1 and 2).

[0003] The value transmitter signal processing device described in patent specification 2, for example, calculates error data based on the difference between a predetermined number of position data elements sampled at regular intervals in a cycle and ideal position data, and compensates the position data according to the calculated error data. Patent specification 1: unexamined Japanese patent application, publication no. 2012-163436 Patent specification 2: Japanese patent no. 3772121 SUMMARY OF THE INVENTION

[0004] However, in the value transmitter signal processing device described in patent specification 2, due to faster computation and a reduced register capacity of the signal processing device, the number of samples of the error data is set lower than the number of samples of the position data, and the position data is compensated by performing an interpolation (for example, a linear interpolation) on the error data. In this case, local extremes (an extreme value, a stationary point) of the error characteristic curve of the error data may be overlooked, and errors may remain in the compensated position data.

[0005] It is an object of the present invention to provide a value transmitter signal processing device and a value transmitter by which interpolation errors are reduced.

[0006] (1) A value transmitter signal processing device (for example, a value transmitter signal processing device to be described later) D ) according to the present invention is a value transmitter signal processing device which, in order to generate position data corresponding to the position of the measurement target, performs signal processing on analog signals which are periodically generated according to a movement of a measurement target, wherein the value transmitter signal processing device comprises: a position data acquisition unit (for example, analog amplification circuits) 1a and 1b Analog-to-digital converter circuits 2a and 2b , and a digital interpolation circuit 3, which will be described later), which samples the analog signals to determine the position data corresponding to the position of the measurement target; an error data calculation unit (for example, a later-described acquisition error data calculation circuit) 4 ) which calculates error data based on a difference between a given number of position data elements among the position data determined by the position data acquisition unit for one cycle and ideal position data, where it is assumed that the position moves linearly in one cycle; and a compensation unit (for example, a detection error compensation circuit to be described later). 5), which compensates the position data determined by the position data determination unit on the basis of the error data calculated by the error data calculation unit, wherein the error data calculation unit calculates first error data on the basis of a difference between the specified number of position data sampled in first specified time intervals ΔTn in a cycle and the ideal position data and defines the first error data as error data, and calculates second error data on the basis of a difference between position data sampled in each of the first specified time intervals ΔTn in second specified time intervals ΔTk and the ideal position data;and according to an error characteristic of the first error data and the second error data, if second error data are closer than the first error data to the local extremum or inflection point of the error characteristic, a time interval of the error data is changed without increasing or decreasing the specified number of error data elements by replacing the second error data that are closest to the local extremum or inflection point of the error characteristic with one of the elements of the first error data.

[0007] (2) In the value transmitter signal processing device described in (1), the fault data calculation unit can prioritize the second fault data that are closest to the local extreme of the fault characteristic over the second fault data that are closest to the inflection point of the fault characteristic and replace the prioritized fault data with the first fault data.

[0008] (3) In the value transmitter signal processing device described in (2), the fault data calculation unit can prioritize second fault data that are closest to the local extremum in the fault characteristic curve, or second fault data that are closest to a local extremum where a curve forming the local extremum of the fault characteristic curve has a strong slope, and replace the prioritized fault data with the first fault data.

[0009] (4) In the value transmitter signal processing device described in (2), the fault data calculation unit can prioritize second fault data that are closest to the inflection point in the fault characteristic curve, or second fault data that are closest to an inflection point where a curve forming the inflection point of the fault characteristic curve has a strong slope, and replace the prioritized fault data with the first fault data.

[0010] (5) In the value transmitter signal processing device described under any of points (1) to (4), the compensation unit can perform interpolation processing on the error data calculated by the error data calculation unit to determine error data corresponding to the position data determined by the position data determination unit and to compensate the position data by corresponding error data.

[0011] (6) A value transmitter according to the present invention comprises the value transmitter signal processing device described under any one of points (1) to (5).

[0012] According to the present invention, a value transmitter signal processing device and a value transmitter can be provided by which interpolation errors are reduced. List of characters Fig. Figure 1 is a diagram illustrating the configuration of a value transmitter signal processing device according to one embodiment. Fig. 2 is a diagram illustrating the configuration of a Fig. 1 shown start condition determination circuit. Fig. Figure 3 is a diagram illustrating a data acquisition error calculation processing (a conventional processing) by a data acquisition error calculation unit of a system in Fig. 1 shown recording error data calculation circuit. Fig. Figure 4 is a schematic diagram illustrating an example of a data acquisition error calculation processing (a conventional processing) by the data acquisition error calculation circuit and a data acquisition error compensation processing (a conventional processing) by a data acquisition error compensation circuit. Fig. Figure 5 is a schematic diagram illustrating an example of a data acquisition error calculation processing (a processing according to the present invention) by a data acquisition error calculation circuit and a data acquisition error compensation processing (a processing according to the present invention) by a data acquisition error compensation circuit. Fig. Figure 6 is a schematic diagram illustrating an example of the acquisition error data calculation processing (the conventional processing) by the acquisition error data calculation circuit. Fig. Figure 7 is a schematic diagram illustrating an example of the acquisition error data calculation processing (the processing according to the present invention) by the acquisition error data calculation circuit. Fig. Figure 8 is a schematic diagram illustrating an example of the acquisition error data calculation processing (the processing according to the present invention) by the acquisition error data calculation circuit. Fig. Figure 9 is a flowchart that illustrates the acquisition error data calculation processing by a processor when the acquisition error data calculation circuit is configured as a processor. Fig. Figure 10 is a flowchart that illustrates the acquisition error compensation processing by a processor when an acquisition error compensation circuit is configured as a processor. DETAILED DESCRIPTION OF THE INVENTION

[0013] An exemplary embodiment of the present invention is described below with reference to the accompanying drawings. It should be noted that identical or corresponding components in the figures are designated by the same reference numerals.

[0014] Fig. Figure 1 is a diagram illustrating the configuration of a value transmitter signal processing device according to the present embodiment. The diagram shown in Figure 1 is a diagram illustrating the configuration of a value transmitter signal processing device according to the present embodiment. Fig. 1. Signal processing device shown D is a device that inputs original signals of a sine wave (a so-called A-phase signal) Sa and a cosine wave (a so-called B-phase signal) which are output by a sensing unit of the value transmitter. The signal processing device D The signal processing device then converts the original signals from analog to digital to generate position data. Dincludes analog amplification circuits 1a and 1b Analog-to-digital converter circuits 2a and 2b , a digital interpolation circuit 3 , a data acquisition error calculation circuit 4 , a detection error compensation circuit 5 and a position data generation circuit 6 .

[0015] The analog amplification circuit 1a amplifies the original sine wave signal Sa output by the sensor's detection unit so that the original signal becomes an input to the analog-to-digital converter circuit. 2a in the next stage. Similarly, the analog amplification circuit amplifies. 1b the original cosine wave signal Sb output by the sensor's detection unit such that the original signal becomes an input to the analog-to-digital converter circuit 2b in the next stage.

[0016] The analog-to-digital converter circuit 2a converts the signal from the analog amplification circuit. 1a The amplified analog signal is converted into a digital signal in each constant sampling cycle. Similarly, the analog-to-digital converter circuit performs this conversion. 2b the analog amplification circuit 1b amplified analog signal converted into a digital signal in each constant sampling cycle.

[0017] The digital interpolation circuit 3 generated by calculating positions in one cycle of the original signal (one cycle of the sine wave) based on the analog-to-digital converter circuits 2a and 2b Converted digital values ​​are position data. It should be noted that the analog amplification circuits... 1a and 1b , the analog-to-digital converter circuits 2a and 2b and the digital interpolation circuit 3Position data determination units correspond.

[0018] The data acquisition error calculation circuit 4 calculated using the data from the digital interpolation circuit 3 The generated position data contains acquisition error data. The acquisition error data calculation circuit 4 includes a start condition determination circuit 41 , a register group 42 , a unit for calculating recording errors 43 , a data acquisition error memory register 44 and an averaging circuit 45 .

[0019] The start condition determination circuit 41 determined based on the digital interpolation circuit 3 The generated position data is used to determine whether a start condition is met. If the start condition is met, the start condition determination circuit stores the data. 41 Position data for one cycle of the original signal in the register group 42More precisely, the start condition determination circuit stores... 41 A predetermined number of n + 1 position data elements P(0) to P(n) are sampled in a cycle at initial predetermined time intervals (error sampling intervals) ΔTn, based on the position data determined by sampling the original signal at constant sampling intervals. It should be noted that the start condition determination circuit 41 Position data P(0) to P(n + α) in the register group 42 It can store data that is sampled slightly more frequently than the data sampled in one cycle of the original signal. Additionally, the start condition determination circuit stores data that is sampled slightly more frequently than the data sampled in one cycle of the original signal. 41 Position data sampled in the register group in the second predefined time intervals ΔTk and in each of the first predefined time intervals ΔTn 42 Details regarding the start condition determination circuit 41 will be described later.

[0020] The unit of measurement error calculation 43 calculated based on the status of the position data P(0) to P(n) for the first predefined time intervals ΔTn and the position data for the second predefined time intervals ΔTk, which are in the register group 42 A predefined number n + 1 elements of data acquisition error data are stored in a cycle. Details regarding the data acquisition error calculation unit are available. 43 will be described later.

[0021] In the error memory register 44 Calculated acquisition error data for the last several sampling events are stored. The averaging circuit 45 forms the mean values ​​of the last several sets of data in the error memory register. 44stored data entry errors. The mean of several groups of data entry errors is determined to improve the accuracy of the data entry errors. If the data entry errors are calculated using a simple procedure, the data entry error calculation unit can be used. 43 The determined data from the data acquisition error will be used unchanged, and the data acquisition error memory register 44 and the averaging circuit 45 They do not need to be provided for.

[0022] The detection error compensation circuit 5 compensates for the errors caused by the digital interpolation circuit 3 output position data based on the data from the acquisition error data calculation circuit 4 calculated acquisition error data. The acquisition error compensation circuit 5 includes a data acquisition error memory register 51for the compensation and a compensation calculation circuit 52 .

[0023] In the error memory register 51 For compensation, the values ​​from the averaging circuit are used. 45 determined average recording error data or those from the recording error calculation unit 43 The identified data from the data collection errors was stored.

[0024] The compensation calculation circuit 52 leads to the determination of the values ​​from the digital interpolation circuit 3 The output position data is matched with corresponding acquisition error data, and an interpolation (for example, a linear interpolation) is performed to compensate for the position data with the corresponding acquisition error data in the acquisition error memory register. 51 The compensation circuit uses stored data from the acquisition error codes. 52Provides the compensated position data to the position data generation circuit. 6 out of.

[0025] The position data generation circuit 6 generated using the compensation calculation circuit 52 compensated position data of a cycle and the data of a counter (not shown in the block diagram) that counts the cycles of the original signal, position data.

[0026] Next, the start condition determination circuit will be used. 41 the data acquisition error calculation circuit 4 described. Fig. Figure 2 is a diagram illustrating the configuration of the start condition determination circuit. 41 The start condition determination circuit 41 includes a register 411a for the current position data, a register 411b for the previous position data, a register 411cfor the penultimate position data, first and second speed calculation circuits 412a and 412b , a zero-crossing point detection circuit 413 , an acceleration calculation circuit 414 and a position data register memory start determination / error calculation start signal determination circuit 415 .

[0027] In the registers 411a , 411b and 411c For the current, previous, and penultimate position data, position data for the current sampling cycle, the previous sampling cycle, and the penultimate sampling cycle are each subtracted from the position data in each specified sampling cycle by the digital interpolation circuit. 3 The output position data is stored. The data in each position data register 411a , 411b and 411c The stored position data is shifted each time the digital interpolation circuit is used. 3The position data is output (for each sampling cycle). More precisely, the data is generated by the digital interpolation circuit. 3 Position data output from each specified sampling cycle in the register 411a stored for the current position data, which is in the register 411a The position data stored for the current position data is located in the register. 411b stored for the previous position data, and those in the register 411b The position data stored for the previous position data is stored in the register 411c stored for the penultimate position data.

[0028] The first speed calculation circuit 412a determines the current rotational speed based on the difference between the values ​​in the register 411a for the current position data stored and the data in the register 411bThe previous position data stored for the previous position data. The second speed calculation circuit 412b determines the current rotational speed relative to the previous cycle based on the difference between the values ​​in the register 411b for the previous position data stored and the data in the register 411c for the penultimate position data stored. The acceleration calculation circuit 414 Determines acceleration based on the difference between the values ​​from the first and second speed calculation circuits. 412a and 412b calculated rotational speeds. The zero-crossing point detection circuit 413 recorded based on the data in the register 411a for the current position data stored and the data in the register 411cfor the previous position data stored, the zero crossing point, which is the starting point of a cycle of the original signals Sa and Sb.

[0029] The position data register memory start determination / error calculation start signal determination circuit 415 Provided that a configuration import condition for the position data is met, the position data P(0) to P(n) for the first predefined time intervals ΔTn and the position data for the second predefined time intervals ΔTk for one cycle of the original signal, which includes the detected zero crossing point to the next zero crossing point, is stored in the register group 42 , when the zero-crossing point detection circuit 413 The zero crossing point is detected. The position data register memory start determination / error calculation start signal determination circuit. 415sends an error calculation start signal to the detection error calculation unit 43 , when the next zero crossing point is detected.

[0030] The position data import condition is a condition that is met when the following occurs: the first speed calculation circuit 412a A specific rotational speed (the difference between the position data P(-1) and P(0)) lies within a predetermined range, and, with an improvement in accuracy, is determined by the acceleration calculation circuit. 414 A specific acceleration (the difference between the difference between the position data P(-2) and P(-1) and the difference between P(-1) and P(0)) lies within a defined range and is determined by the first speed calculation circuit. 412aThe detected acceleration (the difference between the difference between the position data P(n-2) and P(n-1) and the difference between P(n-1) and P(n)) lies within a defined range at the end of a cycle of the original signal.

[0031] Next, the error calculation circuit will be used. 43 the data acquisition error calculation circuit 4 described. Fig. Figure 3 is a diagram illustrating a data acquisition error calculation processing (a conventional processing) by the data acquisition error calculation unit. 43 the data acquisition error calculation circuit 4 . Fig. Figure 3 shows the position data P(0) to P(n) for the first predefined time intervals ΔTn for one cycle of the original signal. Fig. In section 3, the sampling cycle is defined as Ts, and the speed of movement of a moving object (a rotating object) equipped with a sensor unit of the encoder is defined as a constant rotational speed v. If the magnitude of movement (the angle of rotation) of the moving object in one cycle is L, then L = n • Ts • v. If the initial sampling time after the detection of the zero crossing point is time 0, the position data sampled at this time is defined as P(0), and the position data sampled at the initial sampling point after the detection of the next zero crossing point is defined as P(n), then the time from the position data P(0) to the detection of the position data P(n) corresponds approximately to one cycle (P(n) - P(0) = L).

[0032] When the position data P(0) to P(n) are mapped to the first given time intervals ΔTn in this one cycle, where the horizontal axis represents time and the vertical axis represents the position of the measurement, a graph results which according to Fig. 3 is similar, with the position data represented by circles. It is noted that in Fig. 3. The recorded position data from 0 to L are repeatedly recorded. Therefore, the points along a straight line until a cycle L is reached are continuously represented as "0" of the next cycle.

[0033] Although the position data is determined for each sampling cycle Ts, both the rotational speed v and the sampling cycle Ts are constant. Therefore, the distance traveled 1 = v • Ts during sampling is constant. This results in Fig. 3. The distance of movement (the angle of rotation) of the moving object on the horizontal axis is also expressed. In other words, after the time m • Ts has elapsed since the sampling in which the position data P(0) were determined, an m-th sampling takes place. Furthermore, in the m-th sampling, the distance of movement 1 (angle of rotation) of the moving object corresponds to the position m • v • Ts.

[0034] Since the moving object moves at a constant rotational speed v, the sampling cycle Ts occurs n times, and the moving object moves by the distance L of one cycle of the original signal, the position of the moving object changes linearly, and the distance of movement 1 The delay at the m-th sampling point is L • m / n. Therefore, if the position data P(n) has the same value as a one-cycle delay relative to the position data P(0), the position data P(n) are ideally located on the... Fig. The straight dashed line shown in Figure 3 connects the position data points P(0) and P(n). Fig. The straight dashed line shown in Figure 3 indicates the position that would ideally be detected when the moving object completes one cycle (the ideal position data). However, if the position that is actually sampled and detected differs from the position shown in Figure 3, the position shown in Figure 3 will be the ideal position data. Fig. If position P(m) is represented by a circle, a detection error D(m) is determined using the following equation: D ( m ) = P ( m ) − [ P ( 0 ) + L ⋅ m / n ] = P ( m ) − [ P ( 0 ) + { P ( n ) − P ( 0 ) } ⋅ m / n ]

[0035] This means that the captured position data P(m) at each sampling position m (= 0, 1, 2...) is defined as position data Ps(m) of reference data, and the acquisition error D(m) determined at each sampling position is defined as the acquisition error D(m) of the reference data, and these are assigned and stored. In other words, the acquisition error calculation unit 43, which apply the equation (1) described above to the in the Fig. 2 shown register group 42 The program executes stored position data P(0) to P(n) of a cycle and determines all acquisition errors D(0) to D(n). In this example, no averaging is performed, and the acquisition error calculation unit is used. 43 Specific acquisition errors D(0) to D(n) are determined in conjunction with the acquired position data P(0) to P(n) (these acquired position data are referred to as acquired position data Ps( 0 ) to Ps(n) of the reference data defined) as reference data [Ps(0) to Ps(n) and D(0) to D(n)] in the acquisition error memory register 51 Stored for compensation.

[0036] The compensation calculation circuit then compares 52 the digital interpolation circuit 3 output position data P(x) with the values ​​in the acquisition error memory register 51The stored position data Ps(0) to Ps(n) of the reference data are used for compensation. If the acquired position data P(x) falls between the values ​​stored in the acquisition error memory register... 51 Since the position data stored for compensation, Ps(m) and Ps(m + 1), contain the position data, the acquisition error D(x) for the acquired position data P(x) is determined by an interpolation calculation (for example, a linear interpolation) using the acquisition error data D(m) and D(m + 1) stored for the position data Ps(m) and Ps(m+1). Assuming that the calculated acquisition error D(x) is contained in the acquired position data P(x), the compensation calculation circuit subtracts 52 To compensate for the error, the acquisition error D(x) is subtracted from the acquired position data P(x) and this data is output as position data within a cycle.

[0037] As described above, in this embodiment the processing speed of the error data calculation circuit is increased. 4 and the detection error compensation circuit 5 To reduce the register capacity, the number n of samples of the acquisition error data is set to less than the number of samples of the position data, and the acquisition error data is compensated using interpolation (for example, linear interpolation). This configuration results in the following problems.

[0038] Fig. Figure 4 is a schematic diagram illustrating an example of a data acquisition error calculation processing (a conventional processing) by the data acquisition error calculation unit. 4 and a capture error compensation processing (a conventional processing) through the capture error compensation circuit 5 . Fig. Figure 4 shows an error characteristic curve (before compensation) of error data at a given number of n + 1 = 5 compensation points. T0 until T4 , which are determined by dividing a cycle into n = 4 first predefined time intervals (uniform intervals) ΔTn. As in Fig. Figure 4 is represented by a linear interpolation between the compensation points. T0 until T4 A linear approximation curve (a compensation parameter) is determined for the error characteristic (before compensation) of the error data. If the position data are compensated using the determined linear approximation curve (the compensation parameter), local extremes of the error characteristic (before compensation) of the error data may be overlooked, and (after compensation) errors may remain in the position data.

[0039] Fig. Figure 5 is a schematic diagram illustrating an example of a data acquisition error calculation processing (a processing according to the present invention) by the data acquisition error calculation circuit. 4 and a detection error compensation processing (a processing according to the present invention) by the detection error compensation circuit 5 As in Fig. As shown in Figure 5, in this embodiment the first predetermined time intervals ΔTn are changed without increasing or decreasing the number of compensation points such that the compensation points T1 , T2 , T3 and T4 among the five compensation points T0 until T4 The compensation points lie near a local extremum or an inflection point of the error characteristic curve of the error data (before compensation). This allows the linear approximation curve to be determined by linear interpolation between the compensation points.T0 until T4 in the error characteristic curve (before compensation) of the error data, and the number of errors (after compensation) of the position data can be reduced even if the position data are compensated using the linear approximation curve (the compensation quantity).

[0040] The acquisition error data calculation processing (the processing according to the present invention) by the acquisition error data calculation circuit 4 will below with reference to the Fig. 6 to Fig. 8 described. Fig. Figure 6 is a schematic diagram illustrating an example of the acquisition error data calculation processing (the conventional processing) by the acquisition error data calculation circuit. 4 , and the Fig. 7 and Fig. Figure 8 shows schematic diagrams illustrating an example of the acquisition error data calculation processing (the processing according to the present invention) by the acquisition error data calculation circuit. 4 It is pointed out that in the Fig. 6 to Fig. 8. For simplicity, the number of samples is determined by the Fig. 4 and Fig. 5 distinguishes.

[0041] More precisely, as described above, the data acquisition error calculation circuit 4The error data is calculated based on the difference between the predefined number n + 1 position data elements P(0) to P(n) sampled in the first predefined time intervals (the error sampling intervals, the compensation intervals) ΔTn and the ideal position data of a cycle. As described above, the ideal position data are position data where it is assumed that the position moves linearly in a cycle. Therefore, as in, for example, Fig. Figure 6 shows that it is possible to determine the error characteristic curve (the black circles on the straight lines) of the error data at the given number of n + 1 = 6 by dividing a cycle into n = 5 first given time intervals (constant intervals) ΔTn determined compensation points. T0 until T5 to determine. If the detection error compensation circuit 5At this point, to determine the linear approximation curve (dashed line) as described above, a linear interpolation is performed between the six compensation points. T0 until T5 If the process is executed and the position data is compensated using the specified linear approximation curve (linear compensation), local extremes of the error characteristic of the error data may be overlooked, and errors may remain in the compensated position data.

[0042] Therefore, the data acquisition error calculation circuit calculates 4 Furthermore, error data is calculated based on the difference between the position data sampled in each of the first predefined time intervals ΔTn within the second predefined time intervals ΔTk and the ideal position data. This allows, for example, in Fig. Figure 7 shows the error characteristic curve (the black circles on the solid line) of the error data at the six compensation points.T1 , T11 until T14 and T2 to determine which are obtained by dividing the first given time intervals ΔTn into k = 5 second given time intervals (uniform intervals) ΔTk.

[0043] If error data is present at a second predefined time interval ΔTk, which is closer to a local extremum or inflection point of the error characteristic curve of the error data than the error data at a first predefined time interval ΔTn, the acquisition error data calculation circuit replaces 4 The error data for the second predefined time interval ΔTk that are closest to the local extremum or inflection point of the error characteristic are divided by the error data for the first predefined time interval ΔTn, and the error data for the second predefined time interval ΔTk are divided by the error data for the first predefined time interval ΔTn. For example, in Fig. Figure 7 replaces the data acquisition error calculation circuit. 4 the error data at the compensation point T12 , which are closest to the local extreme of the error characteristic curve, through the error data of the compensation point T1 or T2 , if error data is present at the compensation point T12 available that are closer than the error data of the compensation points T1 and T2 at the local extreme of the error characteristic curve. This changes the acquisition error data calculation circuit. 4 , as for example in Fig. Figure 8 shows the time intervals ΔTn of the error data without an increase or decrease in the amount of error data.

[0044] At this point, the data acquisition error calculation circuit can 4Error data for the second predefined time interval ΔTk, which are closest to the local extreme of the error characteristic, are replaced with error data for the first predefined time intervals ΔTn, with priority over error data for the second predefined time intervals ΔTk, which are closest to the inflection point of the error characteristic. The acquisition error data calculation circuit 4 The error data for the second predefined time intervals ΔTk, which are closest to the local extreme of the error characteristic, can be prioritized. Specifically, it can prioritize the error data for the second predefined time intervals ΔTk that are closest to the local extreme at which the slope of the curve forming the local extreme of the error characteristic is steep, and replace these error data with the error data for the first predefined time intervals ΔTn. Furthermore, the acquisition error data calculation circuit can 4Prioritize the error data closest to the inflection point of the error characteristic curve for the second specified time intervals ΔTk, where the curve forming the inflection point of the error characteristic curve has a strong slope, and replace these error data with the error data for the first specified time intervals ΔTn.

[0045] In the embodiments described above, the circuit used with the start condition determination circuit is employed. 41 and the data acquisition error calculation circuit 4 equipped data acquisition error calculation circuit 4 the start condition determination circuit 41 to determine data in the register group 42 to import and issue a command to calculate the reference data. The start condition determination circuit. 41However, this need not be provided, and a control device such as a numerical control device that controls a device or apparatus equipped with the value transmitter can determine the start condition, import data from the control device, and issue the command to calculate the reference data.

[0046] Furthermore, the data acquisition error calculation circuit 4 and the detection error compensation circuit 5 be configured as a processor and prompted by software to perform the acquisition error data calculation processing and the acquisition error compensation processing. Fig. Figure 9 is a flowchart that illustrates the acquisition error data calculation processing by a processor when the acquisition error data calculation circuit is active. 4is configured as a processor. When a reference data generation command is entered manually or by the control device that controls the device or equipment equipped with the value transmitter, the processor first determines the reference data based on the digital interpolation circuit. 3 The processor uses the output sampling position data to determine whether a configuration error calculation start condition is met. In other words, it determines whether the current rotational speed corresponds to a specified value and whether the acceleration is within a specified range (step a1).

[0047] When it is determined that the configuration capture error calculation start condition is met, the processor imports the data from the digital interpolation circuit. 3The processor imports position data for a cycle (steps a2 and a3). Once this data import is complete, it determines whether the acceleration is within the specified range (step a4). If the acceleration is outside the specified range, it determines that a change in rotational speed occurred during the cycle for which the position data was determined, and the processor returns to step a1 to re-import the position data.

[0048] If in step a4 it is determined that the acceleration is within the specified range, it is determined that the imported position data are data at a constant rotational speed, and the processor stores the position data P(0) to P(n) sampled at the first specified time intervals ΔTn of the cycle and the position data sampled in each of the first specified time intervals ΔTn in the second specified time intervals ΔTk under the determined position data (step a5).

[0049] The processor calculates error data (step a6) based on the difference between the position data P(0) to P(n) at the first predefined time intervals ΔTn in a cycle and ideal position data. Furthermore, the processor calculates error data in each first predefined time interval ΔTn based on the difference between the position data at the second predefined time interval ΔTk and ideal position data.

[0050] If error data for a second predefined time interval ΔTk exists that is closer to the local extremum or inflection point of the error characteristic curve than error data for a first predefined time interval ΔTn, the processor replaces the error data for the second predefined time intervals ΔTk that are closest to the local extremum or inflection point of the error characteristic curve with the error data for the first predefined time intervals ΔTn, and the error data for the second predefined time intervals ΔTk with the error data for the first predefined time intervals ΔTn. In other words, the processor modifies the time intervals ΔTn of the error data without increasing or decreasing the amount of error data so that the compensation points are located near the local extremum or inflection point of the error characteristic curve. The processor stores the error data (step a8).

[0051] The processor increments an index j by 1 (index j is set to "0" during initialization) and determines whether the value of index j corresponds to a set number of repetitions (steps a9 and a10). If index j does not correspond to a set number of repetitions, the processor returns to step a1. The processor repeats the processing of steps a1 to a10, and when index j reaches the set number of repetitions, the processor determines the mean of the number j of stored capture errors associated with pre-calculated capture locations (step a11). The processor then stores a combination of the pre-calculated capture locations and the mean of the capture errors as reference data (step a12) and terminates the processing to determine the reference data.

[0052] Fig.Figure 10 is a flowchart that represents a capture error compensation processing by a processor when the capture error compensation circuit is 5 is configured as a processor. The processor reads the data from the digital interpolation circuit. 3The processor takes the output position data P(x) (step b1) and determines the front and rear position data P(m) and P(m+1) of the position data P(x) read from the position data stored as reference data (step b2). The processor determines the acquisition error data D(m) and D(m+1) stored with respect to the determined position data P(m) and P(m+1) (step b3) and performs an interpolation calculation to determine the acquisition errors D(x) for the read position data P(x) based on the position data P(m) and P(m+1) and the error data D(m) and D(m+1) (step b4). The processor uses the determined acquisition errors D(x) to compensate for the read position data P(x) and outputs the position data P(x) as position data acquired in one cycle (step b5).

[0053] This results in the position data generation circuit 6Based on the compensated recorded position data and a data value from the counter that counts the cycles, position data is generated.

[0054] As described above, the data acquisition error calculation circuit calculates 4 in the value transmitter signal processing device D According to this embodiment, the predefined number n + 1 of error data elements of the position data sampled in the first predefined time intervals ΔTn in a cycle is determined, and the error data for the first predefined time intervals ΔTn (the first error data) are defined as error data. Furthermore, the acquisition error data calculation circuit calculates 4Error data (secondary error data) in position data sampled in each of the first predetermined time intervals ΔTn within second predetermined time intervals ΔTk. If error data for a second predetermined time interval ΔTk is available that is closer than error data for a first predetermined time interval ΔTn to a local extremum or inflection point of the error characteristic, the acquisition error data calculation circuit replaces the first predetermined time interval ΔTk. 4 The error data for the second predefined time interval ΔTk, which are closest to the local extremum or inflection point of the error characteristic, are calculated based on the error characteristic of the error data for the first predefined time intervals ΔTn and the error data for the second predefined time intervals ΔTk by error data for the first predefined time intervals ΔTn. In this configuration, the acquisition error data calculation circuit changes 4The first predefined time intervals ΔTn (the time intervals of the error data) are adjusted without increasing or decreasing the number of compensation points (the number of samples of error data) such that the compensation points lie near the local extremum or inflection point of the error characteristic curve of the error data. This allows errors (interpolation errors) in the compensated position data to be reduced even when a linear approximation curve is determined by performing linear interpolation between the compensation points in the error characteristic curve of the error data, and this determined linear approximation curve is used to compensate the position data. This improves the detection accuracy of the encoder.

[0055] It is noted that patent specification 1 (first embodiment) discloses a technology for shifting all compensation points such that at least one of the compensation points corresponds to a local extreme of an error curve. However, since the intervals between the compensation points are constant, it is impossible to align all local extremes of the error curve with the compensation points.Furthermore, patent specification 1 (second embodiment) discloses a technology for changing the interval width of a compensation interval according to the magnitude of an error using the local maximum (the maximum value), the local minimum (the minimum value), and an inflection point in the form of the error characteristic curve; more precisely, a technology for narrowing the interval width of a compensation interval at a point with a large error and for widening the interval width of a compensation interval at a point with a small error. However, in this case, the number of compensation points can increase, and the signal processing time, i.e., the acquisition time, can also increase.Furthermore, patent specification 1 states that these methods can be combined, but no technology is mentioned by which compensation points can be moved to a local extremum or inflection point of a fault characteristic without increasing or decreasing the number of compensation points.

[0056] One embodiment of the present invention has been described above, but the present invention is not limited to the embodiment described above and can be modified or adapted in different ways. Reference symbol list D Value transmitter signal processing device 1a, 1b analog amplification circuit (position data acquisition unit) 2a, 2b Analog-to-digital converter circuit (position data acquisition unit) 3 digital interpolation circuits (position data determination unit) 4. Error data calculation circuit (error data calculation unit) 41 Starting condition determination circuit 42 Register 43 Data entry error calculation unit 44 Recording error memory register 45 Averaging circuit 411a, 411b, 411c position data registers 412a first speed calculation circuit 412b second speed calculation circuit 413 Zero-crossing point detection circuit 414 Acceleration calculation circuit 415 Position data register memory start determination / error calculation start signal determination circuit 5. Detection error compensation circuit 51 Error memory registers for compensation 52 Compensation calculation circuit 6 Position data generation circuit QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2012163436

[0003] JP 3772121

[0003]

Claims

[1] Value transmitter signal processing device (D) which performs signal processing on analog signals which are periodically generated in accordance with a movement of the measurement target in order to generate position data corresponding to the position of a measurement target, wherein the value transmitter signal processing device (D) comprises: a position data acquisition unit (1a, 1b, 2a, 2b, 3) that samples the analog signals to determine the position data corresponding to the position of the measurement target; an error data calculation unit (4) which calculates error data based on a difference between a predetermined number of position data elements among position data determined by the position data determination unit (1a, 1b, 2a, 2b, 3) in one cycle and ideal position data where the position is assumed to move linearly in one cycle; and a compensation unit (5) that compensates the position data determined by the position data determination unit (1a, 1b, 2a, 2b, 3) on the basis of the error data calculated by the error data calculation unit (4), where the error data calculation unit (4): Based on a difference between the specified number of position data samples taken in initial specified time intervals ΔTn in a cycle and the ideal position data, initial error data is calculated and the initial error data is defined as error data. Second error data is calculated based on the difference between position data sampled in each of the first predefined time intervals ΔTn within the second predefined time intervals ΔTk and the ideal position data; and According to an error characteristic of the first error data and the second error data, if second error data are closer than the first error data to the local extremum or inflection point of the error characteristic, a time interval of the error data is changed without increasing or decreasing the specified number of error data elements by replacing the second error data, which are closest to the local extremum or inflection point of the error characteristic, with one of the elements of the first error data. [2] Value transmitter signal processing device (D) according to claim 1, wherein the fault data calculation unit (4) prioritizes the second fault data that is closest to the local extreme of the fault characteristic curve over the second fault data that is closest to the inflection point of the fault characteristic curve, and replaces the prioritized fault data with the first fault data. [3] Value transmitter signal processing device (D) according to claim 2, wherein the fault data calculation unit (4) prioritizes second fault data from among the second fault data closest to the local extremum of the fault characteristic curve, which are closest to a local extremum where a curve forming the local extremum of the fault characteristic curve has a strong slope, and replaces the prioritized fault data with the first fault data. [4] Value transmitter signal processing device (D) according to claim 2, wherein the fault data calculation unit (4) prioritizes second fault data from among the second fault data closest to the inflection point of the fault characteristic curve, which are closest to an inflection point where a curve forming the inflection point of the fault characteristic curve has a strong slope, and replaces the prioritized fault data with the first fault data. [5] Value transmitter signal processing device (D) according to one of claims 1 to 4, wherein the compensation unit (5) performs interpolation processing on the error data calculated by the error data calculation unit (4) to determine error data corresponding to the position data determined by the position data determination unit (1a, 1b, 2a, 2b, 3) and to compensate the position data by corresponding error data. [6] Value transmitter comprising the value transmitter signal processing device (D) according to any one of claims 1 to 5.

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