Device and method for high-bandwidth on-mold antennas

By integrating high-frequency antennas within semiconductor devices with optimized layer arrangements and filters, the challenges of low bandwidth and efficiency in millimeter wave applications are addressed, resulting in improved signal transmission and reception capabilities.

DE102019009534B4Active Publication Date: 2026-05-28GLOBALFOUNDRIES US INC
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Patent Information

Application Number
DE102019009534
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2018-10-29
Filing Date
2019-10-24
Publication Date
2026-05-28
Estimated Expiration
2039-10-24

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Abstract

Semiconductor device (735; 736), comprising: a semiconductor layer (910) having a first surface (912) and a second surface (914); a polymer layer (920) having a first surface (922) and a second surface (924), wherein the first surface (922) of the polymer layer (920) is close to the second surface (914) of the semiconductor layer (910); a shape (930) having a first surface (932) and a second surface (934), wherein the first surface (932) of the shape (930) is close to the second surface (924) of the polymer layer (920); a multitude of nodes (942, 944, 946) arranged near the first surface (912) of the semiconductor layer (910); an antenna (950; 2250) arranged on the second surface (934) of the shape (930); a first conductive element (962; 2162) that provides an electrical connection between at least one first node (944) and the antenna (950; 2250); a mass element (970; 2270) arranged on the second surface (924) of the polymer layer (920); and a second conductive element (964) that provides an electrical connection between at least a second node (942) and the mass element (970), wherein the mass element (2270) is arranged on the second surface (924) of the polymer layer (920) and the semiconductor device (736) comprises a mass shield (2275, 2277) extending from the mass element (2270) to the second surface (934) of the shape (930) and surrounding the antenna (2250).
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Description

Background of the invention; Field of the invention

[0001] The present invention relates generally to the manufacture of complex semiconductor devices, in particular to various methods and systems for providing a high-frequency antenna (HF antenna) for a semiconductor device. Description of the state of the art

[0002] The technological explosion in the manufacturing industry has led to many new and innovative manufacturing processes for products. So-called millimeter wave (mm-wave) applications include devices that operate at high frequencies in the electromagnetic spectrum, ranging from approximately 30 gigahertz (GHz) to about 300 GHz. Some applications, such as those in 5G communication and the Internet of Things (IoT), can operate at frequencies below 30 GHz, such as 28 GHz. Millimeter waves have a wavelength ranging from about 1 millimeter (mm) to about 10 mm, corresponding to a high frequency of 30 GHz to about 300 GHz. This frequency band is sometimes referred to as the extremely high frequency (EHF) range.

[0003] The implementation of 5G and IoT applications presents many challenges in the design of circuits for these applications. EHF applications require discontinuous, low-loss transmission paths. They also benefit from antennas that are tightly integrated with other components. However, this tight integration of the antenna with the other components typically results in low antenna bandwidth. Typical on-die antennas have an efficiency of around 30% and a gain of approximately 3 dBi.

[0004] From US patent 2010 / 0073255A1, an overmolded semiconductor package is known which includes at least one semiconductor chip arranged over a package substrate, a molding compound located over the at least one semiconductor chip and the package substrate, a conductive layer located on an outer surface of the molding compound, and an antenna lead arranged in the molding compound and having a section exposed in an opening in the conductive layer to provide an antenna input on the outer surface of the molding compound.

[0005] The present invention can solve and / or at least reduce one or more of the problems mentioned above. Summary of embodiments of the invention

[0006] The following is a simplified summary of the invention to provide a basic understanding of some aspects of it. This summary does not constitute a complete overview of the invention. It is not intended to identify essential or critical elements of the invention or to define its scope. Its sole purpose is to present some concepts in simplified form as a prelude to the more detailed description discussed later.

[0007] In one embodiment, the present invention relates to a semiconductor device according to independent claim 1, wherein advantageous embodiments thereof are defined in dependent claims 2 to 4.

[0008] In other embodiments, the present invention relates to a method according to independent claim 5 or 6, wherein advantageous embodiments are defined in dependent claims 7 to 12.

[0009] Although not bound by a theory, the semiconductor devices of the present invention can exhibit bandwidths of about 15-30% at an operating frequency of about 28 GHz. Brief description of the drawings

[0010] The invention can be understood with reference to the following description in conjunction with the accompanying drawings, in which similar reference numerals identify similar elements and in which: Fig. 1 A stylized block diagram representation of a communication system according to embodiments herein illustrates; Fig. 2 a stylized block diagram representation of the control unit 140 according to embodiments herein is illustrated; Fig. 3. A stylized block diagram representation of the communication front-end unit of Fig. 1 as illustrated in embodiments herein; Fig. 4 a stylized block diagram of the transmitting unit of Fig. 3 illustrated according to the embodiments herein; Fig. 5 a stylized block diagram of the receiver unit of Fig. 3 as illustrated in embodiments herein; Fig. 6 A stylized block diagram representation of the signal processing unit of Fig. 1 as illustrated in embodiments herein; Fig. 7 a stylized block diagram representation of the antenna unit of Fig. 1 as illustrated in embodiments herein; Fig. 8 A stylized far-sighted top view of a first device comprising a plurality of semiconductor devices, each with an antenna, according to an embodiment herein, is illustrated; Fig. 9 a stylized cross-sectional view of a in Fig. 8 illustrated semiconductor device in X-section according to embodiments herein; Fig. 10 a stylized cross-sectional view of the semiconductor device of the Fig. 8-9 illustrated after a first manufacturing step in the X-section according to a first embodiment; Fig. 11 A stylized cross-sectional view of the semiconductor device of the Fig. 8-10 illustrated after a second manufacturing step in the X-section according to the first embodiment; Fig. 12 a stylized cross-sectional view of the semiconductor device of the Fig. 8-11 illustrated after a third manufacturing step in the X-section according to the first embodiment; Fig. 13 a stylized cross-sectional view of the semiconductor device of the Fig. 8-12 illustrated after a fourth manufacturing step in the X-section according to the first embodiment; Fig. 14 a stylized cross-sectional view of the semiconductor device of the Fig. 8-13 illustrated after a fifth manufacturing step in the X-section according to the first embodiment; Fig. 15 a stylized cross-sectional view of the semiconductor device of the Fig. 8-14 illustrated after a sixth manufacturing step in the X-section according to the first embodiment; Fig. 16 a stylized cross-sectional view of the semiconductor device of the Fig. 8-15 illustrated after a seventh manufacturing step in the X-section according to the first embodiment; Fig. 17 a stylized cross-sectional view of the semiconductor device of the Fig. 8-16 illustrated after an eighth manufacturing step in the X-section according to the first embodiment; Fig. 18 a stylized cross-sectional view of the semiconductor device of the Fig. 8-17 illustrated after a ninth manufacturing step in the X-section according to the first embodiment; Fig. 19 a stylized cross-sectional view of the semiconductor device of the Fig. 8-18 illustrated after a tenth manufacturing step in the X-section according to the first embodiment; Fig. 20 a stylized cross-sectional view of the semiconductor device of the Fig. 8-19 illustrated after an eleventh manufacturing step in the X-section according to the first embodiment; Fig. 21 A stylized far-sighted top view of a second device comprising a plurality of semiconductor devices, each containing an antenna, according to a second embodiment herein illustrated; Fig. 22 a stylized cross-sectional view of a in Fig. 21 illustrated semiconductor device in X-section according to embodiments herein; Fig. 23 a stylized cross-sectional view of the semiconductor device of the Fig. 21-22 illustrated after a first manufacturing step in the X-section according to a second embodiment; Fig. 24 a stylized cross-sectional view of the semiconductor device of the Fig. 21-23 illustrated after a second manufacturing step in the X-section according to the second embodiment; Fig. 25 a stylized cross-sectional view of the semiconductor device of the Fig. 21-24 illustrated after a third manufacturing step in the X-section according to a second embodiment; Fig. 26 a stylized cross-sectional view of the semiconductor device of the Fig. 21-25 illustrated after a fourth manufacturing step in the X-section according to the second embodiment; Fig. 27 a stylized cross-sectional view of the semiconductor device of the Fig. 21-26 illustrated after a fifth manufacturing step in the X-section according to a second embodiment; Fig. 28 a stylized cross-sectional view of the semiconductor device of the Fig. 21-27 illustrated after a sixth manufacturing step in the X-section according to the second embodiment; Fig. 29 a flowchart illustrating a process for manufacturing a semiconductor device according to embodiments herein; and Fig. 30 A stylized representation of a system for manufacturing a semiconductor device according to embodiments herein is illustrated.

[0011] The subject matter disclosed herein can be modified and configured in various alternative ways; however, specific embodiments are illustrated by way of example in the drawings and described in detail herein. It should be understood, however, that the description of specific embodiments contained herein is not intended to limit the invention to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives that fall within the spirit and scope of the invention, as defined in the appended claims. Detailed description

[0012] The following describes various illustrative embodiments of the invention. For the sake of clarity, not all features of a specific implementation are described in this specification. It should be noted, of course, that developing such a specific embodiment requires numerous implementation-specific decisions to achieve the developers' specific goals, such as complying with system-related and business-related constraints, which vary from implementation to implementation. Furthermore, it should be considered that such development work can be complex and time-consuming, but nevertheless represents a routine undertaking for a person skilled in the art with regard to this invention.

[0013] The present subject matter will now be described with reference to the accompanying figures. Various structures, systems, and devices are shown schematically in the drawings for illustrative purposes only, so as not to obscure the present invention with details that are well known to those skilled in the art. Nevertheless, the accompanying drawings are included to describe and explain the present invention by providing illustrative examples. The words and phrases used herein should be understood and interpreted in such a way as to have a meaning consistent with that of those skilled in the art. No special definition of a term or phrase, i.e., a definition that differs from the ordinary and customary meaning as understood by those skilled in the art, is to be implied by the consistent use of the term or phrase herein.Insofar as a term or phrase is to have a special meaning, i.e. a meaning other than that understood by the person skilled in the art, such a special definition is expressly established in the specification in a definitional manner which directly and unambiguously provides the special definition for the term or phrase.

[0014] Embodiments may include both a high-frequency (HF) and an integrated mm-wave antenna in a housing with improved bandwidth.

[0015] For better illustration, the embodiments contained herein are presented in the context of a communication device, although the person skilled in the art will understand that the concepts disclosed herein can be implemented in other types of devices, such as high-speed communication devices, network devices, etc. With reference to Fig. Figure 1 is a stylized block diagram representation of a communication system according to embodiments shown herein.

[0016] A system 100 can comprise a mm-wave device 110, a database 170, and a motor control 180. The mm-wave device 110 can be a radar device, a wireless communication device, a data network device, a video device, or the like. For illustration and for a better and simpler description, the mm-wave device 110 is described in the context of a communication application. Therefore, the mm-wave device 110 may often be referred to as the communication device 110 in the following. However, those skilled in the art will appreciate the advantages of the present invention if the concepts described herein could be applied to a variety of types of mm-wave applications, including vehicle applications with radar signals, wireless network applications, data network applications, video and audio applications, etc.

[0017] The communication device 110 is capable of sending and / or receiving a communication signal.

[0018] The communication device 110 can comprise a communication front-end unit 120, an antenna unit 130, a control unit 140, and a signal processing unit 150. The communication front-end unit 120 can contain a variety of components, circuits, and / or modules and is capable of transmitting, receiving, and / or processing communication signals. In one embodiment, the communication device 110 can be integrated into a single integrated circuit (IC) chip. In some embodiments, the communication device 110 can be formed on a variety of integrated circuits located on a single IC chip. In other embodiments, the communication device 110 can be formed on a single integrated circuit embedded in an IC chip. In some cases, the communication front-end unit 120 can simply be referred to as the communication unit 120.

[0019] The communication front-end unit 120 is capable of providing a communication signal. In one embodiment, the frequency range of the communication signals processed by the communication device 110 can be in the range of approximately 10 GHz to approximately 90 GHz. The communication front-end unit 120 is capable of generating a communication signal in a predetermined frequency range. The device 110 can process network communication for various types of communication applications, such as packet data network communication, wireless (e.g., mobile communications, IEEE 802.1 LD WiGig technology, etc.), data communication, etc. The concepts disclosed herein in the context of communication applications can also be used for other types of applications such as radar, wireless communication, high-resolution video, etc.

[0020] With further reference to Fig. 1. The antenna unit 130 may also include a transmitting antenna and / or a receiving antenna. Furthermore, each of the transmitting and receiving antennas may include subsections to form an antenna array. The transmitting antennas are used to send a communication signal, while the receiving antennas are used to receive a communication signal. A more detailed description of the antenna unit 130 is given in Fig. and the accompanying description below.

[0021] With further reference to Fig. 1. The communication device 110 can also include a signal processing unit 150. The signal processing unit 150 is capable of performing various analog and / or digital processing operations on the signals transmitted and / or received by the communication device 110. For example, a communication signal transmitted by the communication device can be amplified before transmission. Furthermore, the signal received by the communication device 110 can be passed through one or more analog filter stages. The reflected signals can then be converted into a digital signal by one or more analog-to-digital converters (DACs) in the signal processing unit 150. Digital signal processing (DSP) can be performed on the digitized signal. A more detailed description of the signal processing unit 150 is given in Fig. 6 and the accompanying description below.

[0022] With further reference to Fig. 1. The communication device 100 can also include a control unit 140. The control unit 140 can perform various control operations of the communication device 110. These functions include generating a communication signal, transmitting the communication signal, receiving a communication signal, and / or processing the reflected signal.

[0023] With reference to Fig. 2. A description of the control unit 140 according to embodiments herein is now given with reference to a stylized block diagram. The control unit 140 can comprise a processor unit 230, which can control various functions of the communication device 110. The processor unit 230 can comprise a microprocessor, a microcontroller, a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), and / or the like.

[0024] The control unit 140 can also include a logic unit 220. The logic unit 220 can comprise a circuit capable of performing various logic functions, receiving data, and executing interface functions with respect to input data (Data_In) and output data (Data_Out). The Data_In signal can represent data resulting from the processing and analysis of the reflected signal. The Data_Out signal can represent data generated for the execution of one or more tasks as a result of the transmission of the communication signal and the received signal. For example, the Data_Out signal can be used to perform an action based on the sending and / or receiving of communication signals.

[0025] The control unit 140 can also include a memory unit 210. The memory unit 210 can include non-volatile memory 214 and RAM 212. The non-volatile memory 214 can include FLASH memory and / or programmable read-only devices (PROM devices). The memory unit 210 is capable of storing operating parameters for controlling the operations of the communication device 110. Furthermore, the memory unit 210 can store status data and the response data described above. The memory unit 210 can also store data that can be used for programming FPGA devices in the communication device 110. Thus, the memory unit 210 can be subdivided into a program data memory, a status data memory, etc. This subdivision can be logical or physical.

[0026] With reference to Fig. Figure 3 is a stylized block diagram representation of the communication front-end unit 120 according to embodiments shown herein. The communication front-end unit 120 can comprise a signal generation unit 310, a transmitter unit 320, a signal processing unit 340, and a receiver unit 330. The signal generation unit 310 is capable of generating a communication signal at a predetermined frequency. For example, a signal in the range of approximately 70 GHz to approximately 85 GHz can be generated. The signal generation unit 310 can include a true differential frequency doubler (difference FD). The FD can be configured in a push-push configuration. The signal generation unit 310 is capable of providing a communication signal for transmission. A more detailed description of the signal generation unit 310 is provided below.

[0027] With further reference to Fig. 3. A signal is provided for processing and transmission from the signal generation unit 310 to the transmitter unit 320. The transmitter unit 320 can include a variety of filters, signal conditioning circuits, buffers, amplifiers, etc., for processing the signal from the signal generation unit 310. The transmitter unit 320 provides a communication signal to be transmitted to the antenna unit 130.

[0028] Fig. Figure 4 illustrates a stylized block diagram of the transmitting unit 320 according to embodiments herein. With simultaneous reference to the Fig. 3 and Fig. 4. The transmitting unit 320 can contain a plurality of similar transmitters, i.e., a first transmitter 410a, a second transmitter 420b, up to an Nth transmitter 410n (collectively “410”). In one embodiment, the 1st to Nth transmitters 410 can each process a single signal from the signal generation unit 310 and provide an output transmission signal to one or more antennas. In another embodiment, the signal generation unit 310 can provide a plurality of signals to the 1st to Nth transmitters 410. For example, the signal generation unit 310 can provide a signal transmission signal for each transmitter 410, or alternatively, provide a first transmission signal for a first set of transmitters 410 and a second transmission signal for a second set of transmitters 410.

[0029] With further reference to Fig. 3. A received signal is fed to the receiver unit 330. The receiver unit 330 is capable of receiving the processed received signal from the signal processing unit 130. The receiver unit 330 is capable of performing analog-to-digital conversion (A / D), signal buffering, DSP, etc. In some embodiments, the signal processing unit 130 can perform A / D conversion and DSP; however, in other embodiments, these tasks can be performed by the receiver unit 330. The receiver unit 330 can be directed towards the control unit 140.

[0030] Fig. Figure 5 illustrates a stylized block diagram of the receiver unit 320 according to embodiments herein. With simultaneous reference to the Fig. 3 and Fig. 5. The receiver unit 320 can comprise a plurality of similar receivers, in particular a first receiver 510a, a second receiver 520b, up to an Nth receiver 510n (collectively “510”). In one embodiment, the 1st to Nth receiver 510 can each process a single signal from the signal generation unit 310 and provide the signal to the control unit 140. In another embodiment, they can provide a plurality of signals to the 1st to Nth receiver 510. For example, the signal processing unit 130 can provide a signal reception signal for each receiver 510, or alternatively, provide a first receiver signal for a first set of receivers 510 and a second receiver signal for a second set of receivers 510.

[0031] With reference to Fig. Figure 6 shows a stylized block diagram representation of the signal processing unit 150 according to embodiments herein. The signal processing unit 150 can comprise an analog filter unit 610, an A / D converter 620, a DSP unit 630, and a memory 640. The analog filter unit 610 is capable of performing both filtering and amplification of the analog signal that has been down-converted from a mm-wave signal received by the signal processing unit 150. Noise filtering can be performed by the analog filter unit 610 before amplification of the analog signal that has been down-converted from a mm-wave signal.

[0032] The A / D converter 620 is capable of converting the filtered and / or amplified analog signal into a digital signal. The A / D converter 620 can perform conversions with predefined or variable accuracy. For example, the A / D converter 620 can have an accuracy of 12 bits, 24 bits, 36 bits, 48 ​​bits, 64 bits, 96 bits, 128 bits, 256 bits, 512 bits, 1024 bits, or higher. The converted digital mmWave signal is fed to the DSP unit 630.

[0033] The DSP unit 630 can perform a variety of DSP operations on the digital mm-wave signal. For example, the digital filtering of the digitized analog signal, which has been down-converted from the mm-wave frequency, can be performed by the DSP unit 630. Signal components outside a specified frequency range, e.g., 70 GHz to approximately 85 GHz, can be filtered to a lower amplitude. In other cases, mathematical functions, such as a fast Fourier transform (FFT), can be applied to the mm-wave signal. The processed digital output of the DSP unit 630 can be sent to the control unit 140 for analysis. In other cases, the digital output can be buffered or stored in a memory 640. In some cases, the memory 640 can be a first-in-first-out (FIFO) memory.In other cases, the processed digital output of the DSP unit 630 can be stored in the storage unit 210 of the control unit 140.

[0034] With reference to Fig. Figure 7 is a stylized block diagram representation of the antenna unit of Fig. 1 according to the embodiments shown herein. The mm-wave signals to be transmitted (e.g. radar signals, network data signals, wireless communication signals, etc.) can be transmitted by the transmitting unit 320 ( Fig. 3) are provided for the transmitting antenna 710. In one embodiment, the transmitting antenna 710 can comprise a plurality of transmitting antenna sections 715. The transmitting antenna sections 715 are arranged in a predetermined pattern, e.g., an array matrix, as shown in Fig. 7 is shown.

[0035] Millimeter wave signals to be received (e.g., radar signals, network data signals, wireless communication signals, etc.) can be detected by the receiving antenna 720. The receiving antenna 720 makes the received mm wave signals available to the receiver unit 330 ( Fig. 3) In one embodiment, the receiving antenna 720 can comprise a plurality of receiving antenna sections 725. The receiving antenna sections 725 are also arranged in a predetermined pattern, e.g., an arrangement matrix, as shown in Fig. 7 is shown.

[0036] Fig. Figure 8 shows a stylized far-sighted top view of a first device 730 with a plurality of semiconductor devices 735 according to an embodiment herein, each comprising an antenna 950. Each of the semiconductor devices 735 can correspond to a transmitting antenna section 715 or a receiving antenna section 725, as shown in the block diagram of Fig. Figure 7 shows the first device 730, which can correspond to a transmitting antenna 710, a receiving antenna 720, or a combination thereof, as shown in the block diagram of Fig. 7 is shown.

[0037] The in Fig. Figure 8, a top view, shows an antenna 950 and a shape 930, which are described in more detail below. The shape of the antenna 950 in the top view is not critical and can be modified from the one shown in Fig. The E-shape shown in Figure 8 may differ. The top view is far-sighted to show the position of a high-frequency filter (HF filter) 980 arranged in the shape 930, as described in more detail below.

[0038] The plurality of semiconductor devices 735 can be configured to receive high-frequency (HF) signals, such as communication signals, at a specific frequency. By using a specific frequency, the HF signal to be received also has a specific wavelength λ. Thus, in one embodiment, the semiconductor devices 735 in the first device 730 can be arranged such that the antennas 950 of adjacent semiconductor devices 735 are separated by half of their respective wavelengths λ / 2. Although this separation is not theoretically bound, it can improve the efficiency, sensitivity, and / or signal-to-noise ratio of signal acquisition or propagation by the first device 730.

[0039] Fig. Figure 8 also shows an X-section line, based on which subsequent drawings of a semiconductor device 735 of the first device 730 are illustrated. The X-section line bisects the form 930, the antenna 950, and the RF filter 980.

[0040] With reference to Fig. 9 shows a stylized cross-sectional view of a Fig. The semiconductor device 735 is shown in X-section in Figure 8 according to the embodiments herein. The semiconductor device 735 comprises a semiconductor layer 910 with a first surface 912 and a second surface 914. The semiconductor layer 910 can comprise any semiconductor material, such as silicon or silicon-germanium. If the semiconductor layer 910 comprises silicon-germanium, the germanium content in mol% can be suitably selected by a person skilled in the art.

[0041] The semiconductor device 735 also comprises a polymer layer 920 having a first surface 922 and a second surface 924. The first surface 922 of the polymer layer 920 is located near the second surface 914 of the semiconductor layer 910. The polymer layer 920 can comprise any polymer material known in the art. In one embodiment, the polymer layer 920 comprises polyimide.

[0042] The semiconductor device 735 further comprises the aforementioned shape 930. The shape 930 has a first surface 932 and a second surface 934. The first surface 932 of the shape 930 is close to the second surface 924 of the polymer layer 920. The shape 930 can comprise any mold material known in the art. In one embodiment, the shape 930 comprises Ajinomoto MI-11 (Ajinomoto Co., Inc., Tokyo, Japan).

[0043] The thickness of mold 930 can be varied by a person skilled in the art. In one embodiment, mold 930 has a thickness of approximately 500 µm to approximately 1000 µm. In another embodiment, mold 930 has a thickness of approximately 750 µm to approximately 800 µm, such as approximately 775 µm.

[0044] The semiconductor device 735 additionally comprises a plurality of nodes 942, 944, 946, which are arranged near the first surface 912 of the semiconductor layer 910. Each node 942, 944 or 946 includes, among other things, an electrically conductive material, such as a metal, e.g. copper or aluminum, or a eutectic solder joint.

[0045] Although in Fig. While three nodes 942, 944, and 946 are shown, the number of nodes can vary.

[0046] The semiconductor device 735 also includes the antenna 950, which is arranged on the second surface 934 of the shape 930. The antenna 950 includes, among other things, an electrically conductive material, such as a metal, e.g., copper or aluminum.

[0047] The semiconductor device 735 has a first conductive element 962 to establish an electrical connection between at least one first node 944 and the antenna 950. An RF signal received by the antenna 950 can be fed to other components of a system comprising a semiconductor device 735 via the first node 944, or an RF signal generated by other components of a system, including the semiconductor device 735, and transmitted by the antenna 950, can be fed to the antenna 950 via the first node 944. Although, for clarity, the first conductive element 962 has a uniform width over its entire height, it can have wider and narrower sections, sections made of different materials, etc., as described below and as is apparent to a person skilled in the art.

[0048] The semiconductor device 735 also includes a ground element 970, which is arranged in the polymer layer 920 or on the second surface of the polymer layer. The ground element 970 can comprise any electrically conductive material, such as a metal, for example, copper or aluminum. A second conductive element 964 establishes an electrical connection between at least a second node 942 and the ground element 970. Although not bound by theory, the ground element 970 can reduce interference caused by RF signals received by the antenna 950 and fed to other components of a system, including the semiconductor device 735, or transmitted by the antenna 950 and generated by other components of the system via the first node 944.

[0049] In embodiments such as in Fig. As shown in Figure 9, the semiconductor device 735 can further comprise a high-frequency filter (HF filter) 980 arranged in the shape 930. Alternatively (not shown), the HF filter 980 can be arranged on the second surface 924 of the polymer layer 920. Integrating the HF filter 980 into a die-to-wafer (D2W) process can improve the performance of a device comprising the semiconductor device 735. As shown, the semiconductor device 735 can further comprise a third conductive element 966 that provides an electrical connection between at least one third node 946 and the HF filter 980. Although Fig. 9 For the sake of convenience and brevity, only one conductive element between a node and the RF filter 980 is shown, i.e., the third conductive element 966, which establishes an electrical connection between at least one third node 946 and the RF filter 980, the semiconductor device 735 in other embodiments may comprise two, three, four or another number of nodes and a corresponding number of conductive elements from the nodes to the RF filter 980.

[0050] The semiconductor device 735 can also comprise various layers known to those skilled in the art for use in semiconductor devices. For example, the semiconductor device 735 can have a second polymer layer 925 arranged near the plurality of nodes 942, 944, and 946. The second polymer layer 925 can comprise a material suitable for use as a substrate for a printed circuit board. The second polymer layer 925 can, but need not, comprise the same material as the polymer layer 920.

[0051] As a further example, the semiconductor device 735 can comprise an oxide layer 990 arranged between the semiconductor layer 910 and the polymer layer 920. The oxide layer 990 can consist of silicon oxide and can be formed by any known technique. Alternatively or additionally, the semiconductor device 735 can comprise a second oxide layer 995 arranged between the second polymer layer 925 and the semiconductor layer 910.

[0052] For the sake of brevity, in Fig. 9 one or more structures that a person skilled in the art would routinely include in a semiconductor device have been omitted.

[0053] Fig. Figure 10 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a first manufacturing step according to a first embodiment. In the first manufacturing phase, the semiconductor layer 910 is formed, to which the second oxide layer 995 near the first surface 912 of the semiconductor layer 910, the second polymer layer 925 near the second oxide layer 995, and a sacrificial carrier layer 1026 near the second polymer layer 925 can be bonded using known techniques.

[0054] Fig. Figure 11 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a second manufacturing step according to the first embodiment. In the second stage of the manufacturing process, trenches 1111 are etched from the second surface 914 to the second surface 912 of the semiconductor layer 910, thereby exposing the second oxide layer 995. The oxide layer 990 is then deposited near the second surface 914 of the semiconductor layer 910 and conformally coats the trenches 1111. Etching the trenches 1111 and depositing the oxide layer 990 can be carried out routinely by a person skilled in the art using known techniques.

[0055] Fig. Figure 12 shows a stylized cross-sectional view of the semiconductor device 735 in X-section after a third manufacturing step according to the first embodiment. A first polymer sublayer 921 is deposited over the oxide layer 990 and also the grooves 1111. It is desirable that the first polymer sublayer 921 be etched on the underside of the grooves 1111 in order to open the die metal where a first conductive layer 961 (see Figure 12) is to be deposited. Fig. ) can land. The deposition of the first polymer sublayer 921 is a routine matter for the person skilled in the art and does not need to be described in detail.

[0056] Fig. Figure 13 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a fourth manufacturing step according to the first embodiment. In the fourth stage of the manufacturing process, a first conductive sublayer 961 is deposited onto the first polymer sublayer 921. A diffusion barrier layer (not shown) can be arranged prior to the cladding of the first conductive sublayer 961. Prior to the cladding of the first conductive sublayer 961, a mask (not shown) can be applied to portions of the first polymer sublayer 921 that lie above the semiconductor layer 910, after which the cladding can be carried out. Any commercially available sputtering process can be used to deposit a thin seed layer for the application of the first conductive sublayer 961 onto the first polymer sublayer 921. The mask can then be removed to expose the Fig. 13 semiconductor device 735 to be obtained.

[0057] Fig. Figure 14 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a fifth manufacturing step according to the first embodiment. In this manufacturing step, a second polymer sublayer 923 is applied to the first conductive sublayer 961. In positions where the plating of the first conductive sublayer 961 was prevented by masking, e.g., at position 1427, the second polymer sublayer 923 can contact the first polymer sublayer 921, thereby ensuring galvanic isolation of the sections of the first conductive sublayer 961 from one another. The ground element 970 can be defined by such galvanic isolation of sections of the first conductive sublayer 961.

[0058] The deposition of the second polymer sublayer 923 can be carried out using known techniques. Alternatively, prior to the deposition of the second polymer sublayer 923, a mask (not shown) can be applied to sections of the first conductive sublayer 961, after which the deposition can be carried out and the mask removed to expose the Fig. 14 to obtain the semiconductor device 735 shown.

[0059] Fig. Figure 15 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a sixth manufacturing step according to the first embodiment. In this manufacturing step, a second conductive sublayer 963 is applied to the second polymer sublayer 923. In positions where the deposition of the second polymer sublayer 923 was prevented by masking, e.g., at position 1567, the second conductive sublayer 963 can contact the first conductive sublayer 961.

[0060] Fig. Figure 16 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a seventh manufacturing step according to the first embodiment. In this manufacturing step, a via strip 965 and the RF filter 980 can be formed, each of which is in contact with the second conductive sublayer 963 and electrically connected to sections of the first conductive sublayer 961. The formation of the via strip 965 and the RF filter 980 can be carried out using known techniques and need not be described further.

[0061] Fig. Figure 17 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after an eighth manufacturing step according to the first embodiment. In this manufacturing step, the shape 930 is formed via the via strip 965 and the RF filter 980. The techniques for forming the shape 930 are known to those skilled in the art and do not need to be described in detail.

[0062] Fig. Figure 18 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a ninth manufacturing step according to the first embodiment. In this manufacturing step, a via opening 1867 is formed in the mold 930. In one embodiment, the via opening 1867 can be formed by performing a laser opening technique on the mold 930. By forming the via opening 1867, the via strip 965 is exposed to the subsequent processing steps.

[0063] Fig. Figure 19 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after a tenth manufacturing step according to the first embodiment. In the tenth manufacturing step, the antenna 950 is formed by depositing a conductive material onto the mold 930, including overfilling and filling the Fig. The via opening 1867 is shown in Figure 18. A diffusion barrier layer may be desirable for the deposition of the antenna 950. Any conventional sputtering method can be used to deposit a thin seed layer for the antenna 950 onto the mold 930. The antenna 950 is accordingly in electrical contact with the via strip 965, at least one section of the second conductive sublayer 963, and at least one section of the first conductive sublayer 961. The via strip 965, the at least one section of the second conductive sublayer 963, and the at least one section of the first conductive sublayer 961 together define the first conductive element 962.

[0064] Fig. Figure 20 illustrates a stylized cross-sectional view of the semiconductor device 735 in X-section after an eleventh manufacturing step according to the first embodiment. In this manufacturing step, the sacrificial layer 1026 is removed and front-facing C4 or CuP bumps are formed to obtain a plurality of nodes 942, 944, and 946 arranged on the second polymer layer 925.

[0065] Although not bound to the theory, a semiconductor device 735 can exhibit a bandwidth of approximately 4.4 GHz and a gain of approximately 8 dBi for a 28 GHz signal.

[0066] Fig. Figure 21 illustrates a stylized, far-sighted top view of a second device 731 comprising a plurality of semiconductor devices 736, each having an antenna 2250, according to a second embodiment herein. Fig. 21 has with Fig. 8. Many elements are in common. These common elements are identified by the same reference numbers, which first appear in Fig. Figure 8 is shown, as described therein. In general, the second device 731 is essentially the one shown in Figure 8. Fig. The first device 730 is similar to the one shown in 9. The second device 731 comprises a plurality of semiconductor devices 736 which are described in Fig. 9 semiconductor devices shown are similar to 735.

[0067] In Fig. 21 shows a new antenna 2250, which is in Fig. The antenna shown in Figure 9 is essentially similar to the 950.

[0068] Fig. Figure 21 also shows a ring 2277. The ring 2277 clearly encloses the antenna 2250, but is separated from the antenna 2250 by a portion of the shape 930. The inclusion of the ring 2277 can reduce signal discontinuity and / or signal loss in any semiconductor device 736.

[0069] Fig. Figure 21 also shows an X-section line, from which the cross-sectional representations in the Fig. 22-28 will be taken over.

[0070] Fig. Figure 22 vividly illustrates a stylized cross-sectional view of a [structure / body / structure]. Fig. The semiconductor device shown in 21 is depicted in X-section according to the second embodiment. Numerous components of the device shown in the second embodiment are shown in the second embodiment. Fig. The components shown in section 22 are identical or substantially similar to those in Fig. 10 and are designated with the same reference numbers.

[0071] There are a number of differences between Fig. 22 and Fig. 10. Firstly, a first conductive element 2162 is arranged in the polymer layer 920 below the antenna 2250. The first conductive element 2162 is a supply layer that establishes an electrical connection between the antenna 2250 and the first node 944 or, in another embodiment, the chip 910. The electrical connection provided by the first conductive element 2162 does not require a physical connection; rather, the slot in the ground element 2270 brings the antenna into resonance by coupling electromagnetic fields.

[0072] In this embodiment, the ground element 2270 of the semiconductor device 736 is arranged on the second surface 924 of the polymer layer 920 and has a slot below the antenna 2250 and above the first conductive element 2162. The slot in the ground element 2270 allows the first conductive element 2162 to feed the antenna 2250.

[0073] Fig. Figure 22 also shows that the via cage 2275 extends from the mass element 2270 to the second surface 934 of the form 930 and establishes an electrical connection to the ring 2277. The via cage 2275 and the ring 2277 can together be referred to as a "ground shield" in this context.

[0074] Fig. Figure 23 illustrates a stylized cross-sectional view of the semiconductor device 736 after a first manufacturing step in X-section according to the second embodiment. The first manufacturing stage mentioned here is not the first manufacturing stage of the device. Instead, the first stage of the manufacture of the second embodiment is shown in Figure 23. Fig. The second embodiment is carried out in the structure shown in Figure 14. In the first stage of the fabrication of the second embodiment, a second conductive sublayer 2363 is deposited on the second polymer sublayer 923 to obtain the ground element 2270 and a section of the second conductive sublayer 2363 that will not be part of the grounding path for the semiconductor device 736. The ground element 2270 is in contact with the first conductive sublayer 961. Another section of the first conductive sublayer 961 forms the first conductive element 2162, as shown in Figure 14. Fig. 22 is shown.

[0075] Fig. Figure 24 illustrates a stylized cross-sectional view of the semiconductor device 736 after a second manufacturing step in X-section according to the second embodiment. In this manufacturing phase, the RF filter 980 is formed as described above.

[0076] Fig. Figure 25 illustrates a stylized cross-sectional view of the semiconductor device 736 after a third manufacturing step in X-section according to a second embodiment. In this manufacturing step, the shape 930 is formed as described above.

[0077] Fig. Figure 26 illustrates a stylized cross-sectional view of the semiconductor device 736 after a fourth manufacturing step in X-section according to the second embodiment. In this manufacturing step, via openings 2667 are formed in the shape 930. In one embodiment, the via opening 2667 can be formed by performing a laser opening technique on the shape 930. By forming the via openings 2667, the mass element 2270 and the second mass element 2270 are exposed to the subsequent processing steps.

[0078] Fig. Figure 27 illustrates a stylized cross-sectional view of the semiconductor device 736 after a fifth manufacturing step in X-section according to a second embodiment. In this manufacturing step, the antenna 2250 is plated, as described above with respect to the antenna 950. At this time, the via cage 2275 is also inserted into the Fig. The via openings 2667 shown in the diagram are plated, followed by the plating of the ring 2277. The ring 2277 can be made of aluminum. The ring 2277 can improve the directivity of the semiconductor device 736.

[0079] Fig. Figure 28 illustrates a stylized cross-sectional view of the semiconductor device 736 after a sixth manufacturing step in the X-section according to the second embodiment. In the sixth manufacturing step, nodes 942, 944 and 946 are formed, as described above.

[0080] Although not bound to the theory, a semiconductor device 736 can exhibit a bandwidth of approximately 8.1 GHz and a gain of approximately 7.5 dBi for a 28 GHz signal.

[0081] Fig. Figure 29 presents a flowchart illustrating a method 2900 for manufacturing a semiconductor device according to embodiments herein. In particular, the method 2900 comprises forming (at 2910) a semiconductor layer with a first surface and a second surface. In one embodiment, the semiconductor layer (at 2910) can be formed from silicon germanium.

[0082] In some embodiments, the method 2900 may further comprise forming (at 2915) an oxide layer adjacent to the second surface of the semiconductor layer.

[0083] Method 2900 also includes forming (at 2920) a polymer layer having a first surface and a second surface, wherein the first surface of the polymer layer is located close to the second surface of the semiconductor layer. In embodiments in which an oxide layer is formed (at 2915), the oxide layer is arranged between the semiconductor layer and the polymer layer.

[0084] Method 2900 further comprises forming (at 2930) a mold having a first surface and a second surface, wherein the first surface of the mold is close to the second surface of the polymer layer. In one embodiment, the mold (at 2930) can be formed to have a thickness of 500 µm to 1000 µm. In another embodiment, the mold (at 2930) can be formed to have a thickness of 750 µm to 800 µm. In a particular embodiment, the mold (at 2930) can be formed to achieve a thickness of 775 µm.

[0085] Method 2900 further comprises forming (at 2940) a plurality of nodes arranged close to the first surface of the semiconductor layer. Method 2900 further comprises forming (at 2950) an antenna arranged on the second surface of the shape. Method 2900 also further comprises forming (at 2960) a first conductive element that provides an electrical connection between at least one first node and the antenna.

[0086] Method 2900 also comprises forming (at 2970) a mass element arranged in the polymer layer or on the second surface of the polymer layer. Method 2900 further comprises forming (at 2980) a second conductive element providing an electrical connection between at least a second node and the mass element.

[0087] In one embodiment, the method 2900, when forming (at 2970) the mass element of the semiconductor device, comprises forming the mass element on the second surface of the polymer layer, wherein the method 2900 may additionally include forming (at 2972) a mass shield extending from the mass element to the second surface of the mold and surrounding the antenna.

[0088] Alternatively or in addition to forming (at 2972) the mass shield, the method 2900 may further comprise forming (at 2982) a high-frequency filter (RF filter) arranged in the shape and forming (at 2984) a third conductive element which provides an electrical connection between at least a third node and the RF filter.

[0089] Alternatively or additionally to forming (at 2972) the ground shield and / or forming (at 2982) the RF filter, the method 2900 may further comprise forming (at 2985) a plurality of semiconductor devices; and configuring (at 2987) a first subset of the plurality of semiconductor devices as a receiver antenna arrangement and / or configuring a second subset of the plurality of semiconductor devices as a transmit antenna arrangement. In this embodiment, the method may further comprise determining (at 2989) a first wavelength of an RF signal for the semiconductor device to receive and / or transmit and positioning (at 2991) the plurality of semiconductor devices such that a distance between the antennas of the proximal semiconductor devices is approximately half the first wavelength.

[0090] Fig. Figure 30 provides a stylized representation of a system for manufacturing a semiconductor device according to the embodiments herein. System 3000 involves the formation of an integrated circuit with the features described above with respect to one or more of the Fig. 8-28 and can be a product with the characteristics described above in relation to one or more of the Fig. Form 1-28.

[0091] The System 3000 from Fig. 30 can include a semiconductor device processing system 3010 and an integrated circuit design unit 3040. The semiconductor device processing system 3010 can produce integrated circuit devices based on one or more designs provided by the integrated circuit design unit 3040.

[0092] The 3010 semiconductor device processing system can include various processing stations, such as deposition stations (e.g., ALD, PECVD, etc.), etching process stations, photolithography process stations, CMP process stations, etc. At least one of the processing steps performed by the 3010 processing system can be controlled by the 3020 processing controller. The 3020 processing controller can be a workstation computer, desktop computer, laptop computer, tablet computer, or other type of computer device, including one or more software products capable of controlling processes, receiving process feedback, receiving test result data, performing learning cycle adjustments, making process adjustments, etc.

[0093] The 3010 semiconductor device processing system can fabricate integrated circuits on a medium such as silicon wafers. In particular, the 3010 semiconductor device processing system can fabricate integrated circuits containing one or more 735 and / or 736 semiconductor devices.

[0094] The fabrication of integrated circuits by the fixture processing system 3010 can be based on circuit designs provided by the integrated circuit design unit 3040. The processing system 3010 can provide processed integrated circuits / fixtures 3015 on a transport mechanism 3050, such as a conveyor system. In some embodiments, the transport system can be a sophisticated cleanroom transport system capable of transporting semiconductor wafers. In one embodiment, the semiconductor fixture processing system 3010 can include a variety of processing steps to perform material deposition, including intrinsic strain in gate cut areas.

[0095] In some embodiments, the elements designated “3015” may represent individual wafers, and in other embodiments, the elements 3015 may represent a group of semiconductor wafers, e.g., a “lot” of semiconductor wafers. The integrated circuit or device 3015 may be a transistor, a capacitor, a resistor, a memory cell, a processor, and / or the like.

[0096] The integrated circuit design unit 3040 of the system 3000 is capable of providing a circuit design that can be used by the semiconductor processing system 3010 to manufacture the devices described herein.

[0097] The System 3000 is capable of analyzing and manufacturing various products using different technologies. For example, the System 3000 can design and produce manufacturing data for CMOS, Flash, BiCMOS, and / or various other semiconductor technologies.

[0098] The procedures described above can be controlled by instructions stored on a non-volatile, computer-readable storage medium and executed, for example, by a processor in a computer device. Each of the operations described herein can correspond to instructions stored in non-volatile computer memory or a computer-readable storage medium. In various embodiments, the non-volatile, computer-readable storage medium comprises a magnetic or optical disk storage device, solid-state storage devices such as flash memory, or other non-volatile storage devices. The computer-readable instructions stored on the non-volatile, computer-readable storage medium can be in the form of source code, assembly language code, object code, or another instruction format that can be interpreted and / or executed by one or more processors.

Claims

[1] Semiconductor device (735; 736), comprising: a semiconductor layer (910) having a first surface (912) and a second surface (914); a polymer layer (920) having a first surface (922) and a second surface (924), wherein the first surface (922) of the polymer layer (920) is close to the second surface (914) of the semiconductor layer (910); a shape (930) having a first surface (932) and a second surface (934), wherein the first surface (932) of the shape (930) is close to the second surface (924) of the polymer layer (920); a multitude of nodes (942, 944, 946) arranged near the first surface (912) of the semiconductor layer (910); an antenna (950; 2250) arranged on the second surface (934) of the shape (930); a first conductive element (962; 2162) that provides an electrical connection between at least one first node (944) and the antenna (950; 2250); a mass element (970; 2270) arranged on the second surface (924) of the polymer layer (920); and a second conductive element (964) that provides an electrical connection between at least a second node (942) and the mass element (970), wherein the mass element (2270) is arranged on the second surface (924) of the polymer layer (920) and the semiconductor device (736) comprises a mass shield (2275, 2277) extending from the mass element (2270) to the second surface (934) of the shape (930) and surrounding the antenna (2250). [2] Semiconductor device (735; 736) according to claim 1, wherein the shape (930) has a thickness in the range of about 500 µm to about 1000 µm. [3] Semiconductor device (735; 736) according to claim 1, further comprising: a high-frequency filter (980) arranged in the form (930); and a third conductive element (966) that provides an electrical connection between at least a third node (946) and the high-frequency filter (980). [4] Semiconductor device (735, 736) according to claim 1, wherein the semiconductor layer (910) comprises silicon or silicon germanium. [5] Procedure (2900), comprising: a formation (2910) of a semiconductor layer (910) having a first surface (912) and a second surface (914); a formation (2920) of a polymer layer (920) having a first surface (922) and a second surface (924), wherein the first surface (922) of the polymer layer (920) is close to the second surface (914) of the semiconductor layer (910); a forming (2930) of a shape (930) having a first surface (932) and a second surface (934), wherein the first surface (932) of the shape (930) is close to the second surface (924) of the polymer layer (920); a formation (2940) of a plurality of nodes (942, 944, 946) arranged near the first surface (912) of the semiconductor layer (910). a formation (2950) of an antenna (950; 2250) arranged on the second surface (934) of the shape (930); a formation (2960) of a first conductive element (962; 2162) which provides an electrical connection between at least one first node (944) and the antenna (950; 2250) provides; a formation (2985) of a plurality of semiconductor devices (735; 736) each comprising the semiconductor layer (910), the polymer layer (920), the shape (930), the plurality of nodes (942, 944, 946), the antenna (950; 2250) and the first conductive element (962; 2162); and a configuration (2987) of a first subset of the plurality of semiconductor devices (935; 936) as a receiver antenna arrangement and / or a configuration of a second subset of the plurality of semiconductor devices (935; 936) as a transmit antenna arrangement. [6] Procedure (2900), comprising: a formation (2910) of a semiconductor layer (910) having a first surface (912) and a second surface (914); a formation (2920) of a polymer layer (920) having a first surface (922) and a second surface (924), wherein the first surface (922) of the polymer layer (920) is close to the second surface (914) of the semiconductor layer (910); a forming (2930) of a shape (930) having a first surface (932) and a second surface (934), wherein the first surface (932) of the shape (930) is close to the second surface (924) of the polymer layer (920); a formation (2940) of a plurality of nodes (942, 944, 946) arranged near the first surface (912) of the semiconductor layer (910); a formation (2950) of an antenna (950; 2250) arranged on the second surface (934) of the shape (930); a formation (2960) of a first conductive element (962; 2162) which provides an electrical connection between at least one first node (944) and the antenna (950; 2250); a formation (2970) of a mass element (970; 2270) arranged on the second surface (924) of the polymer layer (920); and a formation (2980) of a second conductive element (964) which provides an electrical connection between at least a second node (942) and the mass element (970), wherein the formation (2970) of the mass element (2270) comprises forming the mass element (2270) on the second surface (924) of the polymer layer (920) and the method (2900) further comprises forming (2072) a mass shield (2275, 2277), which extends from the mass element (2270) to the second surface (934) of the shape (930) and surrounds the antenna (2250). [7] Method (2900) according to claim 5 or 6, wherein forming (2930) the shape (930) comprises forming the shape (930) with a thickness in the range of 500 µm to 1000 µm. [8] Method (2900) according to claim 5, further comprising: a formation (2970) of a mass element (970; 2270) arranged on the second surface (924) of the polymer layer (920); and a formation (2980) of a second conductive element (964) which provides an electrical connection between at least a second node (942) and the mass element (970). [9] Method (2900) according to claim 5 or 6, further comprising: a formation (2982) of a high-frequency filter (980) arranged in the form (930); and a formation (2984) of a third conductive element (966) which provides an electrical connection between at least a third node (946) and the high-frequency filter (980). [10] Method (2900) according to claim 8, wherein forming (2970) the mass element (2270) comprises forming the mass element (2270) on the second surface (924) of the polymer layer (920) and the method (2900) further comprises forming (2072) a mass shield (2275, 2277) extending from the mass element (2270) to the second surface (934) of the mold (930) and surrounding the antenna (2250). [11] Method (2900) according to claim 5 or 6, wherein forming (2910) the semiconductor layer (910) comprises forming the semiconductor layer (910) from silicon germanium. [12] Method (2900) according to claim 6, further comprising: a formation (2985) of a plurality of semiconductor devices (735; 736) comprising each the semiconductor layer (910), the polymer layer (920), the shape (930), the plurality of nodes (942, 944, 946), the antenna (950; 2250) and the first conductive element (962; 2162); and a configuration (2987) of a first subset of the plurality of semiconductor devices (935; 936) as a receiver antenna arrangement and / or a configuration of a second subset of the plurality of semiconductor devices (935; 936) as a transmit antenna arrangement.

Citation Information

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