METHOD AND ARRANGEMENT FOR ESTABLISHING A PERMANENT CONNECTION BETWEEN TWO CONNECTION PARTNERS
By applying differential pressure to create a bonding layer with varying porosities between joining partners, the method addresses uneven heating and mechanical fatigue in semiconductor modules, improving their durability and performance.
DE102025100009B3Active Publication Date: 2026-05-28INFINEON TECHNOLOGIES AG
Patent Information
- Application Number
- DE102025100009
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-01-02
- Publication Date
- 2026-05-28
- Estimated Expiration
- 2045-01-02
AI Technical Summary
Technical Problem
Semiconductor module assemblies face issues with uneven heating and mechanical fatigue of the sintered interconnect layer due to cyclic heating and cooling, leading to potential damage and reduced lifespan.
Method used
A method involving the application of a pre-layer between two joining partners, followed by differential pressure application to create a bonding layer with varying porosities, forming a stable and reliable permanent connection.
Benefits of technology
The method ensures a stable and reliable connection by mitigating uneven heating and mechanical fatigue, enhancing the longevity and performance of semiconductor modules.
✦ Generated by Eureka AI based on patent content.
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Abstract
A method comprises applying a pre-layer (64) to a first junction partner (10) or to a second junction partner (80), arranging the first junction partner (10) on the second junction partner (80) such that the pre-layer (64) is arranged between the first junction partner (10) and the second junction partner (80), heating the first junction partner (10), the second junction partner (80) and the pre-layer (64) arranged between the first junction partner (10) and the second junction partner (80), and, while heating the first junction partner (10), the second junction partner (80) and the pre-layer (64), exerting pressure on the first junction partner (10), thereby pressing the first junction partner (10) towards the second junction partner (80) and forming a permanent junction layer (62) between the first junction partner (10) and the second junction partner (80).wherein applying pressure to the first joining partner (10) comprises applying a first pressure (P1) to at least one first section of the first joining partner (10) and applying a second pressure (P2) to at least one second section of the first joining partner (10), wherein the second pressure (P2) is greater than the first pressure (P1) and the resulting permanent joining layer (62) has a first porosity in areas located below the at least one first section of the first joining partner (10) and a second porosity in areas located below the at least one second section of the first joining partner (10), wherein the second porosity is less than the first porosity.
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Citation Information
Patent Citations
Semiconductor component and method for manufacturing semiconductor component
EP2884527A2
Methods and apparatuses for high temperature bonding and bonded substrates having variable porosity distribution formed therefrom
US20170263586A1
Apparatus and method for processing a semiconductor device
US20190080939A1
