Method and system for minimizing defect compensation during the deposition of a doped crystalline semiconductor onto a substrate
DE102025102007A1Undetermined Publication Date: 2026-07-23FRAUNHOFER GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG EV
Patent Information
- Application Number
- DE102025102007
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-01-21
- Publication Date
- 2026-07-23
Abstract
A method and a system for minimizing defect compensation during the deposition of a doped crystalline semiconductor onto a substrate are provided. The method utilizes a magnetron sputtering system. An electrical voltage is applied between a sputtering target and a magnetron anode via the system's voltage source, initiating a gas discharge and removing target material from the sputtering target. A dopant is dispensed from a source within the system, and a doped semiconductor is deposited onto the substrate. The process is conducted such that the doped semiconductor grows epitaxially on the substrate to form a crystalline, doped semiconductor. During the deposition of the doped semiconductor, UV radiation is emitted towards the substrate from a UV radiation source within the magnetron sputtering system.
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Citation Information
Patent Citations
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