METHOD FOR USING A NAND FLASH MEMORY SRAM IN A FIXED-BOARD DRIVE CONTROLLER
Patent Information
- Application Number
- DE602020076487
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-05-27
- Publication Date
- 2026-09-09
- Estimated Expiration
- 2040-05-27
AI Technical Summary
Existing SSDs face inefficiencies in managing write operations and garbage collection due to limitations in storage capacity and delay in fulfilling immediate read requests, particularly when data is being flushed to NAND flash memory.
Implementing SSD controllers with on-die SRAM in NAND flash devices to temporarily store data blocks, allowing for simultaneous processing of multiple streams and reducing the need for large SRAM capacity by releasing storage space after each block is written to on-die SRAM, and optimizing garbage collection by using error correction and randomization circuits.
Enhances the SSD's ability to handle multiple concurrent write operations and reduces delays in immediate read requests by providing faster data availability from on-die SRAM, while optimizing storage usage and garbage collection efficiency.