Imaging device

Abstract

An imaging device includes a photosensitive element, light-emitting chips, and a controller integrated circuit (IC). Each light-emitting chip contains several light-emitting media that emit light to expose the photosensitive element, a circuit that switches these media on and off based on the image data, and a storage medium that stores control data indicating the target amount of light emitted by the media. The light-emitting chips are arranged along the rotational axis of the photosensitive element. Each light-emitting chip is connected to the controller IC via one of the signal lines. When the output control data is transmitted from the controller IC to each light-emitting chip through the signal lines, this data is stored in the storage medium.

Description

Imaging device PRIOR ART Technical sector The present invention relates to an image forming apparatus that forms an image using an exposure unit comprising a series of light emitting units. Description of the related technique An electrophotographic imaging apparatus exposes a rotationally driven photosensitive element, thereby forming an electrostatic latent image on the photosensitive element. The imaging apparatus then develops the electrostatic latent image using toner, thereby forming an image. A direction parallel to the rotation axis of the photosensitive element is called the primary scan direction. US Patent Publication 2022 / 0146959 describes an imaging apparatus that uses an exposure unit in which an array of light-emitting units is arranged in a primary scan direction.In the imaging apparatus described in US Patent Publication 2022 / 0146959, a series of light-emitting chips are mounted on a substrate. Each chip contains electrodes, an organic electroluminescent (EL) film, and a circuit unit for causing the organic EL film to emit light, formed on a silicon wafer. Control data relating to the magnitude of a voltage to be applied to the electrodes (a current to be supplied to the organic EL film) is transmitted to the circuit unit of each light-emitting chip from a control unit of the imaging apparatus. The control data is stored in a register located in the circuit unit.The circuit unit applies a voltage to the electrodes based on image data transmitted from the imaging device's control unit and on voltage magnitude control data stored in the recorder. As a result, the organic EL film emits light. In some conventional imaging devices, an imaging device control unit transmits control data to each light-emitting chip, and thus the imaging device control unit and each light-emitting chip are connected to each other in a bus-like manner by means of a signal line. Thus, in a case where control data is transmitted to each light-emitting chip, the control unit of a conventional imaging device repeatedly specifies a single light-emitting chip from among a series of light-emitting chips and transmits control data to the specified chip. In such a configuration, the time required to transmit control data elements to all the light-emitting chips mounted on a substrate increases. Therefore, a configuration is needed to reduce the transmission time of control data elements. US Patent 2021 / 055 669 A1 discloses an exposure head for forming an image of a first resolution corresponding to an arrangement range of a series of lower electrodes in a transverse direction, or an image of a second resolution lower than the first resolution. A circuit portion comprises an image data storage portion that is arranged on the substrate along with a series of lower electrodes and converts input image data into image data according to the resolution. US Patent 2015 / 212448 A1 discloses a light-emitting element array module, an imaging apparatus, and a method. The light-emitting element array module includes a drive controller configured to receive print data and operate according to the received print data, and light-emitting element array chips configured to receive a signal from the drive controller and operate according to the received signal, wherein the drive controller applies a start signal to a transfer element array using a signal applied to a light-emitting element array of the light-emitting element array chips. US Patent 2020 / 150554 A1 discloses an exposure head comprising surface light-emitting element array chips and a drive voltage generation portion that supplies a drive voltage to the surface light-emitting element array chip. The drive voltage generation portion comprises DACs arranged correspondingly to each surface light-emitting element array chip and supplying drive voltages, and DACs supplying maximum and minimum drive voltages. The CPU controls the DACs and supplies a drive voltage corresponding to the amount of light emitted by each surface light-emitting element array chip. US Patent 2012 / 256998 A1 discloses a light-emitting device comprising light-emitting chips, a mounting board on which the light-emitting chips are mounted, and an intermediate amplifier. Each light-emitting chip comprises light-emitting elements and transfer elements. The transfer element sequentially specifies, by sequentially entering an activated state, the light-emitting elements as targets for illumination or non-illumination control. Each transfer element is configured for a corresponding light-emitting element. The intermediate amplifier is arranged on the mounting board and outputs a transfer signal based on an input transfer signal. The transfer signal is used to sequentially set the transfer elements, which are comprised in each of the light-emitting chips, to the activated state. CHARACTERISTICS The present invention is directed to providing a technique for reducing the transmission time of control data elements to light-emitting chips of an exposure device. According to one aspect of the present invention, an image forming apparatus is disclosed as specified in claims 1 to 23. Other features of the present invention will become evident from the following description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic diagram illustrating an image formation apparatus configuration. Figures 2A and 2B are diagrams illustrating an exposure head and a photosensitive element. Figures 3A and 3B are diagrams illustrating a printed circuit board of the exposure head. Figure 4 is a diagram illustrating the arrangement of light-emitting elements on a light-emitting chip. Figure 5 is a plan view of the light-emitting chip. Figure 6 is a cross-sectional view of the light-emitting chip. Figure 7 is a diagram illustrating a light-emitting chip control configuration. Figure 8 is a diagram illustrating examples of signal line signals when image data is transmitted to the light-emitting chip. Figure 9 is a diagram illustrating examples of signal line signals when control data is written to a light-emitting chip register. Figure 10 is a diagram illustrating examples of signal line signals when control data is read from the light-emitting chip register. Figure 11 is a functional block diagram of the light-emitting chip. Figure 12 is a diagram illustrating a current drive unit configuration. Figure 13 is an example of a circuit diagram for a digital-to-analog converter (DAC) for establishing a current. Figure 14 is a timing diagram of various signals when printing is performed. Figure 15 is a timing diagram of various signals when printing is performed. Figure 16 is a flowchart of a processing operation performed by an image controller. Figure 17 is a flowchart of a processing operation performed by the image controller. Figure 18 is a diagram illustrating a test pattern for gradation correction control. Figure 19 is a flowchart of processing performed by the image controller. Figure 20 is a diagram illustrating a control configuration of a light-emitting chip. Figure 21 is a diagram illustrating examples of signal line signals when control data is read from a light-emitting chip register. Figure 22 is a functional block diagram of the light-emitting chip. Figure 23 is a diagram illustrating examples of signal line signals when transmitting image data. Figures 24A and 24B are diagrams that illustrate examples of signal line signals when an image controller accesses a register. Figure 25 is a diagram illustrating examples of signal line signals when transmitting an identification bit indicating a "disabled" type. Figure 26 is a functional block diagram of the light-emitting chip. Figure 27 is a state transition diagram of an interface circuit. Figure 28 is a schematic diagram illustrating an image-forming apparatus configuration. Figure 29 is a diagram illustrating a printed circuit board of an exposure head. Figure 30 is a diagram illustrating a relationship between the temperature of a light-emitting unit and an amount of light when a predetermined current is supplied to the light-emitting unit. DESCRIPTION OF THE ACHIEVEMENTS With reference to the accompanying drawings, exemplary embodiments are described in detail below. The following exemplary embodiments do not limit the invention according to the appended claims. Although a number of features are described in the exemplary embodiments, not all of these features are essential to the invention, and the features may be combined in any way. Furthermore, in the accompanying drawings, the same or similar components are designated by the same reference numbers and are not described redundantly. Figure 1 is a schematic diagram illustrating the configuration of an imaging apparatus according to a first embodiment as an example. A reading unit 100 optically reads a document placed on a document glass and generates image data representing the reading result. An imaging device 103 forms an image on a sheet, for example, based on image data generated by the reading unit 100 or based on image data received from an external device via a network. The imaging device 103 comprises imaging units 101a, 101b, 101c, and 101d. Imaging units 101a, 101b, 101c, and 101d image black, yellow, magenta, and cyan toner, respectively. Imaging units 101a, 101b, 101c, and 101d have similar configurations and will therefore also be collectively referred to hereafter as "the 101 imaging units." A photosensitive element 102 of each image-forming unit 101 is rotated clockwise in Figure 1 when an image is formed. A charging device 107 charges the photosensitive element 102. An exposure head 106, serving as the exposure device, exposes the photosensitive element 102 according to image data, thereby forming an electrostatic latent image on the photosensitive element 102. A developing device 108 develops the electrostatic latent image on the photosensitive element 102 using toner. The toner image on the photosensitive element 102 is transferred to a sheet carried on a transfer belt 111. The toner images on the respective photosensitive elements 102 are transferred to the sheet in a superimposed manner, making it possible to reproduce colors other than black, yellow, magenta, and cyan. A transport unit 105 controls the feeding and transport of a sheet. Specifically, the transport unit 105 feeds a sheet from a specified unit of internal storage units 109a and 109b, an external storage unit 109c, and a manual feed unit 109d to a transport path in the imaging apparatus. The fed sheet is conveyed to alignment rollers 110. The alignment rollers 110 carry the sheet over the transfer belt 111 at a predetermined time so that the toner images on the photosensitive elements 102 are transferred to the sheet. As described above, while the sheet is being conveyed over the transfer belt 111, the toner images are transferred to the sheet. A fusing unit 104 heats and applies pressure to the sheet to which the toner images have been transferred, thereby fusing the toner images to the sheet. After the toner images are fused, the sheet is discharged from the imaging unit by discharge rollers 112. Figures 2A and 2B illustrate the photosensitive element 102 and the exposure head 106. The exposure head 106 comprises a group of light-emitting points 201, a printed circuit board 202 on which the group of light-emitting points 201 is mounted, a cylindrical lens array 203, and a housing 204 that accommodates the cylindrical lens array 203 and the printed circuit board 202. The cylindrical lens array 203 focuses the light emitted from the group of light-emitting points 201 onto the photosensitive element 102, thereby forming an image-forming point of a predetermined size on the photosensitive element 102. Figures 3A and 3B illustrate printed circuit board 202. Figure 3A illustrates a surface of printed circuit board 202 on which connector 305 is mounted, and Figure 3B illustrates a surface of printed circuit board 202 on which light-emitting dot group 201 is mounted (a surface located on the opposite side of the surface on which connector 305 is mounted). In the present exemplary embodiment, light-emitting dot group 201 comprises 20 light-emitting chips 400-1 to 400-20. The light-emitting chips 400-1 to 400-20 are arranged in two staggered rows along a main scan direction. In the following description, the light-emitting chips 400-1 to 400-20 will also be collectively referred to as "the 400 light-emitting chips." Each 400 light-emitting chip comprises a series of light-emitting points (light-emitting elements).The light-emitting chips 400 located on the printed circuit board 202 are connected, via connector 305, to an image controller (hereafter also referred to as the image controller unit) 700 (Figure 7), which serves as a control unit. Figure 4 is a diagram illustrating each light-emitting chip 400 and the arrangement of light-emitting dots 602 on the light-emitting chip 400. A single light-emitting chip 400 comprises an array of 748 light-emitting dots 602 arranged along the primary scan direction. The array of arrays is arranged along a secondary scan direction orthogonal to the primary scan direction. As described above, on the light-emitting chip 400, an array of light-emitting dots 602 is arranged two-dimensionally along both the primary and secondary scan directions. In the following description, for illustrative purposes, the number of arrays is four.In the following example embodiments, the light-emitting chip 400 comprises four sets of 748 light-emitting dots 602 arranged along the primary scan direction, i.e., a total of 2992 light-emitting dots 602. The pitch between adjacent light-emitting dots 602 in the primary scan direction is approximately 21.16 µm, corresponding to a resolution of 1200 dpi. Thus, the length of a single set of 748 light-emitting dots 602 in the primary scan direction is approximately 15.8 mm. The pitch between adjacent light-emitting dots 602 in the secondary scan direction (length P in Figure 4) is also approximately 21.16 µm, corresponding to a resolution of 1200 dpi.Furthermore, the step between light-emitting points 602 on two adjacent light-emitting chips 400 in the main scanning direction (length L in Figure 4) is also approximately 21.16 µm, which corresponds to a resolution of 1200 dpi. Figure 5 is a plan view of each light-emitting chip 400. The array of light-emitting dots 602 of the light-emitting chip 400 is formed on a light-emitting substrate 402, such as a silicon substrate. A circuit unit 406 is arranged on the light-emitting substrate 402 to control the array of light-emitting dots 602. A signal line for communication with the image controller 700, a power line for connection to a power supply, and a ground line are connected to pads 408-1 through 408-10. The signal line, power line, and ground line are, for example, gold-plated wires. Figure 6 illustrates a portion of a cross-section along line AA of Figure 5. A series of lower electrodes 504 is formed on the light-emitting substrate 402. A space of length d is provided between two adjacent lower electrodes 504. A light-emitting layer 506 is provided on the lower electrodes 504. An upper electrode 508 is provided on the light-emitting layer 506. The upper electrode 508 is a single electrode common to the series of lower electrodes 504. If a predetermined voltage is applied between the lower electrodes 504 and the upper electrode 508, a current flows from the lower electrodes 504 to the upper electrode 508, causing the light-emitting layer 506 to emit light. Thus, an area of ​​the light-emitting layer 506 corresponding to an area of ​​a single lower electrode 504 corresponds to a single light-emitting point 602.That is, in the present embodiment by way of example, the light-emitting substrate 402 comprises a series of light-emitting points 602. A light-emitting point may also be referred to as "a light-emitting unit". An organic electroluminescent (EL) film can be used as the light-emitting layer 506, for example. Alternatively, an inorganic EL film can be used as the light-emitting layer 506. The top electrode 508 can be, for example, a transparent indium tin oxide (ITO) electrode to transmit the light emission wavelength from the light-emitting layer 506. Although the entire upper electrode 508 is configured to transmit the light emission wavelength of the light-emitting layer 506, in this exemplary embodiment, it is not necessary for the entire upper electrode 508 to transmit the light emission wavelength. Specifically, only an area of ​​the upper electrode 508 from which light is emitted from the light-emitting points 602 needs to transmit the light emission wavelength. Although, in the present embodiment by way of example, the light-emitting layer 506 is common to all the lower electrodes 504 arranged on the light-emitting chip 400, the present invention is not limited to this. Alternatively, for example, a configuration may be employed in which a first set of lower electrodes 504 from among the set of lower electrodes 504 arranged on the light-emitting chip 400 is covered by a first light-emitting layer 506 and a second set of lower electrodes 504 from among the set of lower electrodes 504 arranged on the light-emitting chip 400 is covered by a second light-emitting layer 506. Also in such a configuration, an area of ​​a light-emitting layer 506 corresponding to an area of ​​a single lower electrode 504 corresponds to a single light-emitting spot 602.Alternatively, a light-emitting layer 506 can be individually arranged for each of the series of lower electrodes 504 arranged on the light-emitting chip 400. Also in such a configuration, an area of ​​a light-emitting layer 506 corresponding to an area of ​​a single lower electrode 504 corresponds to a single light-emitting spot 602. Figure 7 illustrates the control configuration for each 400 light-emitting chip. A 705 data-switching unit and each 400 light-emitting chip are connected to each other via a series of signal lines (wires). Specifically, the 705 data-switching unit and a 400-n light-emitting chip (where n is an integer between 1 and 20) are connected via a DATAn signal line, a WRITEn signal line, and a READn signal line. The DATAn signal line is used by the 705 data-switching unit to transmit image data to the 400-n light-emitting chip. The WRITEn signal line is used by the 705 data-switching unit to write control data to a register on the 400-n light-emitting chip and to notify the 400-n light-emitting chip of the read control data. The READn signal line is used by the 705 data switching unit to read control data stored in the 400-n light emitting chip register. The 705 data switching unit and all 400 light-emitting chips are interconnected by a single CLK signal line, a single SYNC signal line, and a single EN signal line. The CLK signal line is used to transmit a clock signal, which is used to transmit and receive data via the DATAn, WRITEn, and READn signal lines. The 705 data switching unit outputs a clock signal onto the CLK signal line, generated based on a reference clock signal from a 702 clock generator unit. The signals transmitted to the SYNC and EN signal lines are described below. A central processing unit (CPU) 701 controls the entire imaging apparatus. An image data generation unit 703 performs various types of image processing, such as halftone processing, on image data received from the readout unit 100 or an external device, thereby generating image data to control the switching on and off of the light emitters 602 on each light-emitting chip 400. The image data generation unit 703 transmits the generated image data to the data switching unit 705. When a register access unit 704 writes control data to the register of each light-emitting chip 400, the register access unit 704 receives the control data from the CPU 701 and transmits the control data to the data switching unit 705.The register access unit 704 also sends control data to CPU 701 read from the register of each light-emitting chip 400. Figure 8 illustrates signal lines in a case where image data is transmitted to each light-emitting chip 400. A cyclic line synchronization signal is emitted to the SYNC signal line, indicating the exposure timing of each line on the photosensitive element 102. If the circumferential speed of the photosensitive element 102 is 200 mm / s and the resolution in the secondary scan direction is 1200 dpi (approximately 21.16 µm), the line synchronization signal is emitted with a cycle of approximately 105.8 µs. The data switching unit 705 transmits image data elements to signal lines DATA1 through DATA20 in synchronization with the rising edge of the line synchronization signal.In the present example embodiment, since each light-emitting chip 400 comprises 2992 light-emitting points 602, the data switching unit 705 needs to transmit image data to each light-emitting chip 400 within a cycle of approximately 105.8 µs. This data indicates whether each of the 2992 light-emitting points 602 is emitting light or not. To transmit image data for a total of 2992 light-emitting points 602 within a period of approximately 105.8 µs, in this example, as illustrated in Figure 8, the data switching unit 705 sets the frequency of a clock signal to be transmitted to the CLK signal line to 30 MHz when transmitting the image data. Figure 9 illustrates signal line signals in a case where control data is written to the register of each light-emitting chip 400.During communication, an enable signal is sent to the EN signal line, switching to a high level to indicate that communication is in progress. Data switching unit 705 transmits a start bit to the WRITEn signal line in sync with the rising edge of the enable signal. Subsequently, data switching unit 705 transmits a write ID bit, indicating a write operation. Next, data switching unit 705 transmits the address (4 bits in this example) of the register to which the control data is to be written, and the control data itself (8 bits in this example). The start bit, the write ID bit, and the address are command data that instruct the register to perform an operation.The amount of control data is less than the amount of image data, and therefore the clock signal frequency to be sent to the CLK signal line when transmitting control data can be lower than that used when transmitting image data. In this example, the clock signal frequency when reading or writing control data is 3 MHz. Figure 10 illustrates signal lines in a case where control data stored in the register of each 400 light-emitting chip is read. During communication, an enable signal is sent to the EN signal line, switching to a high level to indicate that communication is in progress. Data switching unit 705 transmits a start bit to the WRITEn signal line in synchronization with the rising edge of the enable signal. Subsequently, data switching unit 705 transmits a read identification bit, indicating a read operation following the start bit. Finally, data switching unit 705 transmits the address of the register from which the control data is to be read. The start bit, the read ID bit, and the address are command data that instruct the register to perform an operation. In response to the command data, the 400-n light-emitting chip reads the control data stored at the address specified by the command from the register and outputs the control data to the READn signal line. Figure 11 is a functional block diagram of the single 400-n light-emitting chip. As also illustrated in Figure 5, each 400 light-emitting chip comprises the ten pads 408-1 through 408-10. Pads 408-1 and 408-2 are connected to a VCC supply voltage via power lines. The circuitry in the 406 circuit unit of the 400 light-emitting chip is supplied with power based on the VCC supply voltage. Pads 408-3 and 408-4 are connected to ground via ground lines. The circuits of circuit unit 406 and upper electrode 508 are grounded via pads 408-3 and 408-4. The CLK, SYNC, and DATAn signal lines are connected to an image data storage unit 1103 via pads 408-5 through 408-7. The image data storage unit 1103 and pads 408-5 through 408-7 are interconnected by signal lines corresponding to the CLK, SYNC, and DATAn signal lines. The EN, WRITEn, and READn signal lines are connected to a register (hereafter also referred to as the recording unit) 1102 via pads 408-8 through 408-10. Register 1102 and pads 408-8 to 408-10 are connected to each other via signal lines corresponding to the EN, WRITEn, and READn signal lines. A clock signal from the CLK signal line is also fed into register 1102.As described above, register 1102 stores control data that indicates control information. The details of the control information will be described below. If the image data storage unit 1103 receives image data corresponding to the light emitting points 602, the image data storage unit 1103 generates drive signals to control the light emission of the light emitting points 602 based on the image data corresponding to the light emitting points 602 and sends the drive signals to current drive units 1104. Figure 12 is a diagram illustrating the configuration of each drive unit 1104. The drive units 1104 are connected to the light emitting points 602 in a one-to-one manner. Although in the present example embodiment only one drive unit 1104 is described for ease of description, there are as many similar drive units 1104 as there are light-emitting points 602. That is, in the present example embodiment, there are 748 × 4 columns = 2992 drive circuits for a single light-emitting element array chip. Each drive unit 1104 comprises a reference power supply 1200, a switch 1204, a digital-to-analog converter (DAC) 1201, a control metal-oxide-semiconductor field-effect transistor (MOSFET) 1202, and a switching MOSFET 1203. The drive unit 1104 corresponds to a drive unit. The reference power supply 1200 outputs a reference voltage and current that are used by the drive unit 1104 based on the VCC voltage supplied from the power supply. In other words, the reference power supply 1200 is a voltage source. The DAC 1201 receives control data stored in a register unit 1102 as a digital value and divides the reference voltage, thereby generating a voltage (an analog value) based on the reference voltage. The DAC 1201 then outputs the generated voltage. Therefore, the control data is a digital signal. Switch 1204 is configured to toggle between on and off states according to an instruction from register unit 1102. If switch 1204 is on, the reference voltage from reference power supply 1200 is supplied to DAC 1201. If switch 1204 is off, the electrical connection between reference power supply 1200 and DAC 1201 is interrupted, and the reference current and voltage are not supplied to DAC 1201. In other words, the on state of switch 1204 corresponds to a first state, and the off state of switch 1204 corresponds to a second state. The on and off states of switch 1204 are toggled, thus enabling switching the connection state between reference power supply 1200 and switch 1204.When switch 1204 is off, DAC 1201 does not consume power, thus reducing the power consumption of light-emitting chip 400 and the heat generation of light-emitting chip 400. Each of the reference power supply 1200, DAC 1201, and switch 1204 can be a single common circuit for a series of light-emitting points 602. The control MOSFET 1202, according to the present embodiment, is a P-channel MOSFET. The source terminal of the control MOSFET 1202 is connected to the supply voltage VCC, and the gate terminal of the control MOSFET 1202 is connected to the output of the DAC 1201. The control MOSFET 1202 has a configuration in which the greater the current flowing from the DAC 1201 to the gate, the greater the current flowing from the source to the drain. In this example embodiment, the switching MOSFET 1203 is also a P-channel MOSFET. The source terminal of the switching MOSFET 1203 is connected to the drain terminal of the control MOSFET 1202. A drive signal from the image data storage unit 1103 is applied to the gate terminal of the switching MOSFET 1203. The drive signal is a binary signal indicating either a high or a low level. When the high level signal is applied, the switching MOSFET 1203 is turned on, and a current controlled by the control MOSFET 1202 flows from the source to the drain of the switching MOSFET 1203. The drain terminal of the switching MOSFET 1203 is connected to the light-emitting layer 506 via the lower electrode 504. If current flows through the drain terminal, the light-emitting spot 602 emits light.The light emission intensity of light emitter 602 changes according to a current flowing through the light emitting layer 506. The current value is controlled by an analog voltage output by DAC 1201. In other words, the light emission intensities of the respective light emitters 602 are controlled by control data stored in register 1102. The control data can individually specify a set digital value for each of the DACs 1201 corresponding to the light emitters 602, or it can specify a single set digital value for a group of light emitters 602. Figure 13 is a diagram illustrating an example of a DAC 1201 circuit. The DAC 1201 comprises a series of resistors 1205, a number of voltage dividing switches 1206 equal to the number of resistors 1205, and a decoder 1207. A reference current generated by the reference power supply 1200 flows to ground through the series resistors 1205 connected together. The voltage dividing switches 1206 are connected to the resistors 1205. The decoder 1207 activates any of the voltage dividing switches 1206 according to a set value received from the register unit 1102. As a result, a number of resistors 1205, corresponding to the activated positions of the voltage dividing switches 1206, divide a reference voltage, and the DAC 1201 outputs the divided voltage (an analog value). That is, the DAC 1201 functions as a D / A converter. If the reference voltage is supplied to the DAC 1201 regardless of whether the light-emitting point 602 is illuminated, the resistors 1205 generate Joule heat due to the voltage supplied to them. In the present example embodiment, when switch 1204 is deactivated, the reference voltage is not supplied to the DAC 1201. This prevents the resistors 1205 from generating Joule heat. In other words, it prevents the DAC 1201 from generating heat.The DAC 1201 illustrated in Figure 13 is an example of a D / A converter according to the present embodiment. The D / A converter may employ a method for dividing a reference voltage using a switching element without using a resistor. That is, the D / A converter may employ another method, such as a method for receiving a digital signal and outputting an analog signal. Figure 14 illustrates a signal timing diagram in the 700 image controller unit in a case where a print request is received from a user. For simplicity, Figure 14 illustrates a signal timing diagram in a case where an image is formed in a single color. If a device controller unit 708 receives a print request from the user, the device controller unit 708 checks whether a predetermined condition is met under which the reading unit 100, imaging device 103, and fixing unit 104 can perform the print job. Examples of such a predetermined condition include whether the temperature of the fixing unit 104 meets a predetermined temperature at which an image can be fixed. If the device controller unit 708 confirms that the predetermined condition is met under which the reading unit 100, imaging device 103, and fixing unit 104 can perform the print job, the device controller unit 708 transmits an itop signal to the imaging controller unit 700.The itop signal is a signal transmitted from the device controller unit 708 to the image controller unit 700 based on a user instruction to instruct the imaging apparatus to begin an imaging job. In other words, the device controller unit 708 acts as a transmission unit. Image controller unit 700, after receiving the itop signal from device controller unit 708, transmits corresponding image data elements to the light-emitting chips (400-1 to 400-20) after a predetermined time has elapsed. The activation of the light-emitting chips (400-1 to 400-20) is controlled based on the received image data elements, and a latent image is formed on the surface of the photosensitive drum by the light emitted by the light-emitting chips 400. In other words, image controller unit 700 initiates the transmission of image data to each light-emitting chip 400 based on the timing at which it receives the itop signal. That is, the itop signal corresponds to a reference signal. The image data corresponds to an image signal. In a case where an imaging operation is performed to successively form images on a series of recording media, a latent image corresponding to a single page of image data is formed on the surface of the photosensitive drum, and after a predetermined time interval, a subsequent itop signal is transmitted. If the rotation speed of the photosensitive drum is constant, then, based on the elapse of a first time, which is a predetermined time after the image controller unit 700 receives the itop signal, the image controller unit 700 determines that the formation of a latent image corresponding to a single page of image data has been completed. That is, the timing in which the first time elapses after the image controller unit 700 receives the itop signal corresponds to a first timing.The first time is defined by, for example, the image controller unit 700 transmitting a predetermined number of CLK signals to the light emitting chip 400. In the first timing step, which is the timing step in which image formation for the single page is completed, image controller unit 700 transmits register data to deactivate switch 1204 to register unit 1102 of light-emitting chip 400. In other words, image controller unit 700 acts as a control unit. Switch 1204, which is switched to the deactivated state by image controller unit 700, remains in the deactivated state until it is switched to the activated state by image controller unit 700. Through this processing, image controller unit 700 can determine that image formation for the single page has finished and block the voltage supplied to DAC 1201 during the period when light-emitting units 602 do not need to emit light. Image controller unit 700 transmits image data corresponding to a single page to image data storage unit 1103 for each line in the secondary scan direction. Image controller unit 700 can determine that latent image formation for the single page is complete when the transmission of image data for the last line in the secondary scan direction of the single page to image data storage unit 1103 is finished. That is, the timing at which the transmission of image data for the last line in the secondary scan direction of the single page to image data storage unit 1103 is completed can be the first timing. In the image-forming apparatus according to the present embodiment, by way of example, an alignment sensor (not shown) is installed in the transport direction of a recording medium, immediately before the alignment rollers 110 on the transport path of the recording medium. Based on the elapse of a third time, which is a predetermined time after the alignment sensor detects the leading edge of the recording medium, it can be determined that the formation of an image corresponding to a single page has been completed. That is, the alignment sensor corresponds to a detection unit. The timing during which the third time elapses after the alignment sensor detects the leading edge of the recording medium corresponds to a third timing.The third time is a time such that, when the third time elapses after the alignment sensor detects the leading edge of the recording medium, an image is formed on the recording medium based on a latent image formed on the photosensitive drum. The third time is defined, for example, by the image controller unit 700 transmitting a predetermined number of CLK signals to the light-emitting chip 400. Based on the passage of a second time interval, which is a predetermined time after the image controller unit 700 receives the itop signal, the image controller unit 700 determines that the formation of an image corresponding to a single page of image data from a subsequent page has begun. In other words, the timing of the second interval after the image controller unit 700 receives the itop signal corresponds to a second timing interval. This second interval is longer than the first and is defined, for example, by the image controller unit 700 transmitting a predetermined number of CLK signals to the light-emitting chip 400. In the second timing step, which is the timing step in which image formation for the next page begins, image controller unit 700 transmits register data to activate switch 1204 to register unit 1102 of the light-emitting chip 400. Switch 1204, which is switched to the activated state by image controller unit 700, remains in the activated state until it is switched to the deactivated state by image controller unit 700. Through the above processing, image controller unit 700 can determine that image formation for the next page has begun and supply current to DAC 1201 during the period in which the light-emitting units 602 need to emit light. Image controller unit 700 transmits image data corresponding to a single page to image data storage unit 1103 for each line in the secondary scan direction. Image controller unit 700 can determine that latent image formation for the next page begins when the transmission of image data for the first line in the secondary scan direction of the next page to image data storage unit 1103 starts. In other words, the timing at which the transmission of image data for the first line in the secondary scan direction of the next page to image data storage unit 1103 begins can be the second timing. Based on the elapse of a fourth time interval, a predetermined time after the alignment sensor detects the leading edge of the recording medium, it can be determined that the formation of an image corresponding to a single page has been completed. In other words, the timing interval during which the fourth time interval elapses after the alignment sensor detects the leading edge of the recording medium corresponds to a fourth time interval. This fourth time interval is defined, for example, by the image controller unit 700 transmitting a predetermined number of CLK signals to the light-emitting chip 400. The image controller unit 700 performs the aforementioned processing, thereby disconnecting the supply of a reference voltage to the DAC 1201 during the period when the light-emitting chip 400 is not emitting light and preventing resistors 1205 from generating Joule heat. Thus, it is possible to prevent the DAC 1201 from generating heat. In this example embodiment, the timing at which the register data to deactivate switch 1204 is transmitted to register unit 1102 of the light-emitting chip 400 is the first timing. However, the timing at which switch 1204 is deactivated is not limited to this and can be any other timing. The timing at which switch 1204 is deactivated could be, for example, any timing during the period between the first and second timings. In this example embodiment, the timing at which the register data to activate switch 1204 is transmitted to register unit 1102 of light-emitting chip 400 is the second timing. However, the timing at which switch 1204 is activated is not limited to this and can be a different timing. The timing at which switch 1204 is activated can be, for example, any timing during the period between the timing at which switch 1204 is deactivated and the second timing. In other words, during the period between the first and second periods, the period during which switch 1204 is in the off state corresponds to the first period. The start point of the first period can be the third time interval after the alignment sensor detects the front end of the recording medium. Furthermore, the end point of the first period can be the fourth time interval after the alignment sensor detects the front end of the recording medium. Figure 15 is a signal timing diagram for a four-color image formation scenario: yellow (Y), magenta (M), cyan (C), and black (K). In a color image formation scenario, the imaging units 101a, 101b, 101c, and 101d, corresponding to yellow (Y), magenta (M), cyan (C), and black (K) of the imaging device 103, are arranged in the direction in which a recording medium is transported. The four imaging units 101a, 101b, 101c, and 101d begin forming a yellow toner image and, after predetermined times have elapsed, sequentially form magenta, cyan, and black toner images. The times T1, T2 and T3 in figure 15 correspond to the predetermined times for magenta, cyan and black, respectively.After the T1, T2, and T3 times have elapsed following the formation of the yellow toner image, the magenta, cyan, and black toner images are formed, making it possible to create a color image on the recording medium without color misalignment. Even when a color image is formed, after the T1, T2, and T3 times have elapsed following the formation of a yellow image, processing similar to that shown in Figure 14 is performed for the magenta, cyan, and black colors, thus preventing the 1104 drive units from generating heat. Figure 16 is a flowchart of the control of the image controller unit 700 on register 1102 contained in each light emitting chip 400 in a case where a print request is received from the user. If a print request is received from the user, then at stage S1301, the image controller unit 700 writes register data comprising the DAC 1201 setting value to the register unit 1102 of the light-emitting chip 400. In stage S1302, based on the transmission of a predetermined number of CLK signals to the light emitting chip 400 after the image controller unit 700 receives an itop signal, the image controller unit 700 determines that the current timing is a print start timing (YES in stage S1302), and processing continues in stage S1303. In stage S1303, before printing begins, the image controller unit 700 adjusts the register unit 1102 of the light-emitting chip 400 to activate switch 1204. In stage S1304, the image controller unit 700 transmits image data elements based on a user-specified image file to the 20 light-emitting chips 400. The image controller unit 700 continues to transmit the image data elements until the printing of a single page is complete. In stage S1305, after CLK signals are transmitted for a predetermined period after the image controller unit 700 receives the itop signal, the image controller unit 700 determines that the printing of the single page has ended (YES in stage S1305), and processing continues in stage S1306. In stage S1306, the image controller unit 700 adjusts the register unit 1102 of the light emitting chip 400 to disable switch 1204. In step S1307, if the alignment sensor installed immediately before the alignment rollers 110 in the transport direction of the recording medium detects the leading edge of a recording medium, the alignment sensor transmits information to the image controller unit 700 indicating that the leading edge of a recording medium has been detected. Based on this information, the image controller unit 700 determines whether a next page exists. If a next page is determined to exist (YES in step S1307), processing returns to step S1302. The image controller unit 700 then executes steps S1302 through S1307. In step S1307, if the alignment sensor (not shown) installed immediately before the alignment rollers 110 in the transport direction of the recording medium does not detect the front or back end of a recording medium even after a predetermined time has elapsed, the alignment sensor transmits information to the image controller unit 700 indicating that the front or back end of a recording medium has not been detected. Based on the information indicating that the front or back end of a recording medium has not been detected within the predetermined time, the image controller unit 700 determines that there is no next page (NO in step S1307), and the printing operation terminates. In the present embodiment, by way of example, in a configuration where the light-emitting units and the drive circuits are integrated on the same chip, the current supply to the DAC 1201, which is part of each of the drive circuits for the light-emitting chips 400, is switched off during periods when printing is not taking place, such as a page-timer. This prevents the DAC 1201, which is part of each drive circuit for the exposure head 106, from generating heat. In other words, it prevents a D / A converter that converts a digital signal into a voltage from generating heat. Figure 17 is a flowchart of the processing related to writing and reading control data performed by the Image Controller 700 when a print request is received from the user. In stage S10, the Image Controller 700 writes control data elements to the 1102 registers of the Light Emitting Chips 400 in parallel using signal lines WRITE1 to WRITE20. The control data elements comprise data for controlling the light emission intensities of the light emitting points 602. In stage S11, the image controller 700 checks whether the control data elements are correctly written to registers 1102. Specifically, in stage S11, the image controller 700 reads control data elements stored in registers 1102 from the light emitting chips 400 in parallel using signal lines WRITE1 to WRITE20 and signal lines READ1 to READ20.In stage S12, if the control data elements written in stage S10 and the control data elements read from registers 1102 in stage S11 do not match (NOT in stage S12), the 700 image controller repeats processing from stage S10. Alternatively, a configuration can be used in which the upper limit of the number of repetitions for each of stages S10 and S11 is pre-set, and if the number of repetitions reaches the upper limit, processing of Figure 17 stops and an error is reported to the user. If the control data elements written in stage S10 and the control data elements read from registers 1102 in stage S11 match (YES in stage S12), processing continues in stage S13 at the image formation start timing. In stage S13, image controller 700 transmits image data elements to the light-emitting chips 400 in parallel using signal lines WRITE1 to WRITE20. In stage S14, image controller 700 determines whether image formation has finished. If image formation has not finished (NO in stage S14), image controller 700 repeats processing from stage S13. If, on the other hand, image formation has finished (YES in stage S14), the processing in Figure 17 ends. The imaging apparatus also performs a grading correction check. For example, the imaging apparatus forms a grading correction test pattern on a sheet. Figure 18 illustrates an example of the test pattern used in the present embodiment. As illustrated in Figure 18, the test pattern comprises five test images, PT1 to PT5, which have different densities. In the sheet's transport direction, intervals (pattern intervals) are arranged between the test images PT1 to PT5. The user operates the imaging apparatus to have the reading unit 100 read the sheet on which the test pattern is formed.Therefore, the imaging apparatus detects the density of each of the test images PT1 to PT5 within the test pattern and corrects a density-related imaging condition so that the density of each of the test images PT1 to PT5 approximates a target density. Specifically, for example, the image controller 700 rewrites control data elements so that the density of each of the test images PT1 to PT5 approximates the target density. Figure 19 is a flowchart of the processing performed by image controller 700 when the test pattern is formed. In step S20, image controller 700 initializes an index q of a test image to 1. In step S21, image controller 700 writes control data elements for forming a test image PTq into registers 1102 of the light-emitting chips 400 in parallel using signal lines WRITE1 to WRITE20. The control data elements comprise data for controlling the light-emitting intensities of the light-emitting spots 602. The data for controlling the light-emitting intensities of the light-emitting spots 602 can also be referred to as data concerning the magnitude of a voltage to be applied to electrodes 504 and 508 or data concerning the magnitude of a current to be supplied to the organic EL film.In stage S22, the image controller 700 checks whether the control data elements are correctly written to registers 1102. Specifically, in stage S22, the image controller 700 reads control data elements stored in registers 1102 from the light-emitting chips 400 in parallel using signal lines WRITE1 to WRITE20 and READ1 to READ20. In stage S23, if the control data elements written in stage S21 and the control data elements read from registers 1102 in stage S22 do not match (NOT in stage S23), the image controller 700 repeats the processing from stage S21. Alternatively, a configuration can be used in which the upper limit of the number of repetitions for each of the S21 and S22 stages is pre-set, and if the number of repetitions reaches the upper limit, the processing of Figure 19 is stopped and an error is reported to the user. If the control data elements written in stage S21 and the control data elements read from registers 1102 in stage S22 match (YES in stage S23), processing continues in stage S24 at the image formation start timing. In stage S24, image controller 700 transmits image data elements from the test pattern to signal lines DATA1 through DATA20 in parallel and initiates exposure of photosensitive element 102. In stage S25, image controller 700 determines whether PTq test image formation has finished. If PTq ​​test image formation has not finished (NO in stage S25), image controller 700 repeats processing from stage S24. If, on the other hand, the formation of the PTq test image has ended (YES in stage S25), then in stage S26, the image controller 700 determines whether q = 5 is met.If q = 5 is not met (NO in step S26), since the formation of all test images PT1 to PT5 of the test pattern has not been completed, then, in step S27, image controller 700 increments the index q by 1. Image controller 700 then repeats the processing from step S21. If, on the other hand, q = 5 is met (YES in step S26), the processing of Figure 19 ends. In the present embodiment, by way of example, the control data elements set in registers 1102 in step S21 vary the light emission intensities of the light emitting points 602 according to the densities of the test images PT1 to PT5 to be formed. Thus, the image data elements of the test pattern transmitted in step S24 can be the same regardless of the test images PT1 to PT5 to be formed. As described above, the 700 image controller and each of the 400 series light-emitting chips are individually connected to each other via dedicated WRITEn and READn signal lines, allowing the 700 image controller to access the 1102 registers of the 400 series light-emitting chips in parallel. This configuration reduces the transmission time of control data elements to the 400 series light-emitting chips compared to a scenario where the 700 image controller accesses the 400 series light-emitting chips sequentially using a single WRITE and a single READ signal line. Furthermore, exposure intensities can be changed quickly by rewriting control data elements in the 1102 registers.Thus, when a series of test images with varying densities are formed, it is possible to reduce the intervals between the test images in the transport direction of a sheet. Consequently, it is possible to increase the number of test images that can be formed on a sheet, and it is possible to decrease the number of sheets (or pages) required to form a test pattern. Although, in the present example embodiment, the image controller 700 and each of the 400 series light-emitting chips are individually connected to each other via the dedicated signal lines WRITEn and READn, the connection procedure is not limited to this. For example, a configuration can be used in which there are several groups of light-emitting chips comprising the 400 series, and each of the groups of light-emitting chips and the image controller 700 are connected to each other via the dedicated signal lines WRITEn and READn. In this case, the number of groups of light-emitting chips is not limited to two and can be three or more.Furthermore, the number of 400 light-emitting chips in each group of light-emitting chips may differ between groups, and it is possible for a group to contain only one 400 light-emitting chip. The dedicated signal lines WRITEn and READn are shared within a group of light-emitting chips, thus reducing the number of signal lines compared to a scenario where the 700 image controller and each of the 400 light-emitting chips are individually connected via the dedicated signal lines WRITEn and READn. This allows for a reduction in the manufacturing cost of the 106 exposure head. A second exemplary embodiment will now be described, based primarily on the differences from the first exemplary embodiment. Figure 20 illustrates the control configuration of each 400 light-emitting chip according to the present exemplary embodiment. In the first exemplary embodiment, the READ1 to READ20 signal lines are provided for light-emitting chips 400-1 to 400-20 in a one-to-one manner. In the present exemplary embodiment, a common READ signal line is used for all light-emitting chips 400-1 to 400-20. More specifically, a single READ (common) signal line is connected to the data switching unit 705 of the image controller 700. On printed circuit board 202, a total of 20 signal lines (hereafter referred to as "internal substrate READ signal lines") from light-emitting chips 400-1 to 400-20 are connected to the single READ signal line.On printed circuit board 202, the single READ signal line is biased to a predetermined first potential by means of a pull-up or bias resistor 1506. Figure 21 illustrates a timing diagram for reading control data elements from registers 1102 of light-emitting chips 400-1 through 400-20. To read control data from register 1102 of light-emitting chip 400-1, the image controller 700 transmits command data to signal line WRITE1 in synchronization with the rising edge of an enable signal on signal line EN. When a start bit (a high level) of the command data is transmitted to signal line WRITE1, signal lines WRITE2 through WRITE20 are set to a low level. That is, the start bit is transmitted only to signal line WRITE1 and not to signal lines WRITE2 through WRITE20. In response to command data from image controller 700, register 1102 of light emitter chip 400-1 reads control data stored at the address specified by the command data and outputs the control data to the READ signal line.Next, to read control data from register 1102 of light-emitting chip 400-2, image controller 700 transmits command data to the WRITE2 signal line in synchronization with the rising edge of the enable signal on the EN signal line. In response to the command data from image controller 700, register 1102 of light-emitting chip 400-2 reads control data stored at the address specified by the command data and outputs the control data to the READ signal line. Image controller 700 repeats similar processing on light-emitting chips 400-3 through 400-20. The transmission of image data and the writing of control data are similar to those in the first example embodiment. Figure 22 is a functional block diagram of the 400-n light-emitting chip according to the present example embodiment. Compared to the 400-n light-emitting chip according to the first example embodiment, the 400-n light-emitting chip according to the present example embodiment comprises a 1701 field-effect transistor (FET). Pad 408-10 is connected to the substrate's internal READ signal line and is also connected to the drain terminal of FET 1701. That is, the source terminal of FET 1701 is connected to a second potential lower than the first potential to which the bias resistor 1506 is connected—that is, to ground in this example. The gate terminal of FET 1701 is then connected to a terminal of register 1102, which transmits control data.FET 1701 serves as a switching unit that switches to an on or off state based on the level of a signal from register 1102. In the on state, the substrate's internal READ signal line is connected to the second potential. In the off state, the connection of the substrate's internal READ signal line to the second potential is disconnected, and the substrate's internal READ signal line enters a high-impedance state. While register 1102 is not transmitting control data to image controller 700, register 1102 switches FET 1701 to the off state. As described previously, the substrate's internal READ signal line is configured as an open-drain output with FET 1701 and bias resistor 1506.Furthermore, while register 1102 transmits control data to the image controller 700, it switches FET 1701 to either the on or off state depending on the data value. In the on state, a low-level signal based on the second potential is sent to the READ signal line. Conversely, in the off state, the bias resistor 1506 on printed circuit board 202 sends a high-level signal based on the first potential to the READ signal line. As described above, the substrate's internal READ signal line is configured as an open-drain output. Therefore, while control data is being read from register 1102 of a particular light-emitting chip 400, pads 408-10 of the other light-emitting chips 400 enter high-impedance states. Thus, potentials from the other light-emitting chips 400 to the substrate's internal READ signal lines do not affect the READ signal line, and the single READ signal line can be shared. In the present example embodiment, the processing performed in a case where a print request is received from the user is similar to that of the first example embodiment illustrated in Figure 17. However, the reading of the control data elements from the light-emitting chips 400-1 to 400-20 in stage S11 cannot be performed in parallel and is done sequentially. The same applies to the processing for forming the test pattern in Figure 19. In the present example embodiment, therefore, it takes longer to read control data elements from the 400 light-emitting chips than in the first example embodiment. However, it is possible to reduce the transmission time of control data elements to the 400 light-emitting chips. In the present example embodiment, it is also possible to decrease the number of READ signal lines compared to the first example embodiment, thereby reducing costs. A third embodiment will now be described as an example, based primarily on the differences from the first and second example embodiments. In the first and second example embodiments, image controller 700 transmits image data to light-emitting chip 400-n using the DATAn signal line and transmits control data to light-emitting chip 400-n using the WRITEn signal line. When image controller 700 transmits image data to light-emitting chip 400-n, it transmits a line synchronization signal to the SYNC signal line. When image controller 700 accesses register 1102 of light-emitting chip 400-n, it transmits an enable signal to the EN signal line.In the present example embodiment, the image controller 700 transmits image data and control data to the light-emitting chip 400-n using the DATAn signal line and transmits a line synchronization signal and an enable signal using the SYNC signal line. That is, in the present example embodiment, the WRITEn and EN signal lines are not used. Thus, whereas in the first and second example embodiments a total of ten pads 408-1 to 408-10 are provided on each light-emitting chip 400, as illustrated in Figure 5, in the present example embodiment a total of eight pads 408-1 to 408-8 are provided on each light-emitting chip 400. Figures 23 to 25 illustrate signal line signals in a case where the 705 data switching unit outputs data elements of various types to each 400 light-emitting chip. In Figures 23 to 25, if a signal level is high ("Hi" in the drawings), the bit value is "1". If a signal level is low ("Lo" in the drawings), the bit value is "0". Figure 23 illustrates a case where the data type is "image". If the data type is "image", a line synchronization signal is sent to the SYNC signal line, indicating the exposure timing of a single line on photosensitive element 102. In this example, the circumferential speed of photosensitive element 102 is 200 mm / s, and the resolution in the secondary scan direction is 1200 dpi (approximately 21.16 µm). Thus, the line synchronization signal is sent with a cycle of approximately 105.8 µs, which is the period during which the surface of photosensitive element 102 travels approximately 21.16 µm. Data switching unit 705 transmits an identification bit with a value of "11" to the DATA signal line, indicating that the data type is "image", synchronized with the rising edge of the line synchronization signal. Next, the 705 data switching unit transmits image data.In the present embodiment, by way of example, since each light-emitting chip 400 comprises 2992 light-emitting points 602, the data switching unit 705 needs to transmit, within a period of approximately 105.8 µs, image data indicating whether each of the 2992 light-emitting points 602 is emitting light or not. To transmit image data for a total of 2992 light-emitting points 602 within a period of approximately 105.8 µs, in this example, as illustrated in Figure 23, the data switching unit 705 sets the frequency of a clock signal to be transmitted to the CLK signal line to 30 MHz when transmitting the image data. Figures 24A and 24B illustrate a case where the data type is "control". Figure 24A illustrates a case where control data is written to register 1102 of each 400 light-emitting chip. Figure 24B illustrates a case where control data stored in register 1102 of each 400 light-emitting chip is read. If the data type is "control", during communication, an enable signal is sent to the SYNC signal line, switching to a high level and indicating that communication is in progress. The 705 data-switching unit transmits an identification bit with a value of "10" to the DATAn signal line, indicating that the data type is "control", synchronized with the rising edge of the enable signal. In a case where control data is written, the 705 data switching unit transmits a write identification bit indicating a write operation after the identification bit.Next, the data switching unit 705 transmits the address (4 bits in this example) of the register to which the control data is to be written, and the control data itself (8 bits in this example). The order of transmission of the address and control data can be reversed. In a case where control data is being read, the data switching unit 705 transmits a read identification bit, indicating a read operation, after the identification bit. The data switching unit 705 then transmits the address of the register from which the control data is to be read. In this case, the light-emitting chip 400-n reads the control data stored at the specified address from register 1102 and outputs the control data to the READn signal line.The amount of control data is less than the amount of image data, and therefore the clock signal frequency to be sent to the CLK signal line can be lower than that used when transmitting image data. For example, the clock signal frequency when reading or writing control data can be 3 MHz. However, a configuration can be used where the clock signal frequency when reading or writing control data is the same as when transmitting image data. Figure 25 illustrates a case where the data type is "disabled." If the data type is "disabled," an enable signal is sent to the SYNC signal line indicating the transmission of an identification bit. Data switching unit 705 sends an identification bit with a value of "0x" to the DATA signal line, indicating that the data type is "disabled," synchronized with the rising edge of the enable signal. In a case where the "disabled" data type is being transmitted, data switching unit 705 can make the frequency of a clock signal to be sent to the CLK signal line the same as when image data is being transmitted.Alternatively, in a case where the "disabled" data type is transmitted, the data switching unit 705 can make the clock signal frequency to be sent to the CLK signal line the same as when the image controller 700 accesses register 1102. Furthermore, in a case where the "disabled" data type is transmitted, the data switching unit 705 can make the clock signal frequency to be sent to the CLK signal line the same as the frequency prior to the transmission of the "disabled" data type. Likewise, in a case where the "disabled" data type is transmitted, the data switching unit 705 can set the clock signal frequency to be sent to the CLK signal line to a default value different from those used when image data is transmitted and when the image controller 700 accesses register 1102. Figure 26 is a functional block diagram of the 400-n light-emitting chip according to the present example embodiment. In the present example embodiment, an interface circuit 1101 is arranged in circuit unit 406. The interface circuit 1101 is connected to the CLK, SYNC, DATAn, and READn signal lines via pads 408-5 to 408-8. Based on an identification bit received using the DATAn signal line in synchronization with the rising edge of a signal received using the SYNC signal line, interface circuit 1101 manages its state. Figure 27 is a state transition diagram of interface circuit 1101. The initial state when power is supplied based on the VCC supply voltage is a disabled state. In the disabled state, if an identification bit indicating the "disabled" type is received, interface circuit 1101 remains in the disabled state. In the disabled state, interface circuit 1101 only receives an identification bit and does not transmit data to another circuit. In the disabled state, if an identification bit indicating the type "image" is received, interface circuit 1101 enters an image receive state. In this case, interface circuit 1101 transmits the received image data to image data storage unit 1103 using the DATAn signal line after the identification bit. At that time, interface circuit 1101 also transmits a received clock signal to image data storage unit 1103 using the CLK signal line and a received line synchronization signal using the SYNC signal line. In the image receive state, if an identification bit indicating the type "image" is received, the state of interface circuit 1101 does not change, and interface circuit 1101 transmits the received image data to image data storage unit 1103 using the DATAn signal line after the identification bit.Furthermore, in the image reception state, if an identification bit indicating the "disabled" type is received, the 1101 interface circuit switches to the disabled state. In the disabled state, if an ID bit indicating the "control" type is received, interface circuit 1101 enters a control state. In this case, interface circuit 1101 writes control data to register 1102 or reads control data stored in register 1102 based on data received using the DATAn signal line after the ID bit. At that time, interface circuit 1101 transmits a clock signal received using the CLK signal line and an enable signal received using the SYNC signal line to register 1102. In the control state, if an ID bit indicating the "control" type is received, the state of interface circuit 1101 does not change, and interface circuit 1101 writes control data to register 1102 or reads control data from register 1102 based on data received using the DATAn signal line after the ID bit.Furthermore, in the control state, if an identification bit indicating the type "disabled" is received, the interface circuit 1101 switches to the disabled state. Furthermore, in the image receive state, if an identification bit indicating the "control" type is received, interface circuit 1101 remains in the image receive state and does not transition to another state. In this case, interface circuit 1101 determines that the data received using the DATAn signal line until the next identification bit is received is neither image data nor control data. Interface circuit 1101 then discards the received data and does not forward it to another circuit. Similarly, in the control state, if an identification bit indicating the "image" type is received, interface circuit 1101 remains in the control state and does not transition to another state. In this case, interface circuit 1101 determines that the data received using the DATAn signal line until the next identification bit is received is neither image data nor control data.Next, interface circuit 1101 discards the received data and does not transmit the received data to another circuit. As described above, in this example embodiment, the direct transition from the image reception state to the control state, and vice versa, is prohibited. This is to prevent interface circuit 1101 from malfunctioning due to an error in an identification bit received by interface circuit 1101 caused by external noise or static electricity. Specifically, in this example embodiment, the transition between the "image reception state" and the "control state" is achieved via the "disabled state," and the "disabled" data type is provided to enable interface circuit 1101 to enter the "disabled state." If the image data storage unit 1103 receives image data corresponding to a single line based on a line synchronization signal, the image data storage unit 1103 generates drive signals to control the light emission of the light emitting points 602 based on the image data and sends the drive signals to the current drive units 1104. As described above, in this example embodiment, control data elements are also transmitted to the 400 light-emitting chips in parallel using the dedicated signal lines DATA1 to DATA20 corresponding to the 400-1 to 400-20 light-emitting chips, respectively. This reduces the transmission time of control data elements to the 400 light-emitting chips. Furthermore, in this example embodiment, the DATA1 to DATA20 signal lines are shared for both image data and control data transmission. This reduces the number of signal lines compared to the first example embodiment, thereby lowering costs. To notify each light-emitting chip 400 whether the data to be transmitted on the shared signal line, i.e., the DATA signal line, is control data or image data, identification information indicating the data type is transmitted via the DATA signal line before the data is transmitted. As a result, the interface circuit 1101 can determine whether the data transmitted from the image controller 700 is control data or image data. This allows for reducing the number of signal lines connecting the image controller 700 and the printed circuit board 202, controlling the switching on and off of the light-emitting points 602, and adjusting the amount of current supplied to the light-emitting points 602 (a voltage to be applied to electrodes 504 and 508).In other words, it is possible to avoid an increase in the cost of the imaging apparatus and also to control the light emission from the light-emitting points 602. In the present example embodiment, when the image controller 700 switches between the "control" and "image" data types, the image controller 700 first transmits the "disabled" data type and then switches to the other data type. This configuration prevents the imaging apparatus from malfunctioning due to incorrect data type detection caused by disturbances such as noise or static electricity. In the present example embodiment, the "image receive state" and the "control state" of interface circuit 1101 transition from one to the other via the "disabled state," as described above. Therefore, after image data is transmitted or after access to register 1102 is complete, data switching unit 705 transmits an identification bit indicating the "disabled" type. However, a configuration can be used that allows a direct transition between the "image receive state" and the "control state" without providing the "disabled state." In this case, data switching unit 705 transmits only an identification bit indicating the "image" type before image data is transmitted, or it transmits an identification bit indicating the "control" type before image controller 700 accesses register 1102.Even with this type of configuration, it is possible to decrease the number of signal lines to connect the 700 image controller and the 202 printed circuit board. In Figure 26, similarly to the first example embodiment, dedicated signal lines READ1 to READ20 are provided respectively for light-emitting chips 400-1 to 400-20. However, similar to the second example embodiment, a configuration can also be used in which a single common READ signal line is provided to the 400 light-emitting chips. Although specific numerical values ​​have been used in the preceding example embodiments for illustrative purposes, those specific numerical values ​​are merely illustrative, and the present invention is not limited to the specific numerical values ​​used in the example embodiments. Specifically, the number of light-emitting chips 400 arranged on a single printed circuit board 202 is not limited to 20 and may be any number greater than or equal to one. Likewise, the number of light-emitting dots 602 comprised in each light-emitting chip 400 is not limited to 2992 and may be any other number. Although in the example embodiments described above, a single light-emitting chip 400 comprises four sets of 748 light-emitting dots arranged along the main scan direction, the number of sets may be any number greater than or equal to one.Although the 602 light-emitting dots are arranged with a pitch of approximately 21.16 µm, which corresponds to a resolution of 1200 dpi in the main scanning direction, the spacing between the 602 light-emitting dots can also have any other value. In the preceding example embodiments, the imaging apparatus transfers toner images formed on the photosensitive elements 102 to a sheet carried on the transfer belt 111. However, the imaging apparatus can also transfer toner images from the photosensitive elements 102 to a sheet via an intermediate transfer element. The imaging apparatus can be a color imaging apparatus that forms an image using toners of a range of colors, or it can be a monochrome imaging apparatus that forms an image using a toner of a single color. A fourth embodiment will now be described by way of example, based primarily on the differences from the first through third example embodiments. When the imaging apparatus, according to each of the first through third example embodiments, performs the gradation correction check, the imaging apparatus forms the test pattern for the gradation correction check on the sheet. The user then has the reading unit 100 read the sheet on which the test pattern is formed. The imaging apparatus detects the density of each of the test images PT1 to PT5 included in the test pattern and corrects the imaging condition relative to the density so that the density of each of the test images PT1 to PT5 approximates the target density.Specifically, for example, the 700 image controller rewrites control data elements so that the density of each of the PT1 to PT5 test images approximates the target density. Figure 28 is a diagram illustrating an image-forming apparatus 120 according to the present embodiment by way of example. The image-forming apparatus 120 according to the present embodiment by way of example can be applied to each of the first through third embodiments by way of example. The imaging units 20a, 20b, 20c, and 20d form images of yellow (Y), magenta (M), cyan (C), and black (K) toner, respectively. In the following description, a series of similar or identical components are designated by the same reference numbers. When distinguishing between the series of components, letters are added to the end of the reference number. When describing an element common to the series of components, the letters at the end of the reference number are omitted. The exposure head 23 in the following description has a configuration similar to that of the exposure head 106 described in each of the first through third embodiments by way of example. A photosensitive element 21 is an image-carrying element that carries an electrostatic latent image and a toner image. A charging device 22 charges the surface of the photosensitive element 21. The exposure head 23 exposes the photosensitive element 21, thereby forming an electrostatic latent image. A developing device 24 develops the electrostatic latent image using toner, thereby forming a toner image. A primary transfer roller 25 transfers the toner image from the photosensitive element 21 to an intermediate transfer belt 27. The intermediate transfer belt 27 carries the toner image to a secondary transfer device 28. A feeding device 1 feeds a sheet P held in a sheet storage onto a transport path. A transport device 2 carries the sheet P to an alignment device 3.Alignment device 3 corrects the tilt of sheet P and transports sheet P to secondary transfer device 28. The secondary transfer device 28 transfers the toner image from the intermediate transfer belt 27 to sheet P. A fixing device 29 applies heat and pressure to sheet P, thereby fixing the toner image onto the sheet P. A discharge / transport device 4 transports and discharges the sheet P, onto which the toner image is fixed, to the outside of the imaging apparatus 120. In the present embodiment, by way of example, the light-emitting units are supplied with a current based on the values ​​of control data elements established according to a test pattern, and as a result, the photosensitive element 21 is exposed.During an imaging operation to form images on a series of sheets, if the number of sheets being imaged reaches a predetermined number, the imaging apparatus 120 forms a series of patch images for grading correction control on the intermediate transfer belt 27. For example, the densities of the patch image series correspond to the densities of the test images PT1 to PT5 according to the first embodiment as an example. Image controller 700 causes a sensor 30 positioned next to the intermediate transfer belt 27 to read the patch images formed on the intermediate transfer belt 27 and detect the density of each patch image. For example, image controller 700 rewrites the control data elements so that the density of each patch image approximates a target density. The target density corresponds to the target density when the control data elements are set based on the test pattern (Figure 18). The configuration of any of the first through third embodiments is applied when writing the control data elements. Alternatively, if the number of sheets being imaged reaches the predetermined number, the imaging apparatus 120 can momentarily stop the transport of one sheet (the imaging job) and form a series of patch images with densities corresponding to test images PT1 to PT5 on the intermediate transfer belt 27. The imaging controller 700 can then have the sensor 30 read the series of patch images. The imaging controller 700 can then rewrite the control data elements based on the reading result. If the rewriting of the control data elements is complete, the imaging apparatus 120 can resume the imaging job. In the imaging work, during the period between the time when an electrostatic latent image of a first page is formed on the photosensitive element 21 and the time when an electrostatic latent image of a second page after the first page is formed on the photosensitive element 21, the imaging apparatus 120 can form on the photosensitive element 21 an electrostatic latent image corresponding to a patch image with a density corresponding to the test image PT1 (i.e., form the patch image on the intermediate transfer belt 27).Then, during the period between the moment when the electrostatic latent image of the second page is formed on the photosensitive element 21 and the moment when an electrostatic latent image of a third page after the second page is formed on the photosensitive element 21, the imaging apparatus 120 can form on the photosensitive element 21 an electrostatic latent image corresponding to a patch image with a density corresponding to the PT2 test image (i.e., form the patch image on the intermediate transfer belt 27).As described above, during the period between the formation of an electrostatic latent image on the photosensitive element 21 corresponding to a single page and the formation of a latent image on the same photosensitive element 21 corresponding to a subsequent page, the imaging apparatus 120 can form an electrostatic latent image on the photosensitive element 21 corresponding to a patch image (i.e., form the patch image on the intermediate transfer belt 27). Each time a patch image is formed, the image controller 700 can cause the sensor 30 to read the patch image. If the readout results of test images PT1 to PT5 are obtained, the image controller 700 can rewrite control data elements based on the readout results. As described above, the 700 image controller and each of the 400 series light-emitting chips are individually connected to each other via the dedicated WRITEn signal line and the dedicated READn signal line, so that the 700 image controller can access the 1102 registers of the 400 series light-emitting chips in parallel. With this configuration, it is possible to reduce the transmission time of control data elements to the 400 series light-emitting chips compared to a case where the 700 image controller accesses the 400 series light-emitting chips sequentially using a single WRITE signal line and a single READ signal line.Such a configuration is particularly effective in a case where it is necessary to form patch images (rewrite control data elements) in a relatively short period, for example, a case where, during the period between the time when an electrostatic latent image corresponding to a single page is formed on the photosensitive element 21 and the time when an electrostatic latent image corresponding to a subsequent page is formed on the photosensitive element 21, an electrostatic latent image corresponding to a patch image is formed on the photosensitive element 21 (i.e., the patch image is formed on the intermediate transfer belt 27).In the grading correction control described in the present embodiment by way of example, the densities of the patch image series on the intermediate transfer belt 27 are detected, instead of detecting the densities of the test image series PT1 to PT5 on sheet P described in the first embodiment by way of example. Thus, the patch image series according to the present embodiment by way of example can be considered the test image series according to the first embodiment by way of example. A fifth exemplary embodiment will now be described, based primarily on its differences from the first through fourth exemplary embodiments. In this exemplary embodiment, as illustrated in Figure 29, a temperature sensor 31 for detecting the temperature of the printed circuit board 202 (the temperature of the light-emitting chips 400 or the temperature of the light-emitting points or light-emitting units 602) is arranged on the surface of the printed circuit board 202 on which the group of light-emitting points 201 is mounted. The temperature sensor 31 can be arranged on the surface opposite the surface of the printed circuit board 202 on which the group of light-emitting points 201 is mounted (Figure 3A). Figure 30 is a diagram illustrating the relationship between the temperature of a light-emitting unit 602 and the amount of light when a predetermined current is supplied to the light-emitting unit 602. The relationship illustrated in Figure 30 is merely an example, and the relationship between temperature and the amount of light is not necessarily linear. As illustrated in Figure 30, the higher the temperature, the greater the amount of light emitted by the light-emitting unit 602, which is supplied with the predetermined current. In the present exemplary embodiment, for instance, the relationship between temperature and light output for each chip, as illustrated in Figure 30, is stored in a memory located in the image controller 700. Based on the detection result of the temperature sensor 31 and the temperature-light output relationship stored in the memory, the image controller 700 rewrites, for example, control data elements stored in registers 1102 so that, if the temperature increases, the current supplied to the light-emitting units 602 decreases. For example, in an imaging job to form images on a series of sheets, the control data elements are rewritten during the period between the time when an image corresponding to a single page is formed on the intermediate transfer belt 27 and the time when an image corresponding to a subsequent page is formed on the intermediate transfer belt 27. As described above, the 700 image controller and each of the 400 series light-emitting chips are individually connected to each other via the dedicated WRITEn signal line and the dedicated READn signal line, so that the 700 image controller can access the 1102 registers of the 400 series light-emitting chips in parallel. With this configuration, it is possible to reduce the transmission time of control data elements to the 400 series light-emitting chips compared to a case where the 700 image controller accesses the 400 series light-emitting chips sequentially using a single WRITE signal line and a single READ signal line.Such a configuration is particularly effective in a case where it is necessary to rewrite control data elements during the period between the moment when an electrostatic latent image corresponding to a single page is formed on the photosensitive element 21 and the moment when an electrostatic latent image corresponding to a subsequent page is formed on the photosensitive element 21. Although specific numerical values ​​have been used in the preceding example embodiments for illustrative purposes, those specific numerical values ​​are merely illustrative, and the present invention is not limited to the specific numerical values ​​used in the example embodiments. Specifically, the number of light-emitting chips 400 arranged on a single printed circuit board 202 is not limited to 20 and may be any number greater than or equal to one. Likewise, the number of light-emitting dots 602 comprised in each light-emitting chip 400 is not limited to 2992 and may be any other number. Although in the present example embodiments, a single light-emitting chip 400 comprises four sets of 748 light-emitting dots arranged along the main scan direction, the number of sets may be any number greater than or equal to one.Although the 602 light-emitting dots are arranged with a pitch of approximately 21.16 µm, which corresponds to a resolution of 1200 dpi in the main scanning direction, the spacing between the 602 light-emitting dots can also have any other value. In the preceding example embodiments, the imaging apparatus transfers toner images formed on the photosensitive elements 102 to a sheet carried on the transfer belt 111. However, the imaging apparatus can also transfer toner images from the photosensitive elements 102 to a sheet via an intermediate transfer element. The imaging apparatus can be a color imaging apparatus that forms an image using toners of a range of colors, or it can be a monochrome imaging apparatus that forms an image using a toner of a single color. Other examples The present invention can also be implemented by means of processing in which a program for implementing one or more functions of the example embodiments described above is supplied to a system or device via a network or storage medium, and one or more processors of a computer in the system or device read and execute the program. Furthermore, the present invention can also be implemented by means of a circuit (for example, an application-specific integrated circuit (ASIC)) capable of implementing the one or more functions. The invention is not limited to the preceding exemplary embodiments and may be varied and modified in various ways without departing from the scope of the invention as defined by the appended claims. According to the present invention, it is possible to reduce the transmission time of control data elements to light-emitting chips of an exposure device. The embodiments of the present invention may also be carried out by means of a computer of a system or apparatus that reads and executes computer-executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be more fully termed a "computer-readable non-transient storage medium") to perform the functions of one or more of the embodiments described above and / or comprising one or more circuits (e.g., an application-specific integrated circuit (ASIC)) to perform the functions of one or more of the embodiments described above, and by means of a procedure carried out by the computer of the system or apparatus by, e.g.,The reading and execution of computer-executable instructions from the storage medium to perform the functions of one or more of the realizations described above, and / or the control of one or more circuits to perform the functions of one or more of the realizations described above. The computer may comprise one or more processors (e.g., a central processing unit (CPU), a microprocessor unit (MPU)) and may comprise a network of independent computers or independent processors for reading and executing the computer-executable instructions. The computer-executable instructions may be supplied to the computer, for example, from a network or from the storage medium. The storage medium may comprise, for example, one or more hard disks, random access memory (RAM), read-only memory (ROM), distributed computing system storage,an optical disc (such as a compact disc (CD), a digital versatile disc (DVD) or a Blu-ray Disc™ (BD)), a flash memory device, a memory card and the like. Although the present invention has been described by reference to exemplary embodiments, it should be understood that the invention is not limited to the exemplary embodiments disclosed, but that the scope of the invention is defined by the following claims.

Claims

1. An imaging apparatus comprising: a photosensitive element (102) configured to rotate; an array of light-emitting chips (400), each of which is provided with an array of light-emitting means (602) for emitting light to expose the photosensitive element (102); circuitry (406) for switching the array of light-emitting means (602) on and off based on image data to control the switching on and off of the array of light-emitting means (602); and storage means (1102) for storing control data indicating a target amount of light from the array of light-emitting means (602), wherein the array of light-emitting chips (400) is arranged along a direction of the rotation axis of the photosensitive element (102); and an integrated circuit, IC, controller (700) configured to emit control data.characterized in that each of the series of light-emitting chips (400) is connected to the controller IC (700) by means of a separate line from among a series of signal lines for transmitting control data, wherein the control data indicates a light emission intensity of each of the series of light-emitting chips (400), and in one instance where the emitted control data is transmitted from the controller IC (700) to each of the series of light-emitting chips (400) via the separate line from among the series of signal lines, the transmitted control data is stored in storage media (1102).

2. Image-forming apparatus according to claim 1, wherein each of the series of light-emitting chips (400) comprises a digital-to-analog converter (D / A) (1201) configured to convert the transmitted control data into an analog signal,and wherein the series of light-emitting media (602) is configured to emit light with an amount of light based on the analog signal.

3. An image-forming apparatus according to claim 1, further comprising: a first substrate on which the series of light-emitting chips (400) is disposed; and a second substrate on which the controller IC (700) is disposed, wherein the series of signal lines connects the first and second substrates.

4. An image-forming apparatus according to claim 1, wherein, based on the reception of an activation signal, the controller IC (700) is configured to transmit the emitted control data to each of the series of light-emitting chips (400) via a separate line from among the series of signal lines.

5. An image-forming apparatus according to claim 1,wherein the controller IC (700) is configured to read the stored control data from each storage medium (1102) arranged in the array of light-emitting chips (400) via a separate line from the array of signal lines, and wherein, in a case where the read control data and the transmitted control data, transmitted from the controller IC (700) to each of the array of light-emitting chips (400) via a separate line from the array of signal lines, coincide, the controller IC (700) is configured to transmit the image data to each of the array of light-emitting chips (400) via a separate line from the array of signal lines.

6. Image-forming apparatus according to claim 1, wherein the array of signal lines is an array of first signal lines,wherein each of the series of light-emitting chips (400) is connected to the controller IC (700) via a separate line from among a series of second signal lines, wherein the controller IC (700) is configured to read the stored control data from each storage medium (1102) arranged in the series of light-emitting chips (400) via the separate line from among the series of second signal lines, and wherein, in a case where the read control data and the transmitted control data, transmitted from the controller IC (700) to each of the series of light-emitting chips (400) via the separate line from among the series of first signal lines coincide, the controller IC (700) is configured to transmit the image data to each of the series of light-emitting chips (400) via the separate line from among the series of second signal lines.

7. Imaging apparatus,according to claim 1, wherein the signal line series is a series of first signal lines, wherein the light-emitting chip series (400) comprises a series of light-emitting chip groups comprising the light-emitting chip series (400), wherein each of the light-emitting chip group groups is connected to the controller IC (700) by means of a distinct line from among a series of second signal lines, and wherein the controller IC (700) is configured to read the stored control data from each storage medium (1102) disposed in the light-emitting chip series (400) via the distinct line from among the series of second signal lines, and wherein, in an instance where the read control data and the transmitted control data transmitted from each of the light-emitting chip series via the distinct line from among the series of first signal lines coincide,The controller IC (700) is configured to transmit image data to each of the light-emitting chip array (400).

8. An imaging apparatus according to claim 1, wherein the light-emitting chip array (400) is configured to expose latent images representing a series of test images with different densities on a surface of the photosensitive element (102), and wherein the controller IC (700) is configured to transmit control data corresponding to the series of test images to each storage medium (1102) comprising the light-emitting chip array (400) via the series of signal lines.

9. An imaging apparatus according to claim 1, further comprising detection means for detecting a temperature of the light-emitting media array (602), wherein,In a case where the detection means detects an increase in the temperature of the light-emitting media series (602), the controller IC (700) is configured to output control data indicating a current value to decrease the amount of light from the light-emitting media series (602), and, in a case where the detection means detects a decrease in the temperature of the light-emitting media series (602), the controller IC (700) is configured to output control data indicating a current value to increase the amount of light from the light-emitting media series (602).

10. Image-forming apparatus according to claim 1, wherein the storage means (1102) are first storage means (1102), wherein each of the light-emitting chip series (400) comprises second storage means (1103) for storing the image data.and wherein the controller IC (700) is configured to transmit the emitted control data to each of the first storage media (1102) comprising the light-emitting chip array (400) via the signal line array and to transmit the image data to each of the second storage media (1103) comprising the light-emitting chip array (400) via the signal line array.

11. An image-forming apparatus according to claim 10, wherein the light-emitting chip array (602) is configured to utilize organic electroluminescence (EL).

12. An image-forming apparatus according to claim 10, wherein each of the light-emitting chip array (400) comprises receiving means for receiving the emitted control data and the transmitted image data from the controller IC (700).and wherein the receiving means are configured to transmit the received control data to the first storage means (1102) and to transmit the received image data to the second storage means (1103).

13. An image forming apparatus according to claim 12, wherein, in an instance where the receiving means receives first identification information, the receiving means are configured to transition to a first state in which the transmitted control data is stored in the first storage means (1102), and, in an instance where the receiving means receives second identification information, the receiving means are configured to transition to a second state in which the image data is stored in the second storage means (1103).

14. An image forming apparatus according to claim 13, wherein,In a case where the receiving means are configured to receive third identification information, the receiving means transition to a third state, and, in a case where the receiving means are in the third state, the emitted control data are not stored in the first storage means (1102) and the image data are not stored in the second storage means (1103).

15. An imaging apparatus according to claim 14, wherein, even in a case where the receiving means receive the second identification information in the first state, the receiving means are configured not to transition to the second state, and, even in a case where the receiving means receive the first identification information in the second state, the receiving means are configured not to transition to the first state.

16. An imaging apparatus according to claim 15, wherein,Based on the reception of the first identification information in the third state, the receiving means are configured to transition to the first state, and based on the reception of the second identification information in the third state, the receiving means are configured to transition to the second state.

17. An imaging apparatus according to claim 1, wherein the series of light-emitting means (602) is configured to utilize organic electroluminescence (EL).

18. An imaging apparatus comprising: a photosensitive element (102) configured to rotate; a series of light-emitting chips (400), each of which is provided with a series of light-emitting means (602) for emitting light to expose the photosensitive element (102).circuit means (406) for switching the light-emitting means (602) on and off based on image data to control the switching on and off of the light-emitting means (602), and storage means (1102) for storing control data indicating a target amount of light from the light-emitting means (602), wherein the light-emitting chip array (400) is arranged along a direction of the rotation axis of the photosensitive element (102) and comprised in an array of light-emitting chip groups; and an integrated circuit, IC, controller configured to emit control data, characterized in that the light-emitting chip group array is connected to the controller IC (700) by a separate line from among an array of signal lines to transmit the control data, wherein the control data indicates a light emission intensity from each of the light-emitting chip array (400),and in a case where the emitted control data is transmitted from the controller IC (700) to each of the series of light-emitting chip groups via a separate line from the series of signal lines, the transmitted control data is stored on the storage media.

19. An imaging apparatus according to claim 18, wherein each of the series of light-emitting chips (400) comprises a digital-to-analog converter (D / A) (1201) configured to convert the transmitted control data into an analog signal, and wherein the series of light-emitting media (602) is configured to emit light with an amount of light based on the analog signal.

20. An imaging apparatus according to claim 18, further comprising: a first substrate on which the series of light-emitting chips (400) is arranged; and a second substrate on which the controller IC (700) is arranged.wherein the series of signal lines connects the first and second substrates.

21. An imaging apparatus according to claim 18, wherein, based on the reception of an activation signal, the controller IC (700) is configured to transmit the emitted control data to each storage medium (1102) comprising the array of light-emitting chips (400), which are comprising the array of light-emitting chip groups, via the series of signal lines.

22. An imaging apparatus according to claim 18, wherein the controller IC (700) is configured to read the stored control data from each storage medium (1102) arranged in the array of light-emitting chips (400) via a separate line from the series of signal lines, and wherein, in an instance where the read control data and the transmitted control data,transmitted from the controller IC (700) to each of the light-emitting chip arrays (400) via a separate line from among the signal lines, the controller IC (700) is configured to transmit the image data to each of the light-emitting chip arrays (400) via the signal lines.

23. Image-forming apparatus according to claim 18, wherein the signal lines are a series of first signal lines, wherein each of the light-emitting chip arrays is connected to the controller IC (700) via a separate line from among a series of second signal lines, wherein the controller IC (700) is configured to read the stored control data from each storage medium (1102) arranged in the light-emitting chip array (400) via a separate line from among the second signal lines, and wherein,In a case where the read control data and the transmitted control data, transmitted from the controller IC (700) to each of the series of light-emitting chips (400) through the distinct line between the first series of signal lines, coincide with each other, the controller IC (700) is configured to transmit the image data to each of the series of groups of light-emitting chips.