Reconfigurable electronic circuit and associated processes

Abstract

Reconfigurable electronic circuit and associated methods. The present invention relates to a reconfigurable electronic circuit (10), the electronic circuit (10) comprising a stack (12) of layers, the stack (12) of layers comprising: - a substrate (14), - a first layer (16), the first layer (16) being made of a first material, the first material being a ferroelectric material, and - a second layer (20), the second layer (20) being made of a second material, the second material being an oxide material reducible by the application of an electric field, the first layer (16) being intercalated between the substrate (14) and the second layer (20). Figure for the abstract: Figure 1

Description

Title of the invention: Reconfigurable electronic circuit and associated methods

[0001] The present invention relates to a reconfigurable electronic circuit. The present invention also relates to a configuration method as well as to a manufacturing method of such an electronic circuit.

[0002] The development of electronics has led to the appearance of electronic circuits with increasingly advanced functionalities.

[0003] Typically, these circuits are manufactured using lithography techniques combined with etching and deposition techniques aimed at physically adding or removing material from silicon wafers. The term "wafer" is an anglicism designating a very thin slice or plate of material. This makes it possible to produce semiconductor cards.

[0004] The physical components making it possible to obtain the functionalities of the devices are interconnected on semiconductor cards thus produced.

[0005] However, to upgrade the components of such circuits, a new circuit is made from scratch.

[0006] This leads to the generation of a lot of so-called electronic waste containing many useful materials, such as copper, gold, silver, lead, tin which are most of the time not recycled.

[0007] It is known to avoid such waste to reuse the old circuit for a reconditioning of the old circuit but this always leads to the existence of two circuits while the initial need for the use is simply to update the old circuit to have the new functionalities.

[0008] There is therefore a need for a reconfigurable electronic circuit allowing such updates.

[0009] For this purpose, a reconfigurable electronic circuit is described, the electronic circuit comprising a stack of layers, the stack of layers comprising:

[0010] - a substrate,

[0011] - a first layer, the first layer being made of a first material, the first material being a ferroelectric material, and

[0012] - a second layer, the second layer being made of a second material, the second material being an oxide material reducible by application of an electric field, the first layer being intercalated between the substrate and the second layer.

[0013] According to other advantageous aspects of the invention, the electronic circuit comprises one or more of the following characteristics, taken in isolation or according to all of them: technically possible combinations:

[0014] - the thickness of at least one layer among the first layer and the second layer is between 1 nanometer and 200 nanometers, advantageously between 10 nanometers and 30 nanometers.

[0015] - the first material is chosen from the list consisting of BaTiO3, PZT, PbTiO 3 BiFeO3, NaosBiosTiOs, SBT, Bi4Ti30i2, BiFeO3-PbTiO3, PMN-PT, LiNbO3, LiTaO3, HfO2, ZrO2, h-LuMnO3, h-LuMnO3, h-YMnO3, NaSrR(BO3)2 and LuFeO3.

[0016] - the second material is chosen from the list consisting of a ferrite, a hematite rhombohedral, a spinel, a mixed-valence manganite and a multivalent oxide.

[0017] - the substrate is a conductive substrate.

[0018] - the substrate is chosen from the list consisting of Nb-doped SrTiO3, Nb-doped SrTiO3 L, Y-doped SrTiO3, Nb-doped LaA103, SrRuO3, RuO2, IrO2, LSCO, ITO or a combination of these elements.

[0019] The description also describes a method of configuring an electronic circuit, the configuration method comprising the steps of:

[0020] - provision of a reconfigurable electronic circuit, the electronic circuit comprising a stack of layers, the stack of layers comprising:

[0021] - a substrate,

[0022] - a first layer, the first layer being made of a first material, the first material being a ferroelectric material, and

[0023] - a second layer, the second layer being made of a second material, the second material being an oxide material reducible by application of an electric field, the first layer being intercalated between the substrate and the second layer, and

[0024] - writing a configuration on the electronic circuit on the second layer, the tip following a path depending on the configuration to be written, the writing being, for example, carried out by applying a tip, the tip being electrically polarized.

[0025] According to other advantageous aspects of the invention, the configuration method comprises one or more of the following characteristics, taken in isolation or in all technically possible combinations:

[0026] - the method further comprises the steps of:

[0027] - erasing the written configuration by heating the electronic circuit, and

[0028] - writing a new configuration on the electronic circuit on the second layer, the tip following a path depending on the new configuration to be written, the writing being, for example, carried out by applying a tip, the tip being electrically polarized.

[0029] - heating is carried out by annealing in an oxidizing environment.

[0030] The description also describes a method of manufacturing a reconfigurable electronic circuit, the manufacturing method comprising the steps of:

[0031] - a step of providing a substrate,

[0032] - a step of depositing a first layer on the substrate, the first layer being made of a first material, the first material being a ferroelectric material, and

[0033] - a step of depositing a second layer on the first layer, the second layer being made of a second material, the second material being an oxide material reducible by application of an electric field, the first layer being intercalated between the substrate and the second layer.

[0034] In the present description, the expression “suitable for” means indifferently “adapted for”, “adapted to” or “configured for”.

[0035] Characteristics and advantages of the invention will appear on reading the description which follows, given solely by way of non-limiting example, and made with reference to the appended drawings, in which:

[0036] - [Fig.l] [Fig.l] is a schematic representation of an electronic circuit re configurable in perspective,

[0037] - [Fig.2] [Fig.2] is a flowchart of an example of implementation of a method of configuring the electronic circuit of [Fig.l],

[0038] - [Fig.3][Fig.4] Figures 3 and 4 are schematic representations of the implementation implementation of a step of the configuration method of [Fig.2],

[0039] - [Fig.5] [Fig.5] is a graph illustrating the variation of the current as a function of the applied voltage, and

[0040] - [Fig.6] [Fig.6] is a set of images representing the experimental results obtained by the applicant by implementing the configuration method of [Fig.2] and a set of corresponding diagrams making it possible to determine the functionality of the different configured zones.

[0041] [Fig.l] schematically illustrates a reconfigurable electronic circuit 10.

[0042] An electronic circuit is a physical device comprising a set of components interconnected with each other and positioned on a support. The set of components is arranged to perform one or more predefined functions.

[0043] The electronic circuit 10 is here reconfigurable in the sense that it is possible to modify the configuration of the electronic circuit 10.

[0044] A configuration is defined here as an arrangement of components, so that the reconfigurability of the electronic circuit 10 here designates the possibility for a user of the electronic circuit 10 to modify the components of the electronic circuit 10 as well as their position.

[0045] By way of illustration, it is possible to switch the electronic circuit 10 from a first configuration in which the electronic circuit 10 is an RC circuit to a second configuration in which the electronic circuit 10 is an RL circuit.

[0046] It may be emphasized here that the configuration of the electronic circuit 10 may be any combination of any number of components R, L and C.

[0047] Before explaining how it is possible to configure the electronic circuit 10 and to reconfigure it, it is appropriate to describe the elements making up the electronic circuit 10.

[0048] As shown schematically in [Fig.l], the electronic circuit 10 comprises a stack 12 of layers.

[0049] According to the example of [Fig.l], the stack 12 comprises a substrate 14, a first layer 16, a second layer 20 and two electrodes 22.

[0050] The first layer 16 is interposed between the substrate 14 and the second layer 20, so that the substrate 14 could be described as the lower layer, the first layer 16 as the intermediate layer and the second layer 20 as the upper layer.

[0051] The substrate 14 is made of a conductive material, so that the substrate 14 is conductive.

[0052] According to a particular case, the substrate 14 is made of a doped material, such as SrTiO3 doped with Nb, L or Y.

[0053] Other materials are also conceivable for substrate 14, such as LaA103 doped with Nb, SrRuO3, RuO2, IrO2, LSCO or ITO.

[0054] Multilayers could also be used.

[0055] In particular, the substrate 14 could be a set of layers of the Pt / Ti / SiO2 / Si or RuO2 / TiO2 / Si type.

[0056] The substrate 14 is, furthermore, compatible with the deposition of thin layers.

[0057] Indeed, the two layers 16 and 20 are thin layers.

[0058] The thickness of each layer 16 or 20 is between 1 nanometer (nm) and 200 nm.

[0059] Each layer 16 or 20 has a thickness (measured along the stacking direction) less than or equal to 30 nm. Typically, the thickness of each layer 16 or 20 is greater than or equal to 5 nm, preferably greater than or equal to 10 nm.

[0060] The first layer 16 is made of a first material, which is here a ferroelectric material.

[0061] A ferroelectric material is a material exhibiting an electric polarization in the spontaneous state which can be reversed in the presence of an external electric field.

[0062] According to the example described, the first material is stable to allow annealing in air. at a moderate temperature. Typically, the first material remains stable for annealing carried out at a temperature of 300°C.

[0063] Here, the term “moderate temperature” means a temperature between the Curie temperature of the first material and 500°C.

[0064] The first material is, in particular, BaTiO3.

[0065] In such a case, the Curie temperature is of the order of 120°C.

[0066] The first material can thus have a perovskite structure, as is the case for BaTiO3, PZT (i.e. PbZrxTii XO3 with x strictly between 0 and 1), PbTiO3 or BiFeO3.

[0067] According to one example, the first material has a tungsten bronze structure. In particular, the first material is Naoj5Bioj5Ti03.

[0068] According to another example, the first material is an Aurivillius phase, in particular SBT, Bi4Ti30i2 or BiFeO3-PbTiO3.

[0069] A first material could also be chosen from PMN-PT, LiNbO3, LiTaO3, HfO2, ZrO2, hexagonal HoMnO3 (also noted h-HoMnO3), h-LuMnO3, h-YMnO3, NaSrR(BO3)2 and LuFeO3.

[0070] The second layer 20 is made of a second material.

[0071] The second material is an oxide material reducible by application of an electric field.

[0072] The electric field is such that the highest minimum has the value of the coercive field of the first layer and the maximum is lower than the value of the electric field causing the breakdown of the first layer 16 or the second layer 20.

[0073] The electric field is obtained by applying an electric voltage.

[0074] This corresponds to a typical electrical voltage of 4 V to 10 V (for the example of material system shown here).

[0075] The material is thus a material capable of exhibiting a chemical reduction, accompanied by a drop in resistance, during a low amplitude electrical polarization and reoxidation by annealing in air at moderate temperature.

[0076] The second material is, in particular, a ferrite NiFe2O4 or a rhombohedral hematite Fe2O3.

[0077] The second material may also be a spinel, a mixed valence manganite or a multivalent oxide.

[0078] Examples of spinel include: NiFe2O4, MnFe2O4, CoFe2O4, MgFe2O4, Fe3O4, CuCr2O4, MgCr2O4 and FeCr2O4.

[0079] Lai xSrxMnO3 (with x between 0 and 1) or Pri xCaxMnO3 (with x between 0 and 1) are examples of mixed-valence manganite.

[0080] As an example of multivalent oxide, there may be cited: TiOx, VOX, CrOx, MnOx, CoOx, NiOx, CuOx, HfOx, ZrOx, WOX, NbOx and TaOx.

[0081] It is in this second layer 20 that the components of the electronic circuit 10 will be produced.

[0082] More precisely, as will appear in the remainder of the description, the components will appear on the surface 24 of the second layer 20.

[0083] The second layer 20 is surmounted by two electrodes 22.

[0084] Each electrode 22 is, in this example, a conductive line positioned at the ends of the second layer 20.

[0085] For illustration purposes, each electrode 22 is made of gold.

[0086] The two electrodes 22 are used here to conduct and read the current of the components produced in the second layer 20.

[0087] Depending on the needs, as many contacts as desired or necessary can be inserted to configure the desired circuits, knowing that a circuit can have several contacts (typically an RLC circuit involves four contacts, two for the input and two for the output).

[0088] The reconfigurable nature of the electronic circuit 10 can be illustrated with reference to [Fig.2]. [Fig.2] corresponds to an example of implementation of a method for configuring the electronic circuit 10.

[0089] A case will be illustrated here where two configurations are written, it being understood that the erase-write process which will be described can be repeated as many times as necessary.

[0090] The configuration method comprises several steps: a step of writing a first configuration E30, an erasing step E32 and a step of writing a second configuration E34.

[0091] The writing step of the first configuration, simply first writing step E30, is implemented by using an electrically polarized tip.

[0092] According to the example of [Fig.3], the polarized tip is a tip 40 of a piezoelectric force microscope as shown schematically in [Fig.3].

[0093] Such a microscope is more often designated by the abbreviation PFM which refers to the corresponding English name of “Piezoresponse force microscope”.

[0094] The tip 40 is a conductive tip, most often made of metal, which can be brought into contact with a sample. The application of a static potential at the tip 40 makes it possible to locally excite the deformation of the sample by inverse piezoelectric effect. This makes it possible to manipulate the ferroelectric domains of the first material.

[0095] Alternatively, the polarized tip is an atomic force microscope tip.

[0096] As a note, the tip is conductive and is typically made of Ni, Ag, Al, Pt Pt-Ir, carbon nanotubes, doped Si, W, diamond-doped boron or SiC-doped boron.

[0097] The first writing step E30 thus makes it possible to locally and reversibly modify the properties of the first and second layers 16 and 20.

[0098] The area whose properties are modified is hatched in [Fig.3] and designated by the reference sign 42.

[0099] An example of a property is resistance.

[0100] Another example of a property is the magnetization of the second layer 20.

[0101] The value of the resistance before the first writing step E30 corresponds to the initial resistance value.

[0102] This value is sometimes referred to as the resistance value in the pristine state, this name designating the state of a layer in the absence of excitation and therefore of writing.

[0103] As explained previously, the application of a local electric field on the tip makes it possible to polarize the first layer 16 and to induce a reduction in the surface resistance of the second layer 20 which thus becomes locally conductive.

[0104] In fact, the local reduction in resistance is obtained by chemical reduction of the surface of the first layer 16. This surface reduction is induced by the condensation of charges at the interface between the first layer 16 and the second layer 20.

[0105] More precisely, as visible in [Fig.4], the polarization is manifested by the accumulation of negative charges on the side of the first material forming the interface between the two layers. In parallel, the negative charges accumulate at the other interface between the first material with the substrate 14.

[0106] The accumulation of negative charges induces positive charges on the other side of the interface, i.e., on the side of the second material. To maintain charge neutrality, the upper part of the second layer 20 accumulates negative charges at the other interface. The doping of the negative charges is manifested by an accumulation of oxygen vacancies. The more oxygen vacancies there are, the less the second material is oxidized (more reduced). A greater number of oxygen vacancies (chemical reduction of the second material) results in a decrease in resistance.

[0107] It is therefore possible to reduce the resistance locally by passing the tip 40 with a significant factor. [Fig.5] experimentally illustrates this modification in the form of a current-voltage curve in the case of writing a wire (C1 curve pristine state and C2 curve written wire).

[0108] This makes it possible to produce different patterns having reduced resistance in the second layer 20 using the tip 40. These different patterns allow the creation of different electronic components.

[0109] The correspondence between the patterns and the function of the electronic components is known.

[0110] For example, a straight line having a greater length and / or width corresponds to a resistance of different value.

[0111] To make an inductance, a wire can be made forming a zigzag while a hair comb shape can be used to create a capacitor (interdigitated electrode).

[0112] It is therefore sufficient to convert the components of the electronic circuit 10 to be produced into the path of the tip 40 to write the desired electronic circuit 10.

[0113] A configuration of the electronic circuit 10 is thus obtained.

[0114] During the erasing step E32, the electronic circuit 10 is heated to restore the oxidation state of the second layer 20.

[0115] For this, an annealing step is carried out, for example, by sending a hot gas containing oxygen.

[0116] The gas is, for example, air.

[0117] More generally, annealing takes place in an oxidizing environment, such as for example an environment comprising a plasma with dioxygen, or oxidizing gas such as O3, NO, NO2, NO3 or H2O2.

[0118] The annealing temperature is chosen to be low enough not to damage the second layer 20 but high enough to achieve erasure.

[0119] The annealing temperature is therefore higher than the Curie temperature of the first material.

[0120] As a particular example, an annealing temperature of 300°C with a duration of 3 hours makes it possible to achieve erasure without damaging the second material.

[0121] Under the effect of heating, the first material adopts a paraelectric phase in which the polarization disappears. This causes the charge accumulation at the interface between the first material and the second material to disappear, resulting in the second layer 20 returning to its resistance in the virgin state.

[0122] In parallel, the presence of oxygen makes it possible to reoxidize the surface of the second material which is found in the virgin state.

[0123] The erasure step E32 thus makes it possible both to erase the components written during a previous writing step and to restore the physical properties of the two thin layers to the virgin state.

[0124] Thus, the configuration of the electronic circuit 10 is erased and it is possible to write a new configuration.

[0125] According to the example described, this new configuration is the second configuration written during the second writing step E34.

[0126] As in the case of the first writing step E30, the tip 40 of the piezoelectric force microscope is controlled to create a path allowing the components of the second desired configuration to be physically created.

[0127] An example of experimental implementation of such a configuration method is illustrated by [Fig.6] which shows the electronic circuit 10 obtained at several different stages.

[0128] More precisely, the experiment here consisted of showing the transition from a first configuration corresponding to a wire to a second configuration corresponding to an inductance.

[0129] [Fig.6] comprises four images of the electronic circuit 10 seen from above which were obtained by a polarized tip on a sample in which the first material is BaTiO3, the second material is NiFe2O4 and the substrate 14 is made of Nb:SrTiO3.

[0130] Each image is matched with a diagram allowing the functionality of each area visible on the image to be understood.

[0131] The first image II corresponds to the electronic circuit 10 provided before the implementation of the first step of writing. In this first image II, we see the two gold electrodes 22 at the top and bottom which are used to bring the current.

[0132] After implementing the first writing step, as visible in the second image 12, a wire was produced with a width of 3 micrometers.

[0133] As a note, this width is not limiting, the wire can be less wide, widths as small as 10 nanometers can be obtained.

[0134] The third image 13 corresponds to the electronic circuit 10 obtained after erasure (annealed at 300°C for 3 hours). The wire has disappeared.

[0135] Finally, the fourth image 14 shows the top view after writing the second configuration.

[0136] A zigzag line clearly appears corresponding to the presence of an inductance.

[0137] This experiment clearly shows that it is possible to reconfigure the electronic circuit 10 as desired and at will.

[0138] For this, the electronic circuit 10 simply comprises a set of thin oxide / ferroelectric layers as well as a substrate 14 having two distinct properties.

[0139] On the one hand, the substrate 14 is compatible with the deposition of thin layers.

[0140] On the other hand, the substrate 14 is made of a material allowing the circuit to be written, for example with a polarized tip as described previously.

[0141] In fact, with a substrate that would be insulating, the applied voltage would go mainly towards the substrate. This would imply a low effective voltage between the first layer 16 and the second layer 20, not allowing the configuration of the electronic circuit 10 to be achieved.

[0142] The substrate 14 is therefore specific in that it allows both the deposition of layers thin and writing the electronic circuit 10 to allow its reconfiguration.

[0143] This possibility of reconfiguration makes it possible to greatly reduce the quantity of electronic waste generated since it becomes possible to keep the same electronic circuit 10 and simply change its configuration.

[0144] This change is, moreover, relatively simple insofar as it is sufficient to have a heating system allowing annealing to be carried out in an oxidizing environment and a piezoelectric force microscope tip 40 whose path is controlled.

[0145] The method of manufacturing the electronic circuit 10 in the virgin state is, moreover, also easy to implement.

[0146] For this, the layers can be deposited with a molecular beam epitaxy system assisted by an oxygen plasma source.

[0147] This makes it possible to ensure good crystallinity and to properly control the oxidation of the layers, in particular to obtain good ferroelectric properties for the first layer 16.

[0148] However, other techniques allowing the deposition of thin layers can be used here such as an ALD technique or a PLD technique.

[0149] The abbreviation ALD refers to the English term “Atomic Layer Deposition” which designates a technique allowing the desired set of layers to be produced atomic layer by atomic layer.

[0150] The abbreviation PLD refers to the English term “Pulsed Laser Deposition” (literally pulsed laser deposition) which thus designates a technique allowing a layer to be produced using a laser.

[0151] Other embodiments benefiting from the aforementioned advantages are also conceivable.

[0152] By way of example, it is also possible for the electrodes 22 of the electronic circuit 10 to be produced in the second layer 20.

[0153] This avoids adding new contact points by depositing conductive material such as gold.

[0154] According to another example, the second layer 20 comprises sub-zones made of different materials.

[0155] For example, it could be envisaged that the second layer 20 comprises a first sub-zone having a high relative resistance and a second sub-zone having a low relative resistance.

[0156] As a particular example, the second layer 20 comprises a first sub-zone of NiFe2O4, a second sub-zone of CoFe2O4 and a third sub-zone which is an iron oxide.

[0157] This corresponds to a second material whose composition would vary depending on the sub-area considered.

[0158] Nevertheless, whatever the sub-zone considered, the second material would always be a reducible oxide material under the application of an electric field.

[0159] This would make it easier to obtain complex electronic circuits.

Claims

Claims

1. Reconfigurable electronic circuit (10), the electronic circuit (10) comprising a stack (12) of layers, the stack (12) of layers comprising: - a substrate (14), - a first layer (16), the first layer (16) being made of a first material, the first material being a ferroelectric material, and - a second layer (20), the second layer (20) being made of a second material, the second material being an oxide material reducible by application of an electric field, the first layer (16) being interposed between the substrate (14) and the second layer (20).

2. Reconfigurable electronic circuit according to claim 1, wherein the thickness of at least one layer among the first layer (16) and the second layer (20) is between 1 nanometer and 200 nanometers, advantageously between 10 nanometers and 30 nanometers.

3. A reconfigurable electronic circuit according to claim 1 or 2, wherein the first material is selected from the list consisting of BaTiO3, PZT, PbTiO3, BiFeO3, Na0j5Bioj5Ti03, SBT, Bi4Ti30i2, BiFeO3-PbTiO3, PMN-PT, LiNbO3, LiTaO3, HfO2, ZrO2, h-LuMnO3, h-LuMnO3, h-YMnO3, NaSrR(BO3)2 and LuFeO3.

4. A reconfigurable electronic circuit according to any one of claims 1 to 3, wherein the second material is selected from the list consisting of a ferrite, a rhombohedral hematite, a spinel, a mixed valence manganite and a multivalent oxide.

5. A reconfigurable electronic circuit according to any one of claims 1 to 4, wherein the substrate is a conductive substrate.

6. A reconfigurable electronic circuit according to any one of claims 1 to 5, wherein the substrate is selected from the list consisting of Nb-doped SrTiO3, L-doped SrTiO3, Y-doped SrTiO3, Nb-doped LaA103, SrRuO3, RuO2, IrO2, LSCO, ITO or a combination thereof.

7. A method of configuring an electronic circuit (10), the configuration method comprising the steps of: - providing a reconfigurable electronic circuit (10), the electronic circuit- electronic circuit (10) comprising a stack (12) of layers, the stack (12) of layers comprising: - a substrate (14), - a first layer (16), the first layer (16) being made of a first material, the first material being a ferroelectric material, and - a second layer (20), the second layer (20) being made of a second material, the second material being an oxide material reducible by application of an electric field, the first layer (16) being interposed between the substrate (14) and the second layer (20), and - writing a configuration on the electronic circuit (10) on the second layer (20), the tip (40) following a path depending on the configuration to be written, the writing being, for example, carried out by application of a tip (40), the tip (40) being electrically polarized.

8. A configuration method according to claim 7, wherein the method further comprises the steps of: - erasing the written configuration by heating the electronic circuit (10), and - writing a new configuration on the electronic circuit (10) on the second layer (20), the tip (40) following a path depending on the new configuration to be written, the writing being, for example, carried out by applying a tip (40), the tip (40) being electrically polarized.

9. A method of configuration according to claim 8, wherein the heating is carried out by annealing in an oxidizing environment.

10. A method of manufacturing a reconfigurable electronic circuit (10), the manufacturing method comprising the steps of: - a step of providing a substrate (14), - a step of depositing a first layer (16) on the substrate (14), the first layer (16) being made of a first material, the first material being a ferroelectric material, and - a step of depositing a second layer (20) on the first layer (16), the second layer (20) being made of a second material, the second material being an oxide material reducible by application of an electric field, the first layer (16) being interposed between the substrate (14) and the second layer (20).