Multiplication of a sparse matrix and a dense matrix to determine an output matrix on a processing unit

GB2702797APending Publication Date: 2026-07-01IMAGINATION TECH LTD
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Patent Information

Application Number
GB2024017599
Authority / Receiving Office
GB · GB
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2026-07-01
Patent Text Reader

Abstract

A processing unit for multiplying a sparse matrix (W) and a dense matrix (X). An execution module executes threads of a workgroup that are allocated to respective sections of a row of an output matrix (Y, e.g. 502a). One or more caches store sparse matrix data. Each thread : (i) accesses data representing one or more non-zero elements of a row position of the sparse matrix (212) matching a row-position of the portion of the row of the output matrix of the section to which the thread is allocated (502a or 502b), (ii) for each of the non-zero elements row of the sparse matrix, multiply the non-zero element with a portion of a related row of the dense matrix, a row-position of the related row in the dense matrix matches a column-position of the non-zero element, a column-position of the portion of the related row of the dense matrix matches a column-position of the portion of the row of the output matrix of the section of the allocated thread, (iii) determines the elements of the section of the output matrix by summing results of the multiplications. Multiple threads of the workgroup are allocated to respective portions of the same row of the output matrix. [Figure 5]
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