Decoding method and device
Patent Information
- Authority / Receiving Office
- HK · HK
- Patent Type
- Patents
- Current Assignee / Owner
- BEIJING UNIV OF POSTS & TELECOMM
- Filing Date
- 2023-02-20
- Publication Date
- 2026-07-10
Smart Images
Figure 00000000_0000_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to a decoding method and device. Background Technology
[0002] The 3GPP (3rd Generation Partnership Project) has defined Ultra-Reliable Low-Latency Communications (URLLC) as a key communication scenario for 5G (5th Generation Mobile Communication Technology) and 6G (6th Generation Mobile Communication Technology) and above networks. URLLC requires not only high-performance decoding algorithms—that is, decoding performance approaching that of Maximum Likelihood (ML)—but also low complexity. Existing Ordered Statistic Decoding (OSD) algorithms can achieve ML decoding performance, but their complexity is relatively high. Summary of the Invention
[0003] In view of this, the purpose of this application is to propose a decoding method and apparatus.
[0004] For the purposes described above, this application provides a decoding method, comprising:
[0005] The received sequence and generator matrix are preprocessed to obtain the information hard decision sequence and the codeword hard decision sequence;
[0006] Guess the error pattern based on the information hard decision sequence and the codeword hard decision sequence;
[0007] The error pattern is post-processed to output the optimal decoding sequence as the decoding result; wherein, the optimal decoding sequence is the decoding sequence that minimizes the Euclidean distance.
[0008] Optionally, the preprocessing of the received sequence and the generator matrix to obtain the information hard decision sequence and the codeword hard decision sequence includes:
[0009] Based on the first permutation function, the first codeword sequence and the first matrix are obtained according to the received sequence and the generated matrix, respectively.
[0010] Based on the second permutation function, the second codeword sequence and the second matrix are obtained according to the first codeword sequence and the first matrix, respectively.
[0011] The system matrix is obtained by Gaussian elimination of the second matrix.
[0012] The second codeword sequence is hard-determined to obtain the information hard-determined sequence.
[0013] The codeword hard decision sequence is obtained based on the information hard decision sequence and the system matrix.
[0014] Optionally, guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence includes:
[0015] In response to determining that the current iteration number is less than the preset maximum iteration number and is in the first guessing mode, the system guesses the information bit error pattern for the first set based on the information hard decision sequence and the second codeword sequence, and guesses the codeword sequence error pattern for the second set based on the codeword hard decision sequence and the second codeword sequence; wherein, the first set is a set storing information bit error patterns, and the second set is a set storing codeword sequence error patterns.
[0016] Optionally, guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence includes:
[0017] In response to determining that the current iteration number is less than the preset maximum iteration number and is in the second guessing mode, based on the preset guessing number and the preset empty set, information bit error patterns are guessed for the first set according to the information hard decision sequence and the second codeword sequence, and codeword sequence error patterns are guessed for the second set according to the codeword hard decision sequence and the second codeword sequence; wherein, the first set is a set storing information bit error patterns, and the second set is a set storing codeword sequence error patterns.
[0018] Optionally, guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence includes:
[0019] In response to determining that the current iteration number is less than the preset maximum iteration number and is in the third guessing mode, based on the preset guessing probability, the information bit error pattern is guessed for the first set according to the information hard decision sequence and the second codeword sequence, or the codeword sequence error pattern is guessed for the second set according to the codeword hard decision sequence and the second codeword sequence; wherein, the first set is a set storing information bit error patterns, and the second set is a set storing codeword sequence error patterns.
[0020] Optionally, the post-processing of the error pattern to output the optimal decoding sequence as the decoding result includes:
[0021] Based on the information bit error pattern and the system matrix, the first bit sequence is obtained;
[0022] Based on the codeword sequence error pattern, the second bit sequence is obtained;
[0023] In response to determining that both the first bit sequence and the second bit sequence have passed the verification, a first Euclidean distance is calculated based on the first bit sequence, and a second Euclidean distance is calculated based on the second bit sequence;
[0024] The optimal decoding sequence is determined based on the first Euclidean distance and the second Euclidean distance.
[0025] Optionally, the post-processing of the error pattern to output the optimal decoding sequence as the decoding result includes:
[0026] Based on the information bit error pattern and the system matrix, a first bit sequence is obtained; in response to determining that the first bit sequence passes the check, a first Euclidean distance is calculated based on the first bit sequence;
[0027] Alternatively, a second bit sequence is obtained based on the codeword sequence error pattern; in response to determining that the second bit sequence passes the check, a second Euclidean distance is calculated based on the second bit sequence;
[0028] The optimal decoding sequence is determined based on either the first Euclidean distance or the second Euclidean distance.
[0029] Optionally, the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence further includes:
[0030] The information bit error pattern is removed from the first set to obtain the third set, and the codeword sequence error pattern is removed from the second set to obtain the fourth set;
[0031] The third set and the fourth set are expanded respectively;
[0032] Using the expanded third set as the first set and the expanded fourth set as the second set, return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence until the decoding ends.
[0033] Optionally, the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence further includes:
[0034] The information bit error pattern is removed from the first set to obtain the third set, or the codeword sequence error pattern is removed from the second set to obtain the fourth set;
[0035] The third set or the fourth set is expanded;
[0036] Using the expanded third set as the first set, or the expanded fourth set as the second set, return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence, until the decoding ends.
[0037] For the purposes described above, this application provides a decoding device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the decoding method as described in any of the above embodiments.
[0038] As described above, the decoding method and apparatus provided in this application first preprocess the received sequence and the generator matrix, then guess the error pattern from the information bits and codeword sequence, and finally post-process the guessed error pattern by comparing Euclidean distance based on whether the checksum passes. The optimal decoding sequence is then output as the decoding result. This application reduces the algorithm's complexity while maintaining effective decoding performance. Furthermore, by setting a maximum number of iterations to prevent blind lookups, the number of queries during the decoding process is reduced, effectively lowering the decoding complexity. Attached Figure Description
[0039] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0040] Figure 1 This is a flowchart of a decoding method according to an embodiment of this application;
[0041] Figure 2 This is a flowchart illustrating a decoding method according to an embodiment of the present application, in which a received sequence and a generator matrix are preprocessed to obtain an information hard decision sequence and a codeword hard decision sequence.
[0042] Figure 3 This is a flowchart of a first guessing pattern of a decoding method according to an embodiment of this application;
[0043] Figure 4 This is a flowchart illustrating the second guessing mode of a decoding method according to an embodiment of this application;
[0044] Figure 5 This is a flowchart illustrating the second guessing mode of a decoding method according to an embodiment of this application;
[0045] Figure 6 A flowchart illustrating a third guessing mode of a decoding method according to an embodiment of this application;
[0046] Figure 7 This is a flowchart illustrating a decoding method according to an embodiment of the present application, which involves post-processing the error pattern and outputting the optimal decoding sequence as the decoding result.
[0047] Figure 8 This is a flowchart illustrating a decoding method according to an embodiment of the present application, which involves post-processing the error pattern and outputting the optimal decoding sequence as the decoding result.
[0048] Figure 9 This is a flowchart illustrating a decoding method according to an embodiment of the present application, which involves post-processing the error pattern and outputting the optimal decoding sequence as the decoding result.
[0049] Figure 10 This is a schematic diagram of a decoding device according to an embodiment of this application. Detailed Implementation
[0050] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.
[0051] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0052] Typically, codes approaching the Shannon bound lack efficient decoding algorithms. Even though the Successive Cancellation List (SCL) decoding algorithm can achieve near-ML performance for polar codes decoding Cyclic Redundancy Check (CRC), it requires a large list size, leading to high computational complexity. To achieve ML decoding performance while maintaining the lowest possible decoding complexity, new decoding algorithms and their efficient implementations are needed. In existing technologies, OSD and Guessing Random Additive Noise Decoding (GRAND) have been proposed as candidate general-purpose decoders for URLLC. Both are capable of decoding any linear block code.
[0053] URLLC coding schemes need to meet strict latency and reliability requirements, making short codes with strong error correction capabilities crucial. However, using shorter block codes can reduce communication reliability; at the same code rate, short codes with limited length typically have poorer block error rate performance compared to longer codewords. Therefore, the design of URLLC coding schemes requires a trade-off between block length and reliability.
[0054] OSD (Optical Sequence Decoding) is a soft-decision decoding method for binary linear block codes. Through statistical analysis of the sorted noise, two monotonicities were discovered in the reprocessing step. Decoding consists of two steps: first, hard-decision decoding based on a reliability metric; then, the decoded codewords obtained from the hard decisions are reprocessed until machine learning (ML) performance is achieved. For codes with a length less than 64, OSD decoding has lower complexity. Therefore, it is only suitable for decoding short code lengths, and its complexity increases with higher code rates.
[0055] The GRAND decoding algorithm has many advantages. First, it is an ML (Mechanical, Machine, and Language) decoding algorithm, achieving optimal decoding performance. Furthermore, compared to traditional methods, this scheme ideally becomes more efficient as the codebook rate increases. Calculations show that this scheme effectively balances complexity and error rate. Therefore, GRAND is only suitable for high code rate decoding; at lower code rates, GRAND suffers some performance and complexity loss.
[0056] To address the aforementioned issues, this application proposes a decoding algorithm that satisfies the Joint Guessing Error Pattern Decoding in Information bits and Coded bits (JGEPD) requirement. The main idea is to guess the error pattern separately for the information bits and codeword sequence, hence the name JGEPD. Compared to OSD and GRAND, JGEPD not only improves performance but also significantly reduces decoding complexity.
[0057] The technical solution of this application will be described in detail below with reference to the accompanying drawings.
[0058] Figure 1 This is a flowchart of a decoding method proposed in an embodiment of this application.
[0059] This application embodiment requires the use of some OSD (On-Site Decoding) techniques for processing information bits, by processing the received signal and the generator matrix during the encoding process. After preprocessing, error patterns need to be guessed from the information bits and codeword sequences, followed by post-processing. This application embodiment reduces the algorithm complexity while maintaining the original performance. Detailed steps are as follows... Figure 1 As shown:
[0060] S101: Preprocess the received sequence and the generator matrix to obtain the information hard decision sequence and the codeword hard decision sequence.
[0061] In some embodiments, initialization is required before preprocessing. The maximum number of iterations, b (i.e., the maximum number of queries), is set, and the current number of iterations (i.e., the current number of queries) is set to Query_times. By setting the maximum number of iterations, decoding terminates when the JGEPD decoding algorithm reaches its maximum iteration count. This prevents blind queries, reduces the number of iterations during decoding, and effectively lowers the decoding complexity.
[0062] In this step, the information sequence is generated by matrix G. Encode into codewords After passing through the channel, the channel output is For the received sequence By performing some transformations on the generator matrix G, we obtain the transformed second codeword sequence. And the system matrix G1. Detailed process as follows... Figure 2 As shown:
[0063] S201: Based on the first permutation function, the first codeword sequence and the first matrix are obtained according to the received sequence and the generated matrix, respectively.
[0064] In some embodiments, the received sequence is The first permutation function is λ1, and the first codeword sequence is... The generating matrix is G, and the first matrix G′ = λ1(G). The specific process is as follows:
[0065] Receive sequence Arranged in descending order of reliability, the received sequence The first codeword sequence is obtained after the position in the middle is changed. At the same time, |r1|≥|r2|≥…≥|r N |, Receive sequence Position i in the sequence becomes the first codeword sequence. Position j in 1i This transformation is denoted as the first permutation function λ1.
[0066] The generating matrix G is subjected to a permutation transformation to obtain the first matrix G′=λ1(G). The column order of the matrix is then changed, so that the i-th column in the generating matrix G is transformed into the j-th column in the first matrix G′. i List.
[0067] S202: Based on the second permutation function, obtain the second codeword sequence and the second matrix according to the first codeword sequence and the first matrix respectively.
[0068] In some embodiments, the second permutation function is λ2, the second matrix G″=λ2(G′), and the second codeword sequence The specific process is as follows:
[0069] Transform the first matrix G′ by finding K independent and unrelated columns, starting from its leftmost column, and using these as the first K columns of the second matrix G″. The remaining K columns are then arranged sequentially from left to right. The column order of the matrix is thus transformed. The j-th column in the first matrix G′... 1i The column becomes the j-th column in the second matrix G″. 2i Let this transformation be denoted as the second permutation function λ2.
[0070] The first codeword sequence The first codeword sequence is obtained through the permutation function λ2. The second codeword sequence is obtained after the position is changed. First codeword sequence Position j in 1i Transform into the second codeword sequence Position j in 2i At this point, |v1|≥|v2|≥…≥|v K |and|v K+1 |≥|v K+2 |≥…≥|v N|
[0071] S203: Obtain the system matrix by Gaussian elimination of the second matrix.
[0072] In some embodiments, the system matrix G1 is obtained by Gaussian elimination of the second matrix G″. The specific process is as follows:
[0073] Gaussian elimination is performed on the second matrix G″ using elementary row operations, so that the first K columns of the second matrix G″ are in the form of an identity matrix. The system matrix after Gaussian elimination is denoted as G1.
[0074] S204: After performing hard decision on the second codeword sequence, we obtain the information hard decision sequence.
[0075] In some embodiments, the information hard decision sequence is: The specific process is as follows:
[0076] The second codeword sequence The first K bits are called the most reliable K bits in the sequence, and information is obtained by hard-decision analysis on them. Hard-decision sequence
[0077] S205: Obtain the codeword hard decision sequence based on the information hard decision sequence and the system matrix.
[0078] In some embodiments, the codeword hard decision sequence is: The specific process is as follows:
[0079] Hard decision sequence of information After re-encoding using the system matrix G1, the hard decision sequence of the codeword is obtained. The preprocessing process is complete.
[0080] In some embodiments, the preprocessing process can also be demonstrated by performing statistical analysis on the sorted noise. The code contains only a small number of error information bits. The process of guessing the error pattern of the information bits will reduce the number of possible codewords to be tested. The NK bit changes that are discarded in the hard decision will not significantly affect the decoding performance.
[0081] S102: Guess the error pattern based on the information hard decision sequence and the codeword hard decision sequence.
[0082] By guessing the error pattern from the information bits and codeword sequence, the most likely location of the erroneous bit is found. The guessing process is performed by calculating the Euclidean distance metric, ensuring that the decoding algorithm proceeds in an orderly manner. By guessing the error pattern from the information bits and codeword sequence, the correct codeword sequence can be found in advance, further reducing decoding complexity and ensuring effective decoding performance.
[0083] In some embodiments, there are three guessing modes for guessing error patterns of information bits and codeword sequences: a first guessing mode, a second guessing mode, and a third guessing mode. First, a first set S1 and a second set S2 are defined. The first set S1 is used to store information bit error patterns, and the second set S2 is used to store codeword sequence error patterns. The first set S1 stores at most L1 error patterns, and the second set S2 stores at most L2 error patterns. The information bit error pattern is denoted as... Codeword sequence error pattern notation
[0084] The flowchart for the first guessing mode is as follows: Figure 3 As shown:
[0085] S301: In response to determining that the current iteration number is less than the preset maximum iteration number and is in the first guessing mode.
[0086] In some embodiments, the maximum storage size L1 of the first set S1 is set to 1, the maximum storage size L2 of the second set S2 is set to 1, and the error patterns in the first set S1 and the second set S2 are initialized to a sequence of all zeros. It is determined that the current iteration number Query_times is less than the previously set maximum iteration number b, and the first guessing mode is then performed.
[0087] S302: Guess the information bit error pattern of the first set based on the information hard decision sequence and the second codeword sequence.
[0088] Guessing the erroneous patterns in the first set S1, and combining this with the information obtained during preprocessing, a hard decision sequence is formed. and the second codeword sequence obtained by permutation functions λ1 and λ2 For all erroneous patterns in the first set S1, the information hard decision sequence will be used. Perform bit flipping, and calculate the result after flipping and its relation to the second codeword sequence. Find the sequence e1 that minimizes the Euclidean distance and denote it as the information bit error pattern.
[0089] S303: Guess the codeword sequence error pattern for the second set based on the codeword hard decision sequence and the second codeword sequence.
[0090] The error patterns in the second set S2 are guessed, and the hard decision sequence of the codewords obtained by re-encoding during the preprocessing is combined. and the second codeword sequence obtained by permutation functions λ1 and λ2 For all error patterns in the second set S2, the codeword hard decision sequence will be... Perform bit flipping, and calculate the result after flipping and its relation to the second codeword sequence. Find the sequence e2 that minimizes the Euclidean distance and denote it as the codeword sequence error pattern.
[0091] S304: Remove the information bit error pattern from the first set to obtain the third set, and remove the codeword sequence error pattern from the second set to obtain the fourth set.
[0092] Remove the information bit error pattern e1 from the first set S1 to obtain the third set S3; remove the codeword sequence error pattern e2 from the second set S2 to obtain the fourth set S4.
[0093] S305: Expand the third set and the fourth set respectively.
[0094] The specific process of expanding the third set S3 is as follows:
[0095] 1) Due to the second codeword sequence Arranged in descending order of reliability, the most likely error pattern is therefore guessed to be an information hard-decision sequence. A reverse search is performed on all bits in the information bit error pattern e1. The position with the smallest bit value of 1 and bit index in the pattern is found, denoted as j1. When the information bit error pattern e1 is a sequence of all zeros, the maximum storage size L1 is set to L1+1. The information bit error pattern e1 is modified so that the rightmost bit is set to 1, and this bit is added to the third set S3, completing the expansion of the third set S3. After the expansion is complete, the following post-processing operations are performed.
[0096] 2) If j1 = 1, then stop the expansion of the third set S3. After the expansion is complete, perform the following post-processing operations.
[0097] 3) If j1 > 1, let the maximum storage size L1 = L1 + 2, modify the information bit error pattern e1, set the bit value of bit sequence number j1-1 in the information bit error pattern e1 to 1, and add it to the third set S3; set the bit value of bit sequence number j1 in the modified information bit error pattern e1 to 0, and add it to the third set S3, thus completing the expansion of the third set S3. After the expansion is completed, perform the following post-processing operations.
[0098] The specific process of expanding the fourth set S4 is as follows:
[0099] 1) Due to the second codeword sequence Arranged in descending order of reliability, the most likely error pattern is therefore guessed to be a codeword hard-decision sequence. A reverse search is performed on all bits in the codeword sequence error pattern e2. The position with the smallest bit value of 1 and bit index in the pattern is found, denoted as j2. When the codeword sequence error pattern e2 is an all-zero sequence, the maximum storage size L2 is set to L2 + 1. The codeword sequence error pattern e2 is modified by setting the rightmost bit value of 1 and adding it to the fourth set S4, thus completing the expansion of the fourth set S4. After the expansion is complete, the following post-processing operations are performed.
[0100] 2) If j2 = 1, then stop the expansion of the fourth set S4. After the expansion is complete, perform the following post-processing operations.
[0101] 3) If j2 > 1, let the maximum storage size L2 = L2 + 2, modify the codeword sequence error pattern e2, set the bit value of bit number j2-1 in codeword sequence error pattern e2 to 1, and add it to the fourth set S4; set the bit value of bit number j2 in the modified codeword sequence error pattern e2 to 0, and add it to the fourth set S4, thus completing the expansion of the fourth set S4. After the expansion is completed, perform the following post-processing operations.
[0102] S306: Using the expanded third set as the first set and the expanded fourth set as the second set, return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence until the decoding ends.
[0103] After the expansion is complete, perform the following post-processing operations. After the post-processing is complete, return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence, until the maximum number of iterations is reached, and then end the decoding.
[0104] The flowchart for the second guessing mode is as follows: Figure 4 As shown:
[0105] S401: In response to determining that the current iteration number is less than the preset maximum iteration number and is in the second guessing mode.
[0106] In some embodiments, the maximum storage size L1 of the first set S1 is set to 1, the maximum storage size L2 of the second set S2 is set to 0, and the error patterns in the first set S1 are initialized to a sequence of all zeros. The S set is set to an empty set, and Number is the number of times the error pattern is guessed in the second guessing mode, initialized to 0. If the current iteration count Query_times is less than the previously set maximum iteration count b, the second guessing mode is then initiated.
[0107] S402: Based on a preset number of guesses and a preset empty set, guess the information bit error pattern for the first set according to the information hard decision sequence and the second codeword sequence, and guess the codeword sequence error pattern for the second set according to the codeword hard decision sequence and the second codeword sequence.
[0108] Detailed process as follows Figure 5 As shown:
[0109] S402A: Determine if Number is less than 100.
[0110] In some embodiments, 50 incorrect patterns can be guessed sequentially, with a maximum number of guesses of 100, i.e., the maximum number of guesses is 100. If the number is less than 100, step S402B is performed, i.e., determining whether the number is less than 50.
[0111] S4021: Guess the incorrect patterns e1 and e2 in the first set S1 and the second set S2.
[0112] Guessing the erroneous patterns in the first set S1, and combining this with the information obtained during preprocessing, a hard decision sequence is formed. and the second codeword sequence obtained by permutation functions λ1 and λ2 For all erroneous patterns in the first set S1, the information hard decision sequence will be used. Perform bit flipping, and calculate the result after flipping and its relation to the second codeword sequence. Find the sequence e1 that minimizes the Euclidean distance and denote it as the information bit error pattern.
[0113] The error patterns in the second set S2 are guessed, and the hard decision sequence of the codewords obtained by re-encoding during the preprocessing is combined. and the second codeword sequence obtained by permutation functions λ1 and λ2 For all error patterns in the second set S2, the codeword hard decision sequence will be... Perform bit flipping, and calculate the result after flipping and its relation to the second codeword sequence. Find the sequence e2 that minimizes the Euclidean distance and denote it as the codeword sequence error pattern.
[0114] It should be noted that, since the maximum error pattern storage size L2 in the second set S2 was set to 0 during initialization, the error pattern e2 of the codeword sequence guessed for the second set S2 is 0.
[0115] S4023: The error pattern e1 is converted into a non-systematic form of error pattern e2, which exists in the set S.
[0116] In this step, the information bit error pattern e1 obtained in step S4021 is converted into a non-systematic codeword sequence error pattern e2 (since the codeword sequence error pattern e2 obtained in step S4021 is 0, the converted non-systematic codeword sequence error pattern is directly denoted as e2), and stored in the empty set S set in the initialization setting.
[0117] S4025: Number = Number + 1.
[0118] Change the value of Number so that Number = Number + 1.
[0119] After step S4025 is completed, the process proceeds to remove the error pattern, expand the set, and perform post-processing (the specific processes for removing the error pattern and expanding the set are the same as described above and will not be repeated here). After post-processing, the process returns to re-execute the step of guessing the error pattern. If the second guessing mode is still executed, and 50 guesses of the error pattern have already been performed, then Number is 50.
[0120] Execute S402A if Number is less than 100, then execute S402B if Number is not less than 50, then check S402C if Number is equal to 50.
[0121] If Number equals 50, then execute S4022: merge set S into set S2 and set it to empty.
[0122] In this step, the non-systematic error pattern e2 stored in set S in step S4023 is merged into the second set S2, i.e., S2 = S2∪S. At this time, set S is restored to an empty set due to the transfer of e2.
[0123] S4024: Guess the incorrect patterns e1 and e2 in the first set S1 and the second set S2.
[0124] The specific process of guessing the incorrect pattern is the same as described above, and will not be repeated here.
[0125] S4026: The error pattern e2 is converted into the system form of the error pattern e1, which exists in the set S.
[0126] In this step, the codeword sequence error pattern e2 obtained in step S4024 is converted into the information bit error pattern e1 in the form of a system and stored in the empty set S.
[0127] S4025: Number = Number + 1.
[0128] After step S4025 is completed, the process proceeds to remove error patterns, expand sets, and perform post-processing (the specific processes for removing error patterns and expanding sets are the same as described above and will not be repeated here). After post-processing, the process returns to re-execute the error pattern guessing step. If the second guessing mode is still executed, and more than 50 but less than 100 guesses of error patterns have been performed, then the 50... <Number<100。
[0129] Execute S402A. If Number is less than 100, execute S402B. If Number is not less than 50, then determine S402C: Is Number equal to 50? If Number is not equal to 50, then execute S4024: Guess the incorrect patterns e1 and e2 in the first set S1 and the second set S2. The specific process of guessing the incorrect patterns is the same as described above and will not be repeated here.
[0130] S4026: The error pattern e2 is converted into the system form of the error pattern e1, which exists in the set S.
[0131] In this step, the codeword sequence error pattern e2 obtained in step S4024 is converted into the information bit error pattern e1 in the form of a system and stored in the empty set S.
[0132] S4025: Number = Number + 1.
[0133] After step S4025 is completed, the process proceeds to remove the error pattern, expand the set, and perform post-processing (the specific processes for removing the error pattern and expanding the set are the same as described above and will not be repeated here). After post-processing, the process returns to re-execute the step of guessing the error pattern. If the second guessing mode is still executed, and at this point more than or equal to 100 guesses of the error pattern have been performed, then Number will be no less than 100.
[0134] Execute S402A. If Number is not less than 100, then execute step S4027: merge set S into set S1 and set it to empty set.
[0135] In this step, the error pattern e1 in the system form stored in set S in step S4026 when Number equals 50 and when Number does not equal 50 is merged into the first set S1, that is, S1 = S1∪S. At this time, set S is restored to an empty set due to the transfer of e1.
[0136] Execute S4028: Number = 0. After setting Number to 0, execute S4021: Guess the incorrect patterns e1 and e2 in the first set S1 and the second set S2. The detailed guessing process is the same as described above and will not be repeated here.
[0137] S4023: The error pattern e1 is converted into a non-systematic form of error pattern e2, which exists in the set S.
[0138] In this step, the information bit error pattern e1 obtained in step S4027 is converted into a non-systematic codeword sequence error pattern e2 and stored in the empty set S.
[0139] S4025: Number = Number + 1.
[0140] After step S4025 is completed, the process proceeds to remove the error pattern, expand the set, and perform post-processing (the specific processes for removing the error pattern and expanding the set are the same as described above and will not be repeated here). After post-processing, the process returns to re-execute the step of guessing the error pattern until the maximum number of iterations is reached, at which point the decoding ends.
[0141] The flowchart for the third guessing mode is as follows: Figure 6 As shown:
[0142] S601: In response to determining that the current iteration number is less than the preset maximum iteration number and is in the third guessing mode.
[0143] In some embodiments, the maximum storage size L1 of the first set S1 is set to 1, the maximum storage size L2 of the second set S2 is set to 1, and the error patterns in the first set S1 and the second set S2 are initialized to a sequence of all zeros. It is determined that the current iteration count Query_times is less than the previously set maximum iteration count b, and a third guessing mode is then performed.
[0144] S602: Based on a preset guessing probability, guess the information bit error pattern for the first set according to the information hard decision sequence and the second codeword sequence, or guess the codeword sequence error pattern for the second set according to the codeword hard decision sequence and the second codeword sequence.
[0145] Set a probability to determine whether the error is in guessing the pattern for the information bits or the codeword sequence.
[0146] In some embodiments, the probability is set to 0.1. If the probability is less than 0.1, codeword sequence error pattern guessing is performed; if the probability is greater than 0.1, information bit error pattern guessing is performed.
[0147] If the information bits are guessed incorrectly, then the incorrect patterns in the first set S1 are guessed, combined with the hard decision sequence of information obtained during preprocessing. and the second codeword sequence obtained by permutation functions λ1 and λ2 For all erroneous patterns in the first set S1, the information hard decision sequence will be used. Perform bit flipping, and calculate the result after flipping and its relation to the second codeword sequence. Find the sequence e1 that minimizes the Euclidean distance and denote it as the information bit error pattern.
[0148] If an error pattern is guessed from the codeword sequence, then the error patterns in the second set S2 are guessed, and combined with the hard decision sequence of the codewords obtained by re-encoding during the preprocessing process. and the second codeword sequence obtained by permutation functions λ1 and λ2 For all error patterns in the second set S2, the codeword hard decision sequence will be... Perform bit flipping, and calculate the result after flipping and its relation to the second codeword sequence. Find the sequence e2 that minimizes the Euclidean distance and denote it as the codeword sequence error pattern.
[0149] S603: Remove the information bit error pattern from the first set to obtain a third set, or remove the codeword sequence error pattern from the second set to obtain a fourth set.
[0150] If the result is obtained by guessing the wrong pattern of the information bits, then remove the wrong pattern of the information bits e1 from the first set S1 to obtain the third set S3.
[0151] If the result is obtained by guessing the wrong pattern of the codeword sequence, remove the wrong pattern e2 of the codeword sequence from the second set S2 to obtain the fourth set S4.
[0152] S604: Expand the third set or the fourth set.
[0153] If we are to expand the third set S3, the specific process is as follows:
[0154] 1) Due to the second codeword sequence Arranged in descending order of reliability, the most likely error pattern is therefore guessed to be an information hard-decision sequence. A reverse search is performed on all bits in the information bit error pattern e1. The position with the smallest bit value of 1 and bit index in the pattern is found, denoted as j1. When the information bit error pattern e1 is a sequence of all zeros, the maximum storage size L1 is set to L1+1. The information bit error pattern e1 is modified so that the rightmost bit is set to 1, and this bit is added to the third set S3, completing the expansion of the third set S3. After the expansion is complete, the following post-processing operations are performed.
[0155] 2) If j1 = 1, then stop the expansion of the third set S3. After the expansion is complete, perform the following post-processing operations.
[0156] 3) If j1 > 1, let the maximum storage size L1 = L1 + 2, modify the information bit error pattern e1, set the bit value of bit sequence number j1-1 in the information bit error pattern e1 to 1, and add it to the third set S3; set the bit value of bit sequence number j1 in the modified information bit error pattern e1 to 0, and add it to the third set S3, thus completing the expansion of the third set S3. After the expansion is completed, perform the following post-processing operations.
[0157] If we are to expand the fourth set S4, the specific process is as follows:
[0158] 1) Due to the second codeword sequence Arranged in descending order of reliability, the most likely error pattern is therefore guessed to be a codeword hard-decision sequence. A reverse search is performed on all bits in the codeword sequence error pattern e2. The position with the smallest bit value of 1 and bit index in the pattern is found, denoted as j2. When the codeword sequence error pattern e2 is an all-zero sequence, the maximum storage size L2 is set to L2 + 1. The codeword sequence error pattern e2 is modified by setting the rightmost bit value of 1 and adding it to the fourth set S4, thus completing the expansion of the fourth set S4. After the expansion is complete, the following post-processing operations are performed.
[0159] 2) If j2 = 1, then stop the expansion of the fourth set S4. After the expansion is complete, perform the following post-processing operations.
[0160] 3) If j2 > 1, let the maximum storage size L2 = L2 + 2, modify the codeword sequence error pattern e2, set the bit value of bit number j2-1 in codeword sequence error pattern e2 to 1, and add it to the fourth set S4; set the bit value of bit number j2 in the modified codeword sequence error pattern e2 to 0, and add it to the fourth set S4, thus completing the expansion of the fourth set S4. After the expansion is completed, perform the following post-processing operations.
[0161] S605: Use the expanded third set as the first set, or use the expanded fourth set as the second set, and return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence until the decoding ends.
[0162] After expansion is complete, post-processing is performed. After post-processing is complete, the process returns to guessing the error pattern based on the information hard decision sequence and codeword hard decision sequence until the maximum number of iterations is reached, at which point decoding ends.
[0163] It should be noted that the first, second, and third guessing modes mentioned above are all selected by the user. The core of the information bit guessing error pattern process lies in finding a sequence that allows the flipped sequence to match the second codeword sequence. The first K bits Euclidean distance The smallest error pattern e1, and the extension of the first set S1. The core of guessing the error pattern in the codeword sequence lies in finding a sequence such that the flipped sequence is similar to the second codeword sequence. Euclidean distance The minimum error pattern e2, and the extension of the second set S2. These two steps enable the JGEPD decoding algorithm to find the correct error pattern as early as possible, decode the correct codeword sequence in advance, terminate the decoding algorithm, and reduce the decoding complexity.
[0164] S103: Post-process the error pattern and output the optimal decoding sequence as the decoding result; wherein, the optimal decoding sequence is the decoding sequence that minimizes the Euclidean distance.
[0165] The JGEPD decoding algorithm, after preprocessing and guessing error patterns, obtains a hard decision sequence and an error pattern. In the post-processing, it is necessary to perform a bit flipping step to regenerate the decoding sequence and determine the check relationship or constraint relationship of the new decoding sequence.
[0166] In some embodiments, for information bits, the flipped hard decision sequence of information is denoted as The complete codeword sequence obtained from the system matrix G1 is denoted as the first bit sequence. The modulated sequence is denoted as Calculate its Euclidean distance as the first Euclidean distance. For a hard decision codeword sequence, the reversed hard decision codeword sequence is denoted as the second bit sequence. The modulated sequence is denoted as Calculate its Euclidean distance as the second Euclidean distance. The minimum Euclidean distance during post-processing is This applies to both information bits and codeword sequences. The post-processing for information bits and codeword sequences is the same, as detailed below. Figure 7 As shown:
[0167] S701: Based on the information bit error pattern and the system matrix, the first bit sequence is obtained.
[0168] like Figure 8 As shown, S801: Hard decision sequence of information bits based on the information bit error pattern e1 obtained from the aforementioned error pattern guessing process. Reverse the sequence to obtain the final sequence. The first bit sequence is obtained by re-encoding based on the system matrix G1.
[0169] S702: Obtain the second bit sequence based on the codeword sequence error pattern.
[0170] like Figure 8 As shown, S801: Based on the codeword sequence error pattern e2 obtained from the aforementioned error pattern guessing process, the codeword sequence is hard-determined. Flip the bits to obtain the second bit sequence.
[0171] S703: In response to determining that both the first bit sequence and the second bit sequence have passed the verification, calculate the first Euclidean distance based on the first bit sequence and calculate the second Euclidean distance based on the second bit sequence.
[0172] The first and second bit sequences are then evaluated to determine if they pass a checksum or constraint. The checksum differs depending on the source code: for CRC-concatenated polar codes, the checksum can be determined using frozen bit verification and CRC constraints; for other linear block codes, the decoded sequence can be multiplied by the checksum matrix, and the result can be checked for zero.
[0173] like Figure 8 As shown, S803: If the check relationship or constraint condition is met, then the first bit sequence and the second bit sequence are modulated to obtain the sequence. and sequence S805: Calculate the corresponding first Euclidean distance Second Euclidean distance
[0174] S802: If the verification relationship or constraint fails, return to the step of re-guessing the incorrect pattern.
[0175] S704: Determine the optimal decoding sequence based on the first Euclidean distance and the second Euclidean distance.
[0176] like Figure 8 As shown, S804: Compare the calculated first Euclidean distance. Second Euclidean distance minimum Euclidean distance The size. If Then for the first bit sequence Perform the inverse permutation transformation; if Then for the second bit sequence Perform the inverse permutation transformation. Since we are simultaneously guessing the error pattern of both the information bits and the codeword sequence, when comparing the minimum Euclidean distance, we should find the distance between the first and second Euclidean distances that is less than the minimum Euclidean distance. If we first judge the first Euclidean distance and find it is less than the minimum Euclidean distance, then the first Euclidean distance is the minimum Euclidean distance. Then, we compare the first and second Euclidean distances and find the second Euclidean distance is less than the first Euclidean distance. Therefore, the minimum Euclidean distance is the second Euclidean distance. Perform the inverse permutation transformation on the second bit sequence corresponding to the second Euclidean distance. The S806 inverse permutation transformation process is described below, taking the first bit sequence as an example:
[0177] First, the first bit sequence The middle sequence number is j 2i The position becomes the index j in the new sequence. 1i The position, then the sequence number j in the new sequence. 1i The position becomes the position with index i in the decoding sequence, resulting in the decoding sequence.
[0178] If the second bit sequence is subjected to the inverse permutation transformation, the process is as follows:
[0179] First, the second bit sequence The middle sequence number is j 2i The position becomes the index j in the new sequence. 1i The position, then the sequence number j in the new sequence. 1i The position becomes the position with index i in the decoding sequence, resulting in the decoding sequence.
[0180] It should be noted that, since the final output result is unique when comparing the minimum Euclidean distance, the decoded sequence obtained after the inverse permutation transformation is no longer distinguished.
[0181] The obtained decoding sequence is retained. If a smaller Euclidean distance is obtained in the next iteration, the decoding sequence is updated. In each iteration, if a smaller Euclidean distance is obtained, S808 is executed to obtain the corresponding decoding sequence and update the decoding sequence obtained in the previous iteration. Otherwise, the decoding sequence of this iteration is discarded. This process continues until the maximum number of iterations is reached, and the optimal decoding sequence is output as the decoding result.
[0182] Figure 9 This is a flowchart illustrating a decoding method according to an embodiment of this application, which performs post-processing on the error pattern and outputs the optimal decoding sequence as the decoding result, corresponding to the post-processing process of the third guessing mode.
[0183] S901: Based on the information bit error pattern and the system matrix, a first bit sequence is obtained; in response to determining that the first bit sequence passes the check, a first Euclidean distance is calculated based on the first bit sequence;
[0184] Alternatively, a second bit sequence is obtained based on the codeword sequence error pattern; in response to determining that the second bit sequence passes the check, a second Euclidean distance is calculated based on the second bit sequence.
[0185] The specific process is the same as described above, and will not be repeated here.
[0186] S902: Determine the optimal decoding sequence based on the first Euclidean distance or the second Euclidean distance.
[0187] The specific process is the same as described above, and will not be repeated here.
[0188] It should be noted that if the error pattern is guessed in parallel for both information bits and codeword sequences (i.e., the first and second guessing modes), the two flipped bit sequences need to be processed in parallel, and the total number of queries in the process is Query_times = Query_times + 2. If the error pattern is guessed probabilistically (i.e., the third guessing mode), only the corresponding bit sequence needs to be processed once, and the total number of queries in the process is Query_times = Query_times + 1. This application's embodiment improves the decoding performance of the algorithm by finding the minimum Euclidean distance in codeword sequences that can pass the verification relationship and constraints, resulting in a more accurate output decoded sequence.
[0189] The technical advantages of the decoding method provided in this application are summarized as follows:
[0190] 1) The original OSD has high complexity, and the original GRAND is only suitable for decoding algorithms at high code rates. This application solves this problem by jointly guessing the error pattern from the information bits and codeword sequences, finding the most likely bit positions to err as early as possible. The guessing process is performed by calculating the minimum Euclidean distance, which allows the decoding algorithm to proceed in an orderly manner and effectively reduces the complexity of decoding.
[0191] 2) Set a maximum number of queries so that the decoding process does not guess the wrong pattern more often, thus limiting the number of queries and ensuring the low complexity property.
[0192] 3) This application further judges the decoding sequence by checking the relationship and constraint relationship, which can find the correct decoding result more accurately and improve the decoding performance.
[0193] 4) The JGEPD decoding proposed in this application is applicable not only to any code rate, but also to the decoding of medium-length codes.
[0194] It should be noted that the method in this embodiment can be executed by a single device, such as a computer or server. The method can also be applied in a distributed scenario, where multiple devices cooperate to complete the task. In such a distributed scenario, one of these devices may execute only one or more steps of the method in this embodiment, and the multiple devices will interact with each other to complete the method described.
[0195] It should be noted that the above description describes some embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0196] Based on the same technical concept, corresponding to the methods of any of the above embodiments, this application also provides a decoding device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the decoding method described in any of the above embodiments.
[0197] Figure 10 This embodiment illustrates a more specific hardware structure of an electronic device, which may include a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, memory 1020, input / output interface 1030, and communication interface 1040 are interconnected internally via the bus 1050.
[0198] The processor 1010 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.
[0199] The memory 1020 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.
[0200] The input / output interface 1030 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components within the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touchscreens, microphones, various sensors, etc., while output devices may include displays, speakers, vibrators, indicator lights, etc.
[0201] The communication interface 1040 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).
[0202] Bus 1050 includes a pathway for transmitting information between various components of the device, such as processor 1010, memory 1020, input / output interface 1030, and communication interface 1040.
[0203] It should be noted that although the above-described device only shows the processor 1010, memory 1020, input / output interface 1030, communication interface 1040, and bus 1050, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this specification, and not necessarily all the components shown in the figures.
[0204] The electronic devices described above are used to implement the corresponding decoding methods in any of the foregoing embodiments and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.
[0205] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this application as described above, which are not provided in the details for the sake of brevity.
[0206] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this application, the well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this application, and this also takes into account the fact that the details of the implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this application will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuits) have been set forth to describe exemplary embodiments of this application, it will be apparent to those skilled in the art that the embodiments of this application can be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.
[0207] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.
[0208] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.
Claims
1. A decoding method, characterized in that, include: The received sequence and generator matrix are preprocessed to obtain the information hard decision sequence and the codeword hard decision sequence; Guess the error pattern based on the information hard decision sequence and the codeword hard decision sequence; The error pattern is post-processed to output the optimal decoding sequence as the decoding result; wherein, the optimal decoding sequence is the decoding sequence that minimizes the Euclidean distance.
2. The method according to claim 1, characterized in that, The preprocessing of the received sequence and the generator matrix to obtain the information hard decision sequence and the codeword hard decision sequence includes: Based on the first permutation function, the first codeword sequence and the first matrix are obtained according to the received sequence and the generated matrix, respectively. Based on the second permutation function, the second codeword sequence and the second matrix are obtained according to the first codeword sequence and the first matrix, respectively. The system matrix is obtained by Gaussian elimination of the second matrix. The second codeword sequence is hard-determined to obtain the information hard-determined sequence. The codeword hard decision sequence is obtained based on the information hard decision sequence and the system matrix.
3. The method according to claim 2, characterized in that, The step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence includes: In response to determining that the current iteration number is less than the preset maximum iteration number and is in the first guessing mode, the system guesses the information bit error pattern for the first set based on the information hard decision sequence and the second codeword sequence, and guesses the codeword sequence error pattern for the second set based on the codeword hard decision sequence and the second codeword sequence; wherein, the first set is a set storing information bit error patterns, and the second set is a set storing codeword sequence error patterns.
4. The method according to claim 2, characterized in that, The step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence includes: In response to determining that the current iteration number is less than the preset maximum iteration number and is in the second guessing mode, based on the preset guessing number and the preset empty set, information bit error patterns are guessed for the first set according to the information hard decision sequence and the second codeword sequence, and codeword sequence error patterns are guessed for the second set according to the codeword hard decision sequence and the second codeword sequence; wherein, the first set is a set storing information bit error patterns, and the second set is a set storing codeword sequence error patterns.
5. The method according to claim 2, characterized in that, The step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence includes: In response to determining that the current iteration number is less than the preset maximum iteration number and is in the third guessing mode, based on the preset guessing probability, the information bit error pattern is guessed for the first set according to the information hard decision sequence and the second codeword sequence, or the codeword sequence error pattern is guessed for the second set according to the codeword hard decision sequence and the second codeword sequence; wherein, the first set is a set storing information bit error patterns, and the second set is a set storing codeword sequence error patterns.
6. The method according to claim 3 or 4, characterized in that, The post-processing of the error pattern to output the optimal decoding sequence as the decoding result includes: Based on the information bit error pattern and the system matrix, the first bit sequence is obtained; Based on the codeword sequence error pattern, the second bit sequence is obtained; In response to determining that both the first bit sequence and the second bit sequence have passed the verification, a first Euclidean distance is calculated based on the first bit sequence, and a second Euclidean distance is calculated based on the second bit sequence; The optimal decoding sequence is determined based on the first Euclidean distance and the second Euclidean distance.
7. The method according to claim 5, characterized in that, The post-processing of the error pattern to output the optimal decoding sequence as the decoding result includes: Based on the information bit error pattern and the system matrix, a first bit sequence is obtained; in response to determining that the first bit sequence passes the check, a first Euclidean distance is calculated based on the first bit sequence; Alternatively, a second bit sequence is obtained based on the codeword sequence error pattern; in response to determining that the second bit sequence passes the check, a second Euclidean distance is calculated based on the second bit sequence; The optimal decoding sequence is determined based on either the first Euclidean distance or the second Euclidean distance.
8. The method according to claim 3 or 4, characterized in that, The method of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence further includes: The information bit error pattern is removed from the first set to obtain the third set, and the codeword sequence error pattern is removed from the second set to obtain the fourth set; The third set and the fourth set are expanded respectively; Using the expanded third set as the first set and the expanded fourth set as the second set, return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence until decoding ends.
9. The method according to claim 5, characterized in that, The method of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence further includes: The information bit error pattern is removed from the first set to obtain the third set, or the codeword sequence error pattern is removed from the second set to obtain the fourth set; The third set or the fourth set is expanded; Using the expanded third set as the first set, or the expanded fourth set as the second set, return to the step of guessing the error pattern based on the information hard decision sequence and the codeword hard decision sequence, until decoding ends.
10. A decoding device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1 to 9.