An apparatus and method for handling exceptions

IL293321BActive Publication Date: 2026-08-01ARM LTD
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Patent Information

Application Number
IL293321
Authority / Receiving Office
IL · IL
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-12-11
Filing Date
2020-11-03
Publication Date
2026-08-01
Estimated Expiration
2040-11-03

AI Technical Summary

Technical Problem

Modern systems face challenges in handling exceptions, particularly with untrusted exception handling routines that require access to sensitive data while also dealing with increasing interrupt latency, as existing methods either compromise security or increase latency by relying on software wrappers for state saving and clearing.

Method used

An apparatus and method that utilize exception control circuitry to categorize exception handling routines as trusted or untrusted based on configuration information, selectively saving and restoring data from multiple register subsets to ensure security and reduce latency, with hardware-assisted state saving and clearing to prevent untrusted routines from accessing sensitive data.

Benefits of technology

This approach enables efficient handling of both trusted and untrusted exception handling routines by minimizing interrupt latency and ensuring secure access to sensitive data, maintaining performance for trusted routines while reducing the burden on software wrappers for untrusted routines.

✦ Generated by Eureka AI based on patent content.

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Abstract

An apparatus and method are provided for handling exceptions. The apparatus has processing circuitry operable in at least one security domain to execute program code that includes a plurality of exception handling routines executed in response to corresponding exceptions, and a plurality of registers for storing data for access by the processing circuitry when executing the program code. Exception control circuitry is arranged in response to occurrence of a given exception from background processing to trigger a state saving operation to save data from the plurality of registers before triggering the processing circuitry to execute a given exception handling routine. Configuration storage provides configuration information used to categorise exception handling routines. The exception control circuitry is arranged to determine with reference to the configuration information whether the given exception handling routine is of a first category or a second category within the security domain that the given exception handling routine will be executed in. Then, when triggering the state saving operation, the exception control circuitry triggers saving the data from a first subset of registers when the given exception handling routine is of the first category, but triggers saving the data from both the first subset and the second subset of registers when the given exception handling routine is of the second category. Such an approach can significantly reduce interrupt latency in a system that supports execution of both trusted and untrusted exception handling routines.
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