Detection of R and P waves from the heart signal by calculating signal energy using low-power analog circuits

Abstract

Designing low-power, low-volume circuits for detecting R and P waves from ECG signals is essential to minimize damage to body tissues in implantable and wearable devices. An efficient algorithm for accurate detection of R waves is signal energy calculation. This algorithm is implemented simultaneously with a P wave detection algorithm. The R wave detection algorithm was evaluated with data from the MIT-BIH and QT standard arrhythmia databases, and acceptable detection error rates of 1.49% and 0.38% were obtained, respectively. A detection error rate of 0.91% was also obtained in the evaluation of the P-wave detection algorithm on the QT database. The main part of the proposed algorithms is implemented in the analog domain with transistors operating in the subthreshold region, resulting in very low power consumption. The proposed circuit is implemented in 0.18μm CMOS technology with a 1.8V power supply. Using this circuit, there is no need to use an analog-to-digital converter in the detector system, which can lead to a reduction in power consumption and footprint. This circuit, with a power consumption of 102.64 nanowatts and an area of ​​0.07 square millimeters, is very suitable for use in wearable and implantable applications.

Description

Description of the invention Title of the invention Detection of R and P waves from the heart signal by calculating signal energy using low-power analog circuits Technical background of the relevant invention This invention relates to the field of heart wave detection. Technical problem and statement of invention objectives According to the World Health Organization, heart disorders are one of the leading causes of death worldwide. A heart disease can occur suddenly or persist for a long time due to heart abnormalities. Therefore, the use of non-invasive methods for analyzing electrocardiograms (ECG) has been widely studied for the diagnosis of various cardiac arrhythmias. Because, most of the useful information in the ECG signal can be obtained from the intervals, amplitudes or times of occurrence of ECG waves. For this reason, various tools and methods have been invented to examine how the heart functions in modern medicine, including recording and analyzing the electrical activity of the heart, examining the behavior and imaging of the heart anatomy with ultrasound waves, imaging the heart using MRI, angiography using X-ray imaging, and ... The goal of all these methods is to obtain different types of structural and functional information from the heart.In a way that with their help, the specialist doctor not only has the ability to diagnose the type of heart disease, but also can predict and prevent the occurrence of possible heart failure in the future. In general, monitoring the electrical activity of the heart, one of the most widely used signals for assessing the risk of cardiovascular diseases, is very vital. Also, for analyzing long-term ECG recordings, for example, in the case of monitoring hospitalized patients or monitoring patients using wearable devices, manual examination beat by beat is tedious and time-consuming, and rapid diagnosis is also difficult for novice doctors at the present time. Therefore, doctors usually use computer methods to analyze the ECG signal. The importance of controlling the heart signal in heart patients is well-known, and therefore the design and manufacture of devices and equipment to control this signal and how it works has always been the focus of researchers. QRS complex detection has many applications, because an accurate QRS detector is the most important part of the tools and methods related to examining how the heart works.QRS complex detection is a difficult task because the changes in the QRS complex are not only caused by physiological changes, but also by various noises such as muscle noise, noise caused by electrode displacement, feed line noise, and noise resulting from the similarity of T wave characteristics to the QRS complex at high frequencies. An important goal in QRS complex detection algorithms is to reduce noise and interference, which will also increase the signal-to-noise ratio. As we know, the ECG signal has a very small amplitude, usually between 0.05 and 5 mV, and a low operating frequency of 0.05 to 100 Hz, which makes it very sensitive to various types of noise, namely power line noise, baseline drift, electrode movement artifact, electrocardiographic artifact, muscle artifact, and equipment noise, and its quality can be quickly affected by various noises. The amplitude of the P wave peaks and their boundaries, which are corrupted by noise, are larger compared to the R wave peaks, and the P wave is very difficult to detect.Some methods for noise removal such as wavelet filters, empirical mode decompositions, etc. are available, which are digital processing methods and require analog-to-digital converters. Analog-to-digital converters usually require extensive operations that increase the power consumption and the total system footprint of digital algorithms and, as a result, are not suitable for monitoring ECG performance. In general, ECG monitoring systems generate a huge amount of data over a long period of time, which requires large memories. On the other hand, these devices require a minimum size and power consumption. In implantable systems, the power consumption must be low enough to avoid excessive heat generation that can damage tissue by using low supply voltages and to operate for a long time. In general, digital methods have high accuracy and speed, but they have complex calculations, thus consuming a lot of power and cost.An efficient proposal to reduce power consumption is to shift the QRS feature extraction function to the analog domain, which greatly reduces the system power consumption by reducing the complexity of digital signal processing calculations. Therefore, the P and R peak detection algorithm for detecting many arrhythmias is implemented using current-mode analog circuits with transistors operating in the subthreshold region to reduce power consumption and chip footprint. A description of the state of the prior art and the history of developments related to the claimed invention. By visiting the Intellectual Property Center website and searching the registered patent bank, a number of patents have been registered on the subject so far. In one of these patents, registration number 107974 in 1400, entitled "Calculation and interpretation of cardiac complex waves using electrocardiogram images of the heart", it describes a structure that measures and interprets cardiac waves using a calculation and interpretation system. The measurement of time variables, height or amplitude and area of ​​cardiac complex waves in the ECG in this invention is performed simultaneously, and scanned ECG images are used in this invention. In an electrocardiogram wave examination system, the calculator and interpretation system, which is the main part of the system for performing calculations, is launched. This system includes functional and operational codes and is responsible for calculating and analyzing information. In the next step, it opens the input scanned image from the storage section of the electrocardiogram wave examination system in the launched processor and calculator system.The scanned image and the electrocardiogram waves of the image are now ready for examination, area calculation and analysis. The processor and analyzer section, which consists of operational and application codes for calculation and analysis, determines the coordinates of the specified points in milliseconds. The measured coordinates are displayed on the display and the user is informed of them. This analysis is based on calculation through formulas and on a range of numbers that have been previously entered in this section as desired numbers. These formulas and the range of numbers are the basis for comparison and then interpretation. The interpretation made based on the comparison can also be displayed. In one embodiment of this invention, the discrepancy with the desired ranges can be seen in the form of a message notification on the display. In another invention, registered number 39892 in 2006, entitled "Construction of a heart signal analyzer with signal processing capability and presentation of various arrhythmias", tools such as weighted correlation coefficient and adaptive functions were used to extract heart signal parameters, which initially identified the QRS complex and then identified the P and T waves. In this structure, an amplifier and high-pass and low-pass filters were used to reduce noise and distortions, as well as an analog-to-digital converter. In another invention, registered number 33955 in 2005, entitled "Portable Heartbeat Detection Device with the Ability to Notify the Patient's Acute Condition via Telephone Line to Medical Centers," he introduced a structure that receives heart beats and calculates their number per minute, and if it is more or less than a defined threshold, the device sounds an alarm. This structure uses a microcontroller that waits for a pulse from the decoder and if it does not detect a pulse after four seconds, it sounds a cardiac arrest alarm. In the next patent, registered number 42504 in 2007, entitled "Heartbeat Detection and Counting Device from the Palm of the Hand", a structure using amplifiers, high-pass and low-pass filters, and a digital detector has been implemented, in which the heart signal is amplified again after passing through the filters to the extent that it can be converted into a digital signal. Then, the digital detector converts the amplified signal into logical zeros and ones so that it can be processed and counted by the microcontroller. Inside the microcontroller, a digital filter is embedded that distinguishes the pulse from the noise and, in general, the pulses are counted in the microcontroller. Providing a solution to an existing technical problem along with an accurate, sufficient, and integrated description of the invention In this invention, proposed algorithms for R-peak and P-peak detection are introduced. These algorithms are built with simple blocks, most of which can be implemented in the analog domain with very low power consumption. Figure (1) shows the flowchart of the algorithms. The raw ECG signal is first passed through a low-pass filter (LPF) with a cutoff frequency of 20 Hz to remove high frequency noise. This filtered signal is applied to both R-peak and P-peak detection paths. In the R peak detection path, the filtered signal is passed through a differentiator, a rectifier, and a squaring. The differentiator (Diff) removes low frequency noise. Since the SQR block only processes one-way currents, a rectifier (REC) block is used before the SQR. This process makes the R peaks more prominent among other waveforms, as shown in Figure (2). In this figure, the performance of the R peak detector is shown using a 100-band QT database. In order to create a suitable threshold that follows the changes in the R peak amplitudes and the baseline drift, the output signal of the SQR block (ISQR) is passed through another LPF (LPFR) with a bandwidth of 0.2 Hz. This signal is scaled by a factor of K = 8 and used as the R peak threshold (ITHR). Then ISQR is compared with ITHR. As shown in Figure (3), when ISQR is greater than ITHR, an R peak is detected. If the distance between this peak and the last detected R peak is greater than the predefined distance of 180 ms, it is identified as an R peak.In parallel with the R peak detection algorithm, the P peak detection algorithm is executed, as shown in Figure (1). The output signal of the first LPF (VLPF) is passed through another LPF with a cutoff frequency of 2 Hz (LPFP). The output of this filter (VLPFP) is used as a threshold for detecting P waves. For this purpose, the VLPF is compared with the VLPFP and whenever the VLPF is greater than the VLPFP, the signal (PD-EN) is activated, as shown in Figure (3). Since P peaks are broad waves with large width, the exact location of the P peaks is determined using the peak detector circuit. The PD-EN signal is applied as an enable signal to the peak detector. The peaks of the VLPF signal in the active parts of the PD-EN signal are indicated as the falling edge of the peak detector output signal (Peak-Flag). A detected peak is considered a P peak when it occurs within a specific time interval, 80 ms to 320 ms, before an R peak. Therefore, the time interval between the P peak and the next R peak must be calculated and stored.This is done by using a timer to store the time intervals between the last peaks. Whenever an R peak is detected, these time intervals are used to find the location of the P peak corresponding to this beat. As will be shown in the following section, the analog ECG signal is directly used in the proposed R-peak and P-peak algorithms, and no analog-to-digital converter is used in the proposed system. Also, all the building blocks are implemented using a small number of transistors that operate mostly in the subthreshold region. This leads to a significant reduction in the system footprint and power consumption. - System circuit implementation The various block schematics of the R and P peak detection circuits are shown in Figure (4). As mentioned earlier, an LPF is used to filter the ECG signal initially. This filter is implemented using the RC structure shown in Figure 5(b). The cutoff frequency of 20 Hz is implemented using a quasi-resistor (RF) with transistors of minimal dimensions and a MIM capacitor (CF) of 71 femtofarad. The output voltage of this filter is buffered before being applied to the next stages. The amplifier (OTA) structure is shown in Figure 6(a). The filtered ECG signal (VLPF) is applied to the P and R peak detection circuits as shown in Figure (4). Reducing power consumption is a major issue in the design of implantable devices to reduce tissue damage. Therefore, the R peak detection circuit is implemented entirely in the current-mode analog domain. For this purpose, the VLPF is passed through a 54 femtofarad MIM capacitor. The current through the capacitor is proportional to the derivative of the input voltage signal.The capacitor value is chosen to provide a current of 1 nanoampere based on the minimum slope of the QRS complexes in the selected database. The current then passes through the rectifier. The rectifier structure is shown in Figure 6(b). This block contains an OTA in a negative feedback loop that fixes the rectifier input node to VREF = 900mV. The rectifier circuit is a class B current mirror consisting of a negative current path (M1R, M3R, and M5R) and a positive current path (M2R, M4R, and M6R). The direction of the current provided by M6R is changed using the current mirror (M7R, M8R), and finally the currents passing through both paths are mirrored at a node to produce a single-path current. As seen in Figure 6(a) and Figure 6(b), the gates of the rectifier input transistors (M1R and M2R) are connected to the OTA output transistors (M6A and M8A), respectively.These two outputs (VOUT1 and VOUT2) are used to bias M1R and M2R at the turn-on threshold, when the input current is zero, to avoid ignoring the low-amplitude currents in the typical class B current mirror, as they are quite important in low-current systems. It is worth noting that all the transistors in this structure are designed in the subthreshold region. The unidirectional current (IREC) is applied to the current squaring circuit. As mentioned earlier, the rectifier prepares the signal for the current squaring circuit, as seen in Figure (4), which can only process unidirectional signals. The schematic of the current squaring circuit is shown in Figure 6(c). This circuit is based on a translinear loop on transistors M1S to M4S where applying KVL leads to VGS2S + VGS1S = VGS3S + VGS4S. And the equation between the currents in the subthreshold region can be obtained as follows:. Where IBIAS2 is taken equal to 90 picoamperes and as you know, the current relationship of MOS transistors in the subthreshold region is, where Vt= 25.9mV is the thermal voltage, n=1.33 is a constant parameter, W and L are the width and length of the transistor and Vth and VGS are the threshold and gate-source voltage of the transistor respectively and I0 is defined as I0=2nµCOX where μ is the carrier mobility and Cox is the gate-oxide capacitance of the transistor. Next, ISQR1 is applied to LPFR and ISQR2 is used to compare with the threshold current and detect the peaks of R. (2) For a cutoff frequency of 200 MHz, the value of CLPFR is calculated as CLPFR = 24 pF. Applying a bias voltage of 900 mV to the gates of M3L and M4L can reduce the drain voltage of M5L and M6L to 580 mV. This limits the current through the transistors and therefore a low IBIAS3 can be used. A bias voltage of 400 mV is also applied to the sources of M5L and M6L, which also reduces the current through these transistors. As can be seen in Figure 7(d), the output current of this LPF (ILPFR) is scaled by a factor (K = 8) through the current mirror of M9L and M10L, which creates the threshold current (ITHR). ITHR is subtracted from the output current of the current squaring block (ISQR2). As shown in Figure 6, the resulting current is applied to an inverter to generate the required pulse shape as the output signal. In addition, a 4-bit binary timer with a clock frequency of 25 Hz is also used to limit the minimum allowable time interval between consecutive QRS complexes. This increases the accuracy of R-peak detection. In the P-peak detection section, the VLPF signal passes through the LPFP with a cutoff frequency of 2 Hz. The structure of this filter is shown in Figure 5(c) which is implemented using two pseudo resistors (RFP) and a MIM capacitor (CFP) of 356 femtofarads, the value of 2 Hz. The length of the pseudo resistors is 10 μm with a minimum width of 220 nm to reduce the cutoff frequency to 2 Hz. Since the LPFP has a gain of 2, the VLPF is also amplified before being compared with the VLPFP with a gain of 2 (VLPF-A). For this purpose, an open-loop OTA is used as a comparator. Two inverters are used at the output of the OTA to correctly shape the output pulses and generate the PD-EN signal, which has the role of activating the peak detector circuit. Figure (7) shows the schematic of the peak detector circuit. This circuit is able to extract two main features of the positive peak of the signal, which are time and amplitude. The circuit has two inputs: PD-EN which is the enabler of the circuit and VLPF-A which is the signal whose peaks are to be detected. If PD-EN = 0 '', the circuit is off and the VH node is connected to VREF = 900mV through transistor M4P.As shown in Figure 7(a), it charges the capacitor CH to VREF. Also, the comparator used in this circuit is disabled in this condition to save power consumption. The schematic of the comparator is shown in Figure 7(b). Whenever PD-EN = 1'', the circuit is enabled, by which VH is disconnected from VREF and transistor M3P is turned on. The comparator is also enabled in this condition. If VLPF is greater than VH, the comparator output voltage (VCMP) is reduced and transistor M1P is also turned on. The current provided by M1P charges the capacitor CH and increases VH. As shown in Figure 7(c), as VLPF-A increases, VH follows the changes of VLPF-A, but when VLPF-A decreases from VH, VCMP reaches zero and transistor M1P turns off. The peak moment is indicated by the falling edge of the Peak-Flag signal. This signal is constructed using the VCMP and PD-EN signals as shown in Figure 7(a). The peak amplitude is also stored in CH.While the amplitude of the peaks is not used in this work, the amplitude of the detected P or R peaks can be used for other ECG signal processing if necessary. -Simulation results of the proposed algorithm This invention has been evaluated using the first lead data of the MIT-BIH standard arrhythmia database and the QT database, and the four main criteria examined are defined as follows: (3) (4) (5) Where the parameters: Se is the sensitivity, PP is the positive prediction and DER is the detection error rate calculated from the number of true positives (TP), false negatives (FN) and false positives (FP). The values ​​obtained from our algorithm are shown in Table 1, where in the detection of the P peak using the QT database, we achieved values ​​of 99.22%, 99.88% and 0.91% for Se, PP and DER, respectively, and using the same database, we achieved values ​​of 99.84%, 99.78% and 0.38% for Se, PP and DER, respectively, in the detection of the R peak. In addition, the results using the MIT-BIH arrhythmia database for the detection of the R peak are as follows: 98.93%, 99.58% and 1.49% for Se, PP and DER, respectively. As can be seen in Table 1, our method is quite suitable for wearable and implantable devices. The performance of the proposed algorithm on different signals with arrhythmias and conditions with different noise amplitudes is shown in Figure 8 and as can be seen, the algorithm performed well. The proposed R and P peak detection circuits are implemented in 180nm CMOS technology using a supply voltage of 1.8 V. The simulation results of each block and the power consumption at different process corners on a 100 QT database tape are reported in Table 2. As can be seen in Figure 9, the occupied silicon area is about 0.07 mm2. This circuit has low power consumption and small footprint, and can also be used in both wearable devices at 27 °C and implantable systems at 37 °C. As can be seen in Figure 10, the waveforms of the different parts of the R peak detection are shown, including the ECG signal, LPF output, derivative current, rectifier, comparison of threshold current with squaring circuit current, timer output, and detected R peak. The waveform of the P-peak detector is also shown in Figure 11, which includes the ECG signal, LPF output, LPFP output and its comparison with the amplified LPF output, PD-EN signal, and the peak extractor output (Peak-Flag).Finally, as can be seen, the power consumption and volume occupied by our proposed algorithm are the most suitable for detecting both R peaks and P peaks, while having quite acceptable accuracy. Explanation of shapes, maps and diagrams Figure (1) Flowchart of the proposed R and P peak detection algorithms. Figure (2) Performance of R peak detector blocks. Figure (3) Performance of P-peak detector blocks. Figure (4) Block diagram of R and P peak detection. Figure (5) Structure of (a) quasi-resistor, (b) low-pass filter (LPF), and (c) P-wave detection low-pass filter. Figure (6) Structure of (a) amplifier, (b) rectifier, (c) squaring circuit, and (d) low-pass filter in the R peak detection circuit. Figure (7) (a) Structure of the peak detector circuit, (b) comparator, and (c) waveform of the peak detector circuit. Figure (8) shows the performance of the proposed algorithm on the QT database and the MIT-BIH arrhythmia database. Figure (9) System layout plan. Figure (10) Waveforms of the R peak detector circuit. Figure (11) Waveforms of the P-peak detector circuit. Table (1) Performance evaluation of the proposed algorithm. Table (2) Evaluation of the power consumption of the proposed algorithm in different corners of the process. A clear and precise statement of the advantages of the claimed invention over prior inventions. Various types of heart wave detectors have been implemented so far, but their implementation has been in the digital domain. Therefore, analog-to-digital converters have been used in their structure. These methods have complex calculations, and therefore consume a lot of power and cost. The proposed structure is implemented in the analog domain and all the circuit blocks are designed in the subthreshold region. Therefore, with high accuracy, it greatly reduces the power consumption of the system by reducing the complexity of the calculations. Also, reducing the power consumption and occupied volume reduces the possibility of tissue damage in implantable applications. As a result, they are very suitable for detecting P and R waves in wearable and implantable cardiac devices and can also be combined with digital systems to extract more features of the ECG signal. Description of at least one implementation method for implementing the invention This invention can be used in wearable and implantable applications and has low power consumption. Therefore, it can be used to detect the P and R peaks in cardiac equipment and, if necessary, combined with digital processors to extract ECG signal features. Therefore, the patient can be aware of the status of his heart function without visiting a doctor and share his heart symptoms and behaviors with the doctor. Also, in patients with heart diseases, especially atrial arrhythmias such as atrial flutter, atrial fibrillation, etc., the doctor treating the person can remotely and whenever needed check the time and amplitude of the P and R waves. Explicit mention of the industrial application of the invention The layout of this circuit has been drawn and can be implemented as an integrated circuit. Conventional technologies have been used in the implementation and no special technology has been used. Due to the special design with low power consumption and small footprint, it causes minimal damage to body tissues and can attract a lot of attention.

Claims

Claim What is claimed: Claim 1) A P-wave and R-wave detection system from an ECG signal has been implemented in the analog domain with a power consumption of 102.64 nanowatts and an occupied area of ​​0.07 square millimeters. Claim 2) According to claim 1, the raw ECG signal is passed through a low-pass filter with a cutoff frequency of 20 Hz to remove high frequency noise. This filtered signal is used for both R-wave and P-wave detection paths. Claim 3) According to claims 1 and 2, the filtered signal is passed through the differentiator, rectifier, squaring and low-pass filter blocks with a cut-off frequency of 200 MHz. Then, by comparing the output of the squaring circuit and the low-pass filter, the probable location of the R peak is determined. If the distance between this probable peak and the last detected R peak is more than 180 milliseconds, the probable peak is detected as the R peak. Claim 4) According to claims 1 and 2, in parallel with the R peak detection algorithm, the P peak detection algorithm is executed. In the P peak detection path, a low-pass filter, a peak detector circuit and a counter are used. The output signal of the first low-pass filter is passed through another low-pass filter with a cutoff frequency of 2 Hz, and by comparing the outputs of these two low-pass filters, the possible range of the P wave is determined, which is used to activate the peak detector circuit. Finally, a detected peak is considered a P peak when it occurs within a time interval of 80 milliseconds to 320 milliseconds before the R peak.

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