Packaging substrate and method for manufacturing the same

Abstract

The present invention provides a packaging substrate in which elements are arranged inside the substrate, thereby improving thermal stability, and a method for manufacturing the same. [Solution] The packaging substrate 900 includes a glass core 10 including a glass plate and a cavity placed in the glass plate, a first element module 41 placed in the cavity, an upper layer 20 placed on the glass core and including rewiring, and a lower layer 40 placed below the glass core and including rewiring. The upper layer includes an electrically conductive layer placed on the upper surface of the glass core, and the lower layer further includes a module bottom metal layer 500, the module bottom metal layer covering 60% or more of the area of ​​one side of the first element placed in the first element module, and the module bottom metal layer being exposed on the lower surface of the lower layer. The packaging substrate has a cavity and a heat-dissipating metal layer that are thin, stable, and allow for efficient spatial arrangement, with a low risk of parasitic element generation.

Description

Technical Field

[0001] The embodiment relates to a packaging substrate in which elements are arranged inside and the thermal stability is improved, and a method for manufacturing the same.

Background Art

[0002] In the manufacturing process for electronic components, the front-end (FE) process can implement circuits on a semiconductor wafer, and the back-end (BE) process can assemble the wafer into a state where it can be used in an actual product. The packaging process may be included in the back-end process.

[0003] The four core technologies of the semiconductor industry that have enabled the remarkable development of recent electronic products are semiconductor technology, semiconductor packaging technology, semiconductor manufacturing technology, and software technology.

[0004] Semiconductor technology has developed in various fields such as sub-micron nanoscale line widths, over 10 million cells, high-speed operation, and heat dissipation. However, complete packaging technology has not been supported. Therefore, the electrical performance of a semiconductor may be determined not only by the performance of the semiconductor technology itself but also by the packaging technology and the electrical connections thereby.

[0005] Related prior arts include Korean Registered Patent No. 10-2216506, Korean Published Patent No. 10-2015-0024643, etc.

Summary of the Invention

Problems to be Solved by the Invention

[0006] An object of the embodiment is to provide a packaging substrate in which elements are arranged inside the substrate and the thermal stability is improved, and a method for manufacturing the same.

[0007] The objective of this embodiment is to provide a packaging substrate having a cavity and a heat-dissipating metal layer that are stable, thin, and allow for efficient spatial arrangement, while minimizing the risk of parasitic element generation, and a method for manufacturing the same. [Means for solving the problem]

[0008] This summary is provided to illustrate some of the simplified forms of the concepts, which are described in more detail in the detailed explanation below. This summary is not intended to distinguish the primary or core features claimed as rights, nor is it intended to be used to help determine the scope of the claimed rights.

[0009] To achieve the above objective, a packaging substrate according to one embodiment includes a glass core including a glass plate and a cavity disposed in the glass plate, a first element module disposed in the cavity, an upper layer disposed on the glass core and including redistribution wiring, and a lower layer disposed below the glass core and including redistribution wiring.

[0010] The upper layer includes an electrically conductive layer disposed on the upper surface of the glass core.

[0011] The lower layer further includes a module bottom metal layer, which is a metal layer disposed on the lower surface of the first element module.

[0012] The metal layer on the underside of the module can cover 60% or more of the surface area of ​​one side of the first element arranged in the first element module.

[0013] The metal layer on the underside of the module can be exposed on the underside of the lower layer.

[0014] The lower metal layer of the module can have one end in contact with the first element and the other end exposed on the surface of the lower layer.

[0015] A dispensing layer may be placed between the first element module and the side surface of the cavity.

[0016] The dispensing layer may include an insulating organic material or an organic-inorganic composite material.

[0017] The cavity may further include a second element module.

[0018] At least one power transfer element may be placed within the second element module.

[0019] A redistribution layer may be placed on the upper or lower surface of the second element module.

[0020] A second element module may be further arranged within the cavity.

[0021] Two or more power transfer elements may be arranged within the second element module.

[0022] The power transmission element may be molded with an insulating material.

[0023] The second element module may further include through electrodes positioned in the molding above or below the power transmission element.

[0024] A method for manufacturing a packaging substrate according to another embodiment includes a preparation step of placing an adhesive layer on the lower surface of a glass core on which a cavity and a core conductive layer are arranged; an element placement step of placing one or more element modules in the cavity; a dispensing step of placing a dispensing layer inside the cavity; an upper layer formation step of placing an upper layer on the upper part of the glass core; and a lower layer formation step of removing the adhesive layer on the lower surface of the glass core and placing a lower layer on the lower part of the glass core.

[0025] The aforementioned cavity may be a through-hole cavity.

[0026] The core conductive layer may be an electrically conductive pattern disposed on the surface of the glass core.

[0027] The upper layer may include redistribution lines disposed on the upper surface of the glass core.

[0028] The lower layer may further include a module bottom metal layer which is a metal layer disposed on the lower surface of the first element module.

[0029] The module bottom metal layer may be a metal layer disposed on the lower surface of the element module.

[0030] One end of the module bottom metal layer may cover 60% or more of the area of one surface of the first element disposed in the element module, and the other end may be exposed on the lower surface of the lower layer.

[0031] In the step of forming the lower layer, the lower layer may be disposed in a state where the upper and lower portions of the glass core are inverted.

[0032] The step of forming the lower layer may include a process of disposing an insulating layer on the lower portion of the glass core from which the adhesive layer has been removed, a process in which the region where the module bottom metal layer is disposed is the region of the bottom insulating layer cavity, and the insulating layer in the region of the bottom insulating layer cavity is selectively removed, a process of forming a seed layer in the region of the bottom insulating layer cavity, and a process of disposing a copper paste or a copper block in the region of the bottom insulating layer cavity.

[0033] The module bottom metal layer may have a thickness of 10 μm to 100 μm.

Advantages of the Invention

[0034] The packaging substrate and its manufacturing method according to the embodiment can provide a packaging substrate in which elements are disposed inside the substrate and the thermal stability is improved, and its manufacturing method.

[0035] The embodiment of the packaging substrate and its manufacturing method can provide a packaging substrate that is thin, stable, and has a cavity and heat-dissipating metal layer that allows for efficient spatial arrangement, while minimizing the risk of parasitic element generation, and a method for manufacturing the same. [Brief explanation of the drawing]

[0036] [Figure 1A] This is a conceptual diagram illustrating, in cross-section, the configuration in which elements are mounted on a packaging substrate, as shown in the concrete example. [Figure 1B] This is a conceptual diagram illustrating the form of a package substrate before the elements are mounted, as shown in cross-section, in the case of a real-world example. [Figure 2] This is a conceptual diagram illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. [Figure 3] This is a conceptual diagram illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. [Figure 4] This is a conceptual diagram illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. [Figure 5] This is a conceptual diagram illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. [Figure 6] This is a conceptual diagram illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. [Figure 7] This is a conceptual diagram illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. [Figure 8] This is a conceptual diagram illustrating the sequence of steps in a manufacturing method for a packaging substrate according to an embodiment, shown in cross-section. In the overall diagram and detailed description, the same reference numerals may refer to the same or similar components. The diagram may not reflect scale, and the relative sizes, proportions, and depictions of components in the diagram may be exaggerated for clarity, illustrative purposes, and convenience. [Best Mode for Carrying Out the Invention]

[0037] The following detailed descriptions are provided to help you understand the methods, apparatus and / or systems described herein comprehensively. However, after understanding the disclosures of this application, various changes, modifications and equivalents of the methods, apparatus and / or systems described herein will become apparent. For example, the work sequences described herein are merely illustrative and are not limited to the work explicitly stated herein, but are modifiable as will become apparent after understanding the disclosures of this application, except for work that is not necessarily performed in a specific order. Furthermore, after understanding the disclosures of this application, descriptions of known features may be omitted for clarity and brevity, and the omission of features and their descriptions does not imply that they are considered common knowledge.

[0038] The features described herein can be embodied in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein are provided merely to illustrate some of the many possible ways of embodying the methods, apparatus and / or systems described herein, which will become apparent after understanding the disclosure of this application.

[0039] Terms such as “first,” “second,” and “third” are available herein to describe various components, regions, layers, or sections, but such components, regions, layers, or sections are not limited by such terms. Rather, these terms are used to distinguish one member, part, region, layer, or section from other members, parts, regions, layers, or sections. Accordingly, a first member, part, region, layer, or section referred to in the examples described herein may be called a second member, part, region, layer, or section without departing from the teachings of the examples.

[0040] Throughout this specification, when an element such as a layer, region, or substrate is described as being "on top of," "connected to," or "joined" another element, it means that it is directly "on top of," "connected to," or "joined" the other element, or that one or more other elements may be interposed between them. Conversely, when an element is described as being "directly on top of," "directly connected to," or "directly joined to," no other elements may be interposed between them. Similarly, expressions such as "between" and "directly between" and "indirectly introduced" and "directly introduced" may be interpreted as described above.

[0041] The terms used herein are used solely for the purpose of illustrating specific examples and are not used to limit this disclosure. The singular forms “a,” “an,” and “the” as used herein may include plural forms unless the context clearly indicates otherwise. The terms “and / or” as used herein include one or more combinations of the listed items. The terms “include,” “comprise,” and “have” as used herein indicate the presence of an expressed feature, number, operation, element, component, and / or combination thereof, but do not exclude the presence or addition of one or more other features, numbers, operations, elements, components, and / or combinations thereof. In relation to examples (e.g., in relation to what an example or example includes or can embody), the use of the term “may” herein means that there is at least one example or example in which such features are included or embodyed, but not all examples are limited thereto.

[0042] Throughout this specification, “B being positioned on A” means that B is positioned in direct contact with A or on A with other layers or structures interposed between them, and is not limited to B being positioned in direct contact with A. Unless otherwise defined, all terms used in this document have the same meaning as that generally understood by an ordinary technician in the art relating to this document, given an understanding of this document, and this is consistent thereafter.

[0043] Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and this disclosure, and not as an ideal or overly formal meaning unless expressly defined herein.

[0044] Figure 1A is a conceptual diagram illustrating in cross-section the form in which the elements are mounted on the packaging substrate according to the embodiment, and Figure 1B is a conceptual diagram illustrating in cross-section the form before the elements are mounted on the packaging substrate according to the embodiment. Figures 2 to 8 are conceptual diagrams illustrating in cross-section the sequence of the manufacturing method of the packaging substrate according to the embodiment. The embodiment will be described in more detail with reference to the above drawings.

[0045] To achieve the above objective, a packaging substrate 900 according to one embodiment of the embodiment includes: a glass core 10 including a glass plate and a cavity 12 disposed in the glass plate; a first element module 41 disposed in the cavity 12; an upper layer 20 disposed on the glass core 10 and including redistribution wiring; and a lower layer 40 disposed below the glass core 10 and including redistribution wiring.

[0046] The glass core 10 is preferably made of plate glass used in semiconductors, and may, but is not limited to, borosilicate plate glass or alkali-free plate glass.

[0047] The glass core 10 may have through-type core vias 14 that penetrate the glass plate in the thickness direction, and / or cavities that penetrate the glass plate in the thickness direction or form recessed surfaces. Through electrodes may be formed in the core vias 14 to enable the transmission of electrical signals in the vertical direction of the glass core.

[0048] The glass core 10 may have a thickness of 300 μm or more. The thickness of the glass core 10 may be 300 μm or more, 350 μm or more, 400 μm or more, 450 μm or more, or 500 μm or more. The thickness may be 2000 μm or less, 1800 μm or less, 1500 μm or less, 1200 μm or less, 1000 μm or less, 800 μm or less, or 700 μm or less. When a glass core of such thickness is applied, a glass core that ensures a certain level of durability and functions as a support can be applied.

[0049] The cavity 12 may be provided in a manner in which a portion of the glass core 10 is removed. In the embodiment, the cavity 12 may be a full cavity through which the glass core is penetrated.

[0050] A semiconductor element (abbreviated as "element") may be placed inside the cavity 12. Such elements are referred to as cavity elements, distinct from elements mounted on a packaging substrate.

[0051] The cavity element may be configured as an element module. The element module may contain one or more individual semiconductor elements. The element module may contain 30 or fewer individual semiconductor elements, or 20 or fewer. When cavity elements are modularized and applied, the pick-and-place process can be made more efficient, and the accuracy of the spacing and position between elements can be improved.

[0052] An element module may have cavity elements surrounded on the sides by an insulator. When cavity elements are arranged in rows within an element module, in some cases, the cavity elements may be positioned outside their predetermined positions, which can induce contact between the cavity elements, leading to defects in the packaging substrate. The element module in this example can suppress defects caused by contact between elements through the insulator placed on the sides of the cavity elements.

[0053] The cavity element may be an active or passive element.

[0054] Passive elements may, but are not limited to, power transfer elements such as MLCCs (Multi-Layer Ceramic Capacitors).

[0055] Active elements may include, for example, transistors, but are not limited to them.

[0056] The configuration of the element module or cavity element may differ depending on whether passive elements or active elements are placed in the cavity element.

[0057] As an example, let us describe the case in which an active element is arranged in the first element module 41.

[0058] The first element module 41 has one or more elements arranged therein, and the sides of the elements may be covered with a protective layer 415. The protective layer 415 may be formed of an insulating material. The insulating material may include a polymer resin or a mixture of inorganic particles and a polymer resin. The insulating material may include, as an example, LCP (liquid crystal polymer), EMC (Epoxy Molding Compound), ABF (Ajinomoto Build-up Film), or MPI (Modified Polyimide).

[0059] In the first element module 41, a cavity distribution layer 413 may be disposed on one surface of the active element. The cavity distribution layer 413 connects the first element module 41 to the redistribution wiring in the packaging substrate, helping to transmit signals from the active element in the first element module 41. The cavity distribution layer 413 may, exemplary, be formed on the active element in a manner that manufactures the redistribution wiring.

[0060] The first element module 41 may include an active element, a first element 410, a protective layer 415 which is an insulating material on the side, and a cavity distribution layer 413 on one surface of the active element. In this case, it is preferable from the viewpoint of process convenience that the first element module 41 is inserted into the cavity 12 in a state that has been prepared in advance to have the above configuration.

[0061] An upper layer 20, which includes redistribution wiring, may be placed on the glass core 10.

[0062] The upper layer 20 includes an electrically conductive layer disposed on the upper surface of the glass core 10.

[0063] The electrically conductive layer, which is placed on the upper surface of the glass core 10, may be provided in a predetermined pattern. For example, it may be provided by applying a primer treatment such as sputtering to the surface of the glass core (selectively including the inside of the core vias 14 and the inner walls of the cavities), followed by copper plating, and then removing the unnecessary parts, but is not limited to this method.

[0064] The upper layer 20 may be formed by a redistribution method applicable to the manufacture of a packaging substrate. Exemplarily, the upper layer 20 may be provided by repeatedly forming a primer layer on the upper surface of the glass core 10, placing an insulating layer on the primer layer, selectively removing the insulating layer, plating a copper layer, planarizing, and so on.

[0065] A cover layer 28 may be further placed on top of the upper layer 20.

[0066] The cover layer 28 may be made of a PI film (Polyimide film) or the like, with an opening at the joint with the solder ball, but is not limited to this.

[0067] A lower layer 40 containing redistribution wiring may be placed below the glass core 10.

[0068] The lower layer 40 may be connected to an electrically conductive layer located on the lower surface of the glass core 10.

[0069] The electrically conductive layer, which is placed on the lower surface of the glass core 10, may be provided in a predetermined pattern. For example, it may be provided by applying a primer treatment such as sputtering to the surface of the glass core (selectively including the inside of the core vias 14 and the inner walls of the cavities), followed by copper plating, and then removing the unnecessary parts, but is not limited to this method.

[0070] A solder resist layer 417 may be further placed beneath the lower layer 40.

[0071] The lower layer 40 may be formed by a redistribution method applicable to the manufacture of a packaging substrate. Exemplarily, the lower layer 40 may be provided by repeatedly forming a primer layer on the lower surface of the glass core 10, placing an insulating layer on the primer layer, selectively removing the insulating layer, plating a copper layer, planarizing, and so on.

[0072] The lower layer 40 may further include a module lower surface metal layer 500, which is a metal layer disposed on the lower surface of the first element module 41.

[0073] The module's lower metal layer 500 is a metal layer that is connected to one side of the first element module 41 and penetrates the lower layer 40.

[0074] The module bottom metal layer 500 can cover 60% or more of the area of ​​one surface of the first element 410 arranged in the first element module 41. For example, the module bottom metal layer 500 can cover 60% or more, or 65% or more, 70% or more, 75% or more, 80% or more, 85% or more, 90% or more, 95% or more, 100% or more, or 105% or more of the area of ​​one surface of the first element 410 arranged in the first element module 41. It can also cover 130% or less, 120% or less, or 110% or less of the area of ​​the surface. In this case, an area exceeding 100% means that the module bottom metal layer 500 protrudes laterally from the bottom surface.

[0075] The metal layer 500 on the underside of the module can be exposed on the underside of the lower layer 40.

[0076] Specifically, the lower metal layer 500 of the module has one end in contact with the first element 410 and the other end exposed on the lower surface of the lower layer 40.

[0077] The module's lower metal layer 500 can have a thickness of 10 μm to 100 μm. The thickness may be 10 μm or more, 15 μm or more, 20 μm or more, 25 μm or more, 30 μm or more, 35 μm or more, 40 μm or more, 45 μm or more, 50 μm or more, 55 μm or more, or 60 μm or more. Alternatively, the thickness may be 100 μm or less, 95 μm or less, 90 μm or less, 85 μm or less, or 80 μm or less. When the module's lower metal layer 500 is formed with such a thickness, both the heat dissipation effect and the process efficiency can be improved.

[0078] The metal layer 500 on the bottom of the module can guide the heat generated from the element so that it is efficiently discharged outside the packaging substrate 900.

[0079] The method for manufacturing the metal layer 500 on the lower surface of the module will be described later.

[0080] Two or more element modules may be placed inside the cavity 12.

[0081] The element module may be one in which active elements corresponding to the first element module 41 described above are arranged. Alternatively, the element module may be one in which passive elements are arranged, and for the purpose of distinguishing it from the first element module 41 in which active elements are arranged, it is referred to as the second element module 43.

[0082] The cavity 12 may further include a second element module 43.

[0083] At least one or more second elements 510 may be arranged within the second element module 43. The second elements 510 may, for example, include power transfer elements such as MLCCs.

[0084] The number of power transmission elements arranged within one second element module 43 may be 2 or more, 10 or more, 20 or more, 30 or more, 40 or more, or 50 or more. Alternatively, the number may be 600 or less, 500 or less, 400 or less, 300 or less, 200 or less, 170 or less, 140 or less, 120 or less, or 90 or less.

[0085] One second element module 43 may be placed in the cavity 12. Alternatively, two or more, three or more, four or more, or five or more may be placed. Fifteen or fewer, thirteen or fewer, or ten or fewer second element modules 43 may be placed in the cavity 12.

[0086] When the aforementioned power transmission elements are modularized and applied, the efficiency of the pick-and-place process can be increased, while simultaneously improving the efficiency of the process and the accuracy of the power transmission by placing the second element, which is pre-positioned in a precise location, within the cavity of the packaging substrate.

[0087] A redistribution layer may be placed on the upper or lower surface of the second element module 43. The redistribution layer may be provided on the upper or lower portion of the second element module 43 by utilizing the usual method for forming a redistribution layer. When the second element module 43 includes a redistribution layer in this way, the upper or lower layer can be formed after the second element module 43 is fixed in the cavity 12, making it easier to connect the second element 510 to the upper or lower layer.

[0088] The second element module 43 may further include through electrodes disposed in the molding above or below the power transmission element. The through electrodes may be formed in advance during the manufacturing process of the second element module. Alternatively, after placing the second element module in the cavity, the blind vias may be formed and the electrodes may be provided by methods such as copper plating. The former is advantageous in that it can further improve the efficiency of manufacturing the packaging substrate.

[0089] One or more first element modules 41, or one or more second element modules 43, may be arranged within the cavity 12.

[0090] One or more first element modules 41 and one or more second element modules 43 may be arranged within the cavity 12.

[0091] When the element module is arranged by providing a cavity 12 within the glass core 10 in this manner, it is possible to efficiently utilize the space within the packaging substrate while simultaneously improving the efficiency of power transmission.

[0092] After placing the element modules in the cavity 12, a space is created between the element modules and the cavity walls. Furthermore, when a large number of element modules are used, spaces also occur between the element modules placed within the cavity. A dispensing layer 60 is placed in these spaces.

[0093] The dispensing layer 60 may be provided by arranging a dispensing material in the space. The dispensing material fills the space between the inner wall of the cavity and the element module, fixing their relative positions.

[0094] The distribution material may, for example, be an insulating material.

[0095] The insulating material may be an organic material or an organic-inorganic composite material.

[0096] The insulating material may be a polymer resin, a mixed material of polymer resin and filler (inorganic particles, organic particles, organic-inorganic composite particles, etc.), or an inorganic vapor-deposited layer.

[0097] The aforementioned polymer resin may be acrylic resin, epoxy resin, or a modified resin thereof, and a material suitable for use in electronic devices for purposes such as molding may be used. For example, LCP (liquid crystal polymer) may be used.

[0098] The mixed material may be a mixture of acrylic resin and filler, a mixture of acrylic resin and epoxy resin and filler, or a mixture of epoxy resin and filler. The filler may be inorganic particles, and silica particles may be used as an example.

[0099] The aforementioned distribution material may be a commercially available product such as ABF (Ajinomoto Build-up Film), EMC (Epoxy Molding Compound), MPI (Modified Polyimide), CUF (Capillary Underfill) material, NCF (Non-Conductive Films), or NCP (Non-Conductive Pastes).

[0100] The distribution material can be transformed into a fluid form, placed within the glass core while filling the space between the cavity wall and the element module, and then cured. For example, the distribution material can be fluidized by heating, placed in the appropriate position, and then fixed in place within the cavity wall by methods such as thermal curing.

[0101] The packaging substrate 900 may have a structure consisting of an upper layer 20 and a glass core 10.

[0102] The packaging substrate 900 may have a structure consisting of an upper layer 20, a glass core 10, and a lower layer 40.

[0103] The structure in which the element module is placed inside the cavity 12 located on the glass core 10 is as described above.

[0104] A connection portion, such as a bump layer 25, may be placed at the opening of the protective layer of the upper layer 20. The bump layer 25 on the upper layer 20 may be connected to a mounting element 600, which will be described later. Also, if necessary, the bump layer 25 on the upper layer 20 may be connected to a cap 650.

[0105] A separate bump layer 25 may be provided beneath the solder resist layer 417 of the lower surface or lower layer 40 of the glass core 10. The bump layer 25 beneath the solder resist layer 417 may be connected to the outside of a packaged semiconductor device, such as a main board.

[0106] Semiconductor elements can be mounted on the packaging substrate 900. These are referred to as mounting elements 600 to distinguish them from other elements such as cavity elements.

[0107] A modularized mounting element 600 may be used. The modularized mounting element 600 includes one or more elements 610.

[0108] For example, the mounting element 600 may be a variety of elements, including computing elements such as CPUs and GPUs, and memory elements such as memory chips.

[0109] The mounting element 600 can be applied in a modular form.

[0110] The modular mounting element 600 may, exemplary, consist of one or more elements and may be protected on its sides or entirely molded with a molding material similar to the protective layer described above. Additionally, a redistribution layer may be separately provided on the underside of the mounting element 600. This redistribution layer can improve the efficiency of electrical connections within the mounting element 600 or enhance the efficiency of electrical connections between the packaging substrate 900 and the mounting element 600.

[0111] Figures 2 to 8 are conceptual diagrams illustrating the sequence of steps in the manufacturing method of a packaging substrate in a concrete example, shown in cross-section. The manufacturing method of the packaging substrate 900 will be explained with reference to Figures 2 to 8.

[0112] The method for manufacturing a packaging substrate in the concrete example involves manufacturing the above-described packaging substrate 900.

[0113] The manufacturing method includes a preparation step, an element placement step, a dispensing step, an upper layer formation step, and a lower layer formation step.

[0114] The aforementioned preparation step involves placing an adhesive layer 80 on the lower surface of the glass core 10, which contains the cavity 12 and the core conductive layer 16 (see Figures 2(a) to 2(c)).

[0115] The cavity 12 may be a through-type cavity 12.

[0116] The core conductive layer 16 is an electrically conductive pattern placed on the surface of the glass core 10. The core conductive layer 16 may be placed on the glass core 10 before the adhesive layer 80 is placed.

[0117] The adhesive layer 80 may be an adhesive layer applied to semiconductor processes, and for example, a silicon adhesive layer, an acrylic adhesive layer, etc., may be applied.

[0118] For example, the adhesive layer 80 may have an adhesive strength that changes upon irradiation with ultraviolet light. Specifically, the adhesive layer applied to fix a position is intended to be removed later. That is, it is applied while maintaining its adhesive strength after adhesion, and when removal is necessary, the adhesive strength can be weakened by methods such as ultraviolet light irradiation before removing the adhesive layer, making it relatively easy to remove.

[0119] The element placement step involves placing one or more element modules 41 in the cavity 12 (see Figure 3(a)).

[0120] The cavity 12 may contain one or more individual elements.

[0121] One or more modularized elements may be placed in the cavity 12.

[0122] The explanations regarding elements, element modules, etc., will be omitted as they overlap with the explanations above.

[0123] The dispensing step is the step of placing the dispensing layer 60 inside the cavity 12.

[0124] The materials and arrangement of the dispensing layer are omitted in detail as they overlap with the information described above.

[0125] The aforementioned upper layer formation step is the step of placing the upper layer 20 on top of the glass core 10 (see Figure 3(c), Figures 4(a) to (c), and Figure 5(a)).

[0126] The upper layer 20 may include redistribution wiring positioned on the upper surface of the glass core 10.

[0127] An insulating layer is placed on the glass core that has been arranged up to the dispensing layer. This insulating layer is referred to as the upper insulating layer 211 (Figure 3(c)). This insulating layer can be formed, for example, by laminating ABF under reduced pressure and then curing or semi-curing it. If necessary, a primer layer for the formation of via electrodes (e.g., a sputtered layer to help copper adhesion) may be formed before the insulating layer is formed.

[0128] Vias 211h and the like are formed in the upper insulating layer 211 (Figure 4(a)). The positions where these vias and the electrical conductive layer patterns are arranged may be formed by methods such as plasma etching or laser etching.

[0129] Here, via electrodes 211v and / or electrically conductive patterns are formed. The via electrodes 211v may include copper, copper alloys, etc., and can be formed by methods such as copper plating (Figures 4(b) and (c)).

[0130] Although not shown in the diagram, after copper plating, a planarization process may be performed, and the process of forming an insulating layer and arranging vias and / or conductive patterns is repeated to provide the upper electrically conductive layer 211m.

[0131] A cover layer 28 is placed on the uppermost surface of the upper electrical conductive layer 211m, and openings in the cover layer 28 can be positioned to contact the bump layer at the required locations (Figure 5(a)).

[0132] The lower layer formation step involves removing the adhesive layer 80 from the lower surface of the glass core 10 and placing the lower layer 40 below the glass core 10 (see Figures 5(b) and (c), Figures 6(a) and (c), and Figures 7(a) and (c)).

[0133] A separate adhesive layer 80 is placed on top of the upper layer 20. The adhesive layer 80 bonded to the lower surface of the glass core 10 is then peeled off. During this process, the substrate is inverted (see Figures 5(b) and 5(c)). After that, the lower layer is formed.

[0134] An electrically conductive layer is placed on the lower surface of the glass core 10. This is referred to as the lower core electrically conductive layer 411m. This is done in a similar manner to the placement of the electrically conductive layer on the upper surface of the glass core 10 (Figure 6(a)).

[0135] An insulating layer is placed on top of this, and this is referred to as the lower insulating layer 411 (Figure 6(b)). This is carried out in a similar manner to the formation process of the upper insulating layer 211 described above.

[0136] The areas in the lower insulating layer 411 where vias and electrically conductive patterns are to be placed are etched (Figure 6(c)). At this time, a lower insulating layer cavity 411h is formed at the location where the module lower metal layer 500 described above is to be placed. At this time, etching of the areas where vias and electrically conductive patterns are to be placed, and formation of the lower insulating layer cavity 411h can be carried out by methods such as plasma etching or laser etching.

[0137] The bottom insulating layer cavity 411h may be formed so as to expose the element module including the cavity element. Alternatively, the bottom insulating layer cavity 411h may be formed so as to expose at least 60%, 65%, 70%, 75%, 80%, 85%, 90%, 95%, 100%, or 105% of the area of ​​one surface of the cavity element. The bottom insulating layer cavity 411h may be formed so as to expose 130%, 120%, or 110% or less of the area of ​​one surface. In this case, if more than 100% of the area is exposed, a portion of the dispensing layer or protective layer on the side of the bottom surface of the cavity element will be exposed.

[0138] A lower electrical conductive layer 411n is placed here. The lower electrical conductive layer can be formed in a similar manner to the upper electrical conductive layer.

[0139] In this case, the module bottom metal layer 500, which is a metal layer disposed on the lower surface of the first element module 41, can be formed together with the lower layer electrical conductive layer 411n (Figure 7(a)).

[0140] The module's lower metal layer 500 has a very large volume compared to vias and electrically conductive patterns. This can lead to inefficiently long plating times. Therefore, in this embodiment, a method of placing copper paste or copper blocks in the region of the lower insulating layer cavity 411h can be applied to efficiently form the module's lower metal layer 500.

[0141] Specifically, the lower layer formation step may include the steps of: placing an insulating layer below the glass core 10 from which the adhesive layer 80 has been removed; selectively removing the insulating layer in the region of the lower insulating layer cavity 411h, where the region on which the module lower metal layer 500 is placed is the region of the lower insulating layer cavity 411h; forming a seed layer in the region of the lower insulating layer cavity 411h; and placing copper paste or copper blocks in the region of the lower insulating layer cavity 411h. Through this, a module lower metal layer of sufficient volume can be formed at a fast process rate.

[0142] Subsequently, additional lower electrical conductive layers 411n required for the lower layer are placed, and a solder resist layer 417 is placed to form the lower layer 40 (Figures 7(b) and (c)).

[0143] In the packaging substrate 900 manufactured in this manner, a bump layer 25 can be selectively formed on the upper layer 20 (Figure 8(a)).

[0144] Mounting elements 600 or caps 650 may be placed on the packaging substrate 900, and the caps 650 serve to prevent unnecessary electrical connections by blocking unnecessary through-electrodes.

[0145] The implemented packaging substrate and its manufacturing method can improve thermal stability while elements are arranged inside a glass core, reduce the risk of parasitic element generation, and produce packaging substrates that are stable yet thin, with a cavity and heat-dissipating metal layer that allow for efficient spatial arrangement.

[0146] Although preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto. Various modifications and improvements by those skilled in the art, utilizing the basic concepts of the present invention as defined in the appended claims, also fall within the scope of the present invention. [Explanation of symbols]

[0147] 10 glass cores 12 Cavity 14 Corevia 16 Core conductive layer 20 Upper layer 211 Upper insulating layer 211h Beer 211V via electrode 211m Upper electrically conductive layer 25 Bump Layer 28 Cover layer 40 Lower layer 411 Lower insulating layer 411m Lower core electrically conductive layer 411h Bottom insulating layer cavity 411n Lower layer electrical conductive layer 41-element module, 1st element module 410 First element 43. Second Element Module 413 Cavity distribution layer 415 Protective layer 417 Solder Resist Layer 510 Second element 515 Protective layer 60 dispensing layers 615 Protective layer 80 Adhesive layer 500 Module bottom metal layer 600 Mounting Elements 610 elements 613 Mounting element distribution layer 650 caps 900 Packaging substrates

Claims

1. A glass core including a glass plate and a cavity placed in the glass plate, A first element module is disposed within the cavity, The glass core is disposed on the upper layer which includes redistribution wiring, The glass core is located below a lower layer which includes redistribution wiring, The upper layer includes an electrically conductive layer disposed on the upper surface of the glass core. The lower layer further includes a module bottom metal layer, which is a metal layer disposed on the lower surface of the first element module. The metal layer on the lower surface of the module covers 60% or more of the area of ​​one surface of the first element arranged in the first element module. The aforementioned metal layer on the lower surface of the module is a packaging substrate exposed on the lower surface of the lower layer.

2. The packaging substrate according to claim 1, wherein one end of the lower metal layer of the module is in contact with the first element and the other end is exposed on the surface of the lower layer.

3. A dispensing layer is placed between the first element module and the side surface of the cavity. The packaging substrate according to claim 1, wherein the dispensing layer comprises an insulating organic material or an organic-inorganic composite material.

4. The cavity further includes a second element module. At least one power transmission element is arranged within the second element module. The packaging substrate according to claim 1, wherein a redistribution layer is disposed on the upper or lower surface of the second element module.

5. A second element module is further arranged within the aforementioned cavity. Within the second element module, two or more power transmission elements are arranged. The packaging substrate according to claim 1, wherein the power transmission element is molded with an insulating material.

6. The packaging substrate according to claim 5, wherein the second element module further includes through electrodes disposed in the molding above or below the power transmission element.

7. A preparation step of placing an adhesive layer on the lower surface of the glass core on which the cavity and core conductive layer are arranged, The element placement step involves placing one or more element modules in the cavity, A dispensing step in which a dispensing layer is placed inside the cavity, An upper layer forming step in which an upper layer is placed on top of the glass core, The process includes removing the adhesive layer on the lower surface of the glass core and forming a lower layer to place a lower layer below the glass core. The aforementioned cavity is a through-hole cavity, The core conductive layer is an electrically conductive pattern arranged on the surface of the glass core. The upper layer includes redistribution wiring positioned on the upper surface of the glass core, The lower layer further includes a module bottom metal layer, which is a metal layer disposed on the lower surface of the first element module. The aforementioned module bottom metal layer is a metal layer disposed on the bottom surface of the element module. A method for manufacturing a packaging substrate, wherein one end of the module's lower metal layer covers 60% or more of the surface area of ​​one side of the first element arranged in the element module, and the other end is exposed on the lower surface of the lower layer.

8. The method for manufacturing a packaging substrate according to claim 7, wherein in the lower layer formation step, the lower layer is arranged with the upper and lower parts of the glass core inverted.

9. The aforementioned lower layer formation step is, The process of placing an insulating layer below the glass core from which the adhesive layer has been removed, The region where the module's lower metal layer is placed is the region of the lower insulating layer cavity, and the process involves selectively removing the insulating layer in the region of the lower insulating layer cavity, The process of forming a seed layer in the region of the lower insulating layer cavity, A method for manufacturing a packaging substrate according to claim 7, comprising the step of placing copper paste or copper blocks in the region of the lower insulating layer cavity.

10. The method for manufacturing a packaging substrate according to claim 7, wherein the metal layer on the bottom surface of the module has a thickness of 10 μm to 100 μm.

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