Method for forming blind vias and method for manufacturing a packaging substrate

Abstract

This invention provides a method for forming blind vias and manufacturing a packaging substrate that facilitates the removal of processing by-products and allows for a damage-free surface. [Solution] The method for forming blind vias and the method for manufacturing a packaging substrate of the embodiment include a protective layer placement step of providing a substrate on which a processing protective layer is placed on an insulating layer, a laser step of forming blind vias at predetermined positions on the processing protective layer, and a cleaning step of removing particulate by-products or smear generated on the blind vias and removing the processing protective layer, thereby forming blind vias on an insulator.

Description

Technical Field

[0001] Embodiment examples relate to a method for forming a blind via that can more easily remove processing by-products and obtain a surface without damage, a method for manufacturing a packaging substrate, and the like.

Background Art

[0002] Laser drilling refers to forming small holes and special via holes for connection between layers in electronic devices of a multilayer substrate using laser light.

[0003] Such a laser drilling technique is one of the via hole processing methods that emerged to eliminate limitations in circuit miniaturization, increased processing costs, etc. by using a mechanical drill to process via holes corresponding to connection paths between layers of a multilayer substrate.

[0004] Although the laser drilling technique can form via holes in a multilayer substrate more finely than in conventional machining and has the advantage of significantly reducing processing costs, another problem has occurred.

[0005] Currently, the laser drilling technique used in manufacturing a multilayer substrate requires hole cleaning to remove fine foreign matter generated inside the hole during the formation of a via hole when forming one hole.

[0006] If perfect cleaning is not performed, plating defects may occur during desmear and copper plating after the cleaning process. Also, after forming a hole of a desired size, a laser shot for cleaning must be performed again, which may cause a problem that a hole with a diameter larger than the designed dimension is formed. To prevent this, problems and inconveniences such as an increase in unit man-hours, including the inconvenience of having to design and process the hole size with the last shot in mind in advance, may occur.

[0007] Relevant prior art includes Korean Registered Patent No. 10-0859206 and Korean Published Patent No. 10-2020-0069645. [Overview of the project] [Problems that the invention aims to solve]

[0008] The purpose of this embodiment is to provide a method for forming blind vias, a method for manufacturing a packaging substrate, etc., that makes it easier to remove processing by-products and obtain a damage-free surface. [Means for solving the problem]

[0009] To achieve the above objective, one embodiment of a method for forming blind vias comprises: a protective layer placement step of providing a substrate on which a processing protective layer is placed on an insulating layer; a laser step of forming blind vias at predetermined positions on the processing protective layer; and a cleaning step of removing particulate by-products or smear generated on the blind vias and removing the processing protective layer; thereby forming blind vias on an insulator.

[0010] The aforementioned processing protection layer may be a metal layer.

[0011] The metal layer may contain titanium, a titanium-copper composite layer, or copper.

[0012] The aforementioned processing protective layer may be an organic layer or an organic-inorganic composite layer.

[0013] The aforementioned processed protective layer may contain polyimide resin, polyester terephthalate resin, polyurethane resin, or polyacrylic resin.

[0014] When the laser is irradiated in the laser step, a portion of the processing protective layer and a portion of the insulating layer may be etched, and by-products may be scattered to form particulate by-products or smear.

[0015] The cleaning step may include a desmearing process for removing the particulate by-products or smear by applying plasma or a desmearing chemical, and a protective layer removal process for removing the processed protective layer from the substrate after the removal process.

[0016] The aforementioned processed protective layer may have a thickness of 10 μm or more and 500 μm or less.

[0017] The difference between the surface roughness Ra of the insulating layer before the formation of the processing protective layer and the surface roughness Ra of the insulating layer after the cleaning step may be 600 nm or less.

[0018] The laser irradiation may be ultraviolet light having a pulse width of 400 nm or less, a pulse energy of 1 μJ or more, and a pulse repetition rate of 10 Hz or more.

[0019] A method for manufacturing a packaging substrate according to another embodiment includes: step A providing a glass core having through vias and a core electrically conductive layer which is an electrically conductive layer disposed on the glass core; step B providing a core insulating layer by arranging an insulating layer on the surface of the glass core; step C forming blind vias on the core insulating layer by the blind via formation method described above; step D forming electrodes on the blind vias and providing an electrically conductive layer pattern on the core insulating layer to form an electrically conductive layer; and step E providing an upper insulating layer by arranging an insulating layer on the electrically conductive layer.

[0020] In step B, the core insulating layer may be provided through the arrangement and curing of the insulating layer. [Effects of the Invention]

[0021] The concrete examples of blind via formation methods and packaging substrate manufacturing methods can reduce defects in packaging substrates by making it easier to remove processing by-products from within or around the vias and minimizing damage to the insulating layer around the vias. [Brief explanation of the drawing]

[0022] [Figure 1] It is a conceptual diagram for explaining the manufacturing method of the packaging substrate of the embodiment in cross section. [Figure 2] In the manufacturing method of the packaging substrate of the embodiment, it is a conceptual diagram for explaining the process of forming the upper layer in cross section. [Figure 3] In the manufacturing method of the packaging substrate of the embodiment, it is a conceptual diagram for explaining the process of forming the upper layer in cross section. [Figure 4] It is a diagram conceptually showing the appearance (top) and the appearance in cross section (bottom) of the via electrode manufactured according to the embodiment when viewed from above.

Best Mode for Carrying Out the Invention

[0023] Hereinafter, for the convenience of those having ordinary knowledge in the technical field to which the present invention pertains to easily implement, the embodiments will be described in detail with reference to the accompanying drawings. However, the present invention can be realized in various different forms and is not limited to the embodiments described herein. The same reference numerals are given to similar parts throughout the specification.

[0024] Throughout this specification, the term "these combinations" included in the Markush-type expression means one or more mixtures or combinations selected from the group consisting of the components described in the Markush-type expression, and means including one or more selected from the group consisting of the said components.

[0025] Throughout this specification, terms such as "first", "second" or "A", "B" are used to distinguish the same terms from each other. Also, the singular expression includes the plural expression unless the context clearly indicates a different meaning.

[0026] In this specification, "~-based" may mean including the compound corresponding to "~" or the derivative of "~" in the compound.

[0027] In this specification, the meaning of B being located on A means either B being in direct contact with A, or B being located on A with other layers located between them, and is not limited to B being in contact with the surface of A.

[0028] In this specification, the meaning of B being connected to A means either that A and B are directly connected, or that A and B are connected through other components between them, and is not limited to the direct connection of A and B unless otherwise specified.

[0029] In this specification, unless otherwise specified, singular expressions are interpreted to include singular or plural, as interpreted in the context.

[0030] In this specification, the form, relative size, angles, etc., of each component in the drawings are illustrative and may be exaggerated for illustrative purposes, and the rights shall not be construed as being limited to the drawings.

[0031] In this specification, "adjacent to A and B" means that A and B are located touching each other, or that A and B are not touching but are located close to each other. In this specification, the expression "adjacent to A and B" is not construed to mean that A and B are located touching each other unless otherwise specified.

[0032] Figure 1 is a conceptual diagram illustrating the manufacturing method of the packaging substrate in the embodiment in cross-section, Figures 2 and 3 are conceptual diagrams illustrating the process of forming the upper layer in the manufacturing method of the packaging substrate in the embodiment in cross-section, respectively, and Figure 4 is a conceptual diagram showing the via electrode manufactured by the embodiment from above and in cross-section (below). The embodiment will be described in more detail with reference to the above drawings.

[0033] To achieve the above objective, a method for forming blind vias according to one embodiment of the embodiment includes a protective layer placement step, a laser step, and a cleaning step.

[0034] The protective layer placement step involves providing a substrate on which a processed protective layer 95 is placed on an insulating layer.

[0035] The blind vias 471 are formed at predetermined positions after the insulating layer is formed. For example, the blind vias 471 may be formed by methods such as laser etching or plasma etching. The laser etching method will be described exemplarily below. Plasma etching is also applicable in a similar manner to that described later.

[0036] The processing protection layer 95 is placed on the surface of the insulating layer and protects the insulating layer from laser or plasma ions. The processing protection layer 95 can also be removed during cleaning after blind via formation.

[0037] The processing protection layer 95 may be an inorganic layer. For example, the processing protection layer 95, which is an inorganic layer, may be a metal layer, an insulating layer, etc., but is not limited to these.

[0038] The processing protection layer 95 may be a metal layer. For example, the processing protection layer 95, which is a metal layer, may include titanium, a titanium-copper composite layer, or copper. For example, the processing protection layer 95, which is a metal layer, may be formed by vapor deposition or sputtering, but is not limited thereto. For example, a metal layer of about 10 nm or more, about 15 nm or more, about 20 nm or more, about 25 nm or more, or about 30 nm or more may be formed by methods such as PVD (Physical Vapor Deposition). Alternatively, a metal layer of about 400 nm or less, about 350 nm or less, about 300 nm or less, or about 250 nm or less may be formed.

[0039] The processing protective layer 95 may be an organic layer. For example, the organic layer may include a polyimide resin, a polyester terephthalate resin, a polyurethane resin, or a polyacrylic resin. For example, an organic layer formed in film form may be applied as the processing protective layer 95 by laminating it onto the object to be protected. The processing protective layer 95, which is the organic layer, may have a thickness of approximately 10 μm or more, approximately 20 μm or more, approximately 30 μm or more, approximately 40 μm or more, or approximately 50 μm or more. The thickness may be approximately 500 μm or less, approximately 450 μm or less, approximately 400 μm or less, approximately 350 μm or less, approximately 300 μm or less, approximately 250 μm or less, approximately 200 μm or less, or approximately 150 μm or less.

[0040] The processing protective layer 95 may be an organic-inorganic composite layer. For example, the organic-inorganic composite layer may be a polymer resin mixed with an inorganic material. For example, the processing protective layer 95, which is the organic-inorganic composite layer, may be applied in the form of a film.

[0041] The processing protective layer 95 may have a thickness of approximately 10 μm or more and approximately 500 μm or less. The thickness of the processing protective layer 95 may vary depending on the material to which it is applied. If the processing protective layer is too thick, excessive energy may be consumed during the process of removing the processing protective layer, or the process may become complicated. Conversely, if the processing protective layer is too thin, it may be difficult to obtain sufficient protection, or it may even become difficult to remove.

[0042] When the thickness of the processing protective layer 95 is within the aforementioned range, the insulating layer is adequately protected during the via formation and cleaning process, and can be stably removed afterward.

[0043] The aforementioned processing protective layer 95 has the advantage that, when a metal layer or an organic film layer is applied, it is relatively easy to apply in the manufacturing process and relatively easy to perform additional processes.

[0044] The laser step is a step of forming blind vias 471 at predetermined positions on the processing protective layer 95.

[0045] For example, the formation of the blind via may be carried out by irradiating it with a laser L.

[0046] The laser L can remove the insulating layer and selectively remove the processing protection layer 95, which is a layer containing a metal layer or a polymer.

[0047] The laser L may, if necessary, be applied separately to remove the insulating layer and to remove a portion of the processing protective layer 95, or the same laser may be applied to both. Applying the lasers separately can mean changing the type of laser used, or it can mean adjusting the intensity or pulse width of the laser light.

[0048] When the laser L is irradiated in the laser step, a portion of the processing protective layer 95 and a portion of the insulating layer may be etched, and by-products may be scattered to form particulate by-products 953 or smear 955.

[0049] For example, the irradiation of laser L may be an ultraviolet laser having a pulse width of 400 nm or less. The pulse width may be 380 nm or less, 360 nm or less, 340 nm or less, 320 nm or less, or 300 nm or less. The pulse width may be 100 nm or more. When a laser with such a pulse width is applied, the insulating layer can be removed along with polymer resin materials, metal materials, etc.

[0050] The laser L may have a pulse energy of 1 μJ or more, 10 μJ or more, 100 μJ or more, 1 mJ or more, 10 mJ or more, 50 mJ or more, 75 mJ or more, or 100 mJ or more. The pulse energy may also be 1 J or less, 900 mJ or less, 800 mJ or less, or 750 mJ or less. When such pulse energies are applied, insulating layers and the like can be removed more efficiently.

[0051] The laser L may have a pulse repetition rate of 10 Hz or higher, 50 Hz or higher, 100 Hz or higher, 300 Hz or higher, 600 Hz or higher, 1 kHz or higher, 10 kHz or higher, 30 kHz or higher, 50 kHz or higher, or 100 kHz or higher. The pulse repetition rate may be 500 kHz or lower, 300 kHz or lower, 200 kHz or lower, or 150 kHz or lower.

[0052] The laser may be an excimer laser or a DPSS UV laser (Diode-Pumped Solid-State Ultraviolet Laser), but is not limited to these.

[0053] When laser L is applied within the aforementioned range, polymer and metallic materials can be efficiently removed along with the insulating layer. Although the above description focused on UV lasers, other lasers with different properties (e.g., CO2 lasers, CO lasers, and other long-wavelength lasers) can be applied as needed, taking into account the characteristics of the materials. For example, IR wavelengths of 1 μm or less, or 0.9 μm or less, can also be applied to the laser L irradiation.

[0054] For example, when applying a PET film as a processing protective layer, a UV laser with a pulse width of picoseconds or less can be used. Alternatively, a Deep UV wavelength with a pulse width of 300 nm or less can be used. The insulating layer can be removed with a nanosecond UV pulse laser.

[0055] For example, when a photoresist layer or polyimide layer is applied as a processing protection layer, a nanosecond UV pulsed laser can be used.

[0056] For example, if the processing protection layer is a PVD metal film, it can be processed with a nanosecond UV pulse laser.

[0057] However, in such blind via formation processes using lasers, the removed insulating layer and other materials may become processing by-products, forming particulate by-products or smears.

[0058] If such particulate byproducts remain inside the blind via, cleaning may become difficult in subsequent processes, potentially leading to disconnections or other problems. Therefore, to facilitate via formation and ensure efficient progress in subsequent processes, blowing and / or suction (B / S) can be performed simultaneously with or after laser irradiation. Blowing may, but is not limited to, gases such as CDA (Clean Dry Air) or N2.

[0059] This particulate by-product or smear may be partially present within the blind via and may settle onto the insulating layer. In existing examples, this particulate by-product or smear settled onto the insulating layer, making it difficult to remove during subsequent cleaning processes.

[0060] In the concrete example, a processing protection layer 95 is placed on the insulating layer. Therefore, particulate by-products and smear do not fall directly onto the surface of the insulating layer, but rather onto the processing protection layer 95. This makes it easier to remove these particulate by-products and smear in subsequent processes.

[0061] The cleaning step involves removing particulate by-products 953 or smears 955 generated in the blind vias 471 and removing the processing protective layer 95.

[0062] Specifically, the cleaning step may include a desmearing process for removing the particulate by-products 953 or smear 955 by applying plasma or a desmearing chemical, and a protective layer removal process for removing the processed protective layer 95 from the substrate after the removal process. In Figure 3(a), ions 959 applied to the plasma etching process are shown together with particulate by-products and smear.

[0063] Following the desmear process, a further cleaning process using chemicals such as an acid cleaning solution may be carried out. The cleaning process may be carried out after the desmear process and before the protective layer removal process, or after the protective layer removal process.

[0064] In applying plasma desmearing or desmearing chemicals to the aforementioned desmearing, it has been necessary to remove particulate by-products and smear while minimizing damage to the insulating layer. If desmearing is performed too weakly, the removal of by-products may not be sufficient, and if desmearing is performed too strongly, the insulating layer itself may be damaged. As a result, it is possible to suppress the excessive increase in surface roughness of the insulating layer after desmearing. If the surface roughness of the insulating layer becomes excessively large, it may result in the detachment of part of the surface.

[0065] In this specific example, the application of the processing protection layer 95 eliminated the possibility of such problems occurring. Because the processing protection layer 95 protects the surface of the insulating layer, damage to the surface of the insulating layer can be suppressed even when strong desmearing is applied.

[0066] The protective layer removal process may be applied differently depending on the type of processed protective layer 95.

[0067] For example, in the case of a metal protective layer, the protective layer can be removed relatively easily by methods such as acid treatment. Alternatively, when etching a metal layer, a new process can be carried out using materials that were already in use, rather than a completely new process, thus enabling the process to be performed quickly and stably.

[0068] For example, in the case of a protective coating containing a polymer resin, the protective coating can be removed relatively easily through a physical separation process.

[0069] Unlike the usual case where the polymer resin surrounding the filler contained in the insulating layer is removed during processes such as etching and exposed on the surface, in this example, the degree of etching may be slightly visible due to the processing protective layer.

[0070] The difference between the surface roughness Ra of the insulating layer before the formation of the processed protective layer 95 and the surface roughness Ra of the insulating layer after the cleaning step may be 600 nm or less. The difference may also be 500 nm or less, or 450 nm or less. The difference may be 20 nm or more.

[0071] The surface roughness Ra of the insulating layer after the cleaning step may be 10 times or less, or 9 times or less, than the surface roughness Ra of the insulating layer before the formation of the processed protective layer 95. The difference may be 1 time or more.

[0072] There may be a difference between the diameter of the holes corresponding to the blind vias in the processing protective layer 95 that are removed and the diameter of the blind via entrances on the surface of the generated insulating layer. For example, when blind vias are formed through the above process, there may be a slight difference between the diameter of the holes corresponding to the blind vias in the processing protective layer 95 and the diameter of the blind via entrances on the surface of the insulating layer. The difference may be, for example, 4 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. The difference may be 0 μm or more. Therefore, taking this into consideration, the process may be carried out so that the size of the holes formed on the processing protective layer 95 by laser irradiation is formed to be smaller by the difference between the predetermined blind via entrance diameter and the above.

[0073] A method for manufacturing a packaging substrate according to another embodiment includes: step A providing a glass core 10 having through vias and a core electrically conductive layer 305 which is an electrically conductive layer disposed on the glass core; step B providing a core insulating layer 45 by arranging an insulating layer on the surface of the glass core 10; step C forming blind vias 471 on the core insulating layer 45 by the blind via formation method described above; step D forming electrodes on the blind vias and providing an electrically conductive layer pattern on the core insulating layer 45 to form an electrically conductive layer; and step E providing an upper insulating layer 47 by arranging an insulating layer on the electrically conductive layer.

[0074] The glass core 10 is made of a highly insulating material, which reduces the risk of parasitic element formation and has the advantage of being able to be produced over a large area compared to substrates such as silicon. Its non-conductive properties offer the advantage of even more stable operation, especially when high frequencies are applied.

[0075] The glass core 10 may be made of plate glass, and exemplary plate glass used in semiconductor processes may be used. Specifically, for example, borosilicate plate glass, alkali-free plate glass, etc. may be used, but are not limited to these.

[0076] The glass core 10 may have through-type through-vias (through-holes) that penetrate the glass plate in the thickness direction, and / or cavities that penetrate the glass plate in the thickness direction or form recessed surfaces. Through electrodes are formed in the through-vias, enabling the transmission of electrical signals in the vertical direction of the glass core.

[0077] The glass core 10 may have a thickness of 300 μm or more. The thickness of the glass core 10 may be 300 μm or more, 350 μm or more, 400 μm or more, 450 μm or more, or 500 μm or more. The thickness may be 2000 μm or less, 1800 μm or less, 1500 μm or less, 1200 μm or less, 1000 μm or less, 800 μm or less, or 700 μm or less. When a glass core of such thickness is applied, a glass core that ensures a certain level of durability and functions as a support can be applied.

[0078] In step B, the surface of the glass core 10 includes the top surface, bottom surface, and the interior of the through vias of the glass core.

[0079] The glass core 10 has through electrodes, and a core electrical conductive layer 305 may be arranged on its surface in a predetermined pattern. Between them, a layer (not shown) may be arranged to enhance the adhesion between the glass and the electrical conductive layer, and examples include, but are not limited to, a primer layer, a sputtered layer, etc. (Figure 1(a)).

[0080] In step B, the core insulating layer 45 can be provided through the arrangement and curing of the insulating layer.

[0081] An insulating layer is placed on the glass core 10. The insulating layer formed inside the through electrode and on the surface of the glass core 10 is called the core insulating layer 45 (Figure 1(b)), and an organic insulating layer, an inorganic insulating layer, or an organic-inorganic composite insulating layer may be applied. For example, Ajinomoto build-up layer may be applied, but it is not limited to this.

[0082] An upper electrically conductive layer 307 may be placed on the core insulating layer 45. The pattern can be formed by a lithography process, and the electrically conductive layer 30 can be formed by a method such as plating. It is preferable to form a seed layer before copper plating, but methods such as coating with an organic-inorganic composite primer layer containing copper seeds or forming a sputter layer can be applied. After that, copper plating is performed, and further processes such as surface etching can be carried out to provide one upper electrically conductive layer (Figure 1(c)). In addition, a lower electrically conductive layer 303 and a lower insulating layer 43 can be placed below the core insulating layer 45 by a process similar to that of the upper electrically conductive layer and upper insulating layer.

[0083] Step C involves the blind via formation method described above. A detailed explanation would overlap with the above explanation, so a detailed description is omitted.

[0084] The method includes: step D, which involves forming electrodes on the blind vias and providing an electrically conductive layer pattern on the core insulating layer 45 to form an electrically conductive layer; and step E, which involves placing an insulating layer on the electrically conductive layer to provide an upper insulating layer 47.

[0085] Specifically, via electrodes 37 can be formed on blind vias formed as shown in Figure 3(b). The via electrodes 37 can be formed by placing an electrically conductive layer over part or all of the blind via to enable upper and lower electrical connections, placing a pad 39 at the opening of the blind via, and forming an upper electrically conductive pattern on the insulating layer (upper insulating layer 47). During this process, if necessary, a seed layer can be formed below the upper insulating layer of the blind via by sputtering or the like, but this is omitted in the drawings and the above description. Also, in the drawings, the upper insulating layer 47 is shown as being divided into layers for the convenience of explanation, but in the manufactured packaging substrate, the boundary between the core insulating layer and the upper insulating layer is not substantially divided. Furthermore, the upper insulating layer may consist of two or more layers instead of one, and electrically conductive patterns and electrodes may be placed on each layer. The upper insulating layer and the upper electrically conductive layer may each be formed in one or more, two or more, or three or more layers, and may be arranged in 20 or fewer, 16 or fewer, 12 or fewer, or 8 or fewer layers, respectively.

[0086] Similarly, the lower insulating layer may consist of two or more layers, and each layer may have an electrically conductive pattern or electrodes. The lower insulating layer and the lower electrically conductive layer may each consist of one or more, two or more, or three or more layers, and may be arranged in a number of 20 or fewer, 16 or fewer, 12 or fewer, or 8 or fewer layers, respectively.

[0087] Subsequently, an insulating cover layer (not shown) can be placed on the uppermost layer of the upper electrical conductive layer 307. For example, the insulating cover layer may be a PI layer (polyimide layer) having openings at the positions where bumps are formed, but is not limited to this.

[0088] Subsequently, a solder resist layer (not shown) can be placed on the uppermost layer of the lower electrical conductive layer 303. For example, the solder resist layer may be a solder resist layer having openings at positions where it connects to bumps, etc., but is not limited to this.

[0089] Although preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto. Various modifications and improvements by those skilled in the art, utilizing the basic concepts of the present invention as defined in the appended claims, also fall within the scope of the present invention. [Explanation of symbols]

[0090] 10 glass cores 30 Electrically conductive layer 305 Core electrical conductive layer 307 Upper electrically conductive layer 303 Lower electrically conductive layer 45 Core insulating layer 47 Upper insulating layer 43 Lower insulating layer 95 Processing protection layer 953 Particulate By-products 955 Smear 959 Aeon 471 Blind Beer 37 via electrodes 39 pads L Laser B / S blowing and suction

Claims

1. A protective layer placement step involves providing a substrate on which a processing protective layer is placed on an insulating layer, A laser step of forming blind vias at predetermined positions on the aforementioned processing protective layer, A cleaning step to remove particulate by-products or smear generated in the blind vias and to remove the processing protective layer, A method for forming blind vias, comprising forming blind vias in an insulator.

2. The aforementioned processing protective layer is a metal layer, The method for forming blind vias according to claim 1, wherein the metal layer comprises titanium, a titanium-copper composite layer, or copper.

3. The aforementioned processing protective layer is an organic layer or an organic-inorganic composite layer. The method for forming blind vias according to claim 1, wherein the processed protective layer comprises a polyimide resin, a polyester terephthalate resin, a polyurethane resin, or a polyacrylic resin.

4. The method for forming a blind via according to claim 1, wherein when the laser is irradiated in the laser step, a portion of the processing protective layer and a portion of the insulating layer are etched, and the by-products are scattered to form particulate by-products or smear.

5. The cleaning step described above is: A desmearing process in which the particulate by-product or smear is removed by applying plasma or a desmearing chemical, A method for forming blind vias according to claim 1, comprising a protective layer removal step of removing the processed protective layer from the substrate that has undergone the removal step.

6. The method for forming blind vias according to claim 1, wherein the processed protective layer has a thickness of 10 μm or more and 500 μm or less.

7. The method for forming blind vias according to claim 1, wherein the difference between the surface roughness Ra of the insulating layer before the formation of the processing protective layer and the surface roughness Ra of the insulating layer after the cleaning step is 600 nm or less.

8. The method for forming blind vias according to claim 1, wherein the laser irradiation is ultraviolet light having a pulse width of 400 nm or less, a pulse energy of 1 μJ or more, and a pulse repetition rate of 10 Hz or more.

9. Step A involves providing a glass core having through vias and a core electrical conductive layer which is an electrical conductive layer disposed on the glass core, Step B involves arranging an insulating layer on the surface of the glass core to provide a core insulating layer, Step C, in which blind vias are formed on the core insulating layer by the blind via formation method described in claim 1, Step D involves forming electrodes on the blind vias and providing an electrically conductive layer pattern on the core insulating layer to form an electrically conductive layer. Step E involves placing an insulating layer on the electrically conductive layer to provide an upper insulating layer, A method for manufacturing a packaging substrate, including the following.

10. A method for manufacturing a packaging substrate according to claim 9, wherein in step B, the core insulating layer is provided through the arrangement and curing of the insulating layer.

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