SiC composite substrate and method for manufacturing the same

Abstract

The present invention provides a SiC composite substrate with a thin bonding layer and high transmittance, as well as a method for manufacturing the same. [Solution] The SiC composite substrate 1 comprises a polycrystalline SiC substrate 11, a single-crystal SiC layer 13 laminated on the polycrystalline SiC substrate 11, and a bonding layer 12 interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, in which a metal compound containing W and Si is bonded by atomic diffusion. The spectral transmittance of the bonding layer 12, which is made of a material other than SiC, is 0.1% or more in the wavelength range of 400 nm to 800 nm. The method for manufacturing the SiC composite substrate 1 includes the steps of epitaxially growing a single-crystal SiC layer 23 on a single-crystal SiC substrate 21 via a graphene film 22, peeling the single-crystal SiC layer 23 from the graphene film 22, and forming a bonding layer 12 between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 23, in which a metal compound containing W and Si is bonded by atomic diffusion.

Description

[Technical Field]

[0001] This disclosure relates to a SiC composite substrate and a method for manufacturing the same. [Background technology]

[0002] Conventionally, SiC-based devices such as Schottky barrier diodes (SBDs) and insulated-gate field-effect transistors (MOSFETs) have been provided for power control applications. Single-crystal SiC substrates on which such SiC-based devices are formed are generally manufactured using a sublimation-recrystallization method called the modified Lely method. However, this method suffers from low efficiency in crystal growth and wafer processing, resulting in high manufacturing costs.

[0003] Therefore, in order to reduce manufacturing costs, techniques have been provided for fabricating SiC composite substrates by growing a polycrystalline SiC substrate on a single-crystal SiC layer using chemical vapor deposition (CVD), or by bonding a single-crystal SiC layer manufactured by remote epitaxial growth to a polycrystalline SiC substrate (Patent Documents 1 and 2). On the other hand, a technique has been disclosed in which a tungsten film and a silicon film are sandwiched between the surfaces of two SiC semiconductor components and laminated, and a WSi2 mixture is formed by heat treatment (Patent Document 3). [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] International Publication No. 2021 / 020574 [Patent Document 2] International Publication No. 2017 / 047509 [Patent Document 3] Special Publication No. 2003-509843

[0005] [Summary] However, in a SiC composite substrate having a bonding layer produced by a conventional remote epitaxial growth method, which is bonded to a polycrystalline SiC substrate and then heated to be alloyed, the bonding layer is thick and has low transmittance.

[0006] The present disclosure is proposed in view of the above circumstances, and an object of the present disclosure is to provide a SiC composite substrate having a thin bonding layer and high transmittance, and a method for manufacturing the same.

[0007] In order to solve the above problem, the SiC composite substrate of the present disclosure includes: a polycrystalline SiC substrate; a single crystal SiC layer laminated on the polycrystalline SiC substrate; and a bonding layer interposed between the polycrystalline SiC substrate and the single crystal SiC layer, the bonding layer being formed by bonding a metal compound containing W and Si through atomic diffusion. The spectral transmittance of the bonding layer made of a material other than SiC is 0.1% or more in a wavelength range of 400 nm to 800 nm.

[0008] A method for manufacturing a SiC composite substrate of the present disclosure includes the steps of: providing a single crystal SiC substrate having a graphene film formed on a main surface thereof; epitaxially growing a single crystal SiC layer on the main surface of the single crystal SiC substrate via the graphene film; peeling the single crystal SiC layer from the graphene film; and forming a bonding layer by interposing a metal compound containing W and Si between the polycrystalline SiC substrate and the single crystal SiC layer on the main surface of the polycrystalline SiC substrate and bonding the metal compound through atomic diffusion. [Brief Description of the Drawings]

[0009] [Figure 1] FIG. 1 is a cross-sectional view of the SiC composite substrate according to the embodiment. [Figure 2] FIG. 2 is a cross-sectional view of a SiC composite substrate according to a modified example of the embodiment. [Figure 3A] FIG. 3A is a process flow diagram (first half) of the method for manufacturing the SiC composite substrate according to the embodiment. [Figure 3B] FIG. 3B is a process flow diagram (first half) of the method for manufacturing the SiC composite substrate according to the embodiment. [Figure 3C] Figure 3C is a process flow diagram (first half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 3D] Figure 3D is a process flow diagram (first half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 4A] Figure 4A is a process flow diagram (second half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 4B] Figure 4B is a process flow diagram (second half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 4C] Figure 4C is a process flow diagram (second half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 4D] Figure 4D is a process flow diagram (second half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 4E] Figure 4E is a process flow diagram (second half) of the manufacturing method for a SiC composite substrate according to the embodiment. [Figure 5] Figure 5 is a cross-sectional view illustrating a method for manufacturing a SiC composite substrate according to a modified embodiment. [Figure 6] Figure 6 is a cross-sectional view illustrating Example 1 of the method for manufacturing a SiC composite substrate. [Figure 7] Figure 7 is a cross-sectional view illustrating Example 2 of the method for manufacturing a SiC composite substrate. [Figure 8] Figure 8 is a cross-sectional view of a Schottky barrier diode to which a SiC composite substrate according to an embodiment is applied. [Figure 9] Figure 9 is a cross-sectional view of a trench gate type MOSFET to which a SiC composite substrate according to an embodiment is applied.

[0010] [Detailed explanation] The embodiments of the SiC composite substrate and its manufacturing method described herein will be described in detail below with reference to the drawings. The embodiments are general or specific examples. The numerical values, shapes, materials, components, installation locations of components, and connection configurations shown in the embodiments are examples and are not intended to limit the scope of this disclosure. Furthermore, among the components in the following embodiments, those not described in the independent claim indicating the highest-level concept will be described as optional components. In addition, the dimensional ratios in the drawings are exaggerated for illustrative purposes and may differ from the actual ratios. Furthermore, the following embodiments and their modifications may include similar components, and similar components will be given the same reference numerals, and redundant descriptions will be omitted.

[0011] (Embodiment) (SiC composite substrate) Figure 1 is a cross-sectional view of a SiC composite substrate 1 according to an embodiment.

[0012] As shown in Figure 1, the SiC composite substrate 1 according to the embodiment comprises a polycrystalline SiC substrate 11, a single-crystal SiC layer 13 laminated on the polycrystalline SiC substrate 11, and a bonding layer 12 interposed between the polycrystalline SiC substrate and the single-crystal SiC layer, in which a metal compound containing W and Si is bonded by atomic diffusion. The spectral transmittance of the bonding layer, which is made of materials other than SiC, is 0.1% or more in the wavelength range of 400 nm to 800 nm.

[0013] Furthermore, the bonding layer 12 contains tungsten silicide (WSi2).

[0014] Furthermore, the thickness of the bonding layer 12 is between 5 nm and 100 nm.

[0015] Furthermore, the concentration of impurities added to the single-crystal SiC layer is 1 × 10⁻⁶. 16 From 5x10 20 cm -3 It is within the range.

[0016] The SiC composite substrate 1 is configured by laminating a single-crystal SiC layer 13 on a polycrystalline SiC substrate 11, wherein the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13 are bonded together via a bonding layer 12 interposed between the top surface of the polycrystalline SiC substrate 11 and the bottom surface of the single-crystal SiC layer 13.

[0017] The polycrystalline SiC substrate 11 may be formed by deposition via CVD. The crystal polymorph of the polycrystalline SiC substrate 11 may be 4H, or may be other crystal polymorphs such as 6H and 3C.

[0018] The bonding layer 12 is composed of tungsten silicide (WSi2), which is a metal compound formed from metallic tungsten (W) and nonmetallic silicon (Si). As will be described later, the bonding layer 12 is formed as WSi2 by diffusing and reacting the Si layer 16 and the W layer 15, which are interposed as an interface layer 20 (FIG. 4E) between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, through heating.

[0019] Similarly, as will be described later, the single-crystal SiC layer 13 is formed by epitaxial growth on the surface of a single-crystal SiC substrate 21 (FIG. 3A) via a thin graphene film 22 so as to transfer the crystal structure of the surface of the single-crystal SiC substrate 21. The crystal polymorph of the single-crystal SiC layer 13 may be 4H, or may be other crystal polymorphs such as 6H and 3C. The thickness of the single-crystal SiC layer 13 may be 2 µm or more. The basal plane dislocation defect density of the single-crystal SiC layer 13 is 1×10 1 to 1×10 3 may fall within the range up to .

[0020] Impurities are added to the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13. The added impurities may be n-type impurities such as nitrogen (N) and phosphorus (P). The concentration of the impurity added to the polycrystalline SiC substrate 11 is 1×10 19 cm -3 to 1×10 20 cm -3 may fall within the range up to . The concentration of the impurity added to the single-crystal SiC layer 13 is 1×10 16 cm -3From 5x10 20 cm -3 It may be within the range up to that point.

[0021] In the SiC composite substrate 1 according to this embodiment, a thin bonding layer 12, formed by atomic diffusion, is interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13. Such a SiC composite substrate 1 can obtain a high-quality single-crystal SiC layer 13 with few crystal defects.

[0022] In the SiC composite substrate 1 according to the embodiment, the thin film bonding layer (WSi2 layer) 12 between the single-crystal SiC layer 13 and the polycrystalline SiC substrate 11 has transmittance. Compared to a conventional SiC composite substrate manufactured by remote epitaxial growth and having a bonding layer that is alloyed by heating after attaching a polycrystalline SiC substrate, the bonding layer 12 is thinner and has transmittance. Therefore, in the SiC composite substrate 1 according to the first embodiment, the thickness of the SiC composite substrate 1 can be accurately measured by a sensor or the like. For this reason, it can be used for wafer transfer in semiconductor processes. When alloyed, the bonding layer is formed to be thick, resulting in low transmittance.

[0023] In the SiC composite substrate 1 according to this embodiment, atomic diffusion bonding is used, resulting in a thin bonding layer 12 with high transmittance. In the wavelength range of 400 nm to 800 nm, the thinness of the bonding layer 12 allows for the maintenance of high transmittance.

[0024] The SiC composite substrate 1 according to this embodiment can bond a single-crystal SiC layer 13 and a polycrystalline SiC substrate 11 by atomic diffusion bonding. Here, atomic diffusion bonding is also referred to as solid-phase diffusion bonding.

[0025] As the thickness of the bonding layer 12 increases, the transmittance of the wafer decreases, making it unsuitable for wafer transfer in semiconductor processes. The reasons why wafers with reduced transmittance cannot be used for wafer transfer in semiconductor processes are as follows: When evaluating defects using photoluminescence (PL) and measuring film thickness using an infrared spectrophotometer (IR), low transmittance prevents sufficient evaluation, potentially leading to the use of substandard wafers. Furthermore, there is a possibility of using wafers with film thicknesses outside the acceptable range during the process.

[0026] The SiC composite substrate 1 according to this embodiment allows for the formation of a thin bonding layer 12 by atomic diffusion bonding, and because the wafer has high transmittance, accurate evaluation is possible during defect evaluation by PL and film thickness measurement by IR, making it easy to introduce into semiconductor processes.

[0027] The SiC composite substrate 1 according to this embodiment has a bonding layer 12 with non-zero transmittance at the interface between the remote epitaxial growth layer and the polycrystalline SiC layer. For example, a SiC composite substrate with non-zero transmittance can be fabricated by forming a bonding layer with a thin WSi2 layer (100 nm or less) through atomic diffusion bonding of W and Si.

[0028] Even if the wafer itself is transparent, if the intermediate bonding layer 12 is thick, the bonding layer 12 will absorb a large amount of light. Therefore, by reducing the thickness of the bonding layer 12, it is possible to ensure a sufficiently high transmittance for the entire SiC composite substrate.

[0029] In the SiC composite substrate 1 according to this embodiment, a bonding layer 12 can be formed by a thin WSi2 layer of 100 nm or less through atomic diffusion bonding of W and Si. As a result, sufficient transmittance of the SiC composite substrate 1 can be ensured. For example, even with a WSi2 layer of about 10 nm, if the surface roughness of the wafer surface is kept low, the diffusion bonding layer can be formed.

[0030] 4H-SiC has high transmittance in the visible to near-infrared region. Therefore, in the wavelength range of 400 nm to 800 nm, the spectral transmittance of the junction layer 12 is 0.1% or higher. In other words, the spectral transmittance of the junction layer 12 made of materials other than SiC is 0.1% or higher.

[0031] In the SiC composite substrate 1 according to this embodiment, bonding with a remote epitaxial growth layer is achieved. A polycrystalline SiC substrate can be bonded to the fragile epitaxial growth layer by solid-phase diffusion bonding. Furthermore, a sufficiently high transmittance can be obtained after solid-phase diffusion bonding. For this reason, it can be used in semiconductor manufacturing processes. Compared to alloy bonding, it becomes possible to use semiconductor manufacturing processes, which facilitates the simplification and automation of the manufacturing process. Since no stress is applied during wafer transport or delamination, and no crystal defects are introduced, it is possible to improve properties and yield.

[0032] (modified version) Figure 2 is a cross-sectional view of a modified SiC composite substrate 2 according to the embodiment.

[0033] The modified SiC composite substrate 2 is constructed by sequentially stacking a first single-crystal SiC layer 13a, in which an impurity is added at a first concentration, and a second single-crystal SiC layer 13b, in which an impurity is added at a second concentration lower than the first concentration. This differs from the SiC composite substrate 1 according to the first embodiment, which is composed of a single-crystal SiC layer 13 with a single impurity concentration. The other components of the SiC composite substrate 2 are the same as those of the SiC composite substrate 1 according to the embodiment. Therefore, redundant explanations are omitted.

[0034] In the modified SiC composite substrate 2, the impurity concentration in the first single crystal SiC layer 13a is, for example, 10 18 cm -3 In contrast to the base, the impurity concentration in the second single crystal SiC layer 13b is, for example, 10 16 cm -3The impurity concentration of the second single-crystal SiC layer 13b may be an order of magnitude smaller than the impurity concentration of the first single-crystal SiC layer 13a. Although the single-crystal SiC layer 13 of the SiC composite substrate 2 is composed of two layers, the first single-crystal SiC layer 13a and the second single-crystal SiC layer 13b, it may be composed of three or more layers, each with a different concentration of added impurities. For example, the impurity concentration in each layer may gradually decrease from the bottom layer to the top layer.

[0035] When constructing a semiconductor device using a single-crystal SiC layer 13 of a SiC composite substrate 2 as a drift layer, it is possible to form two layers with different concentrations within the drift layer. For this reason, for example, the first single-crystal SiC layer 13a can be given a function such as a buffer layer.

[0036] In the modified SiC composite substrate 2, the bonding layer 12 can be formed thinly by atomic diffusion bonding, and because the wafer has high transmittance, accurate evaluation is possible when evaluating defects by PL and measuring film thickness by IR, making it easy to introduce into semiconductor processes.

[0037] (Manufacturing method for SiC composite substrate 1) A method for manufacturing the SiC composite substrate 1 will be described.

[0038] Figures 3A to 3D are process flow diagrams (first half) of the manufacturing method of the SiC composite substrate 1 according to the embodiment, and are diagrams that explain the process of fabricating the single crystal SiC layer 13 of the SiC composite substrate 1.

[0039] Figures 4A to 4E are process flow diagrams (second half) of the manufacturing method of the SiC composite substrate 1 according to the embodiment, illustrating the process of stacking a single crystal SiC layer 13 on a polycrystalline SiC substrate 11 to form a bonding layer 12.

[0040] The method for manufacturing the SiC composite substrate 1 according to the embodiment includes the steps of: providing a single-crystal SiC substrate 21 on which a graphene film 22 is formed on the main surface (Figure 3A); epitaxially growing a single-crystal SiC layer 23 on the main surface of the single-crystal SiC substrate 21 via the graphene film 22 (Figure 3B); peeling the single-crystal SiC layer 23 from the graphene film 22 (Figures 3C and 3D); and forming a bonding layer 12 on the main surface of a polycrystalline SiC substrate 11, interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 23, by bonding a metal compound containing W and Si by atomic diffusion (Figures 4A to 4E).

[0041] The process of forming the bonding layer 12 includes the steps of forming an interface layer 20 containing a metal layer (15) and a nonmetal layer (16) between the main surface of the polycrystalline SiC substrate 11 and the main surface of the single-crystal SiC layer 23 (Figure 4E), and the steps of heating the interface layer 20 to react the metal layer (15) and the nonmetal layer (16) to form a metal compound containing W and Si by atomic diffusion.

[0042] The process of forming the interface layer 20 includes the steps of sequentially depositing a metal layer (15) and a non-metallic layer (16) on the main surface of the polycrystalline SiC substrate 11 and the main surface of the single-crystal SiC layer 23, respectively, and arranging the main surface of the single-crystal SiC layer 23 in contact with the main surface of the polycrystalline SiC substrate 11 with the deposited metal layer (15) and non-metallic layer (16) interposed between them (Figure 4E).

[0043] The process for forming the interface layer 20 includes the steps of alternately depositing a metal layer (15) and a nonmetal layer (16) on the main surface of the polycrystalline SiC substrate 11, alternately depositing a metal layer (15) and a nonmetal layer (16) on the main surface of the single-crystal SiC layer 23, and arranging the single-crystal SiC layer 23 so that its main surface faces and is in contact with the main surface of the polycrystalline SiC substrate 11 (Figure 4E).

[0044] —Remote epitaxial growth— (A) First, a single-crystal SiC substrate 21 is prepared, with a graphene film 22 formed on its main surface, as shown in Figure 3A. The single-crystal SiC substrate 21 may be formed by sublimation or a solution method. The single-crystal SiC substrate 21 may, for example, have a crystal polymorph of 4H and a main surface that is the (0001) plane, but it is not limited to this and may have other crystal polymorphs such as 6H or 3C, and the main surface may be any other crystal plane.

[0045] The graphene film 22 formed on the main surface of the single-crystal SiC substrate 21 may be a zero layer in which two-dimensionally extending graphene is covalently bonded to atoms on the main surface of the single-crystal SiC substrate 21. Alternatively, it may be formed from several layers of graphene. The graphene film 22 may be deposited by CVD or formed by thermal decomposition of the main surface of the single-crystal SiC substrate 21.

[0046] (B) Next, as shown in Figure 3B, a single-crystal SiC layer 23 is formed on the main surface of the single-crystal SiC substrate 21 via a graphene film 22 by epitaxial growth. Van der Waals forces are exerted on the single-crystal SiC layer 23 from the SiC atoms constituting the main surface of the single-crystal SiC substrate 21 via the graphene film 22. As a result, the crystal structure of the main surface of the single-crystal SiC substrate 21 is transferred to the single-crystal SiC layer 23. The single-crystal SiC layer 23 can be fabricated to a thickness of, for example, 2 μm or more by epitaxial growth. Furthermore, the defect density of basal plane dislocations in the single-crystal SiC layer 23 is 1 × 10⁻⁶. 1 From 1 x 10 3 It can be made to fall within this range. Impurities are added to the single-crystal SiC layer 23. The added impurities may be n-type impurities such as nitrogen (N) and phosphorus (P). The concentration of the impurities is 1 × 10⁻⁶. 16 cm -3 From 5x10 18 cm -3 It may be within the range up to that point.

[0047] (C) Next, as shown in Figure 3C, a stress layer 24 is formed on the single-crystal SiC layer 23, and a tape 25 is attached to the stress layer 24. For example, a nickel (Ni) layer is used for the stress layer 24. The stress layer 24 applies stress to the single-crystal SiC layer 23 so that it peels off from the graphene film 22. The Ni layer that becomes the stress layer 24 may be formed by vapor deposition or sputtering. Note that the stress layer 24 is not limited to Ni, but may be composed of other materials such as silicon nitride (SiN) or diamond-like carbon (DLC). The tape 25 may be a heat-release tape that peels off when heated.

[0048] (D) Next, as shown in Figure 3D, the single-crystal SiC layer 23 formed on the main surface of the single-crystal SiC substrate 21 via the graphene film 22 is peeled off. The two-dimensionally formed graphene film 22 and the single-crystal SiC layer 23 are bonded by van der Waals forces, and stress is applied to the single-crystal SiC layer 23 from the stress layer 24. Therefore, the single-crystal SiC layer 23 can be easily peeled off from the graphene film 22 by applying force to the tape 25 that supports it via the stress layer 24. The peeled single-crystal SiC layer 23 is supported by the tape 25 via the stress layer 24. The single-crystal SiC layer 23 corresponds to the single-crystal SiC layer 13 (Figure 1) of the SiC composite substrate 1.

[0049] —Method for forming the bonding layer 12— (E) First, a polycrystalline SiC substrate 11 is prepared as shown in Figure 4A. The crystalline polymorph of the polycrystalline SiC substrate 11 may be 4H, or other crystalline polymorphs such as 6H or 3C. The polycrystalline SiC substrate 11 may be formed by deposition by CVD. Impurities are added to the polycrystalline SiC substrate 11. The added impurities may be n-type impurities, similar to those in the single-crystal SiC layer 23. The impurity concentration is 1 × 10⁻⁶ 19 cm -3 From 5x10 20 cm -3 It may be within the range up to that point.

[0050] (F) Next, as shown in Figure 4B, a tungsten (W) layer 15 and a silicon (Si) layer 16 are sequentially deposited on the main surface of the polycrystalline SiC substrate 11. The W layer 15 may be deposited by vapor deposition or sputtering. The Si layer 16 may be deposited by CVD.

[0051] (G) On the other hand, as shown in Figure 4C, a W layer 15 and a Si layer 16 are similarly laminated in order on the main surface of the single-crystal SiC layer 23 that was peeled off from the graphene film 22 in Figure 3D. The W layer 15 may be deposited by vapor deposition or sputtering. The Si layer 16 may be deposited by CVD. The single-crystal SiC layer 23 is supported by a tape 25 via the Ni layer of the stress layer 24.

[0052] (H) Next, as shown in Figure 4D, the main surface of a single-crystal SiC layer 23, which is similarly constructed by stacking W layers 15 and Si layers 16, is placed opposite the main surface of a polycrystalline SiC substrate 11, which is constructed by stacking W layers 15 and Si layers 16.

[0053] (I) Next, as shown in Figure 4E, the W layer 15 and Si layer 16, which are laminated on the polycrystalline SiC substrate 11 and the single-crystal SiC layer 23 respectively, are placed facing each other with the Si layer 16 in contact, and the tape 25 is removed to form the laminate 4. If the tape 25 is a heat-release tape, the tape 25 is heated and removed. In the laminate 4, between the main surface of the polycrystalline SiC substrate 11 and the main surface of the single-crystal SiC layer 13, the W layer 15, Si layer 16, Si layer 16 and W layer 15 are laminated from the polycrystalline SiC substrate 11 toward the single-crystal SiC layer 23. These layers interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13 are called interface layers 20.

[0054] (J) Next, the laminate 4 is heated, and the W in the W layer 15 of the interface layer 20 reacts with the Si in the Si layer 16 to form a bonding layer 12 composed of the metallic compound tungsten silicide (WSi2). Heating causes the Si in the Si layer 16 to diffuse into the W layer 15, forming WSi2. After the bonding layer 12 is formed, the Ni layer of the stress layer 24 laminated on the single crystal SiC layer 23 is removed by etching or the like.

[0055] Through the above series of steps, the SiC composite substrate 1 (Figure 1) according to the embodiment is formed. The single-crystal SiC layer 23 of the laminate 4 corresponds to the single-crystal SiC layer 13 in the SiC composite substrate 1 (Figure 1) according to the embodiment.

[0056] In the SiC composite substrate 1 according to this embodiment, a polycrystalline SiC substrate 11 and a single-crystal SiC layer 23 are bonded together by a bonding layer 12. Therefore, it is possible to manufacture a SiC composite substrate 1 that does not warp in the substrate or require flattening of the bonded surface.

[0057] Since atomic diffusion bonding is used to form the bonding layer 12, the thickness of the bonding layer 12 can be made, for example, about 100 nm or less. As a result, a transmittance of 0.1% or more is obtained for the bonding layer 12.

[0058] Furthermore, the single-crystal SiC layer 13 of the SiC composite substrate 1 is fabricated by epitaxial growth and then placed and bonded, without any processing. Therefore, the stress on the single-crystal SiC layer 13 is small, and a high-quality single-crystal SiC layer 13 with few crystal defects can be obtained.

[0059] (Manufacturing method for SiC composite substrate 2 according to modified example) Figure 5 is a cross-sectional view illustrating a modified example of a method for manufacturing a SiC composite substrate 2.

[0060] The modified method for manufacturing the SiC composite substrate 2 uses a single crystal SiC layer 23 in which a first single crystal SiC layer 23a containing impurities added at a first concentration and a second single crystal SiC layer 23b containing impurities added at a second concentration are stacked, as shown in Figure 5.

[0061] (K) First, as shown in Figure 5, the main surface of a single-crystal SiC layer 23, which is similarly constructed by stacking W layers 15 and Si layers 16, is placed opposite the main surface of a polycrystalline SiC substrate 11, which is constructed by stacking W layers 15 and Si layers 16. The single-crystal SiC layer 23 is constructed by stacking a first single-crystal SiC layer 23a and a second single-crystal SiC layer 23b. Note that the stress layer 24 and tape 25 are not shown.

[0062] (L) Next, similar to Figure 4E, the W layer 15 and Si layer 16, which are laminated on the polycrystalline SiC substrate 11 and the single-crystal SiC layer 23 respectively, are placed so that the Si layer 16 of each layer is in contact with the other, thereby forming an interface layer 20 between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 23.

[0063] (M) Next, heating is used to react the W in the W layer 15 of the interface layer 20 with the Si in the Si layer 16 to form a bonding layer 12 made of WSi2. After the bonding layer 12 is formed, the Ni layer of the stress layer 24 is removed by etching or the like.

[0064] Through this process, a modified SiC composite substrate 2 according to the embodiment is obtained. The single-crystal SiC layer 23 in Figure 5 becomes the single-crystal SiC layer 13 in the SiC composite substrate 2 of Figure 2, and the first single-crystal SiC layer 23a and the second single-crystal SiC layer 23b become the first single-crystal SiC layer 13a and the second single-crystal SiC layer 13b.

[0065] (Example 1 of the manufacturing method for SiC composite substrate) The process of forming the interface layer 20 includes the steps of forming a second WSi2 layer 17P on the main surface of the polycrystalline SiC substrate 11, forming a first WSi2 layer 17S on the main surface of the single-crystal SiC layer 23 (Figure 6), and arranging the main surface of the single-crystal SiC layer 23 to be in contact with the main surface of the polycrystalline SiC substrate 11, and the steps of heating the interface layer 20 to react the first WSi2 layer 17S and the second WSi2 layer 17P to form a WSi2 layer junction layer 12 by atomic diffusion.

[0066] Figure 6 is a cross-sectional view illustrating Example 1 of the manufacturing method for the SiC composite substrate 1.

[0067] Here, we will describe Example 1 of the manufacturing method for a SiC composite substrate. First, a 4H single-crystal SiC substrate 21 was heated at a high temperature of 1500°C or higher in an argon (Ar) atmosphere at atmospheric pressure, and a graphene film 22 consisting of 1 to 2 layers was grown on the main surface by thermal decomposition. Then, a single-crystal SiC layer 23 with a thickness of 3 μm was grown on the graphene film 22 by epitaxy using silane (SiH4) and propane (C3H8) as precursors. At this time, Ar was used as the carrier gas, and nitrogen gas (N2) was also flowed simultaneously as an n-type impurity gas.

[0068] A 5 μm thick DLC film was deposited on a single-crystal SiC layer 23 as a stress layer 24 by plasma CVD. Then, an adhesive tape 25 was attached to the stress layer 24 to exfoliate the single-crystal SiC layer 23 from the graphene film 22. A 30 nm thick first WSi2 layer 17S was deposited on the exfoliated single-crystal SiC layer 23 using CVD. Meanwhile, a 30 nm thick second WSi2 layer 17P was deposited on the main surface of a polycrystalline SiC substrate 11 grown on a graphite substrate using CVD. After bonding the first WSi2 layer 17S and the second WSi2 layer 17P together to form an interface layer 20, the tape 25 was removed, and the first WSi2 layer 17S and the second WSi2 layer 17P of the interface layer 20 reacted by heating at 1000°C in an Ar atmosphere to form a bonding layer 12 as WSi2. Finally, the SiC composite substrate 1 shown in Figure 1 was obtained by heating it to over 600°C in air and removing the DLC film by combustion.

[0069] (Example 2 of the manufacturing method for SiC composite substrates) Example 2 of the manufacturing method for the SiC composite substrate 2 involves applying a single crystal SiC layer 23 formed by stacking a first single crystal SiC layer 23a and a second single crystal SiC layer 23b, as shown in Figure 5.

[0070] A first single-crystal SiC layer 23a is grown on the main surface of a single-crystal SiC substrate 21 (Figure 3A) by epitaxial growth, with impurities added at a first concentration. Subsequently, a second single-crystal SiC layer 23b is grown with impurities added at a second concentration. Here, the first concentration of impurities in the first single-crystal SiC layer 23a is, for example, 10 18 cm -3 In contrast to the base, the second concentration of impurities in the second single-crystal SiC layer 23b is, for example, 10 16 cm -3 As shown above, the second impurity concentration in the second single-crystal SiC layer 23b may be on the order of an order of magnitude smaller than the first impurity concentration in the first single-crystal SiC layer 23a. Other steps for fabricating the single-crystal SiC layer 23 are the same as those shown in Figures 3A to 3D.

[0071] Figure 7 illustrates Example 2 of the manufacturing method for the SiC composite substrate 2.

[0072] Here, Example 2 of the manufacturing method for a SiC composite substrate is described. First, a 4H single-crystal SiC substrate 21 was heated at a high temperature of 1500°C or higher in an argon (Ar) atmosphere at atmospheric pressure, and a graphene film 22 consisting of 1 to 2 layers was grown on the main surface by pyrolysis. Then, a single-crystal SiC layer 23 with a thickness of 3 μm was grown on the graphene film 22 by epitaxy using silane (SiH4) and propane (C3H8) as precursors. At this time, Ar was used as the carrier gas, and nitrogen gas (N2) was also flowed simultaneously as an n-type impurity gas. By appropriately controlling the flow rate, the concentration of impurities added to the single-crystal SiC layer 23 was adjusted according to the distance from the boundary with the graphene film 22, resulting in a concentration of 2 × 10⁻¹⁶ in the first single-crystal SiC layer 23a. 18 cm -3 and the 5 × 10 of the second single crystal SiC layer 23b 16 cm -3 It was manufactured to have a two-layer structure.

[0073] A 5 μm thick DLC film was deposited on a single-crystal SiC layer 23 as a stress layer 24 by plasma CVD. A sticky tape 25 was then attached to the stress layer 24 to exfoliate the single-crystal SiC layer 23 from the graphene film 22. A 30 nm first WSi2 layer 17S was deposited on the first single-crystal SiC layer 23a of the exfoliated single-crystal SiC layer 23. Meanwhile, a 30 nm second WSi2 layer 17P was deposited on the main surface of a polycrystalline SiC substrate 11 grown on a graphite substrate using CVD. After bonding the two layers together to form an interface layer 20, the tape 25 was removed. The second WSi2 layer 17P and the first WSi2 layer 17S of the interface layer 20 reacted by heating at 1000°C in an Ar atmosphere, forming a junction layer 12 through atomic diffusion of WSi2 atoms. Finally, the DLC film was removed by combustion by heating at over 600°C in air to obtain the SiC composite substrate 2.

[0074] (Semiconductor devices) Next, embodiments of semiconductor devices will be described. The semiconductor device according to the embodiment uses the SiC composite substrate 2 shown in Figure 2. The SiC composite substrate 2 is configured with a polycrystalline SiC substrate 11 as the substrate layer and a single-crystal SiC layer 13 as the drift layer. The SiC composite substrate 2 has a junction layer 12 interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13. The conductive device according to the embodiment also has a junction layer 12 interposed between the substrate layer and the drift layer. Below, examples of electronic devices using the SiC composite substrate 2 will be described, namely Schottky barrier diodes (SBDs) and trench-gate type MOSFETs (Metal Oxide Field Effect Transistors). Although it is also applicable to other devices such as MEMS (Micro Electro Mechanical Systems), their explanation will be omitted here.

[0075] (SBD) Figure 8 is a cross-sectional view of SBD30. SBD30 was fabricated using a SiC composite substrate 2 according to the modified example shown in Figure 2. In SBD30, a SiC composite substrate 2 is used in which a single-crystal SiC layer 13 is laminated on a polycrystalline SiC substrate 11 with a bonding layer 12 interposed between them.

[0076] The polycrystalline SiC substrate 11 is, for example, 10 19 cm -3 from 10 20 cm -3 High concentrations of n in the range + The substrate layer is doped into the mold. The bottom surface of the polycrystalline SiC substrate 11 is covered with a cathode electrode 41, and the cathode electrode 41 is connected to the cathode terminal K of the SBD 20.

[0077] The single-crystal SiC layer 13 is constructed by sequentially stacking a first single-crystal SiC layer 13a, which is doped with impurities at a first concentration, and a second single-crystal SiC layer 13b, which is doped with impurities at a second concentration lower than the first concentration. The impurity concentration in the first single-crystal SiC layer 13a is, for example, 10 18 cm -3 In contrast to the base, the impurity concentration in the second single crystal SiC layer 13b is, for example, 10 16 cm -3 This is the base. The single-crystal SiC layer 13 is a drift layer.

[0078] The top surface 13c of the single-crystal SiC layer 13 is provided with a contact hole 43 that exposes a portion of the single-crystal SiC layer 13 as a body region 42, and a field insulating film 45 is formed in the field region 44 surrounding the body region 42. The field insulating film 45 is made of SiO2 (silicon oxide), but may be made of other insulating materials such as silicon nitride (SiN). An anode electrode 46 is formed on this field insulating film 45, and the anode electrode 46 is connected to the anode terminal A of the SBD 20.

[0079] A p-type JTE (junction termination extension) structure 47 is formed near the top surface 13c (surface layer) of the single-crystal SiC layer 13, in contact with the anode electrode 46. The JTE structure 47 is formed along the contour of the contact hole 43, spanning both the inside and outside of the contact hole 43 of the field insulating film 45.

[0080] (Trench-gate MOSFET) Figure 9 is a cross-sectional view of a trench gate type MOSFET 40. The trench gate type MOSFET 40 was fabricated using a modified SiC composite substrate 2 shown in Figure 2. In the trench gate type MOSFET 40, a SiC composite substrate 2 is used in which a single crystal SiC layer 13 is stacked with a junction layer 12 interposed on a polycrystalline SiC substrate 11.

[0081] The polycrystalline SiC substrate 11 is, for example, 10 19 cm -3 from 10 20 cm -3 High concentrations of n in the range + The substrate layer is doped into the mold. The bottom surface of the polycrystalline SiC substrate 11 is covered with a drain electrode 31, which is connected to the drain terminal D of the trench gate type MOSFET 40.

[0082] The single-crystal SiC layer 13 is constructed by sequentially stacking a first single-crystal SiC layer 13a, which is doped with impurities at a first concentration, and a second single-crystal SiC layer 13b, which is doped with impurities at a second concentration lower than the first concentration. The impurity concentration in the first single-crystal SiC layer 13a is, for example, 10 18 cm -3 In contrast to the base, the impurity concentration in the second single crystal SiC layer 13b is, for example, 10 16 cm -3 This is the base. The single-crystal SiC layer 13 is a drift layer.

[0083] A p-type body region 32 is formed on the top surface 13c of the single-crystal SiC layer 13. A gate trench 34 is formed in the single-crystal SiC layer 13. The gate trench 34 penetrates the body region 32 from the top surface 13c of the single-crystal SiC layer 13, and its deepest part reaches the drain region 33.

[0084] A gate insulating film 35 is formed on the inner surface of the gate trench 34 and on the top surface 13c of the single-crystal SiC layer 13, covering the entire inner surface of the gate trench 34. A gate electrode 36 is embedded in the gate trench 34 by filling the inside of the gate insulating film 35 with, for example, polysilicon. A gate terminal G is connected to the gate electrode 36.

[0085] The surface layer of the body region 32 is made of highly doped n, which forms part of the side surface of the gate trench 34. + A type source region 37 is formed. In addition, the single crystal SiC layer 13 has a highly doped p that penetrates the source region 37 from its top surface 13c and connects to the body region 32. + A body contact area 38 of a certain type is formed.

[0086] An interlayer insulating film 51 made of SiO2 is formed on the single-crystal SiC layer 13. The source electrode 39 is connected to the source region 37 and the body contact region 38 via a contact hole 43 formed in the interlayer insulating film 51. A source terminal S is connected to the source electrode 39.

[0087] By generating a predetermined potential difference between the source electrode 39 and the drain electrode 31 (source-drain), and applying a predetermined voltage (a voltage greater than or equal to the gate threshold voltage) to the gate electrode 36, a channel can be formed near the interface between the gate insulating film 35 and the body region 32 by the electric field from the gate electrode 36. This allows current to flow between the source electrode 39 and the drain electrode 31, thereby turning on the trench gate type MOSFET 40.

[0088] The semiconductor device according to this embodiment is fabricated using a SiC composite substrate 2 having a high-quality single-crystal SiC layer 13 with few crystal defects. Therefore, even in a semiconductor device in which the drift layer is configured as a single-crystal SiC layer 13, quality degradation caused by lattice defects and the like is suppressed, and the characteristics are ensured.

[0089] In the above description of the embodiments, polycrystalline SiC substrates and single-crystal SiC layers were used as examples, but the method can be applied not only to SiC but also to GaN or GaAs, which are materials that can be remotely epitaxially grown.

[0090] Although the present disclosure has been described in detail above, it will be clear to those skilled in the art that the present disclosure is not limited to the embodiments described herein. One or more elements of one embodiment can be combined with one or more elements of another embodiment. The present disclosure can be implemented in modified and altered forms without departing from the spirit and scope of the present disclosure as defined by the claims. Therefore, the descriptions in the present disclosure are illustrative and not intended to be restrictive in any way.

[0091] (Note) The technical concepts that can be grasped from this disclosure are described below. Note that, not as an attempt to limit the scope but to aid understanding, the components described in the appendices are denoted by the corresponding reference numerals of the components in the embodiments. The reference numerals are provided as examples to aid understanding, and the components described in each appendice should not be limited to those indicated by the reference numerals.

[0092] (Note 1) The SiC composite substrate 1 comprises a polycrystalline SiC substrate 11, a single-crystal SiC layer 13 laminated on the polycrystalline SiC substrate 11, and a bonding layer 12 interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, formed by bonding a metal compound containing W and Si by atomic diffusion. The spectral transmittance of the bonding layer 12, which is made of materials other than SiC, is 0.1% or more in the wavelength range of 400 nm to 800 nm. The bonding layer is formed by solid-phase diffusion, resulting in high transmittance. For this reason, it can be used in semiconductor processes for defect evaluation by photoluminescence and film thickness measurement by infrared spectrophotometer.

[0093] (Note 2) In the SiC composite substrate 1 described in Appendix 1, the bonding layer 12 may contain tungsten silicide (WSi2). The bonding layer is formed by solid-phase diffusion, and high transmittance is obtained.

[0094] (Note 3) In the SiC composite substrate 1 described in Appendix 1, the thickness of the bonding layer 12 may be 5 nm or more and 100 nm or less. A thin bonding layer is formed by solid-phase diffusion, and a sufficiently high transmittance can be obtained.

[0095] (Note 4) In the SiC composite substrate 1 described in Appendix 1, the concentration of impurities added to the single-crystal SiC layer 13 is 1 × 10⁻⁶ 16 From 5x10 20 cm -3 It may also be within this range. The SiC composite substrate 1 can be used for SBDs and trench-type MOS devices.

[0096] (Note 5) The method for manufacturing the SiC composite substrate 1 may include the steps of: providing a single-crystal SiC substrate 21 on which a graphene film 22 is formed on the main surface; epitaxially growing a single-crystal SiC layer 23 on the main surface of the single-crystal SiC substrate 21 via the graphene film 22; peeling the single-crystal SiC layer 23 from the graphene film 22; and forming a bonding layer 12 on the main surface of a polycrystalline SiC substrate 11, interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 23, by bonding a metal compound containing W and Si by atomic diffusion. A thin bonding layer is formed by atomic diffusion, and high transmittance can be obtained.

[0097] (Note 6) In the method for manufacturing the SiC composite substrate 1 described in Appendix 5, the step of forming the bonding layer 12 may include the steps of forming an interface layer 20 containing a metal layer (15) and a nonmetal layer (16) between the main surface of the polycrystalline SiC substrate 11 and the main surface of the single-crystal SiC layer 23, and heating the interface layer 20 to react the metal layer (15) and the nonmetal layer (16) to form a metal compound containing W and Si by atomic diffusion. A thin bonding layer 12 is formed by atomic diffusion, and high transmittance can be obtained.

[0098] (Note 7) In the method for manufacturing the SiC composite substrate 1 described in Appendix 6, the step of forming the interface layer 20 may include the steps of sequentially depositing a metal layer (15) and a non-metallic layer (16) on the main surface of the polycrystalline SiC substrate 11 and the main surface of the single-crystal SiC layer 23, respectively, and arranging the deposited metal layer (15) and non-metallic layer (16) interposed between them so that the main surface of the single-crystal SiC layer 23 is in contact with the main surface of the polycrystalline SiC substrate 11. A thin bonding layer 12 can be formed by atomic diffusion.

[0099] (Note 8) In the method for manufacturing the SiC composite substrate 1 described in Appendix 6, the step of forming the interface layer 20 may include the steps of alternately depositing a metal layer (15) and a non-metallic layer (16) on the main surface of the polycrystalline SiC substrate 11, alternately depositing a metal layer (15) and a non-metallic layer (16) on the main surface of the single-crystal SiC layer 23, and arranging the main surface of the single-crystal SiC layer 23 to be in contact with the main surface of the polycrystalline SiC substrate 11. A thin bonding layer 12 can be formed by atomic diffusion.

[0100] (Note 9) In the method for manufacturing the SiC composite substrate 1 described in Appendix 6, the step of forming the interface layer 20 includes the steps of forming a second WSi2 layer 17P on the main surface of the polycrystalline SiC substrate 11, forming a first WSi2 layer 17S on the main surface of the single-crystal SiC layer 23, and arranging the main surface of the single-crystal SiC layer 23 to be in contact with the main surface of the polycrystalline SiC substrate 11, and may also include the step of heating the interface layer 20 to react the first WSi2 layer 17S and the second WSi2 layer 17P to form a WSi2 layer by atomic diffusion. A thin junction layer 12 of the WSi2 layer is formed by atomic diffusion, and high transmittance can be obtained.

[0101] (Note 10) The SiC composite substrate 2 comprises a polycrystalline SiC substrate 11, a single-crystal SiC layer 13 laminated on the polycrystalline SiC substrate 11, and a bonding layer 12 interposed between the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, wherein a metal compound containing W and Si is bonded by atomic diffusion. The single-crystal SiC layer 13 may be composed of a first single-crystal SiC layer 13a with impurities added at a first concentration, and a second single-crystal SiC layer 13b with impurities added at a second concentration lower than the first concentration, which are laminated in sequence. The spectral transmittance of the junction layer 12, which is made of a material other than SiC, is 0.1% or higher in the wavelength range of 400 nm to 800 nm. A thin junction layer is formed by solid-phase diffusion, resulting in high transmittance. Therefore, it can be used in semiconductor processes for defect evaluation by photoluminescence and film thickness measurement by infrared spectrophotometer.

[0102] (Note 11) In the SiC composite substrate 2 described in Appendix 10, the impurity concentration in the first single crystal SiC layer 13a is, for example, 10 18 cm -3 In contrast to the base, the impurity concentration in the second single crystal SiC layer 13b is, for example, 10 16 cm -3 It is a base. The SiC composite substrate 1 can be used for SBDs and trench-type MOS devices.

[0103] (Note 12) In the SiC composite substrate 2 described in Appendix 10, the impurity concentration of the second single-crystal SiC layer 13b may be an order of magnitude smaller than the impurity concentration of the first single-crystal SiC layer 13a. A junction layer is formed by solid-phase diffusion, and high transmittance is obtained. When the single-crystal SiC layer 13 of the SiC composite substrate 2 is used as a drift layer to construct a semiconductor device, two layers with different concentrations can be formed within the drift layer. For this reason, for example, the first single-crystal SiC layer 13a can be given a function such as a buffer layer. The SiC composite substrate 2 can be used in SBDs and trench-type MOS devices.

[0104] (Note 13) In the SiC composite substrate 2 described in Appendix 10, the single-crystal SiC layer 13 of the SiC composite substrate 2 may be composed of three or more layers, each with a different concentration of added impurities. When the single-crystal SiC layer 13 of the SiC composite substrate 2 is used as a drift layer to construct a semiconductor device, two layers with different concentrations can be formed within the drift layer. For this reason, for example, the first single-crystal SiC layer 13a can be given a function such as a buffer layer. The SiC composite substrate 2 can be used in SBDs and trench-type MOS devices.

[0105] (Note 14) In the SiC composite substrate 2 described in Appendix 10, the concentration of impurities in each layer of the single-crystal SiC layer 13 of the SiC composite substrate 2 may gradually decrease from the lower layer to the upper layer. When the single-crystal SiC layer 13 of the SiC composite substrate 2 is used as a drift layer to construct a semiconductor device, two layers with different concentrations can be formed within the drift layer. For this reason, for example, the first single-crystal SiC layer 13a can be given a function such as a buffer layer. The SiC composite substrate 2 can be used in SBDs and trench-type MOS devices.

[0106] (Note 15) The semiconductor device is constructed by using a single-crystal SiC layer 13 of a SiC composite substrate 2 as described in any one of appendices 10 to 14 as a drift layer. The single-crystal SiC layer 13 can constitute the drift layer of the semiconductor device.

[0107] (Note 16) The semiconductor device described in Appendix 15 may include at least one of a Schottky barrier diode, a trench gate type MOS, and a plane gate type MOS. At least one of a Schottky barrier diode, a trench gate type MOS, and a plane gate type MOS can be constructed using the single crystal SiC layer 13 of the SiC composite substrate 2 as a drift layer. [Explanation of symbols]

[0108] 1, 2 SiC composite substrate 4 Laminate 11 Polycrystalline SiC substrate 12 Bonding layer 13, 23 Single-crystal SiC layer 13a, 23a First single crystal SiC layer 13b, 23b Second single-crystal SiC layer 13c top surface 15 W layer 16 Si layer 17S First WSi2 layer 17P Second WSi2 layer 20 Interface layer 21 Single-crystal SiC substrate 22 Graphene membrane 24 Stress Layer 25 Tapes 30 Schottky barrier diodes 31 Drain electrode 32, 42 Body regions 33 Drain area 34 Gate Trench 35 Gate insulating film 36 Food Products 37 Source Area 38 Body Contact Area 39 Source electrodes 40 Trench-gate type MOSFETs 41 Cathode electrode 43, 52 Contact holes 44 Field Area 45 Field Insulating Film 46 Anode electrodes 47 JTE structure 51 Interlayer insulating film

Claims

1. Polycrystalline SiC substrate and A single-crystal SiC layer stacked on the aforementioned polycrystalline SiC substrate, A bonding layer is interposed between the polycrystalline SiC substrate and the single-crystal SiC layer, and a metal compound containing W and Si is bonded by atomic diffusion. Equipped with, A SiC composite substrate wherein the spectral transmittance of the bonding layer, which is made of a material other than SiC, is 0.1% or more in the wavelength range of 400 nm to 800 nm.

2. The bonding layer is tungsten silicide (WSi 2 A SiC composite substrate according to claim 1, comprising )

3. The SiC composite substrate according to claim 1, wherein the thickness of the bonding layer is 5 nm or more and 100 nm or less.

4. The concentration of impurities added to the single-crystal SiC layer is 1 × 10⁻⁶ 16 From 5 x 10 20 cm -3 A SiC composite substrate according to claim 1, which is within the range of the specified area.

5. A step of providing a single-crystal SiC substrate on which a graphene film is formed on the main surface, A step of epitaxially growing a single-crystal SiC layer on the main surface of the single-crystal SiC substrate via the graphene film, The steps include peeling the single-crystal SiC layer from the graphene film, The process involves placing the single-crystal SiC layer on the main surface of a polycrystalline SiC substrate, interposed between the polycrystalline SiC substrate and the single-crystal SiC layer, and forming a bonding layer in which a metal compound containing W and Si is bonded by atomic diffusion. A method for manufacturing a SiC composite substrate, including the method described above.

6. The step of forming the bonding layer is, A step of forming an interface layer including a metal layer and a nonmetal layer between the main surface of the polycrystalline SiC substrate and the main surface of the single-crystal SiC layer, A step of heating the interface layer to react the metal layer and the nonmetal layer to form a metal compound containing W and Si by atomic diffusion. A method for manufacturing a SiC composite substrate according to claim 5, including the method described in claim 5.

7. The step of forming the aforementioned interface layer is: A step of sequentially depositing the metal layer and the nonmetal layer on the main surface of the polycrystalline SiC substrate and the main surface of the single-crystal SiC layer, respectively. A step of arranging the metal layer and the non-metal layer between them such that the main surface of the single-crystal SiC layer is in contact with the main surface of the polycrystalline SiC substrate. A method for manufacturing a SiC composite substrate according to claim 6, including the method described in claim 6.

8. The step of forming the aforementioned interface layer is: A step of alternately depositing the metal layer and the nonmetal layer on the main surface of the polycrystalline SiC substrate, A step of alternately depositing the metal layer and the nonmetal layer on the main surface of the single-crystal SiC layer, A step of arranging the main surface of the single-crystal SiC layer so that it is in contact with the main surface of the polycrystalline SiC substrate. A method for manufacturing a SiC composite substrate according to claim 6, including the method described in claim 6.

9. The step of forming the aforementioned interface layer is: The first WSi is placed on the main surface of the single-crystal SiC layer. 2 The process of forming layers, A second WSi is placed on the main surface of the polycrystalline SiC substrate. 2 The process of forming layers, A step of arranging the main surface of the single-crystal SiC layer so that it is in contact with the main surface of the polycrystalline SiC substrate. Includes, heating said interface layer to cause said first WSi 2 layer and said second WSi 2 layer to react with each other to form a WSi 2 layer by atomic diffusion A method for manufacturing a SiC composite substrate according to claim 6, including the method described in claim 6.

10. A semiconductor device comprising a single-crystal SiC layer of a SiC composite substrate according to any one of claims 1 to 4, configured as a drift layer.

11. The semiconductor device according to claim 10, comprising at least one of a Schottky barrier diode, a planar MOSFET, and a trench gate MOSFET.

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