Method for depositing copper thin films in glass vias using atomic sputter epitaxy

Abstract

To provide a method for improving the electrical properties of electronic packaging and semiconductor process technologies utilizing through-glass via (TGV) technology by depositing a more reliable copper (Cu) thin film. [Solution] The method for depositing a copper thin film inside a through-glass via (TGV) using atomic sputtering epitaxy is characterized by uniformly depositing a copper thin film inside and on the surface of the TGV using an atomic sputtering epitaxy (ASE) process, and depositing the copper thin film so that the electrical resistance of the upper and lower parts of the TGV is 0.1Ω or less.

Description

[[Technical Field]]

[0001] The present invention relates to electronic packaging and semiconductor processing technology utilizing Through Glass Via (TGV) technology, and more particularly to a method for improving electrical characteristics through highly reliable copper (Cu) thin film deposition. [[Background Art]]

[0002] Through Glass Via (TGV, hereinafter referred to as "TGV") technology plays an important role in the semiconductor and electronic packaging industries, and has attracted particular attention in the application fields of high frequency (RF) and three-dimensional stacked integrated circuits (3D-IC). TGV is a technology that forms fine conductive vias penetrating a glass substrate to provide electrical connection between an upper circuit and a lower circuit. Since glass has low dielectric loss and high insulation resistance, it is more advantageous for RF signal transmission than conventional silicon (Si)-based substrates, and is also utilized in the application fields of MEMS (Micro-Electro-Mechanical Systems), optoelectronic systems, and high-speed data transmission. Due to these characteristics, TGV technology is positioned as an essential element in next-generation semiconductors and high-performance packaging solutions.

[0003] However, conventional TGV technologies have several major technical problems. First, since glass is essentially an insulator, it is difficult to uniformly deposit a conductive material in the vias formed inside the glass. In particular, the adhesion between glass and metal is low, so process optimization is required to secure a reliable conductive path. Conventional processes use a method of further forming an adhesion layer such as titanium (Ti) or chromium (Cr) for copper (Cu) deposition, but this method has the disadvantages of complicated processes and increased manufacturing costs. In addition, it is difficult to uniformly deposit metal on the inner wall of TGV, and electrical characteristics are likely to deteriorate due to non-uniform coating.

[0004] To solve these problems, this invention proposes a technique for depositing a uniform copper thin film on the interior and surface of a TGV using atomic sputtering epitaxy (ASE) process. By utilizing the ASE process, copper can be deposited directly without the need for a conventional adhesive layer, and a uniform conductive coating can be formed across the entire inner wall of the TGV. Furthermore, by controlling the surface roughness of the copper thin film to the nm level, electrical reliability can be ensured, and by lowering the resistance value, optimal performance can be provided in semiconductor packaging and RF applications. It is expected that this technology will overcome the limitations of conventional TGV processes and realize more reliable electrical connections in next-generation electronic packaging and semiconductor integrated circuits. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Korean Published Patent No. 2024-0126851 (August 21, 2024) [Overview of the project] [Problems that the invention aims to solve]

[0006] This invention was made to solve the aforementioned problems, and its objective is to ensure the reliability of the bonding between glass and metal and to improve electrical performance by uniform thin-film deposition by applying atomic sputtering epitaxy (ASE) technology.

[0007] The technical problems that this invention aims to solve are not limited to those described above, and other technical problems not mentioned can be clearly understood by a person with ordinary skill in the art to which this invention belongs from the description below. [Means for solving the problem]

[0008] The present invention relates to a method for depositing a copper thin film inside a TGV (Through Glass Via) using atomic sputtering epitaxy, characterized in that a copper thin film is uniformly deposited on the inside and surface of the TGV using an atomic sputtering epitaxy (ASE) process, and the copper thin film is deposited such that the electrical resistance of the upper and lower parts of the TGV is 0.1 Ω or less.

[0009] Furthermore, the present invention is characterized in that the copper thin film is deposited on all inner walls of the TGV such that the variation in thickness of the copper thin film is ±5 nm or less.

[0010] Furthermore, the present invention is characterized by forming a copper thin film such that the bonding strength between the glass and the copper is 50 MPa or more.

[0011] Furthermore, the present invention is characterized in that the copper thin film formed by the atomic sputter epitaxy process is formed such that the average surface roughness (RMS roughness) is in the range of 4.5 nm or less.

[0012] Furthermore, the present invention is characterized in that the thickness of the copper thin film formed by the atomic sputtering epitaxy process is 2,000 nm or more. [Effects of the Invention]

[0013] By providing the means for solving the aforementioned problems, the present invention can efficiently resolve the problems of the conventional TGV process, such as insufficient reliability of bonding between metal and glass, unevenness of the inner wall coating, and deterioration of electrical properties.

[0014] Furthermore, since the present invention allows for direct copper deposition without an adhesive layer by applying the ASE process, the process can be simplified and manufacturing costs can be reduced.

[0015] Furthermore, by precisely controlling the surface roughness to the nanometer (nm) level, the present invention can ensure high electrical reliability and low resistance, and stable conductivity can be obtained between the upper power and lower electrodes.

[0016] Furthermore, the present invention minimizes signal loss in the field of next-generation semiconductors and electronic packages such as radio frequency (RF), high-density interconnect (HDI), and three-dimensional stacked integrated circuits (3D-IC), and can be utilized as a process suitable for mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] [Figure 1] It is a flowchart showing a glass semiconductor process including the method for depositing a copper thin film in TGV using atomic sputter epitaxy according to the present invention. [Figure 2] It is a flowchart showing a conventional glass semiconductor process. [Figure 3] It is a view showing an image of Cu / TGV / Cu (right) obtained by depositing copper on both surfaces of TGV (left) according to an embodiment of the present invention. [Figure 4] It is an experimental photograph (right) confirming that both surfaces are connected by a conductor after measuring the conductivity of copper thin film deposited on both surfaces of TGV (copper / glass, left) according to an embodiment of the present invention. [Figure 5] It is a view showing an image observed with an optical microscope after copper is deposited on both surfaces of TGV (left) according to an embodiment of the present invention. [Figure 6] It is a view showing the result of checking the thickness of a copper thin film deposited on one surface (copper / patterned glass, left) according to an embodiment of the present invention using an atomic force microscope (AFM). [Figure 7] It is a view showing the result of checking the surface roughness of a copper thin film deposited on TGV (left) according to an embodiment of the present invention using an atomic force microscope (AFM). [Figure 8] It is a view showing the results observed with SEM at different measurement magnifications after depositing a copper thin film on TGV according to an embodiment of the present invention. [Figure 9] It is a view showing the results observed with SEM to confirm whether copper is single-sided coated on TGV according to an embodiment of the present invention. [Figure 10]These are illustrative diagrams showing the cross-section of a sample, as shown in left figure (a) and right figure (b), in order to view the inside of a hole according to one embodiment of the present invention. [Figure 11] This figure shows the results of observing samples cut in different ratios using SEM according to one embodiment of the present invention, as shown in the left figure (a) of Figure 10. [Figure 12] This figure shows the SEM observation results of a sample cut as shown in Figure 10 (right side, figure (b)) according to one embodiment of the present invention. [Figure 13] This figure shows the results of EDS observation of a sample cut as shown in the left figure (a) of Figure 10 according to one embodiment of the present invention. [Figure 14] This figure shows the results of EDS observation of a sample cut as shown in the left figure (a) of Figure 10 according to one embodiment of the present invention, categorized by component distribution. [Figure 15] This figure shows the results of observing the inside of a via hole using SEM with different ratios of cut samples as shown in Figure 10(b) according to one embodiment of the present invention. [Figure 16] This figure shows (a) and (b) cases in which Cu is deposited on one side of TGV according to one embodiment of the present invention. [Figure 17] (a) and (b) a photograph of the surface resistance measurement when Cu is deposited on both sides of a TGV in order to investigate whether current flows through copper deposited in a via hole according to one embodiment of the present invention, with an undeposited portion in between. [Figure 18] This figure shows the measured surface resistances of ab, bc, cd, and da in Figure 17 according to one embodiment of the present invention. [Figure 19] This figure shows the measured surface resistance according to one embodiment of the present invention. [Figure 20] This figure shows the results of observing the internal ratio of a TGV without copper deposition using SEM according to one embodiment of the present invention. [Figure 21] This figure shows the results of observing the inside of a TGV without copper deposition using SEM according to the comparative example of the present invention. [Figure 22] This figure shows the results of observing the inside of a hole in a TGV with Cu deposited on both sides according to one embodiment of the present invention using a scanning electron microscope (SEM). [Figure 23] This figure shows an image obtained by comparing the inside of a hole in a TGV (a) without copper deposition and a TGV (b) with copper deposition on both sides, using SEM, with respect to a 10,000x magnified image according to one embodiment of the present invention. [Figure 24] This figure shows the results of measuring surface roughness at different thicknesses using an AFM according to one embodiment of the present invention. [Modes for carrying out the invention]

[0018] First, the terms used in this specification will be briefly explained, and then the present invention will be described in detail.

[0019] The terminology used in this invention has been selected as widely used and general terms as possible, taking into consideration the function of this invention. However, these terms may change depending on the intentions of those skilled in the art, precedents, the emergence of new technologies, etc. Therefore, the terminology used in this invention is not simply a set of names, but is defined based on the meaning of the term and the overall content of this invention.

[0020] When a part of the specification is described as "including" a certain component, unless otherwise stated, this does not exclude other components, but rather means that other components may be included.

[0021] Next, embodiments of the present invention will be described in detail with reference to the attached drawings so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. However, the present invention can be embodied in various different forms and is not limited to the embodiments described herein.

[0022] The specific details, including the problems to be solved by this invention, the means of solving those problems, and the effects of the invention, are included in the following embodiments and drawings. The advantages and features of this invention, as well as the methods for achieving them, will become clear when you refer to the embodiments described in detail below, together with the accompanying drawings.

[0023] The present invention will be described in more detail below with reference to the attached drawings.

[0024] This invention relates to a method for uniformly depositing a copper thin film inside and on the surface of a TGV (Through Glass Via) using an atomic sputtering epitaxy (ASE) process.

[0025] As shown in Figure 1, conventional TGV processes typically involve depositing copper (Cu) using an adhesive layer such as Ti or Cr. However, this method is complex and increases manufacturing costs. Furthermore, even with an adhesive layer, it can be difficult to form a uniform copper thin film on all inner walls of the TGV, resulting in incomplete electrical connectivity or high resistance.

[0026] In contrast, the present invention applies the ASE process to enable direct copper deposition without an adhesive layer. The ASE process utilizes highly controlled sputtering technology to enable deposition at the atomic level, thereby allowing a copper thin film to be formed with a uniform thickness on the inner wall and surface of the TGV.

[0027] Unlike conventional methods, the present invention simplifies the process by allowing direct copper deposition without a further adhesive layer in the ASE process. By precisely controlling the thickness and surface characteristics of the copper thin film, a lower resistance value can be ensured. Compared to conventional electroplating methods, a uniform conductive path can be formed on all inner walls of the TGV, resulting in improved electrical connectivity.

[0028] More specifically, as shown in Figure 2, the conventional glass semiconductor process requires a Ti bonding layer (barrier and seed layer) for copper (Cu) deposition, and the overall process proceeds as follows.

[0029] Glass production involves producing glass substrates and adjusting specifications based on the coefficient of thermal expansion.

[0030] Bare glass processing involves processing a glass substrate to meet the desired specifications.

[0031] Hole processing involves forming a TGV (Through Glass Via) structure using laser processing or wet / dry etching.

[0032] The barrier and seed layer formation steps typically require preparatory work to form a seed layer for Cu deposition after the Ti layer has been deposited. While the Ti layer improves the adhesion of the copper thin film, it necessitates further process steps and increases manufacturing costs.

[0033] The wiring process involves exposure (Lithography) and development (Development), followed by patterning, and then electroplating. This process can be repeated.

[0034] The polishing process ultimately involves surface polishing to create a uniform surface.

[0035] The present invention provides a method for directly depositing Cu without a Ti adhesive layer by applying the ASE (Atomic Sputtering Epitaxy) process, and differs in that it involves the formation of a barrier and seed layer, as shown in Figure 1.

[0036] Conventional processes require the formation of a seed layer for Cu deposition after the Ti layer deposition, but the present invention allows for direct Cu deposition without a Ti layer using the ASE process. In other words, since Ti deposition is unnecessary, the process is simplified and costs can be reduced.

[0037] Furthermore, the wiring process proceeds with exposure and patterning in the same way as conventional processes, and copper plating is possible. Since the copper thin film deposited by the ASE process maintains uniformity inside the TGV, high electrical connectivity can be ensured without forming an additional adhesive layer.

[0038] This invention relates to a technique for uniformly depositing a copper thin film on the interior and surface of a TGV using an ASE (Atomic Sputtering Epitaxy) process. In particular, this invention aims to ensure excellent electrical characteristics in the fields of high-speed data transmission and RF packaging by depositing the copper film so that the electrical resistance of the upper and lower parts of the TGV is 0.1Ω or less (based on a glass thickness of 500μm, a hole diameter of 95μm, and an aspect ratio of the depth to diameter of the via hole of 1.5).

[0039] Conventional copper deposition methods (e.g., electroplating or PVD) can lead to problems such as variations in thickness and increased resistance on the inner wall of the TGV. However, the ASE process applied in this invention has the advantage of being able to control deposition at the atomic layer level, thus ensuring the formation of a more uniform copper thin film and a lower resistance value.

[0040] When the ASE substrate deposition method of the present invention is applied, a copper thin film is uniformly formed along the inner wall of the TGV, and the upper and lower parts of the TGV are smoothly connected, maintaining a low resistance value. As a result, power loss is reduced, signal transmission speed is increased, and stable performance can be provided in semiconductor packaging and high-frequency applications compared to conventional techniques.

[0041] Furthermore, the present invention includes a method for forming a uniform copper thin film over the entire inner wall of a TGV. Conventional copper deposition methods (e.g., electroplating, PVD) result in significant variations in thickness in the upper and lower parts of the TGV or in specific parts of the inner wall, making it difficult to ensure a uniform conductive path.

[0042] Because the ASE process of the present invention enables highly precise deposition control at the atomic level, the variation in the thickness of the copper thin film can be maintained at ±5 nm or less on all inner walls of the TGV. This improves the uniformity of electrical connections, reduces variations in resistance values, and improves overall reliability.

[0043] Furthermore, thickness variations can be measured using AFM (Atomic Force Microscopy) and SEM (Scanning Electron Microscopy) analysis to ensure uniformity. This allows verification that the copper thin film to which the ASE process was applied was formed accurately within the TGV structure, enabling high reliability even in high-speed signal transmission applications.

[0044] In conventional methods, variations in the thickness of the copper thin film often occurred at a rate of ±10 nm or more depending on the position on the inner wall of the TGV. The electric field is unevenly distributed depending on the shape of the inner wall of the TGV, with particularly high current density at the top of the TGV and low current density at the bottom, making uniform deposition difficult. Furthermore, PVD deposition has a strong deposition directionality, and the deposition rate decreases towards the bottom of the TGV. As a result, it is difficult to ensure a uniform thickness throughout the entire interior of the TGV.

[0045] In contrast, the ASE method of the present invention has been optimized to allow for the deposition of copper atoms with high uniformity by adjusting the plasma energy. Specifically, by applying RF plasma adjustment technology to maintain a constant deposition rate, it is possible to adjust the thickness variation on all inner walls of the TGV to be less than ±5 nm. It has been confirmed that an equal thickness is maintained on all inner walls even when the depth of the TGV is in the 400 μm to 700 μm range.

[0046] By forming such a uniform thin film, the current flow through the TGV is maintained at a constant level, providing a highly reliable conductive path.

[0047] Furthermore, in conventional TGV processes, problems such as delamination due to low bonding strength between copper and glass are frequently reported. In particular, when the adhesive strength is weak, reliability may decrease in high-temperature and high-humidity environments.

[0048] This invention utilizes the ASE process to enable direct deposition of a copper thin film without the need for a further adhesive layer (such as Ti or Cr). The high deposition energy of the ASE process allows copper atoms to bond strongly to the glass surface, maintaining a bonding strength of 50 MPa or higher.

[0049] This means that, unlike conventional methods which required the use of Ti or Cr as an adhesive layer, the ASE method allows for the formation of a copper thin film without a Ti or Cr adhesive layer by adjusting the plasma energy so that copper atoms directly bond with the glass surface. By activating the glass surface with plasma at the beginning of the ASE process, the copper atoms are guided to bond more strongly. This process ensures a bonding strength of 50 MPa or more between the glass and copper. Therefore, the reliability of TGV can be maintained even in high temperature and high humidity environments, making it suitable for high-performance semiconductor packaging.

[0050] Furthermore, copper thin films formed by conventional electroplating methods or PVD processes have relatively high RMS roughness, which may lead to a decrease in electrical properties and signal transmission loss.

[0051] By applying the ASE process of the present invention, the surface roughness of the copper thin film can be precisely controlled, and the RMS roughness can be maintained in a range of 4.5 nm or less. More preferably, it can be maintained in a range of 3.0 to 4.5 nm.

[0052] Conventional PVD methods can create surface roughness of 5-10 nm or more, which is likely to increase loss during RF signal transmission. The ASE method allows for precise control of the deposition rate, providing a stable surface roughness within the range of 3.0-4.5 nm.

[0053] Low surface roughness reduces electrical contact resistance, contributing to minimizing reflection losses during high-speed signal transmission. Furthermore, the ASE process allows for the formation of a uniform thin film, providing excellent signal transmission characteristics in RF and high-frequency applications.

[0054] Furthermore, this invention aims to maintain the thickness of the copper thin film deposited on the inner wall and surface of the TGV at 1,100 nm or more using the ASE process.

[0055] Conventional methods could result in uneven or extremely thin thicknesses, potentially leading to reduced electrical connectivity. The copper deposition method for the ASE substrate of the present invention is designed to ensure sufficient conductivity while maintaining a uniform thickness.

[0056] Applying the ASE process of the present invention allows the thickness of the copper thin film to be maintained at 1,100 nm or more, thereby improving electrical connectivity. If sufficient thickness is not ensured on the inner wall of the TGV, the current density during signal transmission may not be uniform, leading to a decrease in reliability. Maintaining the thickness of the copper thin film at 1,100 nm or more increases the current carrying capacity and improves signal transmission characteristics. The ASE method allows for precise control of the thickness, enabling the securing of a more uniform conductive path compared to conventional methods.

[0057] This allows the copper thin film within the TGV to form a highly reliable conductive path, enabling it to exhibit excellent performance in high-speed data transmission and RF signal transmission.

[0058] The copper thin film deposition process on the ASE substrate of the present invention is a method of depositing copper atoms at the atomic level in a highly controlled plasma state. The following process variables are optimized during the deposition process.

[0059] (1) Process temperature and initial pressure The evaporation environment temperature is adjusted to a range of 170°C, and the initial vacuum level is 1.5 × 10⁻⁶. -6 The Torr level is below 5.4 × 10⁻¹⁰, and the deposition is carried out under an Ar atmosphere, with a pressure of 5.4 × 10⁻¹⁰. -3 It must be maintained within the Torr range.

[0060] (2) Plasma pressure regulation The plasma process was carried out under an Ar atmosphere, with a pressure of 5.4 × 10⁻⁶. -3 Maintaining Torr at a constant level stabilizes the process atmosphere.

[0061] Under these conditions, copper is uniformly formed on all inner walls of the TGV during deposition.

[0062] In the electroplating method, copper is deposited by a chemical reaction in an electrolyte solution, and variations in thickness can occur on the inner wall of the TGV due to differences in current density. In the ASE method, deposition is performed at the atomic level, so uniform deposition is possible even inside the TGV, and the possibility of impurity contamination is low. By applying such an optimized ASE process, the electrical resistance of the upper and lower parts of the TGV can be maintained at 0.1Ω or less, ensuring uniform conductivity suitable for high-speed signal transmission.

[0063] The present invention will be described in more detail below by comparing comparative examples and examples manufactured by conventional methods, and by illustrating them with experimental examples. The object, features, and advantages of the present invention should be easily understood from the following examples. The present invention is not limited to the examples described herein and can be embodied in other forms. The examples presented herein are provided to fully convey the idea of ​​the present invention to those with ordinary skill in the art to which the present invention pertains. Therefore, the present invention should not be limited by the following examples.

[0064] Example 1: Copper thin film deposition in a TGV using the ASE process In this example, a method for depositing a uniform copper thin film onto the inner wall and surface of a TGV (Through Glass Via) using the ASE (Atomic Sputtering Epitaxy) process was applied, as shown in Figure 3. This allowed for the evaluation of the uniform thickness and electrical properties of the copper thin film in the following experimental examples. Substrate (Materials): Manufactured by Asahi Glass Co., Ltd. (thickness 500 μm) TGV formation method: TGV processing using laser dollying TGV diameter (hole size): approximately 94 μm TGV depth (hole depth): 500 μm Copper thin film deposition method: ASE process application Deposition Conditions: Plasma gas: Ar Process temperature: 170°C Evaporation pressure: 5.4 × 10 -3 Torr

[0065] Experimental Example 1: Electrical Characterization As shown in Figure 4, in Experimental Example 1, conductivity was measured after copper thin film deposition on both sides of the TGV, confirming that both sides were connected by a conductor.

[0066] The experimental conditions are as follows: A 4-probe resistance measurement method is applied. Measure electrical resistance.

[0067] The electrical resistance was evaluated by connecting the upper and lower parts of the TGV.

[0068] We confirmed that applying the ASE process reduces resistance by 3.0% or more compared to conventional electroplating methods.

[0069] Experimental Example 2: Analysis using an engineering microscope After forming a TGV (Glass Turbines) on a glass substrate (manufactured by Asahi Glass Co., Ltd., 500 μm thick) using laser dollying, a copper thin film was deposited on the inner wall of the TGV by applying the ASE (Atomic Sputtering Epitaxy) process. After the ASE process, the diameter and shape of the TGV were analyzed using an engineering microscope to evaluate the effect of the ASE process on maintaining the uniformity and size of the TGV pattern.

[0070] As shown in Figure 5, optical microscopy analysis confirmed that the TGV diameters (94.88 μm, 94.26 μm) were maintained even after the application of the ASE process, and that the copper thin film was uniformly formed on all inner walls. Furthermore, it was demonstrated that the ASE process maintained the TGV pattern without deformation, ensuring the uniformity of copper thin film deposition and improving the reliability of the conductive path.

[0071] Experimental Example 3: Measurement of copper thin film deposition thickness A copper (Cu) thin film was deposited on a glass substrate using the ASE (Atomic Sputtering Epitaxy) process, and the thickness of the deposited copper film was measured using AFM (Atomic Force Microscopy). The sample measured had a Cu / Al2O3 structure, and the change in the thickness of the copper film on one side was analyzed to evaluate whether uniform deposition was possible using the ASE process.

[0072] As shown in Figure 6, AFM analysis revealed that the average thickness of the copper thin film deposited by the ASE process was 1,133 nm, confirming that uniform deposition of approximately 1,130 nm was achieved on one side. This demonstrates that the ASE process can ensure sufficient thickness while maintaining high uniformity compared to conventional deposition methods, suggesting that it can provide highly reliable electrical properties through the formation of uniform conductive paths.

[0073] Experimental Example 4: Analysis of surface roughness (RMS roughness) of thin films After depositing copper thin films on the inner walls and surfaces of TGVs (Through Glass Vias) using the ASE (Atomic Sputtering Epitaxy) process, the surface roughness (RMSroughness) of the thin films was measured using AFM (Atomic Force Microscopy). The analysis targeted copper thin films deposited at specific locations on the inner walls of the TGVs, and the measured data was obtained for 10 μm. 2 Collected within the region.

[0074] As shown in Figure 7, AFM analysis results showed that the RMS roughness of the copper thin film treated with the ASE process was measured at 3.288 nm and 3.424 nm, which means that it provides a more uniform surface compared to conventional electroplating methods. Such low surface roughness can contribute to a reduction in electrical contact resistance and an improvement in RF signal transmission characteristics, demonstrating that the ASE process enables the formation of a uniform thin film on the inner wall of the TGV.

[0075] Furthermore, copper thin films of different thicknesses (20 nm (b), 100 nm (c), and 1,100 nm (d)) were deposited onto a glass substrate (manufactured by Asahi Glass Co., Ltd.) using the ASE (Atomic Sputtering Epitaxy) process, and then AFM (Atomic Force Microscopy) analysis was performed. The RMS (Root Mean Square) roughness value was measured for each sample to quantitatively evaluate the surface roughness, and the change in roughness due to changes in the thickness of the copper thin film was analyzed. This confirmed how uniformly the copper thin film deposited using the ASE process was as the thickness increased.

[0076] As shown in Figure 24, the AFM analysis results indicate that the RMS roughness of the bare glass substrate was 0.692 nm. While it increased slightly to 1.102 nm and 1.134 nm as the copper thin film thickness increased to 20 nm and 100 nm, respectively, it still maintained a low level of surface roughness. On the other hand, the RMS roughness of the 1,100 nm thick copper thin film increased to 4.567 nm, confirming that surface roughness increases with increasing film thickness. This suggests that while the ASE process enables very uniform deposition of copper thin films of a certain thickness, surface roughness may increase due to grain growth as the thickness increases. These results confirm that copper thin films treated with the ASE process maintain excellent surface uniformity, and that the deposition conditions need to be optimized beyond a certain thickness.

[0077] Experimental Example 5: Analysis using SEM (Scanning Electron Microscopy) After depositing copper thin films onto the inner walls and surfaces of TGVs using the ASE (Atomic Sputtering Epitaxy) process, SEM (Scanning Electron Microscopy) analysis was performed. The upper and cross-sections of the TGV structure were observed at various magnifications (50x, 100x, 500x) to evaluate the uniformity, thickness variation, and deposition state of the copper thin films formed by the ASE process.

[0078] As shown in Figure 8, SEM analysis confirmed that the ASE process formed a uniform copper thin film across the entire inner wall of the TGV, ensuring a consistent conductive path without variations in thickness. In particular, the cross-sectional image observed at 500x magnification visually demonstrated that the copper thin film on the inner wall of the TGV was uniformly deposited, confirming that the ASE process provides superior thin-film uniformity compared to conventional methods.

[0079] Experimental Example 6: Confirmation of copper thin film cross-sectional deposition inside a TGV After depositing a copper (Cu) thin film onto the inner wall of a TGV using the ASE (Atomic Sputtering Epitaxy) process, SEM (Scanning Electron Microscopy) analysis was performed. In the experiment, the cross-section of the TGV was observed at various magnifications (157x, 500x) to confirm that the copper thin film was uniformly deposited across the entire inner wall by the ASE process, and the thickness and shape of the coating at specific locations in the cross-section were measured.

[0080] As shown in Figure 9, SEM analysis confirmed that the copper thin film deposited by the ASE process was uniformly coated across all inner walls of the TGV, and that it was formed with a consistent thickness even in specific cross-sections. The measured cross-sectional sizes (92.22 μm, 200.9 μm) and the uniformity of the analyzed copper thin film demonstrate that the ASE process provides higher coating accuracy compared to conventional methods, suggesting that it can improve the reliability of conductive paths within the TGV.

[0081] Experimental Example 7: Analysis of a cross-section of a copper thin film inside a TGV. As shown in Figure 10, after depositing a copper thin film on the inner wall of a TGV (Through Glass Via) using the ASE (Atomic Sputtering Epitaxy) process, the sample was cut at a specific angle to evaluate the coating uniformity of the deposited copper thin film. The cut cross-section was analyzed using SEM (Scanning Electron Microscopy) to confirm whether the copper thin film was uniformly deposited on all inner walls of the TGV, thereby evaluating the thickness variation and deposition state.

[0082] After depositing a copper thin film onto the inner wall of a TGV (Through Glass Via) using the ASE (Atomic Sputtering Epitaxy) process, scanning electron microscopy (SEM) observation was performed to analyze the structural properties and bonding morphology of the deposited thin film. As shown in Figure 11, the sample was cut at a specific angle to expose the cross-section, and then SEM analysis was carried out at various magnifications (100x, 500x, 1000x) to evaluate the uniformity of the copper thin film, the feasibility of conductive path formation, and the bonding state within the cross-section.

[0083] As shown in Figure 11, SEM analysis confirmed that the copper thin film deposited by the ASE process was uniformly formed across all inner walls of the TGV, ensuring a clear conductive path. Furthermore, cross-sectional observation revealed evidence suggesting that the copper thin film did not simply coat the inner walls, but rather formed a Cu / TGV / Cu structure traversing the TGV. The fragments of the cut sample generated during the experimental process were produced during the measurement for analysis, demonstrating that the copper thin film formed by the ASE process possesses excellent bonding reliability within the TGV structure.

[0084] Furthermore, as shown in Figure 12, the cross-section was imaged at high magnification (1000x) to clearly confirm the interface between the copper thin film and the glass substrate, and the thickness of the thin film was precisely measured. SEM analysis confirmed that the copper thin film deposited by the ASE process was uniformly formed with a thickness of 1.196 μm. This demonstrated that the copper thin film was stably bonded to the glass substrate, minimizing variations in the film thickness and providing a uniform conductive path. These results suggest that the ASE process guarantees superior thin film uniformity compared to conventional methods, enabling high reliability in TGV substrate electronic packaging technology.

[0085] Experimental Example 8: EDS (Energy Dispersive Spectroscopy) Analysis After depositing a copper thin film on the inner wall of the TGV using the ASE (Atomic Sputtering Epitaxy) process, the elemental composition was evaluated by EDS (Energy Dispersive Spectroscopy) analysis. EDS analysis coupled with SEM (Scanning Electron Microscopy) visually confirmed the elemental distribution inside the TGV, and the elemental composition and relative distribution of copper (Cu), silicon (Si), oxygen (O), etc., were compared. In the CuK image, the areas shown in blue represent the copper thin film deposited on the inner wall of the TGV, allowing for the evaluation of the uniformity of the copper deposition.

[0086] As shown in Figure 13(a), EDS analysis confirmed that copper was uniformly deposited on the inner wall of the TGV by the ASE process, maintaining a consistent distribution even within the holes. Component analysis, as shown in Figure 13(b), clearly detected a copper (Cu) signal, demonstrating that the ASE process provides higher uniformity compared to conventional methods. Furthermore, as shown in Figure 14, the areas shown in blue in the CuK image clearly indicate the copper thin film formed inside the TGV, suggesting that the copper deposition using the ASE process was successful.

[0087] [Table 1]

[0088] Experimental Example 9: Homogeneity and Surface Analysis After depositing a copper thin film onto the inner wall of a TGV using the ASE (Atomic Sputtering Epitaxy) process, the sample tilted at 4.5 degrees (Figure 10(b)) was analyzed using SEM (Scanning Electron Microscopy). SEM images were acquired at various magnifications to evaluate whether the copper thin film was uniformly deposited inside the TGV and how smoothly the surface was formed. Furthermore, the uniformity of the copper thin film formation on the glass surface was confirmed.

[0089] As shown in Figure 15, SEM analysis confirmed that the copper thin film was smoothly deposited inside the TGV using the ASE process, and that a very homogeneous coating was achieved on the glass surface. In particular, high-magnification analysis demonstrated that the copper thin film was smoothly deposited not only on the substrate surface but also inside the TGV, and that the reliability of the conductive path was improved by the formation of a uniform thin film. These results indicate that the ASE process is more effective than conventional methods in forming thin films with greater precision and uniformity.

[0090] Experimental Example 10: Comparison of Surface Resistivity and Resistivity After depositing a copper thin film on the inner wall of the TGV using the ASE (Atomic Sputtering Epitaxy) process, experiments were conducted to compare the electrical characteristics of single-sided deposition (a) and double-sided deposition (b), as shown in Figure 16, by measuring sheet resistance and resistivity. The conductive path inside the TGV was analyzed using a 4-point probe measurement method, and the resistance applied to both ends was measured and calculated using the parallel resistance method.

[0091] [Table 2]

[0092] The measurement results showed that the surface resistance of single-sided vapor deposition TGV was 0.02390 Ω / sq and the surface resistance of double-sided vapor deposition TGV was 0.01099 Ω / sq, demonstrating that double-sided vapor deposition can achieve even lower electrical resistance. In addition, the resistivity value was also 2.417 × 10⁻⁶ for double-sided vapor deposition. -6 Ω·cm) is better for single-sided deposition (2.639 × 10⁻⁶). -6 The measured value was lower than Ω·cm, confirming that the ASE process ensures uniform copper deposition inside the TGV, which is effective in improving electrical performance.

[0093] Experimental Example 11: Measurement of Electrical Resistance To evaluate the electrical properties of the Cu / TGV / Cu structure formed by the ASE (Atomic Sputtering Epitaxy) process, resistance was measured using a 4-point probe. Current was applied to each region (a, b, c, d) of the sample, and the IV curve was analyzed. Based on this, sheet resistance and resistivity were calculated. Furthermore, the measured values ​​were compared to confirm whether the conductive paths of the TGV structure to which the ASE process was applied were uniformly formed.

[0094] The measurement results, as shown in Figures 18 and 19, indicate that the sheet resistance of the Cu / TGV / Cu structure is 0.0864 Ω / sq and the resistivity is 9.504 × 10⁻⁶. -6 The resistance was found to be Ω·cm, confirming that a uniform conductive path was ensured by the ASE process. Linear current-voltage characteristics were also confirmed in the IV curve analysis, which means that the ASE process provides lower resistance and uniform electrical characteristics compared to conventional methods. These results suggest that TGV structures using the ASE process can have high reliability in the field of electronic packaging where high-speed signal transmission and power efficiency are required.

[0095] [Table 3]

[0096] Experimental Example 12: Cross-sectional SEM analysis To analyze the TGV structure before applying the ASE (Atomic Sputtering Epitaxy) process, the interior of bare TGVs without copper deposition was observed using SEM (Scanning Electron Microscopy). Cross-sectional images were acquired at various magnifications (1,000x, 5,000x, 10,000x, and 30,000x), and the crystal structure and surface properties inside the substrate were compared and analyzed. This allowed for a comparison of the inner wall state of the TGV before and after copper deposition, and the effect of the ASE process on the inner wall structure of the TGV was evaluated.

[0097] As shown in Figure 20, SEM analysis revealed a rough surface and polygonal grain structure inside the bare TGV without copper deposition, confirming that the inner wall of the TGV has a relatively non-uniform structure. These characteristics can be compared and analyzed with changes in surface roughness (RMS roughness) and grain structure after copper deposition, and it is expected that applying the ASE process will result in a more uniform and smoother inner wall structure. This experiment demonstrates the process improvement effect on the inner wall of the TGV compared to the copper thin film deposition state after the ASE process.

[0098] Furthermore, as shown in Figure 21(a), SEM analysis revealed that the inner wall surface of the bare TGV had a rough and non-uniform crystalline grain structure, indicating relatively high surface roughness. Additionally, EDS analysis, as shown in Figure 21(b), showed a uniform distribution of silicon and oxygen, the main components of the TGV inner wall. This suggests that the surface properties of the inner wall will improve when the copper (Cu) thin film is uniformly deposited by the ASE process. This experiment compared the effect of copper thin film deposition after applying the ASE process and confirmed the possibility of improving the electrical and physical properties of the TGV inner wall.

[0099] As shown in Figure 22, the inside of the holes in the TGV with copper deposited on both sides was observed using SEM. It was confirmed that a uniform copper thin film was formed on the inner wall of the TGV with copper deposited on both sides by the ASE process, and that the surface had a softer and smoother crystal grain structure compared to conventional bare TGV.

[0100] Furthermore, as shown in Figure 23, a SEM comparison was performed on a 10,000x magnified image of bare TGV and the interior of a TGV hole with copper deposited on both sides. It was confirmed that the inner wall of bare TGV exhibits a rough and uniform polygonal crystalline structure, while a fine and uniform copper thin film is deposited in the Cu / TGV / Cu structure.

[0101] The present invention, through the means for solving the aforementioned problems, can effectively resolve the issues of the conventional TGV process, such as insufficient reliability of bonding between metal and glass, unevenness of inner wall coating, and deterioration of electrical properties.

[0102] Furthermore, by applying the ASE process, the present invention allows for direct copper deposition without an adhesive layer, simplifying the process and reducing manufacturing costs.

[0103] Furthermore, the present invention ensures high electrical reliability and low resistance by precisely controlling surface roughness at the nanometer (nm) level, and provides stable conductivity between the upper and lower electrodes.

[0104] Furthermore, the present invention can be utilized as a process suitable for mass production in next-generation semiconductor and electronic packaging fields such as high-frequency (RF), high-density interconnects (HDI), and three-dimensional stacked integrated circuits (3D-ICs), minimizing signal loss.

[0105] Thus, it can be understood that the technical configuration of the present invention described above can be implemented in other specific forms by those skilled in the art in which the present invention belongs, without changing the technical idea or essential features of the present invention.

[0106] Therefore, the embodiments described above should be understood to be illustrative and not limiting in all respects, and the scope of the present invention is defined by the claims, which are set forth below rather than the detailed description above, and all modified or altered forms derived from the meaning and scope of the claims, as well as their equivalent concepts, should be interpreted as falling within the scope of the present invention.

Claims

1. A copper thin film is uniformly deposited on the interior and surface of a through-glass via (TGV) using the atomic sputtering epitaxy (ASE) process. A thin copper film is deposited on the upper and lower parts of the glass via (TGV) such that the electrical resistance is 0.1 Ω or less. A method for embedding a copper thin film in a glass through-via using atomic sputter epitaxy, characterized by the following features.

2. The copper thin film is deposited on all inner walls of the glass via (TGV) such that the thickness variation is ±5 nm or less. A method for embedding a copper thin film in a glass through-via using atomic sputter epitaxy as described in claim 1.

3. Form a copper thin film such that the bonding strength between the glass and copper is 50 MPa or more. A method for embedding a copper thin film in a glass through-via using atomic sputter epitaxy as described in claim 1.

4. The copper thin film formed by the atomic sputtering epitaxy process is formed such that its average surface roughness (RMS roughness) is in the range of 4.5 nm or less. A method for embedding a copper thin film in a glass through-via using atomic sputter epitaxy as described in claim 1.

5. The thickness of the copper thin film formed by the atomic sputtering epitaxy process is 2,000 nm or more. A method for embedding a copper thin film in a glass through-via using atomic sputter epitaxy as described in claim 1.

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