Method for forming a silicon substrate with reduced glow-in nuclei that become epitaxial defects, and method for forming an epitaxial wafer.
Patent Information
- Application Number
- JP2026092618
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-11-11
- Filing Date
- 2026-06-02
- Publication Date
- 2026-09-08
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Figure 2026143560000001_ABST
Abstract
Description
[Technical Field]
[0001] (Cross-Reference to Related Application) The present application claims the benefit of U.S. Provisional Patent Application No. 63 / 112,424, filed on November 11, 2020, which is incorporated herein by reference in its entirety.
[0002] (Field of the Disclosure) The field of the present disclosure relates to the preparation of single crystal silicon substrates for epitaxial growth and to a method for forming an epitaxial wafer. [Background Art]
[0003] (Background) An epitaxial wafer includes a single crystal silicon substrate having an epitaxial layer deposited on a front surface thereof. The epitaxial wafer can be used to form electronic devices suitable for microelectronics (integrated circuits or power applications) or photovoltaic applications.
[0004] Epitaxial wafers may have surface defects that degrade their performance. Some defects formed on a silicon substrate do not disappear during the epitaxial process and are believed to cause grow-in defect sites (e.g., epitaxial stacking faults or "hillocks") in the epitaxial layer after epitaxial deposition. These grow-in defects are believed to be formed by defect propagation through the epitaxial layer. When the epitaxial layer is thickened, instead of covering defects in the substrate, the size of starting defects on the substrate surface increases due to the silicon epitaxial growth mode along the <111> crystal plane, and as the thickness of the epitaxial layer increases, larger and more visible epitaxial defects are formed. [Summary of the Invention] [Problem to be Solved by the Invention]
[0005] There is a need for a method of reducing the number of grow-in nuclei that cause epitaxial defects in a base wafer, and for a related method of forming an epitaxial wafer.
[0006] This section is intended to introduce the reader to various technical aspects that may relate to various aspects of the present disclosure described and / or claimed below. This discussion is believed to be useful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these descriptions are to be read in this light, and are not to be read as an admission of prior art. [Means for Solving the Problems]
[0007] (Abstract) One aspect of the present disclosure relates to a method of forming a silicon substrate with reduced grow-in nuclei that cause epitaxial defects. The silicon substrate is doped with boron at a concentration of at least 2.8×10 18 atoms / cm 3 . An initial charge of polycrystalline silicon is added to a crucible. The crucible containing the initial charge of polycrystalline silicon is heated to form a silicon melt in the crucible. Boron is added to the crucible to produce a doped silicon melt. A silicon seed crystal is brought into contact with the doped silicon melt. The silicon seed crystal is pulled to grow a single crystal silicon ingot having a constant diameter portion. A segment (or a portion) of the constant diameter portion of the ingot has a boron concentration of at least about 2.8×10 18 atoms / cm 3 . When the segment has a boron concentration of 2.8×10 18 atoms / cm 3 to 5.4×10 18 atoms / cm 3 , (i) the growth rate v and / or (ii) the axial temperature gradient G are controlled during growth of the segment such that v / G is 0.20 mm 2 / (min·K) or less. When the segment is 5.4×10 18 atoms / cm 3~8.0×10 18 atoms / cm 3 Given the boron concentration, (i) the growth rate v, and / or (ii) the axial temperature gradient G, v / G = 0.25 mm 2 The segment growth is controlled so that it is less than / (min·K). 18 atoms / cm 3 For higher boron concentrations, (i) the growth rate v and / or (ii) the axial temperature gradient G are operated at any value v / G. A segment of a certain diameter portion of the ingot is cooled from its solidification temperature to below 950°C. The dwell time (or residence time) for a segment of a certain diameter portion of the ingot in the temperature range of 1150°C to 950°C is less than 160 minutes.
[0008] A further aspect of this disclosure relates to a method for forming a silicon substrate with reduced groin nuclei that form epitaxial defects. An initial amount of polycrystalline silicon is added to a crucible. The crucible containing the initial amount of polycrystalline silicon is heated to form a silicon melt in the crucible. Boron is added to the crucible, at least 3.8 × 10⁻¹⁶ 18 atoms / cm 3 A doped silicon melt having a boron concentration of is prepared. A silicon seed crystal is brought into contact with the doped silicon melt. The silicon seed crystal is pulled up to grow a single-crystal silicon ingot. The ingot has a portion of a constant diameter. The method further includes controlling (i) the growth rate v and / or (ii) the axial temperature gradient G during the growth of the segment of the constant-diameter portion of the ingot such that the ratio v / G is less than the critical v / G. The constant-diameter portion of the ingot is cooled from its solidification temperature to below 950°C. The dwell time for the segment of the constant-diameter portion of the ingot in the temperature range of 1150°C to 950°C is less than 160 minutes.
[0009] Various improvements to the features mentioned in relation to the above-described embodiments of this disclosure exist. Further features may also be incorporated into the above-described embodiments of this disclosure. These improvements and additional features may exist independently or in any combination. For example, various features described below in relation to any of the illustrated embodiments of this disclosure may be incorporated into any of the above-described embodiments of this disclosure individually or in any combination. [Brief explanation of the drawing]
[0010] [Figure 1] Figure 1 is a cross-sectional view of the ingot pulling device before silicon ingot growth. [Figure 2] Figure 2 is a cross-sectional view of the ingot pulling apparatus shown in Figure 1 during silicon ingot growth. [Figure 3] Figure 3 is a schematic cross-sectional view of a single-crystal silicon ingot, showing the axial trends of vacancy-rich and interstitial atom-rich regions for three boron doping levels (increasing from (a) to (c)). [Figure 4] Figure 4 is a graph showing the number of epitaxial defects in a single crystal ingot as a function of the axial position of the substrate wafer, with the time in the temperature range of 1150°C to 950°C being relatively long. [Figure 5] Figure 5 is a graph of the number of epitaxial defects as a function of the axial position of the substrate wafer in a single crystal ingot, with relatively shorter time intervals in the temperature range of 1150°C to 950°C. [Figure 6] Figure 6 is a graph of the number of defects as a function of dwell time for ingot segments in the temperature range of 1150°C to 950°C. [Figure 7] Figure 7 shows graphs of dwell time against crystal length for various single-crystal silicon ingots. [Modes for carrying out the invention]
[0011] The same reference numeral throughout the drawing indicates the same part.
[0012] This disclosure provides a method for forming a silicon substrate with reduced groin nuclei, which are epitaxial defects (i.e., defects that occur after epitaxial silicon growth on an epitaxial substrate). According to embodiments of this disclosure, in order to reduce the nuclei that cause defects during epitaxial growth, the ratio of the growth rate (v) to the axial temperature gradient (G) (v / G) may be controlled while a segment or the entirety of a certain diameter portion of the ingot is growing, and the time the segment is in the temperature range of 1150°C to 950°C may be controlled to 160 minutes or less. The resulting substrate is suitable for the growth of epitaxial silicon on which the epitaxial layer grown has reduced groin defects or is free of groin defects.
[0013] The methods of the present disclosure can generally be carried out in any ingot pulling apparatus configured to pull up a single-crystal silicon ingot. In Figure 1, an example of an ingot pulling apparatus (or more simply, an "ingot puller") is shown as "100" as a whole. The ingot pulling apparatus 100 includes a crucible 102 that holds a molten material 104 of semiconductor-grade or solar (or solar cell)-grade material (e.g., silicon), supported by a susceptor 106. The ingot pulling apparatus 100 includes a crystal pulling apparatus housing 108 that defines a growth chamber 152 for pulling a silicon ingot 113 (Figure 2) from the molten material 104 along a pulling axis A.
[0014] The crucible 102 includes a base 129 and side walls 131 extending upward from the base 129. The side walls 131 are generally vertical. The base 129 includes a curved portion of the crucible 102 that extends below the side walls 131. Inside the crucible 102 is a silicon melt 104 having a melt surface 111 (i.e., a melt-ingot interface).
[0015] In one embodiment, the crucible 102 may be a laminate. For example, the crucible 102 may consist of a quartz base layer and a synthetic quartz liner placed on the quartz base layer.
[0016] The susceptor 106 is supported by the shaft 105. The susceptor 106, crucible 102, shaft 105, and ingot 113 (Figure 2) have a common longitudinal axis A or “pull-up axis” A.
[0017] A lifting mechanism 114 is provided within the ingot lifting device 100 for growing and lifting an ingot 113 from the molten metal 104. The lifting mechanism 114 includes a lifting cable 118, a seed holder or chuck 120 attached to one end of the lifting cable 118, and a silicon seed crystal 122 for initiating crystal growth, attached to the seed holder or chuck 120. One end of the lifting cable 118 is connected to a pulley (not shown) or drum (not shown), or any other suitable type of lifting mechanism, such as a shaft, and the other end is connected to a chuck 120 that holds the seed crystal 122. During operation, the seed crystal 122 is lowered into contact with the molten metal 104. The lifting mechanism 114 is operated to raise the seed crystal 122. This lifts the single-crystal ingot 113 (Figure 2) from the molten metal 104.
[0018] During heating and crystal pulling, the crucible drive unit 107 (e.g., a motor) rotates the crucible 102 and susceptor 106. The lifting mechanism 112 raises and lowers the crucible 102 along the pulling axis A during the growth process. For example, as shown in Figure 1, the crucible 102 may be in its lowest position (near the bottom heater 126), where it melts an initial amount of solid-phase polycrystalline silicon that has been pre-added to the crucible 102. Crystal growth is initiated by bringing the molten silicon 104 into contact with the seed crystal 122 and lifting the seed crystal 122 by the pulling mechanism 114. As the ingot grows, the silicon molten silicon 104 is consumed, and the height of the molten silicon in the crucible 102 decreases. The crucible 102 and susceptor 106 may be raised to maintain the molten surface 111 at the same or near position relative to the ingot pulling device 100 (Figure 2).
[0019] A crystal drive unit (not shown) may also rotate the pull-up cable 118 and the ingot 113 (Figure 2) in the opposite direction to the direction in which the crucible drive unit 107 rotates the crucible 102 (e.g., in the opposite direction). In embodiments using constant rotation, the crystal drive unit may rotate the pull-up cable 118 in the same direction as the crucible drive unit 107 rotates the crucible 102. In addition, the crystal drive unit raises and lowers the ingot 113 relative to the molten surface 111 as desired during the growth process.
[0020] The ingot retrieval apparatus 100 may include an inert gas system for introducing an inert gas, such as argon, into the growth chamber 152 and for withdrawing it from the growth chamber 152. The ingot retrieval apparatus 100 may also include a dopant supply system (not shown) for introducing dopants into the molten liquid 104.
[0021] According to the Czochralski single-crystal growth process, a predetermined amount of polycrystalline silicon or polysilicon is placed in a crucible 102. The semiconductor or solar-grade initial material introduced into the crucible is melted by heat supplied from one or more heating elements to form a silicon melt within the crucible. The ingot retrieval apparatus 100 includes a bottom insulator 110 and side insulators 124 to retain heat within the retrieval apparatus. In the illustrated embodiment, the ingot retrieval apparatus 100 includes a bottom heater 126 located beneath the floor 129 of the crucible. The crucible 102 may be moved to be very close to the bottom heater 126 in order to melt the polycrystalline material placed in the crucible 102.
[0022] To form the ingot, a seed crystal 122 is brought into contact with the surface 111 of the molten metal 104. The pull-up mechanism 114 is operated to pull the seed crystal 122 from the molten metal 104. Referring to Figure 2, the ingot 113 includes a crown portion 142 from which the ingot transitions from the seed crystal 122 and expands outward to reach the desired diameter. The ingot 113 includes a constant-diameter portion 145 or cylindrical "body" (or straight body) of the crystal that is grown by increasing the pull-up rate. The body 145 of the ingot 113 has a relatively constant diameter. The ingot 113 includes a tail or end cone (or end weight) (not shown) behind the body 145, where the diameter of the ingot gradually decreases. Once the diameter is small enough, the ingot 113 is separated from the molten metal 104.
[0023] The ingot pulling apparatus 100 includes side heaters 135 and a susceptor 106 surrounding the crucible 102 to maintain the temperature of the molten metal 104 during crystal growth. The side heaters 135 are positioned radially outward relative to the side walls 131 of the crucible while the crucible 102 is moving up and down the pulling axis A. The side heaters 135 and bottom heaters 126 may be any type of heater that enables the side heaters 135 and bottom heaters 126 to operate as described herein. In one embodiment, the heaters 135, 126 may be resistance heaters. The side heaters 135 and bottom heaters 126 may be controlled by a control system (not shown) so that the temperature of the molten metal 104 is controlled during the pulling process.
[0024] The ingot pulling device 100 may include a heat shield 151. The heat shield 151 may cover the ingot 113 and may be placed inside the crucible 102 during crystal growth (Figure 2).
[0025] In one embodiment, the silicon substrate produced by the method described herein is doped with boron (for example, doped at a relatively high concentration). For example, the silicon melt is doped with boron to a concentration of at least 2.8 × 10⁻⁶ 18 atoms / cm 3A doped silicon ingot having a boron concentration of can be manufactured. The melt is at least 3.8 × 10 18 atoms / cm 3 By doping with boron at this concentration, at least 2.8 × 10⁻¹⁶ units are obtained at the seed end (or seed tip). 18 atoms / cm 3 A doped silicon ingot having a boron concentration of can be obtained. The resulting ingot (and sliced wafer) has a boron concentration of at least 2.8 × 10 18 atoms / cm 3 It may have a boron concentration of [value missing]. In some embodiments, the melt is not doped with carbon (and in some embodiments, no dopants other than boron are used).
[0026] According to embodiments of the present disclosure, a silicon substrate with reduced groin nuclei that constitute epitaxial defects, or a substrate substantially free of such groin nuclei, can be manufactured by (1) controlling the ratio of the crystal pulling rate (v) to the magnitude of the axial temperature gradient (G) near the melt-crystal interface, and (2) controlling the time that a segment is in the temperature range of 1150°C to 950°C (i.e., the dwell time) to 160 minutes or less.
[0027] The type of dominant defect can be controlled by controlling the v / G ratio during silicon growth. At higher v / G values, convection of point defects prevails over their diffusion, and vacancies remain incorporated as dominant point defects because the vacancy concentration at the interface is higher than the interstitial atom concentration. At lower v / G values, diffusion prevails over convection, allowing rapidly diffusing interstitial atoms (or interstitial defects or interstitials) to be incorporated as dominant points. When v / G is near the critical value (i.e., the transition between vacancies and interstitial atoms is dominant in the material), both point defects are incorporated at equally low concentrations.
[0028] According to embodiments of the present disclosure, the vacancy concentration in the ingot may be reduced by controlling (i) the growth rate v and / or (ii) the axial temperature gradient G such that the ratio v / G is less than a critical value of v / G during the growth of the axial segment of a constant diameter portion of the ingot (or it may be controlled to be less than a value slightly above the critical v / G).
[0029] The critical v / G generally changes based on the amount of boron doping. Boron shifts the equilibrium to the interstitial atomic state (or regime). As the boron concentration increases (i.e., resistivity decreases), the vacancy-dominated region shrinks and disappears completely at the crystal center (Figure 3C). In a boron-doped ingot, the vacancy-dominated region is reduced when the boron doping is 8.0 × 10⁻⁶ 18 atoms / cm 3 If it becomes greater than (for example, a resistivity of less than 10 mΩ·cm), it can be removed at all v / G ratios.
[0030] Boron concentration is 8.0 × 10 18 atoms / cm 3 If the following conditions apply, v / G may be controlled to be less than the critical v / G (or less than a value slightly above the critical v / G). According to one embodiment of the present disclosure, the segment of a certain diameter portion of the ingot is 2.8 × 10 18 atoms / cm 3 ~5.4×10 18 atoms / cm 3 If the boron concentration is such that (i) the growth rate v and / or (ii) the axial temperature gradient G is such that v / G is 0.20 mm 2 Control it so that it is smaller than / (min·K). The segment of a certain diameter portion of the ingot is 5.4 × 10 18 atoms / cm 3 ~8.0×10 18 atoms / cm 3 If the boron concentration is such that (i) the growth rate v and / or (ii) the axial temperature gradient G, during segment growth, v / G is 0.25 mm 2 Control the value so that it is less than / (min·K).
[0031] As mentioned above, the segment is 8.0 x 10 18 atoms / cm 3 When doped at concentrations greater than , interstitial atoms are the dominant point defects in the segment across the entire range of v / G, so there is no need to control v / G (i.e., any technically viable v / G may be used).
[0032] Since v / G is generally highest at the center of the ingot, the v / G range provided herein is generally measured at the center of the ingot to ensure that v / G is less than the upper limit across the entire radius of the ingot.
[0033] As the ingot is withdrawn from the molten state, it is cooled from its solidification temperature (approximately 1412°C) to room temperature. According to embodiments of this disclosure, the growth of the ingot and the control of v / G (v / G is a boron concentration of 8.0 × 10⁻⁶) are performed. 18 atoms / cm 3 During the following period (i.e., when the resistivity exceeds 10 mΩ·cm), the cooling rate of the ingot is controlled to minimize the dwell time during which the segments (e.g., each part of the segment) are in the temperature range of 1150°C to 950°C. In this regard, all ingots can be controlled in this way, regardless of the boron doping concentration. According to one embodiment, the cooling rate of the ingot is controlled so that the time during which the segments are in the temperature range of 1150°C to 950°C is less than 160 minutes.
[0034] The hot zone of the ingot lifting apparatus may be positioned and / or modified so as to achieve such cooling rates (e.g., cooling rates of at least 1.25°C / min, at least 1.5°C / min, at least 2.0°C / min, at least 2.5°C / min, at least 3.0°C / min, or at least 3.5°C / min over the temperature range of 1150°C to 950°C). A hot zone capable of achieving such cooling may include any one or more combinations of the following: (1) Active cooling elements near the ingot surface (e.g., water cooling), (2) To increase the thermal insulation between the crystal surface and the melt, thereby reducing the thermal radiation from the melt to the crystal. (3) Applying a jet of cold inert gas near the molten-ingot interface, (4) Use a cone-shaped heat shield (for example, a reflective material such as molybdenum) that surrounds the ingot and reflects the heat radiated by the ingot back to the wall of the ingot lifting device. In other embodiments, the cooling rate of the ingot is controlled such that the time the segment is in the temperature range of 1150°C to 950°C is less than 120 minutes, less than 90 minutes, or less than 60 minutes.
[0035] As described above, v / G may be controlled so that interstitial atoms become the dominant point defects, and the cooling rate is controlled so that at least a segment of the ingot (e.g., an axial segment) remains in the temperature range of 1150°C to 950°C for less than 160 minutes. This segment of the ingot may have a length of at least 0.5 times the length (D) of a constant diameter portion of the ingot (0.5 × D). In other embodiments, the length of the segment is at least 0.75 × D, or at least 0.9 D. In one embodiment, the segment is the entire constant diameter portion of the ingot.
[0036] As the ingot grows, it is sliced onto a substrate (i.e., a wafer). The resulting wafer has a reduced amount of groin nuclei, which become epitaxial defects formed during epitaxial growth.
[0037] Once the wafer is sliced from the ingot and processed (e.g., various smoothing and / or reduction of surface roughness), an epitaxial layer may be formed on the front surface of the substrate by contacting the front surface with a silicon-containing gas that decomposes and forms an epitaxial silicon layer on the substrate. Unless otherwise specified, any method available to those skilled in the art may be used to deposit a silicon epitaxial layer on a silicon substrate. The silicon may be deposited by epitaxy to any appropriate thickness depending on the application of the apparatus. For example, silicon may be deposited using metal-organic chemical vapor deposition (MOCVD), physical vapor deposition (PVD), chemical vapor deposition (CVD), low-pressure chemical vapor deposition (LPCVD), plasma-excited chemical vapor deposition (PECVD), or molecular beam epitaxy (MBE). Examples of silicon precursors (i.e., silicon-containing gases) for LPCVD or PECVD include, in particular, methylsilane, silicon tetrahydrogen (silane), trisilane, disilane, pentasilane, neopentasilane, tetrasilane, dichloridal silane (SiH2Cl2), trichloridal silane (SiHCl3), and silicon tetrachloride (SiCl4). For example, silicon may be deposited on the surface oxide layer by thermal decomposition of silane (SiH4) in a temperature range between approximately 550°C and 690°C, for example, between approximately 580°C and 650°C. The chamber pressure may be in the range of approximately 70 to 400 mTorr.
[0038] The epitaxial layer may be doped with boron by introducing a boron-containing gas into the epitaxial reactor. In one embodiment, the resulting epitaxial structure (i.e., the substrate and epitaxial layer) is p / p + The wafer is doped with boron to a concentration sufficient to obtain an epitaxial wafer. The epitaxial layer may have a reduced number of groin defects, or may be substantially free of groin defects.
[0039] Compared to other methods for forming substrates for silicon epitaxial growth and other methods for forming epitaxial wafers, the method of this disclosure has several advantages. Boron-doped substrate (e.g., 2.8 x 10⁻¹⁶)18 atoms / cm 3 The boron concentrations mentioned above were found to suppress the formation of interstitial dislocation loops. Boron-doped substrates were also found to enhance oxygen precipitation. Oxygen precipitation was further enhanced in vacancy-rich regions (or regions with many vacancies) (i.e., larger precipitates were formed). This enhancement was stronger with increasing vacancy concentration. Growin defects in epitaxial layers deposited on boron-doped substrates are thought to be significantly caused by larger oxygen precipitates on the surface of the single-crystal silicon substrate from which the epitaxial layer grows. These large oxygen precipitates may be associated with dislocation loops or entanglements, but they are thought not to disappear during the epitaxial process and instead lead to defect sites (e.g., epitaxial stacking faults or "hillocks") in the epitaxial layer. In substrates doped to relatively high concentrations, maintaining the v / G ratio below a critical value (or slightly above it) eliminates or reduces individual vacancies, thereby suppressing the formation of relatively large oxygen precipitates that do not disappear during epitaxial deposition. Therefore, it is conceivable that relatively high concentrations of boron doping with v / G controlled below a threshold can reduce defects caused by interstitial atoms and vacancies.
[0040] Ingot segment is 8.0 x 10 18 atoms / cm 3 In embodiments having a boron concentration greater than or equal to , the segments are sufficiently rich in interstitial atoms, and any v / G ratio may be used. Process production efficiency can be maintained not only by controlling the pull rate v but also by controlling the v / G ratio (for example, by using a hot zone configured to provide a high thermal gradient G).
[0041] By minimizing the time the ingot segment is in the temperature range of 1150°C to 950°C (e.g., a dwell time of 160 minutes or less), defects can be further reduced or eliminated, regardless of the v / G value, even if voids are present. [Examples]
[0042] The process described herein will be further illustrated by the following embodiments, which should not be taken as limiting.
[0043] Example 1: Axial trends of vacancy-rich and interstitial atom-rich regions in silicon ingots at different boron doping levels. Figure 3 is a schematic cross-section of a single-crystal silicon ingot, showing the axial trends of vacancy-rich (or vacancy-heavy) regions and interstitial atom-rich (or interstitial atom-heavy) regions for three boron doping levels. Figure 3(a) shows a silicon crystal doped with a high concentration of boron (e.g., 2.8 × 10⁻¹⁶). 18 atoms / cm 3 This shows the axial trend of vacancy-rich and interstitial atom-rich regions for a relatively small amount of doping (which corresponds to a target resistivity of 22 mΩ·cm on the seed side, a typical specification for a highly boron-doped silicon substrate). In the crystal of Figure 3(a), on the seed crystal side, the vacancy-rich region extends from the center to the edge across the entire radius of the crystal, and gradually shrinks along the crystal length as the boron concentration increases axially due to dopant segregation. The location of the OISF ring is also shown at the V / I boundary. The OISF ring disappears where the vacancy-rich region has completely shrunk.
[0044] Figure 3(b) shows silicon crystals doped with boron at high concentrations and intermediate concentrations (for example, 4.5 × 10⁻¹⁶ on the seed side). 18 atoms / cm 3This represents a relatively intermediate doping level, which corresponds to a target resistivity of 16 mΩ·cm on the seed side (a resistivity representative of a typical intermediate resistivity specification for a highly boron-doped silicon substrate), and shows the axial trend of vacancy-rich and interstitial atom-rich regions. In this example, the vacancy-rich region extends a certain distance from the center, even on the seed crystal side. As the boron concentration increases axially due to dopant segregation, the vacancy-rich region gradually shrinks along the crystal length and completely disappears at a certain axial position. The location of the OISF ring is also shown at the V / I boundary. The OISF ring disappears where the vacancy-rich region has completely shrunk.
[0045] Figure 3(c) shows a silicon crystal doped with a high concentration of boron (for example, 8.0 × 10⁻¹⁶ on the seed side). 18 atoms / cm 3 This is a relatively large amount of doping, which is the target resistivity of approximately 10 mΩ·cm on the species side (this is the general p of 5 to 10 mΩ·cm). ++ Figure 3(c) shows the axial trends of vacancy-rich and interstitial atom-rich regions for a typical resistivity specification of a highly boron-doped crystal used to cover a region. The defect pattern in Figure 3(c) remains unchanged even for lower resistivity values such as 5 mΩ·cm. No vacancy-rich regions are present, and the crystal is completely interstitial atom-rich. No OISF rings are formed. At this high doping level, the effect of the v / G ratio is not observed, and it can be concluded that the nature of the defects is entirely determined by the dopant concentration alone.
[0046] Example 2: Comparison of epitaxial defect counts between wafers from ingot segments that spent a relatively long time in the temperature range of 1150°C to 950°C and wafers from ingot segments that spent a relatively short time in the same temperature range. Figure 4 is a graph of the number of epitaxial defects as a function of the axial position of the substrate wafer, measured by a laser inspection device on a single crystal ingot that was in the temperature range of 1150°C to 950°C for a relatively long period of time (labeled "Example 1"). The data points on the left side of Figure 4 represent the relatively small doping concentrations (e.g., 2.8 × 10⁻¹⁰) shown in Figure 3(a). 18 atoms / cm 3 The data points on the right side of Figure 4 represent crystals doped with a high concentration of boron, as shown in Figure 3(b) (for example, 4.5 × 10⁻¹). 18 atoms / cm 3 This concerns crystals doped with a high concentration of boron.
[0047] Figure 5 is a graph of the number of epitaxial defects as a function of the axial position of the substrate wafer, measured by a laser inspection device on a single crystal ingot that was in the temperature range of 1150°C to 950°C for a relatively short period of time (labeled "Example 2"). The data points on the left side of Figure 5 represent the relatively small doping concentrations (e.g., 2.8 × 10⁻¹⁰) shown in Figure 3(a). 18 atoms / cm 3 The data points on the right side of Figure 5 represent crystals doped with a high concentration of boron, as shown in Figure 3(b) (for example, 4.5 × 10⁻¹). 18 atoms / cm 3 This concerns crystals doped with high concentrations of boron.
[0048] As shown in Figures 4 and 5, reducing the time spent in the temperature range of 1150°C to 950°C reduced the number of defects, especially in lightly doped substrates.
[0049] The defect counts in Figures 4 and 5 are shown in Figure 6 as a function of dwell time while the ingot segments are in the temperature range of 1150°C to 950°C. Ingot segments with excessive vacancy concentration are indicated by diamonds, and segments grown with relatively lower vacancy concentration are indicated by ×s. As shown in Figure 6, epitaxial defects depend on the dwell time while the ingot segments are in the temperature range of 1150°C to 950°C.
[0050] Figure 7 shows the dwell times of various ingot segments within a temperature range between 1150°C and 950°C. Relatively slow cooling is indicated as "Example 1," and relatively fast cooling is indicated as "Example 2." 4.32~4.61×10 18 atoms / cm 3 The boron concentration and 6.25 × 10 17 atoms / cm 3 An ingot segment with the following oxygen concentration was selected. The v / G at the center was approximately 0.25 mm 2 This is / (min·K), which is the boron concentration of the segment as described above at 0.20 mm 2 The range was higher than / (min·K). Segments with a dwell time of 180 minutes between 1150°C and 950°C were selected. The segments were sliced into wafers, and silicon epitaxial layers were grown on the front surface of each substrate. The epitaxial wafers were measured with a laser inspection device to determine the number of defects. The average number of epitaxial defects was 16 per wafer, which was considerably higher than the 3 per wafer achieved by embodiments of this disclosure (see, for example, Figures 5 and 6, and Table 1 below).
[0051] Figure 7 also shows the data used to prepare Figure 4 ("Example 1") and Figure 5 ("Example 2").
[0052] Example 3: Number of defects as a function of v / G Table 1 shows the boron concentration in the crystal segment, the oxygen concentration target, and the dwell time spent in the temperature range of 1150°C to 950°C for various test lots. Epitaxial silicon layers were deposited on each substrate, and the number of epitaxial defects was measured using a laser inspection device. In Table 1, "high" excess vacancies were defined as v / G values higher than the v / G range described above (boron concentration 2.8 × 10⁻⁶). 18 atoms / cm 3 ~5.4×10 18 atoms / cm 3 Regarding this, v / G is 0.20mm 2 Greater than / (min·K), boron concentration 5.4 × 10 18 atoms / cm 3 ~8.0x10 18 atoms / cm 3 This indicates that the v / G is greater than 0.25. "Low" excess vacancies were those where the v / G was lower than the v / G range mentioned above (boron concentration 2.8 × 10⁻⁶). 18 atoms / cm 3 ~5.4×10 18 For atoms / cm, v / G is 0.20 mm 2 Less than / (min·K), boron concentration 5.4 × 10 18 atoms / cm 3 ~8.0x10 18 atoms / cm 3 This indicates that v / G is less than 0.25. [Table 1]
[0053] As shown in Table 1, a small number of defects can be achieved when the excess vacancy concentration is low, or when the dwell time is short within the temperature range of 1150°C to 950°C (or a combination of these conditions).
[0054] As used herein, when the terms “about,” “substantially,” “essentially,” and “approximately” are used in relation to a range of dimensions, concentrations, temperatures, or other physical or chemical performance or properties, they are intended to include variations that may exist in the upper and / or lower limits of the performance or property, including variations resulting, for example, from rounding, measurement methods, or other statistical variations.
[0055] Where referring to elements of this disclosure or its embodiments, articles such as “a,” “an,” “the,” and “said” are intended to mean one or more elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and to mean that additional elements other than those listed may exist. The use of terms indicating a particular orientation (e.g., “top,” “bottom,” “side,” etc.) is for explanatory convenience and does not require any particular orientation of the thing (or item) being described.
[0056] Various modifications can be made to the above-described configuration and method without departing from the scope of this disclosure, so all matters included in the above description and shown in the attached drawings are intended to be illustrative and not restrictive.
Claims
1. A silicon substrate having reduced groin nuclei that become epitaxial defects, wherein the boron content is at least 2.8 × 10 18 atoms / cm 3 A method for forming a silicon substrate doped with the following concentration: Adding the initial amount of polycrystalline silicon to the crucible; Heating a crucible containing an initial amount of polycrystalline silicon to form a silicon melt within the crucible; Adding boron to a crucible to produce doped silicon melt; Bringing a silicon seed crystal into contact with the doped silicon melt; Pulling up a silicon seed crystal to grow a single-crystal silicon ingot with a specific diameter. Includes, The segment of the ingot in the portion with a certain diameter is at least about 2.8 × 10 18 atoms / cm 3 It has a boron concentration of; Said segment has 2.8×10 18 atoms / cm 3 to 5.4×10 18 atoms / cm 3 boron concentration, during growth of said segment, (i) growth rate v and / or (ii) axial temperature gradient G is controlled such that v / G is 0.20 mm 2 / (min·K) or less, The aforementioned segment is 5.4 × 10 18 atoms / cm 3 ~8.0 x 10 18 atoms / cm 3 When the boron concentration is such that (i) the growth rate v and / or (ii) the axial temperature gradient G are such that during the growth of the segment v / G is 0.25 mm 2 Control it so that it is less than / (min・K), The aforementioned segment is 8.0 × 10 18 atoms / cm 3 When the boron concentration is greater than (i) the growth rate v and / or (ii) the axial temperature gradient G are manipulated by any value of v / G, This includes cooling the segment of the ingot in the portion of a certain diameter from its solidification temperature to 950°C or below, and ensuring that the dwell time during which the segment of the ingot in the portion of a certain diameter is in the temperature range of 1150°C to 950°C is less than 160 minutes. method.
2. The method according to claim 1, wherein the constant diameter portion has a length D, and the length of the segment is at least 0.5 × D, or at least 0.75 × D, or at least 0.9 × D, or the segment is the entire constant diameter portion of the ingot.
3. The method according to claim 1 or 2, wherein the dwell time during which the segment of the constant diameter portion of the ingot is in a temperature range of 1150°C to 950°C is less than 120 minutes, or less than 90 minutes, or less than 60 minutes.
4. The aforementioned segment is 2.8 × 10 18 atoms / cm 3 ~5.4×10 18 atoms / cm 3 The method according to any one of claims 1 to 3, having the boron concentration of [specified value].
5. The aforementioned segment is 5.4 × 10 18 atoms / cm 3 ~8.0 x 10 18 atoms / cm 3 The method according to any one of claims 1 to 3, having the boron concentration of [specified value].
6. The aforementioned segment is 8.0 × 10 18 atoms / cm 3 The method according to any one of claims 1 to 3, having a boron concentration greater than that of the following.
7. The method according to any one of claims 1 to 6, wherein the melt is not doped with carbon.
8. The method according to any one of claims 1 to 7, further comprising slicing the single-crystal silicon ingot onto a substrate.
9. A method for fabricating an epitaxial structure, A silicon substrate is formed by the method described in any one of claims 1 to 8; The front surface of the silicon substrate is disassembled and brought into contact with a silicon-containing gas to form an epitaxial silicon layer on the silicon substrate. Methods that include...
10. A method for forming a silicon substrate with reduced groin nuclei that become epitaxial defects, Adding the initial amount of polycrystalline silicon to the crucible; Heating a crucible containing an initial amount of polycrystalline silicon to form a silicon melt within the crucible; Add boron to the crucible and add at least 3.8 × 10⁻⁶ 18 atoms / cm 3 To prepare a doped silicon melt having a boron concentration; Bringing a silicon seed crystal into contact with the doped silicon melt; Pulling up a silicon seed crystal to grow a single-crystal silicon ingot with a specific diameter. (i) controlling the growth rate v and / or (ii) the axial temperature gradient G such that v / G is less than critical v / G during the growth of the segments of the constant diameter portion of the ingot; The process includes cooling the segment of the ingot in the portion of a certain diameter from the solidification temperature to 950°C or below, and ensuring that the dwell time during which the segment of the ingot in the portion of a certain diameter is in the temperature range of 1150°C to 950°C is less than 160 minutes. method.
11. The method according to claim 10, wherein the constant diameter portion has a length D, and the length of the segment is at least 0.5 × D, or at least 0.75 × D, or at least 0.9 × D, or the segment is the entire constant diameter portion of the ingot.
12. The method according to claim 10 or 11, wherein the dwell time during which the segment of the constant diameter portion of the ingot is in the temperature range of 1150°C to 950°C is less than 120 minutes, or less than 90 minutes, or less than 60 minutes.
13. In the segment of the aforementioned constant diameter portion, the boron concentration is 2.8 × 10 18 atoms / cm 3 ~5.4×10 18 atoms / cm 3 When (i) the growth rate v and / or (ii) the axial temperature gradient G, v / G is 0.20 mm 2 Control it so that it is less than / (min・K), In the segment of the aforementioned constant diameter portion, the boron concentration is 5.4 × 10 18 atoms / cm 3 ~8.0 x 10 18 atoms / cm 3 When (i) the growth rate v and / or (ii) the axial temperature gradient G, v / G is 0.25 mm 2 The method according to any one of claims 10 to 12, which controls the value to be less than / (min・K).
14. In the segment of the aforementioned constant diameter portion, the boron concentration is 8.0 × 10 18 atoms / cm 3 The method according to any one of claims 10 to 13, wherein any technically feasible value of v / G may be used when it is greater than
15. The method according to any one of claims 10 to 14, wherein the melt is not doped with carbon.
16. The method according to any one of claims 10 to 15, further comprising slicing the single-crystal silicon ingot onto a substrate.
17. A method for fabricating an epitaxial structure, A silicon substrate is formed by the method described in any one of claims 10 to 16; The front surface of the silicon substrate is disassembled and brought into contact with a silicon-containing gas to form an epitaxial silicon layer on the silicon substrate. Methods that include...