Semiconductor equipment

Abstract

To provide a semiconductor device with minimal variation in characteristics. [Solution] The transistor 200 has oxide semiconductors 230, 243a, 243b, first and second conductors 242a, 242b on them, first and second insulators 271a, 271b on them, a third insulator 280 disposed on the first and second insulators and superimposed in the region between the first and second conductors with a first opening formed thereon, a fourth insulator 250 disposed on the oxide semiconductor between the first and second conductors and a third conductor 260 on it, the capacitive element 292 has a second conductor, a third insulator with a second opening reaching the second conductor formed thereon, a fifth insulator 293 disposed inside the second opening and a fourth conductor 294 on it, and the plug 240a is disposed through the first and third insulators and electrically connected to the first conductor. The first and second insulators are metal oxides having an amorphous structure.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a transistor, a semiconductor device, and electronic equipment. One aspect of the present invention relates to a method for manufacturing a semiconductor device. Another aspect of the present invention relates to a semiconductor wafer , and regarding modules.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. A device is one form of a semiconductor device. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection Devices, lighting devices, electro-optical devices, energy storage devices, memory devices, semiconductor circuits, imaging devices, electronic equipment Some devices, such as those mentioned above, can be said to possess semiconductor devices.

[0003] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the present invention relates to a product, method, or method of manufacture. Another aspect of the present invention is , process, machine, manufacture, or composition of matter This concerns (—). [Background technology]

[0004] In recent years, semiconductor equipment development has progressed, with LSIs, CPUs, and memory being the main components used. A CPU is a semiconductor integrated circuit (at least transient) made by processing semiconductor wafers and forming them into chips. It is an assembly of semiconductor elements having a st (and memory) and electrodes that serve as connection terminals.

[0005] Semiconductor circuits (IC chips) such as LSIs, CPUs, and memory are mounted on circuit boards, such as printers. It is mounted on a circuit board and used as one of the components in various electronic devices.

[0006] Furthermore, a transistor is constructed using a semiconductor thin film formed on a substrate having an insulating surface. The technology is attracting attention. This transistor is used in integrated circuits (ICs) and image display devices (simply display). It is widely applied to electronic devices (also referred to as devices). Applicable to transistors. Silicon-based semiconductor materials are widely known as capable semiconductor thin films, but other materials include Oxide semiconductors are attracting attention.

[0007] Furthermore, transistors using oxide semiconductors have extremely low leakage current in the non-conductive state. It is known to be small. For example, the leakage current of a transistor using an oxide semiconductor is Low-power CPUs and other devices that take advantage of this characteristic have been disclosed (see Patent Document 1). ). Also, for example, the characteristic of low leakage current in transistors using oxide semiconductors. Applications of this technology include the disclosure of memory devices that can retain memory contents over long periods of time. (See Patent Document 2.)

[0008] Furthermore, in recent years, with the miniaturization and weight reduction of electronic devices, the need for even higher density integrated circuits has increased. Demand is increasing. Furthermore, there is a need for improved productivity in semiconductor devices, including integrated circuits. [Prior art documents] [Patent Documents]

[0009] [Patent Document 1] Japanese Patent Publication No. 2012-257187 [Patent Document 2] Japanese Patent Publication No. 2011-151383 [Overview of the project] [Problems that the invention aims to solve]

[0010] One aspect of the present invention provides a semiconductor device with less variation in transistor characteristics. This is one of the challenges. Furthermore, one aspect of the present invention provides a semiconductor device with good reliability. This is one of the challenges. Furthermore, one aspect of the present invention provides a semiconductor device having good electrical characteristics. One of the objectives is to provide a semiconductor device with a large on-current. One of the objectives is to provide a solution. Furthermore, one aspect of the present invention provides a solution that enables miniaturization or high integration. One of the objectives is to provide a semiconductor device that can do this. Another aspect of the present invention is low power consumption. One of our objectives is to provide semiconductor equipment for power generation.

[0011] Furthermore, the description of these problems does not preclude the existence of other problems. One approach does not require that all of these issues be resolved. The title will become clear from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the drawings, claims, etc. [Means for solving the problem]

[0012] One aspect of the present invention is a semiconductor device having a transistor, a capacitive element, and a plug. The transistor comprises an oxide semiconductor, a first conductor on the oxide semiconductor, and a second conductor. An electric body, a first insulator on the first conductor, a second insulator on the second conductor, and the first insulator It is placed on the edge body and the second insulator, and superimposed in the region between the first conductor and the second conductor. A third insulator, on which a first opening is formed, and a first conductor on an oxide semiconductor. A fourth insulator is placed between the second conductors, and a third conductor is placed on the fourth insulator. The capacitive element comprises a second conductor and a third element having a second opening that reaches the second conductor. The insulator, the fifth insulator placed inside the second opening, and the fourth conductive material on the fifth insulator The plug has a body and a plug, and the plug has a first insulator, a third insulator, a first conductor and an oxide semiconductor The plug is positioned to penetrate the body and is electrically connected to the first conductor and the first insulator. The second insulator is a semiconductor device that is a metal oxide having an amorphous structure.

[0013] Furthermore, one aspect of the present invention relates to a semiconductor device having a transistor, a capacitive element, and a plug. The transistor comprises an oxide semiconductor, a first conductor on the oxide semiconductor, and a second The conductor 2, the first conductor, and the second conductor are covered, and the first conductor and the second conductor A first insulator and a first insulator are arranged on the first insulator, with a first opening formed superimposed in the region between the bodies. The second opening is formed superimposed in the region between the first conductor and the second conductor. The two insulators and the first conductor and the second conductor are placed on the oxide semiconductor. The capacitive element has a third insulator and a third conductor on the third insulator, and the capacitive element has a second conductor and a third A first insulator and a second insulator and a third insulator are formed, with a third opening reaching two conductors. It has a fourth insulator disposed inside the opening and a fourth conductor on the fourth insulator, The lug is positioned to penetrate the first insulator, the second insulator, the first conductor, and the oxide semiconductor. The plug is electrically connected to the first conductor, and the first insulator has an amorphous structure. This is a semiconductor device that is a metal oxide having [a certain property].

[0014] Furthermore, one aspect of the present invention relates to a semiconductor device having a transistor, a capacitive element, and a plug. The transistor comprises an oxide semiconductor, a first conductor on the oxide semiconductor, and a second A conductor, a first insulator on the first conductor, a second insulator on the second conductor, and the first The insulator and the second insulator are covered and superimposed in the region between the first conductor and the second conductor. A third insulator having a first opening formed therein, and a first conductive material disposed on the third insulator A fourth insulator is superimposed on the region between the body and the second conductor, with a second opening formed therein, and an acid A fifth insulator located on a ion semiconductor and in the region between the first conductor and the second conductor. The capacitive element has a second conductor and a third conductor on a fifth insulator. A second insulator, a third insulator, and a fourth insulator are formed, each having a third opening that reaches the electric body. A body, a sixth insulator disposed inside the third opening, and a fourth conductor on the sixth insulator. The plug has a first insulator, a third insulator, a fourth insulator, a first conductor and Displaced through the oxide semiconductor, the plug is electrically connected to the first conductor, and the first The insulator, the second insulator, and the third insulator are metal oxides having an amorphous structure. It is a semiconductor device.

[0015] Furthermore, the above further comprises a seventh insulator and an eighth insulator, and the seventh insulator The body is placed beneath the oxide semiconductor, the eighth insulator is on the upper surface of the fourth insulator, and the third conductive The upper surface of the body and the upper surface of the fourth conductor are in contact with the seventh insulator and the eighth insulator, respectively. The material is preferably a metal oxide having an amorphous structure.

[0016] Furthermore, the above further includes a ninth insulator, the ninth insulator having an eighth insulator In the region that covers and does not overlap with the fifth insulator, the ninth insulator is in contact with the upper surface of the seventh insulator. The insulator is preferably a metal oxide having an amorphous structure.

[0017] Furthermore, the above further comprises a tenth insulator and an eleventh insulator, and the first Insulator 0 is in contact with the lower surface of insulator 7, and insulator 11 is in contact with the upper surface of insulator 8. Furthermore, the tenth insulator and the eleventh insulator are preferably silicon nitride.

[0018] Furthermore, the above further comprises a first nitride insulator and a second nitride insulator. The first nitride insulator is placed between the first insulator and the third insulator, and the second nitride insulator The edge body is positioned between the second insulator and the third insulator, the first nitride insulator and the second The nitride insulator is preferably silicon nitride.

[0019] Furthermore, in the above, the upper surface of the first insulator and the upper surface of the second insulator are the third insulator It is preferable for it to be in contact with the body.

[0020] Furthermore, in the above, the metal oxide is AlO x (x is any number greater than 0) It is preferable.

[0021] Furthermore, one aspect of the present invention comprises a first insulating layer, a second insulating layer, and a first memory cell. The first memory cell has a first transistor and a first cell The device comprises a quantizing element and a first plug, and the first transistor comprises a first oxide semiconductor and a first A first conductor and a second conductor on an oxide semiconductor, and a first insulating layer on the first conductor A rim body, a second insulator on the second conductor, and a first insulator and a second insulator arranged on top of the second insulator. A third conductor is formed, with a first opening superimposed on the region between the first and second conductors. An insulator and a first oxide semiconductor, and disposed between the first conductor and the second conductor. The first capacitive element comprises a fourth insulator and a third conductor on the fourth insulator, and the second A third insulator having a second opening that reaches the conductor and the second conductor, and the second opening It has a fifth insulator disposed inside and a fourth conductor on the fifth insulator, and the first The plug penetrates the first insulator, the third insulator, the first conductor, and the first oxide semiconductor. The first plug is electrically connected to the first conductor, and the second memory cell is It has a second transistor, a second capacitive element, and a second plug, and the second transistor The sta consists of a second oxide semiconductor, a fifth conductor on the second oxide semiconductor, and a sixth conductor. The electric body, the sixth insulator on the fifth conductor, the seventh insulator on the sixth conductor, and the sixth insulator It is placed on the edge and the seventh insulator and superimposed in the region between the fifth and sixth conductors. The eighth insulator, on which a third opening is formed, and the second oxide semiconductor, and the fifth conductive A ninth insulator is placed between the electric body and the sixth conductor, and a seventh conductor is placed on the ninth insulator, The second capacitive element has a sixth conductor and a fourth opening that reaches the sixth conductor. Furthermore, the eighth insulator and the tenth insulator placed inside the fourth opening and on the tenth insulator The second plug has an eighth conductor and a sixth insulator, a ninth insulator, and a fifth conductor The second plug is positioned through the body and the second oxide semiconductor, and the second plug is electrically connected to the fifth conductor. They are connected in a specific manner, the first memory cell is provided on the first insulating layer, and the second memory cell is The first memory cell is provided, and the upper surface of the first plug and the second plug are electrically connected. The second insulating layer is arranged to cover the first memory cell and the second memory cell. The second insulating layer is placed and superimposed on the first oxide semiconductor and the second oxide semiconductor. This is a semiconductor device that, in a certain region, is in contact with a portion of the upper surface of the first insulating layer.

[0022] Furthermore, in the above, the first insulating layer comprises the 11th insulator and the first insulating layer on the 11th insulator. The material has two insulators, and the second insulator layer has a thirteenth insulator and a first insulator on the thirteenth insulator. The insulator has four components, and the 11th and 13th insulators have silicon nitride. The 12th insulator and the 14th insulator are metal oxides having an amorphous structure. It is preferable to do so.

[0023] Furthermore, in the above, the metal oxide is AlO x (x is any number greater than 0) It is preferable. [Effects of the Invention]

[0024] According to one aspect of the present invention, a semiconductor device with less variation in transistor characteristics is provided. This can be achieved. Furthermore, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. It is possible. Furthermore, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided. This is possible. Furthermore, according to one aspect of the present invention, a semiconductor device with a large on-current is provided. This is possible. Furthermore, according to one aspect of the present invention, a semiconductor device that can be miniaturized or highly integrated is provided. It can be provided. Furthermore, according to one aspect of the present invention, a low-power semiconductor device can be provided. It is possible.

[0025] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the description in the drawings, claims, etc., and the specification, drawings, claims From descriptions such as these, it is possible to extract other effects. [Brief explanation of the drawing]

[0026] [Figure 1] Figure 1A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 1B to 1D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 2] Figure 2 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 3] Figure 3A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 3B to 3D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 4] Figure 4A is a diagram illustrating the classification of IGZO crystal structures. Figure 4B is a diagram illustrating the XRD spectrum of a CAAC-IGZO film. Figure 4C is a diagram illustrating the micro-electron diffraction pattern of a CAAC-IGZO film. [Figure 5] Figure 5A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 5B to 5D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 6] Figure 6A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 6B to 6D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 7] Figure 7A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 7B to 7D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 8] Figure 8A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 8B to 8D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 9] Figure 9A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 9B to 9D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 10] Figure 10A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 10B to 10D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 11] Figure 11A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 11B to 11D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 12] Figure 12A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 12B to 12D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 13] Figure 13A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 13B to 13D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 14] Figure 14A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 14B to 14D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 15] Figure 15A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 15B to 15D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 16] Figure 16A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 16B to 16D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 17] Figure 17A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 17B to 17D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 18]Figure 18A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 18B to 18D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 19] Figure 19A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 19B to 19D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 20] Figure 20A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 20B to 20D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 21] Figure 21A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 21B to 21D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 22] Figure 22A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 22B to 22D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 23] Figure 23 is a top view illustrating a microwave processing apparatus according to one aspect of the present invention. [Figure 24] Figure 24 is a cross-sectional view illustrating a microwave processing apparatus according to one aspect of the present invention. [Figure 25] Figure 25 is a cross-sectional view illustrating a microwave processing apparatus according to one aspect of the present invention. [Figure 26] Figure 26 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 27] Figure 27 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 28] Figure 28A is a top view of a semiconductor device according to one aspect of the present invention. Figure 28B is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 29] Figure 29 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 30]Figure 30A is a block diagram showing an example of the configuration of a storage device according to one aspect of the present invention. Figure 30B is a perspective view showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 31] Figures 31A to 31C are circuit diagrams showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 32] Figure 32 is a diagram showing various types of storage devices in a hierarchical structure. [Figure 33] Figure 33A is a block diagram of a semiconductor device according to one aspect of the present invention. Figure 33B is a perspective view of a semiconductor device according to one aspect of the present invention. [Figure 34] Figures 34A and 34B illustrate an example of an electronic component. [Figure 35] Figures 35A to 35E are schematic diagrams of a storage device according to one embodiment of the present invention. [Figure 36] Figures 36A to 36H show an electronic device according to one embodiment of the present invention. [Modes for carrying out the invention]

[0027] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. It will be readily apparent to those skilled in the art that the form and details can be varied in various ways. Therefore, the present invention shall not be construed as being limited to the contents described in the following embodiments.

[0028] Furthermore, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. This may be the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal This is a schematic example and is not limited to the shapes or values ​​shown in the diagram. For example, In the actual manufacturing process, processes such as etching can cause layers and resist masks to be altered as intended. Although there may be some reduction in volume, this may not be reflected in the diagram for the sake of easier understanding. In drawings, the same reference numeral is used for identical parts or parts having similar functions across different drawings. It is used in common, and explanations of its repetition may be omitted. Also, in cases where similar functions are referred to... In some cases, the hatch patterns are the same, and no specific designation is assigned.

[0029] Furthermore, the invention is made easier to understand, especially in top views (also called "plan views") and perspective views. Therefore, the description of some components may be omitted. Also, some hidden lines and other markings may be omitted. The word "included" may be omitted in some cases.

[0030] Furthermore, the ordinal numbers used in this specification, etc., as "1st," "2nd," etc., are used for convenience only. It does not indicate the order of processes or stacking order. Therefore, for example, "the first" should be written as "the second". This can be explained by appropriately replacing it with "of" or "the third of," etc. The ordinal numbers described herein do not correspond to the ordinal numbers used to specify one aspect of the present invention. There are cases where this is the case.

[0031] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the diagram. Also, the positions of the components are shown. The relationships change as appropriate depending on the direction in which each component is described. Therefore, in the specification... The terms explained are not limited to those used in the text; they can be appropriately rephrased depending on the context.

[0032] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The cases disclosed in this specification, etc., include cases where X and Y are directly connected. Therefore, it is limited to predetermined connection relationships, for example, connection relationships shown in a diagram or text. Furthermore, connections other than those shown in the diagram or text are also disclosed in the diagram or text. Let X and Y be the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals). (Conductive film, layer, etc.)

[0033] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a region where channels are formed (hereinafter also called the channel-forming region), This design allows current to flow between the source and drain through a flannel-formed region. In this specification, the channel-forming region refers to the region through which electric current primarily flows.

[0034] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0035] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the inverter is ON, the part of the semiconductor through which current flows and the gate electrode overlap each other. In the region or channel-forming region, the source (source region or source electrode) and This refers to the distance between the drain (drain region or drain electrode) and the other element. In a zista, the channel length is not necessarily the same across all regions. That is, one The channel length of the transistor may not be fixed to a single value. Therefore, this specification So, the channel length is any one value, maximum value, minimum value, or This will be the average value.

[0036] Channel width refers to, for example, the top view of a transistor, the semiconductor (or transistor) The region where the gate electrode and the part of the semiconductor through which current flows when the gate electrode is ON overlap each other. Channels in a region or channel-forming region, perpendicular to the channel length direction. This refers to the length of the formation region. Note that in a single transistor, the channel width encompasses the entire region. They do not necessarily take the same value. In other words, the channel width of a single transistor is a single value. It may not be fixed. Therefore, in this specification, the channel width is defined as the channel formation region. This is one of the values, the maximum value, the minimum value, or the average value.

[0037] In this specification, depending on the transistor structure, channel formation may actually occur. The channel width in the region (hereinafter also referred to as the "effective channel width") and the transition The channel width shown in the top view of the stylus (hereinafter also referred to as the "apparent channel width") is as follows. ) and may differ. For example, when the gate electrode covers the side of the semiconductor, the effective ch When the channel width becomes larger than the apparent channel width, and its effect can no longer be ignored. For example, in a transistor that is very small and whose gate electrode covers the side of the semiconductor, the semiconductor In some cases, the proportion of channel-forming regions formed on the sides may increase. In such cases, the apparent The effective channel width will be larger than the channel width shown above.

[0038] In such cases, it can be difficult to estimate the effective channel width through actual measurements. For example, in order to estimate the effective channel width from the design value, the shape of the semiconductor is known. A certain assumption is necessary. Therefore, if the shape of the semiconductor is not precisely known, the effective It is difficult to accurately measure channel width.

[0039] In this specification, when simply referred to as "channel width," it refers to the apparent channel width. There is. Or, in this specification, when simply referred to as channel width, it means effective channel It can refer to width. Note that it can also refer to channel length, channel width, effective channel width, or apparent width. Channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0040] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, lead to... In some cases, this can lead to an increase in the defect level density of semiconductors or a decrease in crystallinity. If the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors Other components besides the main component include transition metals, such as hydrogen, lithium, sodium, silicon, These include boron, phosphorus, carbon, and nitrogen. Note that water can also function as an impurity. For example, the inclusion of impurities can cause oxygen vacancies (V) in oxide semiconductors. O :oxygen va In some cases, cancy (also known as cancy) may form.

[0041] In this specification, silicon oxidnitride is defined as having a composition that contains more oxygen than nitrogen. It has a high content of [something]. Also, silicon nitride oxide, in terms of its composition, has more oxygen than [something]. It has a high nitrogen content.

[0042] Furthermore, in this specification, the term "insulator" shall be replaced with "insulating film" or "insulating layer." It is possible to replace the term "conductor" with "conductive film" or "conductive layer." This is possible. Also, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0043] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10 degrees or more and 10 degrees or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5 degrees and 5 degrees. Furthermore, "approximately parallel" means that two straight lines are positioned at an angle of -30 degrees or more and 30 degrees or less. It refers to a state or condition. Also, "perpendicular" means that two straight lines are positioned at an angle of 80 degrees or more and 100 degrees or less. This refers to a state in which the temperature is between 85 and 95 degrees. Therefore, it also includes cases between 85 and 95 degrees. "Perpendicular" refers to a state where two straight lines are positioned at an angle between 60 degrees and 120 degrees.

[0044] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). . ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as . ) For example, when a metal oxide is used in the semiconductor layer of a transistor, The metal oxide in question is sometimes referred to as an oxide semiconductor. Therefore, it is sometimes described as an OS transistor. In such cases, it can be rephrased as a transistor having a metal oxide or oxide semiconductor. It is possible.

[0045] Furthermore, in this specification, normally off means not applying a potential to the gate, or When the gate is given a ground potential, the amount of drape flowing through the transistor per 1 μm of channel width is The current is 1 × 10 at room temperature. -20 A or less, 1 × 10 at 85℃ -18 Below A , or 1 × 10 at 125℃ -16 This means being less than or equal to A.

[0046] (Embodiment 1) In this embodiment, using Figures 1 to 22, a transistor 20 according to one aspect of the present invention An example of a semiconductor device having 0 and a capacitance element 292, and a method for manufacturing the same, will be described. ru.

[0047] <Example 1 of semiconductor device configuration> Using Figure 1, the configuration of a semiconductor device having a transistor 200 and a capacitive element 292 is shown. Let me explain. Figures 1A to 1D show a semiconductor having a transistor 200 and a capacitive element 292. These are a top view and a cross-sectional view of the device. Figure 1A is a top view of the semiconductor device. Figures 1B to 1D are cross-sectional views of the semiconductor device. Here, Figure 1B is a cross-sectional view of Figure 1A. -This is a cross-sectional view of the area indicated by the dashed line in A2, showing the cross-section of transistor 200 in the channel length direction. It is also a surface view. Furthermore, Figure 1C is a cross-sectional view of the area indicated by the dashed line A3-A4 in Figure 1A. Furthermore, Figure 1D is a cross-sectional view of transistor 200 in the channel width direction. Also, Figure 1D is a cross-sectional view of Figure 1A. This is a cross-sectional view of the area indicated by the dashed line A5-A6, and is also a cross-sectional view of the capacitance element 292. Oh, in the top view of Figure 1A, some elements have been omitted for clarity.

[0048] A semiconductor device according to one aspect of the present invention comprises an insulator 212 on a substrate (not shown) and an insulator 212 The insulator 214 above, the transistor 200 and the capacitive element 292 on the insulator 214, and Insulator 280 on the transistor 200 and on the capacitive element 292, and insulator on the insulator 280 282, insulator 284 on insulator 282, insulator 283 on insulator 284, insulator It has an insulator 274 on 284, insulator 212, insulator 214, insulator 280, and The edge members 282, insulators 283, 284, and 274 function as interlayer films. Also, the conductor 240a is electrically connected to the transistor 200 and functions as a plug. It has a conductor 240b that is electrically connected to the capacitive element and functions as a plug. An insulator 241a is provided in contact with the side surface of the conductor 240a, which functions as a lug, and the plug and An insulator 241b is provided in contact with the side surface of the conductor 240b which functions as an insulator. On 274, on the conductor 240a, there is an electrical connection to the conductor 240a, which functions as wiring. A conductive material 246a is provided on the insulator 274, and on the conductive material 240b, A conductor 246b is provided that is electrically connected to and functions as wiring. An insulator 286 is provided on 6a, on the conductor 246b, and on the insulator 274.

[0049] In contact with the inner wall of the opening of insulator 282, insulator 284, insulator 283, and insulator 274 An insulator 241a is provided, and the first conductor 240a is in contact with the side surface of the insulator 241a. An electric element is provided, and further inside, a second conductive element, conductive element 240a, is provided. In contact with the inner wall of the opening of insulator 282, insulator 284, insulator 283, and insulator 274 An insulator 241b is provided, and the first conductive material of the conductor 240b is in contact with the side surface of the insulator 241b. A body is provided, and further inside, a second conductive material, conductive material 240b, is provided. Here, The height of the upper surface of the conductor 240a and the upper surface of the insulator 274 in the region overlapping with the conductor 246a The height can be made to be about the same. Also, the height of the top surface of conductor 240b and the weight of conductor 246b The height of the upper surface of the insulator 274 in the region can be made to be approximately the same. In 0, the first conductor and conductor of conductor 240 (conductor 240a and conductor 240b) The present invention is shown as a configuration in which the second conductor of the electric body 240 is laminated, but is not limited thereto. This is not the case. For example, the conductor 240 is provided as a single layer or as a laminated structure of three or more layers. It may also be used as a configuration. If the structure has a layered structure, an ordinal number may be assigned to distinguish it according to the order of formation. There is a match.

[0050] [Transistor 200] As shown in Figures 1A to 1D, the transistor 200 is located on the insulator 214. 6 and a conductor 205 ( arranged to be embedded in the insulator 214 or insulator 216) Conductors 205a, 205b, and 205c), and on the insulator 216, Insulator 222 on conductor 205, insulator 224 on insulator 222, and on insulator 224 Oxide 230a, oxide 230b on oxide 230a, and oxide on oxide 230b 243 (oxide 243a and oxide 243b), and conductor 242 on oxide 243a a, an insulator 271a on the conductor 242a, an insulator 273a on the insulator 271a, and acid Conductor 242b on ion 243b, insulator 271b on conductor 242b, and insulator 27 Insulator 273b on 1b, and insulator 250 (insulator 250a, and oxide 230b) on the oxide 230b. Insulator 250b) and conductor 2 located on insulator 250 and overlapping with a portion of oxide 230b 60 (conductors 260a and 260b), insulator 224, oxide 230a, acid Compound 230b, oxide 243a, conductor 242a, insulator 271a, and insulator 273 The insulator 272a, insulator 224, oxide 230a, and oxide 230b are placed on top of a. , disposed on oxide 243b, conductor 242b, insulator 271b, and insulator 273b The insulator 272b, the insulator 275a on the insulator 272a, and the insulating layer on the insulator 272b It has a rim 275b and, as shown in Figure 1B, the upper surface of the conductor 260 is insulating It is positioned so as to be approximately in line with the upper surface of the body 250 and the upper surface of the insulator 280. 2 is in contact with the upper surfaces of the conductor 260, the insulator 250, and the insulator 280, respectively.

[0051] In the following, oxides 230a and 230b will be collectively referred to as oxide 230. There are cases where insulator 250a and insulator 250b are collectively referred to as insulator 250. There are also cases where insulators 271a and 271b are collectively referred to as insulator 271. Also, insulators 272a and 272b are sometimes collectively referred to as insulator 272. Furthermore, insulators 273a and 273b are sometimes collectively referred to as insulator 273. Sometimes, insulators 275a and 275b are collectively referred to as insulator 275.

[0052] Insulators 280, 272, and 275 have openings that reach oxide 230b. An insulator 250 and a conductor 260 are arranged within the opening. In the channel length direction of transistor 200, insulator 271a, insulator 273a, conductor The electrode 242a and oxide 243a, and the insulator 271b, insulator 273b, and conductor 242 A conductor 260 and an insulator 250 are provided between b and oxide 243b. The insulator 250 has a region that is in contact with the side surface of the conductor 260 and a region that is in contact with the bottom surface of the conductor 260. It has a region and,

[0053] Oxide 230 consists of oxide 230a placed on the insulator 224 and oxide 230a Preferably, the oxide 230b is placed on top, and the oxide is placed below the oxide 230b. Having 230a, the oxide 2 This can suppress the diffusion of impurities into 30b.

[0054] In transistor 200, oxide 230 is oxide 230a and oxide 23 Although the present invention shows a configuration in which two layers of 0b are stacked, the present invention is not limited to this. For example, the configuration may consist of a single layer of oxide 230b or a laminated structure of three or more layers. Furthermore, oxide 230a and oxide 230b may each have a layered structure.

[0055] Conductor 260 functions as the first gate (also called the top gate) electrode, and conductor 205 functions as a second gate (also called a back gate) electrode. It is also an insulator. 250 functions as the first gate insulator, and insulator 224 functions as the second gate insulator. It functions as such. Also, the conductor 242a functions as either a source or a drain, and is conductive. Body 242b functions as either a source or a drain. Also, the conductivity of oxide 230 At least a portion of the region overlapping with body 260 functions as a channel-forming region.

[0056] Here, Figure 2 shows an enlarged view of the vicinity of the channel formation region in Figure 1B. Furthermore, the oxide 230b forms region 23, which functions as a channel formation region of transistor 200. It is provided so as to sandwich region 0bc and region 230bc, and serves as either a source region or a drain region. It has functional regions 230ba and 230bb. Region 230bc is less In other words, region 230bc is superimposed on conductor 24 It is located in the region between 2a and the conductor 242b. Region 230ba is located between the conductor 242a It is provided superimposed on the conductor 242b, and region 230bb is provided superimposed on the conductor 242b. ru.

[0057] Region 230bc, which functions as a channel-forming region, is part of region 230ba and region 230 Because it has less oxygen deficiency or lower impurity concentration than bb, it has a lower carrier concentration and high resistance It is an anti-region. Also, region 230ba functions as a source region or drain region. The region 230bb has a high oxygen deficiency, or high concentrations of impurities such as hydrogen, nitrogen, and metallic elements. This is a region where the carrier concentration increases due to the high degree, resulting in low resistance. That is, region 230. Regions ba and 230bb have higher carrier concentrations and lower resistance compared to region 230bc. It is a domain.

[0058] Here, the carrier concentration in region 230bc, which functions as a channel-forming region, is 1 × 10⁻⁶. 18 cm -3 preferably 1×10 17 cm -3 and more preferably less than 1×10 16 cm -3 and even more preferably less than 1×10 13 cm -3 and still more preferably less than 1×10 12 cm -3 and still more preferably less than . Regarding the lower limit of the carrier concentration of the region 230bc that functions as a channel formation region there is no particular limitation, and for example, it can be 1×10 -9 cm -3 .

[0059] Further, between the region 230bc and the region 230ba or the region 230bb, a region may be formed where the carrier concentration is equal to or lower than the carrier concentration of the region 230ba and the region 230bb and is equal to or higher than the carrier concentration of the region 230bc . That is, this region functions as a junction region between the region 230bc and the region 230ba or the region 230bb . In the junction region, the hydrogen concentration is equal to or lower than the hydrogen concentration of the region 230ba and the region 23 0bb, and may be equal to or higher than the hydrogen concentration of the region 230bc . Further, in the junction region, the amount of oxygen vacancies is equal to or less than the amount of oxygen vacancies in the region 230 ba and the region 230bb, and may be equal to or more than the amount of oxygen vacancies in the region 230bc .

[0060] Note that in FIG. 2, the region 230ba, the region 230bb, and the region 230bc are formed in an oxide 2 An example of formation in 30b is shown, but the present invention is not limited thereto. For example, each of the above regions may be formed not only on oxide 230b but also on oxide 230a. .

[0061] Furthermore, in oxide 230, it can sometimes be difficult to clearly detect the boundaries of each region. The concentrations of metallic elements, as well as impurity elements such as hydrogen and nitrogen, detected within each region are Furthermore, the changes may not be limited to gradual changes within each domain, but may also be continuous within each domain. The closer the region is to the channel formation region, the more likely it is to contain metallic elements, as well as hydrogen and nitrogen. It is sufficient if the concentration of impurity elements decreases.

[0062] Transistor 200 includes an oxide 230 (oxide 230a, and A metal oxide (hereinafter also called an oxide semiconductor) that functions as a semiconductor (230b) is added to the oxide. It is preferable to use .

[0063] Furthermore, metal oxides that function as semiconductors have a band gap of 2 eV or more, preferably It is preferable to use gold with a band gap of 2.5 eV or higher. By using a specific oxide, the off-current of the transistor can be reduced.

[0064] For example, In-M-Zn, which has indium, element M, and zinc as oxide 230. Oxides (elements M include aluminum, gallium, yttrium, tin, copper, vanadium, and beryllium) Rium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, ra Tantalum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium It is preferable to use one or more metal oxides selected from among others. For 230, In-Ga oxide, In-Zn oxide, or indium oxide may be used. .

[0065] Here, the atomic ratio of In to element M in the metal oxide used for oxide 230b However, the atomic ratio of In to element M in the metal oxide used in oxide 230a is larger It is preferable.

[0066] In this way, by placing oxide 230a below oxide 230b, oxide 230a Spread of impurities and oxygen to oxide 230b from structures formed below It can suppress dispersion.

[0067] Furthermore, oxides 230a and 230b have a common element other than oxygen (main component By (using this method), the defect level density at the interface between oxide 230a and oxide 230b is reduced. Therefore, the influence of interfacial scattering on carrier conduction is small, and high on-currents are possible. It can be obtained.

[0068] It is preferable that each of the oxides 230b has crystalline properties. In particular, oxides 230b and CAAC-OS(c-axis aligned crystalline ox It is preferable to use an IDE semiconductor.

[0069] CAAC-OS has a highly crystalline, dense structure, and is free from impurities and defects (for example, Oxygen deficiency (V O Metal oxides with low oxygen vacancy (also known as oxygen vacancy) Yes. In particular, after the formation of the metal oxide, the temperature is such that the metal oxide does not undergo polycrystallization (for example, By heat treatment at temperatures between 400°C and 600°C, CAAC-OS can be made more crystalline. This allows for a more intricate structure. In this way, the density of CAAC-OS can be further increased. This makes it possible to further reduce the diffusion of impurities or oxygen in the CAAC-OS.

[0070] On the other hand, CAAC-OS is difficult to identify clear grain boundaries, so it is difficult to identify grain boundaries. It can be said that a decrease in electron mobility due to CAAC-OS is less likely to occur. Metal oxides have stable physical properties. Therefore, metal oxides containing CAAC-OS are It is heat-resistant and highly reliable.

[0071] In transistors using oxide semiconductors, the region in the oxide semiconductor where the channel is formed... The presence of impurities or oxygen deficiencies can easily lead to variations in electrical properties and reduced reliability. Yes. Also, hydrogen near the oxygen vacancy can fill the oxygen vacancy, creating a defect (hereinafter referred to as V). O Let's call it H. In some cases, it forms an oxide, which can generate electrons that act as carriers. If an oxygen vacancy is present in the region where a channel is formed in a semiconductor, the transistor will not function properly. Mullion characteristics (a channel exists even when no voltage is applied to the gate electrode, and the transistor...) This makes it easy for current to flow. Therefore, channels are formed in oxide semiconductors. In the region, impurities, oxygen deficiencies, and V O H should preferably be reduced as much as possible. In other words, the region where channels are formed in an oxide semiconductor has a reduced carrier concentration. Therefore, it is preferable that it be type i (true) or substantially type i.

[0072] In contrast, near the oxide semiconductor, oxygen that is desorbed by heating (hereinafter referred to as excess oxygen) In some cases, an insulator containing ( ) is provided and heat treatment is performed, which can cause oxide semiconductors to be released from the insulator. It supplies oxygen to the body, prevents oxygen deficiency, and V O H can be reduced. However, the source region When an excess amount of oxygen is supplied to the region or drain region, the on current of transistor 200 This may cause a decrease in the source region, or a decrease in field-effect mobility. Furthermore, the source region Alternatively, the oxygen supplied to the drain region varies within the substrate surface, resulting in a transistor. This will result in variations in the characteristics of semiconductor devices.

[0073] Therefore, in the oxide semiconductor, the region 230bc that functions as a channel-forming region is The carrier concentration is reduced, and it is preferable that it is type i or substantially type i, but the source region Regions 230ba and 230bb, which function as a carrier or drain region, A high concentration and n-type are preferable. In other words, oxygen in the 230bc region of the oxide semiconductor. Missing, and V O Reduce H, and add an excess amount of oxygen to regions 230ba and 230bb. It is preferable to prevent the supply of [the substance].

[0074] Therefore, in this embodiment, conductor 242a and conductor 242b are placed on oxide 230b. With the setup in place, microwave treatment was performed in an oxygen-containing atmosphere, resulting in an oxygen deficiency in region 230bc. , and V O The aim is to reduce H. Here, microwave processing refers to using microwaves, for example. This refers to processing using a device equipped with a power supply that generates high-density plasma.

[0075] By performing microwave processing in an oxygen-containing atmosphere, microwaves or high frequencies such as RF are produced. By using this method, oxygen gas can be converted into plasma, and this oxygen plasma can be applied. It is also possible to irradiate the region 230bc with high-frequency waves such as microwaves or RF. Due to the effects of Zuma, microwaves, etc., the V region 230bc O By splitting H, hydrogen H is in region 2 Removed from 30bc, oxygen deficiency V O It can be supplemented with oxygen. In other words, region 230 In bc, "V O H → H + V O The following reaction occurs, and the hydrogen concentration in region 230bc changes It can be reduced. Therefore, the oxygen deficiency in region 230bc, and V O Reduce H, This can reduce the carrier concentration.

[0076] Furthermore, when performing microwave processing in an oxygen-containing atmosphere, high frequencies such as microwaves or RF are used. Waves, oxygen plasma, etc. are shielded by conductors 242a and 242b, region 230 The effect does not extend to ba and region 230bb. Furthermore, the effect of oxygen plasma is on oxides. Provided covering 230b and the conductor 242 (conductors 242a and 242b). The insulators 271, 273, 272, 275, and This can be reduced by 280. This allows for reduction in region 23 during microwave processing. In region 0ba and region 230bb, V O H reduction and no excessive oxygen supply occur. Therefore, a decrease in carrier concentration can be prevented.

[0077] In this way, oxygen vacancies are selectively created in the oxide semiconductor region 230bc, and V O H By removing it, region 230bc can be made type i or substantially type i. Furthermore, Excessive flow in areas 230ba and 230bb, which function as drain areas or drain areas. This suppresses the supply of oxygen and maintains the n-type. This suppresses variations in the electrical characteristics of transistor 200, preventing variations in the electrical characteristics of transistor 200 within the substrate surface. This can suppress the action.

[0078] By adopting the above configuration, we can provide a semiconductor device with less variation in transistor characteristics. It can provide a reliable semiconductor device. This makes it possible to provide a semiconductor device with good electrical characteristics.

[0079] In Figure 1B, the side surface of the opening into which the conductor 260 is embedded is a groove of oxide 230b. Including the portion, it is roughly perpendicular to the surface on which oxide 230b is formed, but in this embodiment This is not limited to the above. For example, a U-shaped opening whose bottom has a gently curved surface. The shape may be that of a mold. Also, for example, the side surface of the opening may be the surface to which oxide 230b is formed. It is also acceptable for it to be sloped.

[0080] Furthermore, as shown in Figure 1C, in a cross-sectional view of transistor 200 in the channel width direction, A curved surface may be present between the side surface of oxide 230b and the top surface of oxide 230b. The edges of the side surface and the edges of the top surface may be curved (hereinafter also referred to as rounded). .

[0081] The radius of curvature on the above curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with conductor 242. A thickness smaller than 30b, or smaller than half the length of the region that does not have the curved surface. This is preferable. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than or equal to 20 nm. Preferably, the wavelength is 1 nm to 15 nm, and more preferably 2 nm to 10 nm. By adopting this shape, the oxide 230b of the insulator 250 and conductor 260 is formed. This can improve the coverage.

[0082] The oxide 230 preferably has a layered structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used in oxide 230a, the main component is the metal element. The atomic ratio of element M is the main component of the metal oxide used in oxide 230b. It is preferable that the atomic ratio of element M to the group elements is greater. Also, in oxide 230a In the metal oxide used, the atomic ratio of element M to In is used in oxide 230b. It is preferable that the atomic ratio of element M to In in the metal oxide is greater than that of In. In the metal oxide used in oxide 230b, the atomic ratio of In to element M is, The ratio of In to element M in the metal oxide used in 230a is greater than the atomic ratio of In. preferable.

[0083] Furthermore, oxide 230b is preferably a crystalline oxide such as CAAC-OS. It seems that crystalline oxides such as CAAC-OS contain impurities and defects (such as oxygen deficiencies). It has a dense structure with low crystalline structure and low crystalline properties. Therefore, the source electrode or drain This makes it possible to suppress the extraction of oxygen from oxide 230b by the electrode. Furthermore, even when heat treatment is performed, the extraction of oxygen from oxide 230b can be reduced, The Rangista 200 is designed to withstand high temperatures (so-called thermal budget) during the manufacturing process. It is fixed.

[0084] Here, the energy level at the junction between the oxide 230a and the oxide 230b will be described . At the junction between the oxide 230a and the oxide 230 b, the energy level at the conduction band minimum changes gently. In other words, between the oxide 230a and the oxide 230b, the energy level at the conduction band minimum at the junction changes continuously or can also be referred to as continuous junction. To achieve this structure, the oxide 230a and the oxide 2 30b preferably have a low defect level density in the mixed layer formed at the interface therebetween.

[0085] Specifically, when the oxide 230a and the oxide 230b contain a common element other than oxygen as a main component , a mixed layer with low defect level density can be formed. For example, when the oxide 2 30b is an In-M-Zn oxide, as the oxide 230a, an In-M-Zn oxide, an M-Zn oxide, an oxide of the element M, an In-Zn oxide, indium oxide, or the like may be used .

[0086] Specifically, as the oxide 230a, a metal oxide having a composition of In:M:Zn = 1:3:4 [atomic ratio] or a composition in the vicinity thereof, or a composition of In:M:Zn = 1:1:0.5 [atomic ratio] or a composition in the vicin ity thereof may be used. Further, as the oxide 230b, a metal oxide having a composition of In:M:Zn = 1:1:1 [atomic ratio] or a composition in the vicinity thereof, or In:M:Zn = 4:2:3 [atomic ratio] or a composition in the vicinity thereof may be used. Note that the expression "composition in the vicinity" includes a range of ±30% relative to the desired atomic ratio. Further, gallium is preferably used as the element M.

[0087] Note that in the case where a metal oxide is formed by a sputtering method, the above atomic ratio is for the formed Not limited to the atomic ratio of the metal oxides, the sputtering target used for depositing metal oxide films The atomic ratio of the set may also be acceptable.

[0088] By configuring oxide 230a and oxide 230b as described above, oxide 230a and acid The defect level density at the interface with compound 230b can be reduced. Therefore, the interface dispersion The influence of disturbances on carrier conduction is reduced, and transistor 200 has a large on current. Higher frequency characteristics can be obtained.

[0089] Insulator 212, Insulator 214, Insulator 271, Insulator 272, Insulator 275, Insulator 2 82, at least one of insulators 283, 284, and 286 is water, hydrogen Which impurities are coming from the substrate side, or from above transistor 200? It is preferable that it functions as a barrier insulating film that suppresses diffusion. Edge 212, insulator 214, insulator 271, insulator 272, insulator 275, insulator 282 At least one of insulators 283, 284, and 286 contains a hydrogen atom, hydrogen Molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms Insulating material having the function of suppressing the diffusion of impurities such as granules (the above-mentioned impurities are less permeable) It is preferable to use oxygen (for example, at least oxygen atoms, oxygen molecules, etc.). (i) Use an insulating material that has the function of suppressing the diffusion of (the above oxygen is not easily permeable). It is preferable.

[0090] In this specification, a barrier insulating film refers to an insulating film that has barrier properties. In this specification, barrier properties refer to the function of suppressing the diffusion of the corresponding substance (low permeability). (Also known as) capturing and fixing the corresponding substance (also known as gettering) (u) To be a function.

[0091] Insulator 212, Insulator 214, Insulator 271, Insulator 272, Insulator 275, Insulator 2 82, as insulators 283, 284, and 286, impurities such as water and hydrogen. It is preferable to use an insulator that has the function of suppressing the diffusion of substances and oxygen, for example, Aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium oxide Zinc oxide, silicon nitride, or silicon nitride oxide can be used. For example, as insulators 212, 275, 283, and 286, more water It is preferable to use silicon nitride or the like, which has high elementary barrier properties. Also, for example, insulator 2 14. Insulators 271, 272, 282 and 284 capture hydrogen. Using aluminum oxide or magnesium oxide, which have high ability to capture and fix hydrogen. It is preferable that this is done so that impurities such as water and hydrogen are contained in the insulator 212 and the insulator By using 214, diffusion from the substrate side to the transistor 200 side can be suppressed. Alternatively, an interlayer insulating film in which impurities such as water and hydrogen are located outside the insulator 286. Therefore, diffusion to the transistor 200 side can be suppressed. Alternatively, an insulator Oxygen contained in 224, etc., spreads to the substrate side via insulators 212 and 214. It can suppress the dispersion. Alternatively, oxygen contained in the insulator 280, etc. This allows for suppression of diffusion upwards from transistor 200 via components such as 282. In this way, transistor 200 suppresses the diffusion of impurities such as water and hydrogen, as well as oxygen. an insulator 212, an insulator 214, an insulator 271, an insulator 272, and an insulator 27 having the function of 5, it is preferable to adopt a structure surrounded by an insulator 282, an insulator 283, an insulator 284, and an insulator 286 .

[0092] Here, as the insulator 214, the insulator 271, the insulator 272, the insulator 282, and the insulator 2 84, it is preferable to use an oxide having an amorphous structure. For example, AlO x (where x is an arbitrary number greater than 0), or MgO y (where y is an arbitrary number greater than 0) or other metal oxide is preferably used. In a metal oxide having such an amorphous structure, oxygen atoms have dangling bonds, and the dangling bonds may have a property of capturing or fixing hydrogen. When a metal oxide having such an amorphous structure is used as a component of the transistor 200 or provided around the transistor 200 , hydrogen contained in the transistor 200 or hydrogen present around the transistor 200 can be captured or fixed. In particular, it is preferable to capture or fix hydrogen contained in the channel formation region of the transistor 200 . When a metal oxide having an amorphous structure is used as a component of the transistor 200 or provided around the transistor 200 , the transistor 200 with favorable characteristics and high reliability, and a semiconductor device can be manufactured.

[0093] Further, the insulator 214, the insulator 271, the insulator 272, the insulator 282, and the insulator 28 4 preferably have an amorphous structure, but a polycrystalline region may be partially formed in ​It may also be present. Also, insulator 214, insulator 271, insulator 272, insulator 282, and The insulator 284 has a multilayer structure in which an amorphous layer and a polycrystalline layer are stacked. It is acceptable. For example, a laminated structure in which a polycrystalline layer is formed on top of an amorphous layer. "Made" is also acceptable.

[0094] The composition of insulators 214, 271, 272, 282, and 284 The film can be formed, for example, using the sputtering method. The sputtering method uses a deposition gas. Since hydrogen is not required, insulators 212, 214, 271, and 272 are used. The hydrogen concentration of insulators 282 and 284 can be reduced. The method is not limited to sputtering, but also includes chemical vapor deposition (CVD). (Vapor Deposition) method, Molecular beam epitaxy (MBE) cular beam epitaxy (PLD) method, pulsed laser deposition (PLD) Laser Deposition) method, Atomic Layer Deposition (ALD) Methods such as the er Deposition method may be used as appropriate.

[0095] Furthermore, the resistivity of insulators 212, 275, 283, and 286 is reduced. It may be preferable to do so. For example, insulator 212, insulator 275, insulator 283 , and the resistivity of insulator 286 is approximately 1 × 10 13 By setting it to Ωcm, semiconductor device fabrication In the process using plasma, etc., insulator 212, insulator 275, insulator 283, and insulator 286, conductor 205, conductor 242, conductor 260, or conductor 24 In some cases, the charge-up (static charge) of 6 can be mitigated. Insulator 212, insulator The resistivity of insulators 275, 283, and 286 is preferably 1 × 10⁻⁶. 10 Ωc m or more 1×10 15 The density should be less than or equal to Ωcm.

[0096] Furthermore, insulators 216 and 280 have a lower dielectric constant than insulator 214. This is preferable. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wirings is reduced. For example, silicon oxide, oxide, silicon oxide can be used as insulator 216 and insulator 280. silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, and carbon Silicon oxide with added nitrate, silicon oxide with voids, etc., can be used as appropriate.

[0097] The conductor 205 is positioned to overlap with the oxide 230 and the conductor 260. Therefore, it is preferable that the conductor 205 be embedded in an opening formed in the insulator 216. stomach.

[0098] The conductor 205 comprises conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and side wall of the opening. The conductor 205b is It is provided so as to be embedded in a recess formed in the conductor 205a. Here, the conductor 20 The upper surface of 5b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. Conductor 2 05c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is the height of the upper surface of the conductor 205a and the insulator 216 It is approximately the same height as the top surface of conductor 205a and conductor 2. It will be enclosed within the 05c.

[0099] Here, conductors 205a and 205c are hydrogen atoms, hydrogen molecules, water molecules, and nitrogen atoms. Expansion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. It is preferable to use a conductive material that has the function of suppressing dispersion. Alternatively, oxygen (for example, Using a conductive material that has the function of suppressing the diffusion of at least one of the following: oxygen atoms, oxygen molecules, etc. It is preferable that they be present.

[0100] Conductive material having the function of reducing hydrogen diffusion in conductor 205a and conductor 205c By using this material, impurities such as hydrogen contained in the conductor 205b are removed from the insulator 224, etc. This prevents diffusion into oxide 230. Also, conductor 205a and By using a conductive material that has the function of suppressing oxygen diffusion in the conductor 205c, This can suppress the oxidation of the conductor 205b, which reduces its conductivity. Examples of conductive materials that have a suppressive function include titanium, titanium nitride, tantalum, and nitrogen. It is preferable to use tantalum oxide, ruthenium oxide, etc. As for the conductive body 205a and the conductive material 205c, if the conductive material is made in a single layer or a multilayer That's fine. For example, titanium nitride can be used for conductors 205a and 205c.

[0101] Furthermore, the conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use a material with properties. For example, tungsten can be used for the conductor 205b. stomach.

[0102] Conductor 205 may function as a second gate electrode. In that case, conductor 20 The potential applied to 5 is changed independently of the potential applied to the conductor 260, without being linked to it. This allows us to control the threshold voltage (Vth) of transistor 200. In particular, By applying a negative potential to the conductor 205, the Vth of transistor 200 can be increased. Therefore, it becomes possible to reduce the off-current. Thus, a negative potential is applied to the conductor 205. When applied, the voltage applied to the conductor 260 is greater than when not applied. The inductive current can be reduced.

[0103] Furthermore, the electrical resistivity of the conductor 205 is set considering the potential applied to the conductor 205. The thickness of the conductor 205 is measured and set to match the electrical resistivity. Also, the insulator 21 The film thickness of 6 will be approximately the same as that of conductor 205. Here, within the limits allowed by the design of conductor 205 It is preferable to reduce the film thickness of the conductor 205 and the insulator 216. By making it thinner, the absolute amount of impurities such as hydrogen contained in the insulator 216 is reduced. Therefore, the diffusion of the impurity into the oxide 230 can be suppressed.

[0104] Furthermore, as shown in Figure 1A, the conductor 205 is made of the conductor 242a of oxide 230 and conductor It is preferable to provide a larger area than the area that does not overlap with the electric body 242b. In particular, as shown in Figure 1C As such, the conductor 205 is located in the channel width direction of oxide 230a and oxide 230b It is preferable that the region outside the end is also stretched. In other words, oxide 2 Outside the end of the channel width direction of 30, the conductor 205 and the conductor 260 are Preferably, the first gate is superimposed via an insulator. The electric field of the conductor 260, which functions as an electrode, and the conductor 20, which functions as a second gate electrode. The electric field at 5 allows the channel-forming region of the oxide 230 to be electrically surrounded. In this specification, the electric fields of the first gate and the second gate create a channel formation region. The structure of a transistor that electrically surrounds a region is called a Surrounded channel. This is called an S-channel structure.

[0105] In this specification, etc., an S-channel transistor refers to a pair of gates. The electric fields of one and the other electrodes electrically surround the channel formation region. This represents the structure of the sta. Furthermore, the S-channel structure disclosed in this specification is a Fin-type structure. It differs from conventional and planar structures. By adopting an S-channel structure, short channels A transistor that is less susceptible to the Nell effect, or in other words, a transistor that is less prone to short-channel effects. It is possible.

[0106] Furthermore, as shown in Figure 1C, the conductor 205 is extended to function as wiring. However, this is not limited to the case where a conductor that functions as wiring is placed beneath the conductor 205. It is also possible to configure it in such a way. Furthermore, the conductor 205 is not necessarily provided one per transistor. There is no need to do so. For example, you can configure it so that the conductor 205 is shared by multiple transistors. stomach.

[0107] In transistor 200, the conductor 205 consists of conductor 205a, conductor 205b, The present invention is not limited to the above, but also to the configuration in which conductive material 205c is laminated. No. For example, the conductor 205 is provided as a single layer, two layers, or a laminated structure of four or more layers. It is also acceptable to use this configuration.

[0108] Insulators 222 and 224 function as gate insulators.

[0109] The insulator 222 suppresses the diffusion of hydrogen (for example, at least one such as a hydrogen atom or hydrogen molecule). It is preferable that it has a function to control oxygen. Also, the insulator 222 is oxygen (for example, oxygen atoms, It is preferable that the function suppresses the diffusion of at least one of the following: oxygen molecules. For example, Insulator 222 suppresses the diffusion of hydrogen and / or oxygen more effectively than insulator 224. It is preferable that it has a function.

[0110] The insulator 222 is made of either or both aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Suitable insulators include aluminum oxide and hafni oxide. Using oxides containing um, aluminum, and hafnium (hafnium aluminate), etc. It is preferable that such a material is used to form the insulator 222. 2 is the release of oxygen from the oxide 230 to the substrate side, and oxidation from the periphery of the transistor 200. It functions as a layer that suppresses the diffusion of impurities such as hydrogen into material 230. Therefore, insulator 222 By providing this feature, the diffusion of impurities such as hydrogen into the inside of transistor 200 is suppressed. This can suppress the formation of oxygen vacancies in the oxide 230. Also, the conductor 205 is an absolute This suppresses the reaction between the surrounding material 224 and the oxygen present in the oxide 230.

[0111] Alternatively, the insulator 222 may contain, for example, aluminum oxide, bismuth oxide, or germanium oxide. M, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, acid Zirconium oxide may be added. Alternatively, these insulators may be subjected to nitriding treatment. The insulator 222 is made of silicon oxide, silicon oxide nitride, or silicon nitride. The materials may be stacked and used together.

[0112] Furthermore, the insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT) (Io3), (Ba,Sr)TiO3 (BST), and other so-called high-k materials are included in the aqueous solution. The edge material may be used in a single layer or in a stacked configuration. As transistors become smaller and more integrated... Thinning the gate insulator can sometimes lead to problems such as leakage current. By using a high-k material as an insulator that functions as a body, the physical film thickness is maintained while... This makes it possible to reduce the gate potential during transistor operation.

[0113] The insulator 224 in contact with the oxide 230 contains excess oxygen (oxygen is removed by heating). Preferably, the insulator 224 may be silicon oxide, silicon oxide nitride, or the like as appropriate. It is sufficient to use it. By providing an oxygen-containing insulator in contact with the oxide 230, the oxide 23 This can reduce oxygen deficiency in transistor 200 and improve its reliability.

[0114] As for the insulator 224, specifically, an oxide material from which some oxygen is removed by heating, or alternatively, Therefore, it is preferable to use an insulating material that has an excess oxygen region. Oxygen is removed by heating. The oxides that are released are TDS (Thermal Desorption Spectroscopy). (copy) Analysis showed that the amount of oxygen molecules removed was 1.0 × 10⁻⁶. 18 molecular / cm² 3 Preferably 1.0 × 10 19 molecular / cm² 3 More preferably 2.0×10 19 molecular / cm² 3 Above, or 3.0 × 10 20 molc ules / cm 3 The above describes the oxide film. Note that the surface temperature of the film during the above TDS analysis was The preferred temperature range is between 100°C and 700°C, or between 100°C and 400°C. stomach.

[0115] Furthermore, during the manufacturing process of transistor 200, the surface of oxide 230 is exposed. Therefore, heat treatment is preferable. This heat treatment is, for example, performed at a temperature of 100°C to 600°C. More preferably, the heating should be carried out at a temperature between 350°C and 550°C. Note that the heat treatment is performed using nitrogen gas. Alternatively, an inert gas atmosphere, or an oxidizing gas at 10 ppm or more, 1% or more, The procedure should be carried out in an atmosphere containing 10% or more of the substance. For example, heat treatment is preferably carried out in an oxygen atmosphere. This supplies oxygen to oxide 230, thus eliminating oxygen deficiency (V O ) can be reduced. Furthermore, the heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or After heat treatment in an active gas atmosphere, an oxidizing gas is added at 10 pJ to replenish the desorbed oxygen. The procedure may be carried out in an atmosphere containing 1% or more of the substance, or 10% or more of the substance. Alternatively, an oxidizing gas may be used. After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, then continuously The heat treatment may be carried out in a nitrogen gas or inert gas atmosphere. It is preferable that the gas used is highly purified. For example, the gas used in the above heat treatment The amount of water contained in the product is 1 ppb or less, preferably 0.1 ppb or less, more preferably 0. It should be kept below 0.5 ppb. By using highly purified gas and performing heat treatment, oxidation can be reduced. This makes it possible to prevent moisture and other substances from being absorbed into object 230 as much as possible.

[0116] Furthermore, by performing an oxygenation treatment on oxide 230, the oxygen deficiencies in oxide 230 are supplied. It is repaired by the oxygen that is used, in other words, "V O This promotes the reaction "+O→null". Furthermore, the oxygen supplied reacts with the hydrogen remaining in oxide 230. This allows the hydrogen to be removed as H2O (dehydrated). This eliminates oxidation. The hydrogen remaining in substance 230 recombines with the oxygen vacancy and V O Suppression of H formation It is possible.

[0117] The insulators 222 and 224 may have a laminated structure of two or more layers. In that case, it is not limited to laminated structures made of the same material, but also applies to laminated structures made of different materials. Good. Also, the insulator 224 may be superimposed with the oxide 230a to form island-like structures. In total, the insulator 272 is in contact with the side surface of the insulator 224 and the top surface of the insulator 222. .

[0118] Oxide 243a and oxide 243b are provided on oxide 230b. 43a and oxide 243b are provided separated by the conductor 260.

[0119] Oxide 243 (oxide 243a and oxide 243b) is a material that suppresses oxygen permeation. It is preferable that it has the ability. Conductor 242 that functions as a source electrode and drain electrode and acid By placing an oxide 243, which has the function of suppressing oxygen permeation, between the oxide 230b and the oxide 230b, This is preferable because it reduces the electrical resistance between the conductor 242 and the oxide 230b. This configuration improves the electrical characteristics and reliability of transistor 200. The properties can be improved. Furthermore, the electrical resistance between the conductor 242 and the oxide 230b is sufficiently high. If the amount can be reduced, a configuration without oxide 243 may be used.

[0120] As oxide 243, a metal oxide containing element M may be used. In particular, element M is A Luminium, gallium, yttrium, or tin may be used. Oxide 243 is an oxide. It is preferable that the concentration of element M is higher than that of substance 230b. Also, as oxide 243, Gallium may be used. Alternatively, metal acids such as In-M-Zn oxide may be used as oxide 243. A compound may also be used. Specifically, in the metal oxide used in oxide 243, with respect to In The atomic ratio of element M in oxide 230b is the element relative to In in the metal oxide used in oxide 230b. It is preferable that the atomic ratio is greater than that of element M. Also, the film thickness of oxide 243 is 0.5 nm or less. Preferably, the wavelength is 5 nm or less, more preferably 1 nm to 3 nm, and even more preferably 1 nm. The wavelength is between m and 2 nm. Furthermore, it is preferable that oxide 243 is crystalline. If 43 is crystalline, the release of oxygen from the oxide 230 can be effectively suppressed. For example, if oxide 243 has a crystalline structure such as hexagonal, then the acid in oxide 230 In some cases, it may be possible to suppress the release of primary substances.

[0121] The conductor 242a is provided in contact with the upper surface of the oxide 243a, and the conductor 242b is an oxide It is preferable that they are provided in contact with the upper surface of 243b. Conductors 242a and 242 b functions as either the source electrode or the drain electrode of transistor 200, respectively.

[0122] Examples of conductor 242 include tantalum-containing nitrides, titanium-containing nitrides, and molybdenum-containing nitrides. Nitrides containing den, nitrides containing tungsten, nitrides containing tantalum and aluminum It is preferable to use materials such as titanium and aluminum nitrides. One embodiment of the present invention In this regard, nitrides containing tantalum are particularly preferred. Also, for example, ruthenium oxide, Ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel. Oxides may also be used. These materials are conductive materials that are resistant to oxidation, or oxygen This material is preferable because it maintains its conductivity even after absorption.

[0123] Furthermore, hydrogen contained in oxide 230b, etc., in conductor 242a or conductor 242b Diffusion may occur. In particular, conductors 242a and 242b contain nitrogen containing tantalum. By using the ion, the hydrogen contained in oxide 230b, etc., becomes conductor 242a or conductive It readily diffuses into body 242b, and the diffused hydrogen is present in either conductor 242a or conductor 242b. It can combine with nitrogen. In other words, hydrogen contained in oxides such as 230b is a conductor. It may be absorbed by 242a or conductor 242b.

[0124] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is It is provided in contact with the upper surface of the conductor 242b. The insulator 271 is at least against oxygen It is preferable that the insulator 271 functions as a barrier insulating film. Therefore, the insulator 271 is oxygen It is preferable that the insulator has a function to suppress diffusion. For example, the insulator 271 is better than the insulator 280. It is preferable that the insulator 271 also has the function of suppressing oxygen diffusion. Alternatively, a silicon-containing nitride such as silicon nitride may be used. Also, the insulator 271 is water It is preferable that it has the function of capturing impurities such as elements. In that case, as the insulator 271 This refers to metal oxides having an amorphous structure, such as aluminum oxide or magnesium oxide. An insulator such as sium can be used. In particular, as insulator 271, an amorphous structure is used. By using aluminum oxide or amorphous aluminum oxide, This is preferable because it can effectively capture or fix hydrogen. This allows for the fabrication of a highly reliable transistor 200 and a semiconductor device. .

[0125] The insulator 273a is provided in contact with the upper surface of the insulator 271a, and the insulator 273b is It is provided in contact with the upper surface of the insulator 271b. Also, the upper surface of the insulator 273a is an insulator It is preferable that the side surface of the insulator 273a is in contact with the insulator 250, while the side surface of the insulator 272a is in contact with the insulator 250. The upper surface of insulator 273b is in contact with insulator 272b, and the side surface of insulator 273b is in contact with insulator 250. Contact is preferable. The insulator 273 is an insulator that contains impurities such as water and hydrogen, and oxygen. It is preferable to use an insulator that has a function of suppressing dispersion, for example, aluminum oxide. Magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, nitrogen Silicon oxide or silicon nitride can be used. For example, insulator 273 Therefore, it is preferable to use silicon nitride or the like, which has higher hydrogen barrier properties.

[0126] Insulator 272a consists of oxide 230a, oxide 230b, oxide 243a, and conductor 242 a, provided in contact with the side surfaces of insulators 271a and 273a, and the upper surface of insulator 273a. The insulator 272b is composed of oxide 230a, oxide 230b, oxide 243b, and conductive The sides of the electric body 242b, the insulator 271b, the insulator 273b, and the top surface of the insulator 273b, It is provided in contact with the insulator 224. In addition, the insulators 272a and 272b are on top of the insulator 224. It is provided in contact with the surface. The insulator 272 is a barrier insulating film that suppresses oxygen permeation. It is preferable that it functions in this way. Also, the insulator 272 is designed to prevent impurities such as water and hydrogen from entering from above. It functions as a barrier insulating film that suppresses diffusion into insulator 224 or insulator 273. It is preferable that it has the function of capturing impurities such as hydrogen. As for the insulator 272, aluminum oxide having an amorphous structure, or amorphous It is preferable that it is aluminum oxide with an amorphous structure. Materials, in particular, aluminum oxide having an amorphous structure, and oxidation of an amorphous structure Aluminum can sometimes capture or fix hydrogen present in its surroundings. To manufacture a transistor 200 with good characteristics and high reliability, and a semiconductor device. It is possible.

[0127] The insulator 275 is provided covering the insulator 272, and the insulator 250 and the conductor An opening is formed in the region where 260 is provided. The insulator 275 is silicon nitride. It is preferable to use [this].

[0128] Within the region sandwiched between insulator 212 and insulator 283, insulator 280, insulator 224, and insulation Body 222 and insulator 275 are arranged, and the insulator 275 is in contact with impurities such as hydrogen. By providing an insulator 272 which has the function of capturing, the insulator 280, insulator 224, insulation Impurities such as hydrogen contained in body 275, insulator 273, etc. are captured within the region. The amount of hydrogen can be kept constant. In this case, aluminum oxide is used as the insulator 272. It is preferable to use materials such as nium.

[0129] Insulator 250 functions as a gate insulator. Insulator 250 is on top of oxide 230b It is preferable to arrange them in contact with the surface. The insulator 250 is silicon oxide, silicon oxide and nitride. silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, carbon-added acid Silicon oxide, silicon oxide with added carbon and nitrogen, porous silicon oxide, etc. It can be used. In particular, silicon oxide and silicon oxide-nitride are stable to heat. Therefore, it is preferable.

[0130] Insulator 250, like insulator 224, has a concentration of impurities such as water and hydrogen in it. It is preferable that the amount is reduced. The film thickness of the insulator 250 is 1 nm or more and 20 nm or less. It is preferable to do so.

[0131] In Figures 1A to 1D, the insulator 250 has a two-layer structure consisting of insulator 250a and insulator 250b. As shown, when the insulator 250 has a two-layer laminated structure, the lower layer of the insulator 250 is the insulation Body 250a is formed using an insulator that releases oxygen upon heating, and the upper layer of insulator 250 The insulator 250b is formed using an insulator that has the function of suppressing the diffusion of oxygen. This is preferable. With this configuration, the oxygen contained in the insulator 250a becomes a conductor. This can suppress diffusion to 260. In other words, the amount of oxygen supplied to oxide 230. This can suppress the decrease of the conductor 26 due to the oxygen contained in the insulator 250a. The oxidation of 0 can be suppressed. For example, insulator 250a is the same as insulator 250 described above. It is provided using materials that can be used, and the upper layer of the insulator 250 is made of the same material as the insulator 222. It can be provided using a material. The insulator 250 may be a single layer or three or more layers. It may also be a laminated structure.

[0132] Furthermore, when silicon oxide or silicon oxide nitride is used for the insulator 250a, insulator 2 50b may be an insulating material that is a high-k material with a high relative permittivity. By making the edge body a laminated structure of insulator 250a and insulator 250b, it becomes stable against heat. Furthermore, a laminated structure with a high dielectric constant can be achieved. Therefore, the physical thickness of the gate insulator can be achieved. While maintaining this property, it becomes possible to reduce the gate potential applied during transistor operation. This makes it possible to thin the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator.

[0133] Specifically, the insulator 250b is made of hafnium, aluminum, gallium, and yttrium. Umium, Zirconium, Tungsten, Titanium, Tantalum, Nickel, Germanium, Magnesium Metal oxides or oxides containing one or more metals selected from nesium, etc. Any metal oxide that can be used as 230 can be used. In particular, aluminum It is preferable to use an insulator containing an oxide of one or both of hafnium. For example For example, the insulator 250b includes silicon oxide and hafnium oxide on the silicon oxide. A layered structure can be used.

[0134] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 is reduced. Dispersion is suppressed. In other words, the decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Furthermore, the oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.

[0135] Furthermore, even if the above metal oxide is configured to function as part of the first gate electrode, Good. For example, a metal oxide that can be used as oxide 230 is the same as the above metal oxide. It can be used in this way. In that case, the conductive material 260a is deposited by sputtering. Therefore, the electrical resistance of the above metal oxide can be reduced to make it a conductor. This is called OC( This can be called an Oxide Conductor electrode.

[0136] Having the above metal oxide, the influence of the electric field from the conductor 260 is not weakened. The on-current of the transistor 200 can be improved. Also, the insulator 250 and the above metal The physical thickness of the group oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress the leakage current between the conductor 260 and the oxide 230. Also, By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide The physical distance between object 230 and the conductor 260, and the electric field strength from the conductor 260 to the oxide 230. This can be easily adjusted as needed.

[0137] Conductor 260 functions as the first gate electrode of transistor 200. Conductor 26 0 comprises a conductor 260a and a conductor 260b disposed on top of the conductor 260a. Preferably, the conductor 260a encloses the bottom and sides of the conductor 260b. It is preferable to arrange them in such a way. Also, as shown in Figure 1B, the upper surface of the conductor 260 is an insulating It is roughly in line with the top surface of the edge 250. Note that the conductor 260 consists of conductor 260a and conductor 2 Although it is shown as a two-layer structure of 60b, a single-layer structure is also acceptable, or a laminated structure of three or more layers. That's fine.

[0138] Conductor 260a contains hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, a device that inhibits the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable to use a conductive material that has conductivity.

[0139] Furthermore, because the conductor 260a has the function of suppressing oxygen diffusion, the insulator 250 The oxygen contained in the material suppresses the oxidation of the conductor 260b, which reduces its conductivity. Yes, it is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium and nitride. Titanium, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferred. It's nice.

[0140] Furthermore, since the conductor 260 also functions as wiring, a highly conductive material should be used. This is preferable. For example, the conductor 260b is mainly composed of tungsten, copper, or aluminum. A conductive material can be used. Furthermore, the conductor 260b may also be in a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above-mentioned conductive material may be used.

[0141] Furthermore, in transistor 200, the conductor 260 is formed on an insulator 280 or the like. The conductor 260 is formed in a self-aligning manner to fill the opening. Therefore, the conductor 260 is positioned in the region between the conductor 242a and the conductor 242b. It can be positioned reliably without any problems.

[0142] Furthermore, as shown in Figure 1C, in the channel width direction of transistor 200, insulator 2 When the bottom surface of 22 is used as a reference, the conductor 260 and the oxide 230b overlap. The height of the bottom surface of the region that does not undergo this process is preferably lower than the height of the bottom surface of oxide 230b. The conductor 260, which functions as a electrode, transmits oxide 230b via an insulator 250, etc. By configuring the channel formation region to cover the sides and top surface, the electric field of the conductor 260 is oxidized. This makes it easier to apply the effect to the entire channel formation region of component 230b. Therefore, transistor 200 The on-current can be increased and the frequency characteristics can be improved. Based on the bottom surface of the insulator 222 When considered as a standard, the oxides 230a and 230b and the conductor 260 do not overlap. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in region i is, 0 nm to 100 nm, preferably 3 nm to 50 nm, more preferably 5 The range should be between 20 nm and 20 nm.

[0143] [Capacitive element 292] The capacitive element 292 consists of a conductor 242b and an insulator 293 provided on the conductor 242b. The insulator 293 and the conductor 294 provided on the insulator 293 are included. Conductor 294 is made up of insulators 280, 275b, 272b, 273b, and The insulator 293 is located in the opening formed in the insulator 271b. It is provided in contact with the bottom surface and side walls of the conductor 242b. Top surface, side surface of insulator 271b, side surface of insulator 273b, side surface of insulator 272b, insulator 2 It is in contact with the side of 75b and the side of the insulator 280. In addition, the insulator 293 is in contact with the opening It is provided to form a recess along the shape. The conductor 294 fills the recess. It is positioned so as to be in contact with the top and side surfaces of the insulator 293. The height of the upper surface of the conductor 294 is the same as that of the insulator 280, the insulator 250, and the conductor 260. This may roughly coincide with the height of the top surface.

[0144] Here, the conductor 242b functions as the lower electrode of the capacitive element 292, and the conductor 294 is The upper electrode of the capacitance element 292 functions as the upper electrode, and the insulator 293 functions as the dielectric of the capacitance element 292. This enables the capacitive element 292 to function as a Metal-Insulator-Metal. It constitutes a capacitance. Note that one of the pair of electrodes of the capacitive element 292 is Since the conductor 242b also serves as the source electrode of the transistor, the transistor and This makes it possible to reduce the area in which capacitive devices are placed. In the manufacturing process, part of the transistor manufacturing process can be used, thus production This allows for the creation of a highly efficient semiconductor device. Furthermore, the configuration of transistor 200 is separate from the insulation requirements. Since a body 293 can be provided, the insulation can be adjusted according to the performance required for the capacitive element 292. The structure and materials of body 293 can be selected as appropriate.

[0145] It is preferable to use a high-dielectric constant (high-k) material for the insulator 293. Examples of high-k materials (materials with high dielectric constants) used as insulators include gallium oxide and haloxide. Aluminum, zirconium oxide, aluminum oxide, aluminum oxide and nitride, aluminum nitride and oxide Aluminum, aluminum nitride, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride , an oxide having aluminum and hafnium, having aluminum and hafnium Oxidized nitrides, oxides having silicon and hafnium, silicon and hafnium These include oxide nitrides containing silicon and hafnium. As the edge 293, a laminated film of these high dielectric constant materials may be used. For example, As insulator 293, in the order of zirconium oxide, aluminum oxide, and zirconium oxide A stacked insulating film can be used.

[0146] Furthermore, the conductor 294 may be, for example, a material that can be used for the conductor 260. This is sufficient. Furthermore, the conductor 294 may have a laminated structure similar to that of the conductor 260.

[0147] The insulator 280 is provided on the insulator 275, and the insulator 250 and the conductor 260 are provided. An opening is formed in the area that is to be cut. Also, the upper surface of the insulator 280 is flattened. That's good too.

[0148] The insulator 280, which functions as an interlayer film, preferably has a low dielectric constant. By using the material as an interlayer film, parasitic capacitance occurring between wiring can be reduced. Insulator 28 It is preferable that 0 be provided using a material similar to that of the insulator 216, for example. In particular, oxide Silicon oxide and silicon nitride are preferred because they are thermally stable. In particular, silicon oxide Materials such as silicon oxidnitride and silicon oxide with voids release oxygen upon heating. This is preferable because it allows for the easy formation of a region containing [the specified element].

[0149] Insulator 280, like insulator 224, may have an excess oxygen region or excess oxygen. It is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. For example, insulator 280 contains silicon such as silicon oxide and silicon oxide nitride. Any suitable oxide can be used.

[0150] The insulator 282 suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280. It is preferable that it functions as a barrier insulating film and has the function of capturing impurities such as hydrogen. It is preferable to do so. Furthermore, the insulator 282 is a barrier insulating film that suppresses oxygen permeation. It is preferable that it functions. The insulator 282 is a metal oxide having an amorphous structure. For example, an insulator such as aluminum oxide can be used. Insulator 212 and Insulator 283 Within the region sandwiched between them, it has the function of capturing impurities such as hydrogen in contact with the insulator 280. By providing the insulator 282, impurities such as hydrogen contained in the insulator 280 are captured. This allows the amount of hydrogen within that region to be kept constant. In particular, as an insulator 282 aluminum oxide having an amorphous structure, or aluminum oxide having an amorphous structure Using nium is preferable because it can sometimes capture or fix hydrogen more effectively. This results in a transistor 200 with good characteristics and high reliability, and semiconductor equipment A structure can be created.

[0151] The insulator 283 suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280. It functions as a barrier insulating film. Insulator 283 is placed on top of insulator 282. The edge material 283 is silicon nitride or silicon nitride oxide, or other silicon-containing nitride It is preferable to use a material. For example, an insulator 283 that is deposited by sputtering. Silicon nitride can be used. By depositing insulator 283 using the sputtering method, density can be increased. It is possible to form a silicon nitride film with high rigidity and resistance to the formation of porosity, etc. Also, an insulator As 283, on top of silicon nitride film deposited by sputtering, further by CVD The deposited silicon nitride films may be stacked.

[0152] Conductors 240a and 240b are primarily composed of tungsten, copper, or aluminum. It is preferable to use conductive materials as components. Also, conductor 240a and conductor 24 0b may be a layered structure.

[0153] Furthermore, when the conductor 240 has a layered structure, the lower layer of the conductor 240 contains water, water It is preferable to use a conductive material that has the function of suppressing the permeation of impurities such as elements. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, etc. It is preferable to use a conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen. The material may be used in a single layer or a laminate. Also, the water contained in the layer above the insulator 274, To suppress the incorporation of impurities such as hydrogen into the oxide 230 through the conductor 240a. It is possible.

[0154] Examples of insulators 241a and 241b include silicon nitride and aluminum oxide. Insulators such as nium and silicon nitride can be used. Insulator 241a is insulator 27 4. Insulator 283, Insulator 284, Insulator 282, Insulator 280, Insulator 275a, Insulator Since it is provided in contact with body 272a, insulator 273a, and insulator 271a, insulator 2 Impurities such as water and hydrogen contained in 80 are mixed into the oxide 230 through the conductor 240a. It can suppress the entry of insulator 241b, insulator 274, insulator 28 3. Since it is provided in contact with the insulator 284 and the insulator 282, it includes the insulator 274 and the like. Impurities such as water and hydrogen that are produced pass through conductor 240b and conductor 294 to oxide 2 It can suppress contamination of 30. In particular, silicon nitride blocks hydrogen. It is suitable because it has high absorption properties. In addition, the oxygen contained in the insulator 280 is absorbed by the conductor 240a. This prevents oxygen from being absorbed into the conductor 240b. It can prevent absorption.

[0155] Furthermore, the upper surface of the conductor 240a and the upper surface of the conductor 240b are in contact with each other and function as wiring. Conductors 246 (conductors 246a and conductors 246b) may be arranged. 46 uses a conductive material whose main component is tungsten, copper, or aluminum. This is preferable. The conductor may also be in a laminated structure, for example, titanium or titanium nitride. The tan and the conductive material may be laminated. The conductor is provided on the insulator. They may be formed to be embedded in the opening. Alternatively, they may be formed on the conductor 246 and on the insulator 274. A configuration including an insulator 286 is also possible.

[0156] <Component materials for semiconductor devices> The following describes the constituent materials that can be used in semiconductor devices.

[0157] <<Substrate>> Examples of substrates for forming the transistor 200 include an insulating substrate, a semiconductor substrate, and A conductive substrate can be used. Examples of insulating substrates include glass substrates, quartz substrates, and Fire substrate, stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), resin substrate There are plates and the like. Also, semiconductor substrates are made of materials such as silicon and germanium. Semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, phosphate Examples include compound semiconductor substrates composed of zinc, zinc oxide, and gallium oxide. Furthermore, as mentioned above... A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon Examples include on-insulator substrates. Conductive substrates include graphite substrates and metal substrates. These include alloy substrates, conductive resin substrates, etc. Alternatively, substrates containing metal nitrides, metal acids There are substrates containing monoxides, etc. Furthermore, there are substrates on which a conductor or semiconductor is provided on an insulating substrate. A substrate, a semiconductor substrate provided with a conductor or insulator, a conductive substrate provided with a semiconductor or insulator There are substrates with edges provided. Alternatively, substrates on which elements are provided can be used. This may also be done. The elements provided on the substrate may include capacitive elements, resistive elements, switching elements, and light-emitting elements. These include child elements, memory elements, etc.

[0158] <<Insulator>> Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, and metal oxides. Examples include metal oxides, metal nitrides, and metal nitride oxides.

[0159] For example, as transistors become smaller and more integrated, the gate insulator can be made thinner. This can lead to problems such as leakage current. By using high-k materials, the physical film thickness is maintained while lowering the voltage during transistor operation. This becomes possible. On the other hand, for the insulator that functions as an interlayer film, a material with a low dielectric constant is used. This reduces parasitic capacitance between wires. Therefore, it is possible to reduce the parasitic capacitance that occurs between wires. Then, you should select the materials.

[0160] Furthermore, insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum, and hafnium, aluminum and hafnium Oxidized nitrides, silicon and hafnium oxides, silicon and hafnium Examples include oxide nitrides containing um, or nitrides containing silicon and hafnium.

[0161] Furthermore, examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, and silicon nitride oxide. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Silicon oxide with added carbon and nitrogen, porous silicon oxide, or resins, etc. be.

[0162] Furthermore, transistors using metal oxides in the channel formation region are susceptible to impurities such as hydrogen. By surrounding it with an insulator that has the function of suppressing oxygen permeation, the electrical characteristics of the transistor It can stabilize properties. It has the function of suppressing the permeation of impurities such as hydrogen and oxygen. Examples of insulators include boron, carbon, nitrogen, oxygen, fluorine, magnesium, and aluminum. nium, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, di An insulator containing lanthanum, neodymium, hafnium, or tantalum, in a single layer Alternatively, it can be used in a layered configuration. Specifically, it suppresses the permeation of impurities such as hydrogen and oxygen. As an insulator having the function of, aluminum oxide, magnesium oxide, gallium oxide, acid Germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, Metal oxides such as hafnium oxide and tantalum oxide, aluminum nitride, silicon nitride Metal nitrides such as silicon nitride can be used.

[0163] Furthermore, the insulator that functions as a gate insulator has regions containing oxygen that is released by heating. It is preferable that the insulator has a region containing oxygen that is desorbed by heating. By creating a structure in which silicon oxide or silicon oxide nitride is in contact with oxide 230, This can compensate for the oxygen deficiency present in 230.

[0164] <<Conductive material>> Examples of conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and crystalline silver. Tun, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Zium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metallic element selected from um, lanthanum, etc., or an alloy containing the aforementioned metallic elements. It is preferable to use an alloy or the like that which combines the above-mentioned metal elements. For example, tantalum nitride Titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use oxides containing lanthanum and nickel. Tantalum, titanium nitride, titanium and aluminum nitrides, tantalum and aluminum Includes nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium oxides Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or that absorb oxygen. It is preferable because it is a material that maintains conductivity even when subjected to certain conditions. Furthermore, it does not contain impurity elements such as phosphorus. Highly electrically conductive semiconductors such as polycrystalline silicon and nickel silicides. Silicide may also be used.

[0165] Furthermore, multiple conductive layers formed from the above materials may be stacked and used. For example, as described above. A laminated structure may be formed by combining a material containing a metallic element with a conductive material containing oxygen. Furthermore, a laminate combining the aforementioned metal element-containing material and a nitrogen-containing conductive material is also used. It may also be used as a structure. Furthermore, a material containing the aforementioned metal element, a conductive material containing oxygen, and nitrogen A laminated structure combining conductive materials containing elements may also be used.

[0166] Furthermore, when an oxide is used in the channel formation region of a transistor, the gate electrode and A conductor that functions as such includes a material containing the aforementioned metal element and a conductive material containing oxygen. It is preferable to use a combined laminated structure. In this case, an oxygen-containing conductive material is used. It is preferable to place it on the channel formation region side. A conductive material containing oxygen should be placed on the channel formation region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel-forming region.

[0167] In particular, as a conductor that functions as a gate electrode, it is included in the metal oxide in which the channel is formed. It is preferable to use a conductive material containing metallic elements and oxygen. Conductive materials containing group elements and nitrogen may also be used. For example, titanium nitride, tantalum nitride Conductive materials containing nitrogen, such as indium tin oxide and tungsten oxide, may also be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide containing titanium dioxide, indium zinc oxide Indium tin oxide with added silicon may also be used. Moogarium zinc oxide may also be used. Using such a material allows for channel formation. In some cases, hydrogen contained in the metal oxide can be captured. Alternatively, the outer atmosphere In some cases, it may be possible to capture hydrogen that has been introduced from surrounding materials.

[0168] <<Metal Oxides>> As oxide 230, a metal oxide (oxide semiconductor) that functions as a semiconductor is used. This is preferable. Below, metal oxides applicable to oxide 230 will be described.

[0169] The metal oxide preferably contains at least indium or zinc. In particular, indium It is preferable that it contains um and zinc.

[0170] Here, the metal oxide is In-M-Zn oxide, which has indium, element M, and zinc. Let's consider the case where it is a substance. Note that element M is aluminum, gallium, yttrium, and Let M be tin. Other elements that can be used for element M include boron, titanium, iron, and nickel. Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium Examples include um, tantalum, tungsten, magnesium, and cobalt. However, element M and Furthermore, it is sometimes acceptable to combine multiple of the aforementioned elements.

[0171] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). They are sometimes collectively referred to as metal oxynitrides (metal oxides). Also, metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxides). It may also be called tal oxynitride.

[0172] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 4A. Figure 4A shows an oxide semiconductor, typically IGZO (containing In, Ga, and Zn, and a metallic acid). This is a diagram illustrating the classification of the crystal structures of ionized compounds.

[0173] As shown in Figure 4A, oxide semiconductors can be broadly classified into "Amorphous" It is divided into "Crystalline (crystalline)" and "Crystal (crystal)". They are classified as such. Also, among "Amorphous," there are completely amorp It includes hous. Also, within "Crystalline" there is CAAC(c-ax is-aligned crystalline), nc(nanocrystalli ne), and CAC (cloud-aligned composite) are included. excluding single crystal and poly crystal l). Note that the classification of "Crystalline" includes single crystal, Polycrystalline and completely amorphous materials are excluded. Furthermore, within "Crystal," there are single crystals and poly crystals. It contains crystal.

[0174] The structures within the thick border shown in Figure 4A are "Amorphous" and "Cry It is an intermediate state between "stal (crystal)" and a new boundary region (New crystal This structure belongs to the line phase. In other words, this structure is energetically in It is completely different from the stable "Amorphous" or "Crystal" forms. This can be rephrased as a structure.

[0175] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). It can be evaluated using the ion spectrum. Here, "Crystalline GIXD (Grazing-Incidence) of CAAC-IGZO film, which is classified as " The XRD spectrum obtained by the XRD measurement is shown in Figure 4B. Note that the GIXD method is used for thin films. This method is also called the Seemann-Bohlin method. Hereafter, the GIXD measurement shown in Figure 4B will be used. The resulting XRD spectrum will simply be referred to as the XRD spectrum. Note that the CAA shown in Figure 4B The composition of the C-IGZO film is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 4B is 500 nm.

[0176] As shown in Figure 4B, the XRD spectrum of the CAAC-IGZO film clearly shows crystallinity. The peak shown is detected. Specifically, in the XRD spectrum of the CAAC-IGZO film, A peak indicating c-axis orientation is detected near 2θ = 31°. Furthermore, as shown in Figure 4B, The peak near 2θ=31° is located at the angle where the peak intensity was detected. It is asymmetrical.

[0177] Furthermore, the crystal structure of the film or substrate is determined by nano-beam diffraction (NBED). Diffraction patterns observed by electron diffraction (extremely small) It can be evaluated by (also called electron diffraction pattern). The folding pattern is shown in Figure 4C. Figure 4C shows an NBED with an electron beam incident parallel to the substrate. This is the diffraction pattern observed by the CAAC-IGZO film shown in Figure 4C. The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. Furthermore, micro-electron diffraction... Next, electron diffraction is performed with a probe diameter of 1 nm.

[0178] As shown in Figure 4C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. Spots of this nature can be observed.

[0179] <<Oxide semiconductor structure>> Note that oxide semiconductors may be classified differently from those shown in Figure 4A when considering their crystal structure. Yes, there are. For example, oxide semiconductors include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It can be divided into two parts. As for non-single-crystal oxide semiconductors, for example, the CAAC-OS mentioned above, And there is nc-OS. In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. crystalline oxide semiconductor (a-like OS: amorphous-like oxide) This includes semiconductors, amorphous oxide semiconductors, and so on.

[0180] Here, we will provide details on the CAAC-OS, nc-OS, and a-like OS mentioned above. Then, I will give an explanation.

[0181] [CAAC-OS] CAAC-OS has multiple crystalline regions, and the c-axis of these crystalline regions is oriented in a specific direction. It is an oriented oxide semiconductor. The specific direction refers to the thickness direction of the CAAC-OS film. , in the direction normal to the surface on which the CAAC-OS film is formed, or in the direction normal to the surface of the CAAC-OS film Yes, there is. Furthermore, a crystalline region is a region in which the atomic arrangement has periodicity. Note that the atomic arrangement is categorized If considered as a child arrangement, a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC- OS has a region in which multiple crystal regions are connected in the ab-plane direction, and this region is strained It may have strain. Note that strain refers to the lattice arrangement in a region where multiple crystal regions are connected. The orientation of the grid arrangement changes between a region with aligned grids and another region with aligned grids. This refers to the location. In other words, CAAC-OS is c-axis oriented and has a clear orientation in the ab-plane direction. It is an oxide semiconductor that does not exist.

[0182] Each of the above multiple crystalline regions is composed of one or more minute crystals (with a maximum diameter of 10 It is composed of crystals smaller than nm. Furthermore, the maximum diameter of the crystalline region is less than 10 nm. If this occurs, the size of the crystalline region may be around several tens of nanometers.

[0183] Also, In-M-Zn oxide (element M is aluminum, gallium, yttrium, sulfite) In one or more types selected from materials such as titanium, CAAC-OS is an indicator. A layer containing um (In) and oxygen (hereinafter referred to as the In layer), and an element M, zinc (Zn), and acid A layered crystalline structure (also called a layered structure) is formed by stacking layers containing an element (hereinafter referred to as (M,Zn) layer). It tends to have (u). Furthermore, indium and element M are mutually substitutable. Therefore The (M,Zn) layer may contain indium. Also, the In layer contains element M. This may occur. Furthermore, the In layer may also contain Zn. This layered structure is, for example, In high-resolution TEM images, it is observed as a grid pattern.

[0184] For example, when structural analysis of a CAAC-OS film is performed using an XRD device, the θ / 2θ scale is obtained. Out-of-plane XRD measurements using the CANR showed two peaks indicating c-axis orientation. It is detected at θ=31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) ) may vary depending on the type and composition of the metal elements that make up CAAC-OS.

[0185] Furthermore, for example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots (spots) (T) is observed. Note that one spot and another spot are separated by the incident electron beam that has passed through the sample. With the spot (also called the direct spot) as the center of symmetry, observations are made at point-symmetric positions. It can be done.

[0186] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is a hexagonal lattice. While this is the basic principle, the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, The above distortion may have a grid arrangement such as a pentagon or heptagon. -In OS, clear grain boundaries were confirmed even near the strain. This is not possible. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This indicates that CAAC-OS has a dense arrangement of oxygen atoms in the ab-plane direction. This is because, for example, the substitution of metal atoms changes the bond distance between atoms. This is thought to be because it allows for distortion to be tolerated.

[0187] Furthermore, a crystal structure in which clear grain boundaries can be observed is known as a polycrystalline structure. It is called al(al). The grain boundaries become recombination centers, trapping carriers and forming transistors. This is likely to cause a decrease in on-current and a decrease in field-effect mobility. CAAC-OS, which lacks visible grain boundaries, has a crystal structure suitable for the semiconductor layer of transistors. It is one of the crystalline oxides that possesses Zn. Furthermore, CAAC-OS requires the presence of Zn. A configuration in which In-Zn oxide and In-Ga-Zn oxide are made of In acid It is preferable because it can suppress the generation of grain boundaries more effectively than oxidized materials.

[0188] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less prone to a decrease in electron mobility caused by grain boundaries. Furthermore, the crystallinity of oxide semiconductors can decrease due to impurities and the formation of defects. Because of this, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies) It can also be said that oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. C-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors expands the degree of freedom in the manufacturing process. It becomes possible to increase the risk.

[0189] [nc-OS] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. In other words, nc-OS is micro It has small crystals. The size of these minute crystals is, for example, between 1 nm and 10 nm. In particular, because they are between 1 nm and 3 nm in size, these minute crystals are also called nanocrystals. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, the entire film... No orientation is observed. Therefore, nc-OS is a-like depending on the analytical method. It can sometimes be indistinguishable from OS or amorphous oxide semiconductors. For example, compared to nc-OS films When performing structural analysis using an XRD device, out-of-pl using θ / 2θ scans is obtained. In ane XRD measurements, no peak indicating crystallinity was detected. Furthermore, for nc-OS films... Furthermore, electron beams with probe diameters larger than those of nanocrystals (e.g., 50 nm or more) are used in electron beam blasts. When diffraction (also called limited-field electron diffraction) is performed, a diffraction pattern similar to a halo pattern is obtained. Observed. On the other hand, compared to the nc-OS film, the size is close to or smaller than that of the nanocrystal. Electron diffraction (nanobeam) using electron beams with probe diameters (e.g., 1 nm to 30 nm). Also called electron diffraction, when this is performed, a ring-shaped region centered on the direct spot appears. In some cases, electron diffraction patterns with multiple spots observed may be obtained.

[0190] [a-like OS] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, it has a-like properties. OS has a higher hydrogen concentration in the membrane compared to nc-OS and CAAC-OS.

[0191] <<Oxide Semiconductor Composition>> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS is a material composition. Regarding achievement.

[0192] [CAC-OS] CAC-OS refers to, for example, metal oxides in which the elements constituting the metal oxide are between 0.5 nm and 10 nm. Below, preferably, a structure of material that is unevenly distributed with a size of 1 nm to 3 nm or near that size. It is formed. Furthermore, in the following, in metal oxides, one or more metal elements are unevenly distributed. The region containing the metal element is 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A mixture of particles smaller than or near a m in size is also called a mosaic or patchy appearance. .

[0193] Furthermore, CAC-OS is a material that separates into a first region and a second region. This results in a zigzag-like structure, where the first region is distributed within the film (hereinafter also referred to as a cloud-like structure). ) In other words, CAC-OS is a mixture of the first region and the second region. It is a composite metal oxide having the following composition.

[0194] Here, I for the metal elements constituting CAC-OS in In-Ga-Zn oxide The atomic ratios of n, Ga, and Zn are given as [In], [Ga], and [Zn] respectively. To be expressed. For example, in CAC-OS in In-Ga-Zn oxide, the first region This is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. That is. Or, for example, in the first region, [In] is greater than [In] in the second region. It is also a region where the [Ga] is large, and the [Ga] is smaller than the [Ga] in the second region. Furthermore, in the second region, [Ga] is greater than [Ga] in the first region, and [I n] is a region where n is smaller than [In] in the first region.

[0195] Specifically, the first region mentioned above mainly consists of indium oxide, indium zinc oxide, etc. This is a region of minutes. Furthermore, the second region mentioned above is gallium oxide, gallium zinc oxide, etc. This is the region in which In is the main component. In other words, the first region described above can be said to be the region in which In is the main component. It can be replaced. Furthermore, the second region described above can be rephrased as the region with Ga as the main component. It is possible.

[0196] Note that a clear boundary may not be observed between the first region and the second region described above. .

[0197] For example, in CAC-OS in In-Ga-Zn oxide, the energy-dispersive X-ray segment Optical method (EDX:Energy Dispersive X-ray spectrosc) EDX mapping obtained using opy revealed the region with In as its main component (the first region) It has a structure in which a region (the second region) and a region mainly composed of Ga are unevenly distributed and mixed. This can be confirmed.

[0198] When CAC-OS is used in a transistor, the conductivity is due to the first region and the second region The insulating properties due to the region work complementarily to enable the switching function (On The function to turn off CAC-OS can be added to it. In other words, CAC-OS and The material has both conductive and insulating properties in parts, and the entire material Then it has the function of a semiconductor. By separating the conductive function and the insulating function, This allows for the maximum enhancement of both functions. Therefore, CAC-OS is used in transistors. This results in a high on-current (I on ), high field-effect mobility (μ), and good switching This enables smooth operation.

[0199] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and C It may have two or more of the following: AC-OS, nc-OS, and CAAC-OS.

[0200] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0201] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility is obtained. This can be achieved. Furthermore, highly reliable transistors can be realized.

[0202] A low-carrier-concentration oxide semiconductor is used in the channel formation region of the transistor. This is preferable. For example, the carrier concentration in the channel formation region of the oxide semiconductor is 1 × 10⁻⁶. 17 c m -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 c m -3 It is less than 1 × 10 -9 cm -3 That concludes the explanation. Note that the carriers in oxide semiconductor films... When lowering the concentration, the impurity concentration in the oxide semiconductor film is reduced, and the defect level density is lowered. It is sufficient to lower the value. In this specification, etc., a low impurity concentration and a low defect level density are used. This is referred to as high-purity intrinsic or substantially high-purity intrinsic. Furthermore, oxide semiconductors with low carrier concentrations are... These are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0203] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a low defect level density. Therefore, the trap level density may also be low.

[0204] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor to disappear is... It can behave for a long time, almost like a fixed charge. Therefore, the trap level density is high. Transistors in which a channel formation region is formed in an oxide semiconductor have unstable electrical properties. There are cases where this occurs.

[0205] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is Reducing it is effective. Furthermore, in order to reduce the impurity concentration in oxide semiconductors, It is also preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, and Examples include potassium metals, alkaline earth metals, iron, nickel, and silicon.

[0206] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0207] In oxide semiconductors, if silicon or carbon, which are among the Group 14 elements, are present, oxidation occurs. Defect levels are formed in material semiconductors. Therefore, in the channel formation region of oxide semiconductors... The concentration of silicon and carbon in the oxide semiconductor and the silicon near the interface with the channel formation region The concentration of ions and carbon (Secondary Ion Mass Spectrometry (SIMS)) The concentration obtained by ss Spectrometry is 2 × 10 18 atom / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0208] Furthermore, if alkali metals or alkaline earth metals are present in the oxide semiconductor, defect levels are formed. This can result in the generation of carriers. Therefore, alkali metals or alkaline earth metals may be present. Transistors using oxide semiconductors tend to exhibit normally-on characteristics. Therefore, alkali metals or a in the channel formation region of oxide semiconductors obtained by SIMS The concentration of rutile earth metals is 1 × 10⁻⁶ 18 atoms / cm 3 The following is preferably 2 × 10 1 6 atoms / cm 3 Do the following:

[0209] Furthermore, in oxide semiconductors, when nitrogen is present, electrons, which are carriers, are generated. As the nitrogen concentration increases, it becomes easier to convert to n-type semiconductors. As a result, oxide semiconductors containing nitrogen become semiconductors. The transistor used tends to exhibit normally-on characteristics. Alternatively, oxide semiconductors Furthermore, when nitrogen is present, trap levels may be formed. As a result, transistor The electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in the channel formation region is 5 × 1019 atoms / cm 3 Less than, preferably 5 x 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0210] Furthermore, the hydrogen contained in oxide semiconductors reacts with the oxygen bonded to the metal atoms to form water. Therefore, an oxygen deficiency may form. When hydrogen enters this oxygen deficiency, the carrier electrons In some cases, a child may be produced. Also, some of the hydrogen combines with the metal atom and oxygen, resulting in a crystal. It can generate electrons that act as carriers. Therefore, an oxide semiconductor containing hydrogen is used. Transistors that have been modified tend to exhibit normally-on characteristics. For this reason, the channels of oxide semiconductors It is preferable that the amount of hydrogen in the hydrogen-forming region be reduced as much as possible. Specifically, In the channel formation region of an oxide semiconductor, the hydrogen concentration obtained by SIMS is 1 × 1 0 20 atoms / cm 3 Less than 5 × 10 19 atoms / cm 3 Less than, Preferably 1 × 10 19 atoms / cm 3 Less than 5 × 10 18 ato ms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0211] Using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor. This allows for the provision of stable electrical characteristics.

[0212] <<Other Semiconductor Materials>> The semiconductor materials that can be used for oxide 230 are not limited to the metal oxides mentioned above. As monster 230, semiconductor materials with a band gap (not zero-gap semiconductors) Conductive materials may be used. For example, semiconductors of elemental silicon, gallium arsenide, etc. Which compound semiconductors, layered materials that function as semiconductors (also known as atomic layer materials, two-dimensional materials, etc.) It is preferable to use materials such as (u) as semiconductor materials. In particular, layered materials that function as semiconductors It is preferable to use this as a semiconductor material.

[0213] Here, in this specification, etc., "layered material" is a general term for a group of materials having a layered crystalline structure. Yes, it exists. Layered crystal structures are formed by layers created by covalent or ionic bonds, such as van der Wa. It is a structure in which layers are attached via weaker bonds than covalent or ionic bonds, such as the Ruhls force. Layered materials have high electrical conductivity within a single layer, meaning they have high two-dimensional electrical conductivity. A material that functions as a semiconductor and has high two-dimensional electrical conductivity is used in the channel formation region. This makes it possible to provide transistors with a large on-current.

[0214] Examples of layered materials include graphene, silicene, and chalcogenides. It is a compound containing chalcogens. Furthermore, chalcogens are a general term for elements belonging to Group 16. It contains oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0215] For example, a transition metal chalcogenide that functions as a semiconductor can be used as oxide 230. Preferably, a transition metal chalcogenide applicable as oxide 230 is specified. These include molybdenum sulfide (typically MoS2) and molybdenum selenide (typically MoS2) e2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten tellurium (typically (WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically (HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (alternative) Examples include ZrSe2).

[0216] <Example of semiconductor device configuration 2> Using Figures 3A to 3D, a different configuration from the above-described <Example 1 of semiconductor device configuration> is shown. The configuration of a semiconductor device having an inverter 200 and a capacitive element 292 is described. Figure 3A shows Figure 3B to Figure 3D are cross-sectional views of the semiconductor device. Yes. Here, Figure 3B is a cross-sectional view of the area shown by the dashed line A1-A2 in Figure 3A, and This is also a cross-sectional view of the Rangista 200 in the channel length direction. Furthermore, Figure 3C is a cross-sectional view of Figure 3A with A3- This is a cross-sectional view of the area indicated by the dashed line on A4, showing the cross-section of transistor 200 in the channel width direction. It is also a diagram. Furthermore, Figure 3D is a cross-sectional view of the area indicated by the dashed line A5-A6 in Figure 3A. This is also a cross-sectional view of the capacitive element 292. Note that in the top view of Figure 3A, for clarity of the diagram, The "part" element has been omitted.

[0217] Furthermore, in the semiconductor device shown in Figures 3A to 3D, as shown in <Example of Semiconductor Device Configuration 1> Structures having the same function as the structures constituting the semiconductor device shall be denoted by the same reference numeral. Regarding the components of semiconductor devices, the materials used are explained in detail in <Example of Semiconductor Device Configuration 1>. The materials used can be used.

[0218] In the semiconductor device shown in Figures 3A to 3D, insulator 214, insulator 216, insulator 222 Insulators 224, 272, 275, 280, and 282 are It is turned. Also, insulator 284 is insulator 212, insulator 214, insulator 2 16, insulator 222, insulator 224, insulator 272, insulator 275, insulator 280, approximately The structure is such that the insulator 284 covers the upper surface of the insulator 282. And, insulator 214, insulator 216, insulator 222, insulator 224, insulator 272, insulator 275, and the side surface of the insulator 280, and the top surface of the insulator 214 are in contact. Furthermore, the insulation An insulator 283 is positioned to cover the body 284. This allows for the inclusion of oxides 230 and the like. , insulator 214, insulator 216, insulator 222, insulator 224, insulator 280, and insulator The edge body 282 is insulated by insulators 283, 284, 212, and 214. , isolated from the outside. In other words, transistor 200 is isolated from insulator 284, and insulation It is placed within the area sealed by body 214.

[0219] For example, insulator 214, insulator 271, insulator 275, insulator 282, and insulator 2 84 can be formed using a material that has the function of capturing and fixing hydrogen. Oh, the insulator 284 can be an insulator similar to the one used for insulator 282. Also, the insulator Materials having the function of suppressing the diffusion of hydrogen and oxygen to 212 and the insulator 283. It can be formed using: Insulator 214, Insulator 271, Insulator 275, Insulator 282, And as the insulator 284, an amorphous metal oxide, such as aluminum oxide, may be used. Tium can be used. Also, typically, insulator 212 and insulator 283 and For this purpose, silicon nitride can be used. In particular, amorphous silicon nitride can be used as the insulator 284. Using aluminum oxide with a structure, or aluminum oxide with an amorphous structure. This is preferable because it may allow for more effective capture or fixation of hydrogen. A semiconductor having a transistor 200 with good characteristics and high reliability, and a capacitive element 292. Conductor devices can be manufactured.

[0220] With the above configuration, hydrogen contained outside the sealed region will enter the sealed region This can prevent contamination inside the container.

[0221] Furthermore, in Figures 3A to 3D, the insulator 212 and the insulator 283 are provided as single layers. The present invention is not limited to the configuration shown. For example, insulator 2 12 and the insulator 283 may each be provided as a laminated structure of two or more layers. stomach.

[0222] The insulator 274 is provided covering the insulator 283 and functions as an interlayer film. It is preferable that the dielectric constant of body 274 is lower than that of the insulator 214. By forming a film, parasitic capacitance occurring between wiring can be reduced. The insulator 274 is, for example, For example, it can be provided using the same material as the insulator 280.

[0223] <Method for fabricating semiconductor devices> Next, Figure 5 shows a method for manufacturing a semiconductor device, which is one embodiment of the present invention, as shown in Figures 3A to 3D. This will be explained using Figures A through 22D.

[0224] In each figure, A represents the top view. Also, B represents the dashed line A1-A2 shown in A of each figure. This is a cross-sectional view corresponding to the indicated area, and is also a cross-sectional view of transistor 200 in the channel length direction. Furthermore, C in each figure is a cross-sectional view corresponding to the area shown by the dashed line A3-A4 in A of each figure. It is also a cross-sectional view of transistor 200 in the channel width direction. Also, D in each figure is This is a cross-sectional view of the area indicated by the dashed line A5-A6 in A, and is also a cross-sectional view of the capacitance element 292. Note that in the top view of A in each figure, some elements have been omitted for clarity.

[0225] In the following, insulating materials for forming an insulator and conductive materials for forming a conductor are used. Materials, or semiconductor materials for forming semiconductors, are produced by sputtering, CVD, MBE, etc. The film can be deposited using appropriate methods such as the PLD method and ALD method.

[0226] Furthermore, the sputtering method includes RF sputtering, which uses a high-frequency power supply for sputtering. Ring method, DC sputtering method using a DC power supply, and pulsed application of electricity to the electrodes There is a pulsed DC sputtering method that changes the pressure. RF sputtering is mainly used for insulating films. It is used when depositing thin films, and DC sputtering is mainly used when depositing metallic conductive films. It can be used. Also, pulsed DC sputtering is mainly used for oxides, nitrides, carbides, etc. It is used when depositing compounds into films using the reactive sputtering method.

[0227] Furthermore, the CVD method is a type of plasma CVD (PECVD) that utilizes plasma. Enhanced CVD (Enhanced CVD), Thermal CVD (TCVD: Thermal CCVD) which utilizes heat. It can be classified into methods such as the VD method and the photoCVD method which utilizes light. Depending on the source gas used, the process can be metal CVD (MCVD) or organometallic CVD. It can be divided into (MOCVD: Metal Organic CVD) methods.

[0228] Plasma CVD can produce high-quality films at relatively low temperatures. Thermal CVD, on the other hand, is a method that can produce high-quality films at low temperatures. This film deposition method does not use Zuma, thus minimizing damage to the workpiece. For example, wiring, electrodes, and elements (transistors, capacitive elements, etc.) included in semiconductor devices are In some cases, it can become charged (electrified) by receiving an electric charge from the plasma. In cases where the accumulated charge destroys the wiring, electrodes, and elements contained in the semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. Therefore, the yield of semiconductor devices can be increased. Also, in the thermal CVD method, Because plasma damage does not occur within the film, a film with fewer defects can be obtained.

[0229] Furthermore, in the ALD method, the reaction between the precursor and reactant is carried out using only thermal energy. Thermal ALD (Thermal Altode Discharge) method, using plasma-excited reactants. Methods such as EALD (Plasma Enhanced Alopecia) can be used.

[0230] Furthermore, the ALD method utilizes the self-regulating properties of atoms to deposit atoms layer by layer. This allows for the deposition of extremely thin films, enabling film deposition on structures with high aspect ratios, and pinholes. It enables film formation with fewer defects such as blemishes, enables film formation with excellent coverage, and enables film formation at low temperatures. What are the effects? In the PEALD method, by using plasma, film deposition at lower temperatures is possible. This can be beneficial in some cases. Furthermore, the precursor used in the ALD method contains impurities such as carbon. Some contain [this]. Therefore, films formed by the ALD method are different from films formed by other film formation methods. Compared to a standard film, it may contain more impurities such as carbon. Note that the quantitative determination of impurities is done using X. X-ray Photoelectron Spectros (XPS) This can be done using `copy`.

[0231] CVD and ALD are film deposition methods in which particles emitted from a target or other source are deposited. Unlike other methods, this is a film-forming method in which a film is formed by a reaction on the surface of the object being treated. This film-forming method is less affected by the shape of the workpiece and has good step-level coverage. Furthermore, the ALD method has excellent step coverage and excellent thickness uniformity, thus aspect ratio This method is suitable for coating the surface of high-aperture openings, etc. However, the ALD method is relatively suitable for film formation. Because of its slow rate, it should be used in combination with other film deposition methods that have a faster deposition rate, such as CVD. In some cases, this may be preferable.

[0232] The CVD and ALD methods control the composition of the resulting film by adjusting the flow rate ratio of the source gases. This is possible. For example, in the CVD method and ALD method, the flow rate ratio of the raw material gas can be adjusted as needed. A film with the following composition can be formed. Furthermore, for example, in the CVD method and ALD method, film formation can be performed. By changing the flow rate ratio of the raw material gas while simultaneously depositing a film with a continuously changing composition. This is possible. When forming a film while changing the flow rate ratio of the raw material gas, multiple deposition chambers can be used. Compared to the method of film deposition using a conveyor belt, it eliminates the time required for transport and pressure adjustment, thus reducing the time required for film deposition. The interval can be shortened. Therefore, the productivity of semiconductor devices can be increased. There is.

[0233] First, a substrate (not shown) is prepared, and an insulator 212 is deposited on the substrate (Figure 5A). (See Figure 5D). The insulator 212 is preferably deposited using the sputtering method. i. By using a sputtering method that does not require the use of hydrogen as the film-forming gas, the insulator 212 The hydrogen concentration inside can be reduced. However, the deposition of the insulator 212 is done by sputtering. This is not limited to the law, but also includes CVD, MBE, PLD, ALD, etc., as appropriate. That's good too.

[0234] In this embodiment, the insulator 212 is used as the silicon target in an atmosphere containing nitrogen gas. Using this method, silicon nitride is deposited by pulsed DC sputtering. By using the ring method, particle generation due to arcing on the target surface is suppressed. This allows for a more uniform film thickness distribution. Furthermore, by using a pulsed voltage... By doing so, the rise and fall times of the discharge can be made steeper than with high-frequency voltage. This allows for more efficient power supply to the electrodes, improving the sputtering rate and film quality. It is possible.

[0235] The insulator 212 is made of an insulator that is resistant to the permeability of impurities such as water and hydrogen, such as silicon nitride. This suppresses the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212. This is possible. In addition, as the insulator 212, an insulator such as silicon nitride that is impermeable to copper can be used. By using this material, copper and other materials are diffused into the conductive layer (not shown) below the insulator 212. Even when using inexpensive metals, the diffusion of these metals upward through the insulator 212 is suppressed. It is possible.

[0236] Next, an insulator 214 is deposited on the insulator 212 (see Figures 5A to 5D). Insulator 2 The deposition of film 14 is preferably carried out using the sputtering method. Hydrogen is not used as the deposition gas. By using a less efficient sputtering method, the hydrogen concentration in the insulator 214 can be reduced. This is possible. However, the deposition of the insulator 214 is not limited to the sputtering method. CVD, MBE, PLD, ALD, etc., may be used as appropriate.

[0237] In this embodiment, the insulator 214 is an aluminum target in an atmosphere containing oxygen gas. Using a tweezers, aluminum oxide is deposited using the pulsed DC sputtering method. By using the sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film It is possible to improve quality.

[0238] As an insulator 214, it has an amorphous structure with high functionality for capturing and fixing hydrogen. It is preferable to use a metal oxide having the properties of aluminum oxide, for example. This provides insulation. The hydrogen contained in body 216, etc., is captured or fixed, and the hydrogen diffuses into oxide 230. This can prevent this. In particular, as the insulator 214, aluminum oxide having an amorphous structure is used. By using aluminum or amorphous aluminum oxide, water can be filtered more effectively. It is preferable because it can capture or fix the element. This gives it good properties and reliability. Highly reliable transistors 200 and semiconductor devices can be fabricated.

[0239] Next, an insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. It is preferable to use a sputtering method. Sputtering does not require the use of hydrogen as the film deposition gas. By using this method, the hydrogen concentration in the insulator 216 can be reduced. However, the insulator The deposition of 216 is not limited to sputtering, but also includes CVD, MBE, and PL. Methods such as Method D and Method ALD may be used as appropriate.

[0240] In this embodiment, the insulator 216 is used as the silicon target in an atmosphere containing oxygen gas. Using this method, silicon oxide is deposited by pulsed DC sputtering. By using the ring method, the film thickness distribution can be made more uniform, improving the sputtering rate and film quality. It is possible.

[0241] Insulators 212, 214, and 216 are continuously used without exposure to the atmosphere. It is preferable to deposit the film in this manner. For example, a multi-chamber type film deposition apparatus may be used. This reduces the amount of hydrogen in the film of insulators 212, 214, and 216. This process allows for the formation of a film, and furthermore, reduces the incorporation of hydrogen into the film between each film formation step. .

[0242] Next, an opening is formed in the insulator 216 that reaches the insulator 214. An opening is, for example, a groove or This also includes slits, etc. Furthermore, the term "opening" can sometimes refer to the area where an opening has been formed. The opening can be formed using wet etching, but dry etching is preferable. This is preferable for microfabrication. In addition, the insulator 214 forms grooves by etching the insulator 216. It is preferable to select an insulator that functions as an etching stopper film during the etching process. When silicon oxide or silicon oxide nitride is used for the insulator 216 that forms the groove, The edge material 214 may be silicon nitride, aluminum oxide, or hafnium oxide.

[0243] As a dry etching apparatus, a capacitively coupled plasma (CCP) system with parallel plate electrodes is used. (Capacitively Coupled Plasma) Etching apparatus is used. Capacitively coupled plasma etching apparatus having parallel plate electrodes can be used. Alternatively, a high-frequency voltage may be applied to one electrode of the type electrode. Or, one of the parallel plate type electrodes. Alternatively, a configuration in which multiple different high-frequency voltages are applied to the electrodes may be used. Or a parallel plate type electrode Alternatively, a configuration in which the same high-frequency voltage is applied to each of them is also possible. Alternatively, a configuration in which high-frequency voltages of different frequencies are applied may be used. Or, a high-density plasma source may be used. A dry etching apparatus can be used. Dry etching with a high-density plasma source. The device is, for example, an inductively coupled plasma (ICP) device. Etching equipment such as an ed Plasma etching device can be used.

[0244] After the opening is formed, a conductive film 205A is deposited (see Figures 5A to 5D). Conductive film 205 It is desirable that A contains a conductor that has the function of suppressing oxygen permeation. For example, nitride Tal, tungsten nitride, titanium nitride, etc. can be used. Alternatively, oxygen permeability Conductors that have a function to suppress [something], and tantalum, tungsten, titanium, molybdenum, aluminum It can be a multilayer film of aluminum, copper, and molybdenum tungsten alloy. Conductive film 20 5A film deposition is performed using sputtering, CVD, MBE, PLD, ALD, etc. It can be done by doing so.

[0245] In this embodiment, titanium nitride is deposited as the conductive film 205A. By using a material in the lower layer of the conductor 205b, the conductor 20 is made possible by the insulator 216, etc. This can suppress the oxidation of 5b. Furthermore, the diffusion of copper and other materials as the conductor 205b can be suppressed. Even when using a metal that is prone to diffusing, it is possible to prevent the metal from diffusing out of the conductor 205a. Cut.

[0246] Next, a conductive film 205B is deposited (see Figures 5A to 5D). Tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten Stainless steel alloys and the like can be used. The conductive film can be formed by plating or sputtering. This can be done using methods such as CVD, MBE, PLD, and ALD. In this configuration, tungsten is deposited as the conductive film 205B.

[0247] Next, the CMP (Chemical Mechanical Polishing) process. By doing so, a portion of the conductive film 205A and conductive film 205B is removed, exposing the insulator 216. (See Figures 6A to 6D). As a result, the conductive material 205a and conductive material are discharged only at the opening. Body 205b remains. Note that a portion of the insulator 216 is removed by the CMP treatment. There are cases where this is the case.

[0248] Next, etching is performed to remove the upper part of the conductor 205b (see Figures 7A to 7D). ). As a result, the upper surface of the conductor 205b is the upper surface of the conductor 205a and the insulator 216. It will be lower than the top surface. For etching the conductor 205b, dry etching or wet etching can be used. While etching can be used, dry etching is preferable for microfabrication.

[0249] Next, a conductive film 205C is applied to the insulator 216, the conductor 205a, and the conductor 205b. A film is formed (see Figures 8A to 8D). The conductive film 205C is acid-treated, similar to the conductive film 205A. It is desirable to include a conductor that has the function of suppressing the transmission of elemental particles.

[0250] In this embodiment, titanium nitride is deposited as the conductive film 205C. By using the material on top of the conductor 205b, the conductor 20 is made possible by the insulator 222, etc. This can suppress the oxidation of 5b. Furthermore, the diffusion of copper and other materials as the conductor 205b can be suppressed. Even when using a metal that is prone to diffusing, it is possible to prevent the metal from diffusing out of the conductor 205c. Cut.

[0251] Next, CMP treatment is performed to remove a portion of the conductive film 205C and expose the insulator 216. (See Figures 9A to 9D). As a result, the conductor 205a and conductor 20 are only present in the opening. 5b and the conductor 205c remain. This forms the conductor 205 with a flat top surface. Furthermore, conductor 205b can be used with conductor 205a and conductor 205c This results in a structure where impurities such as hydrogen are enclosed within the conductor 205b. To prevent diffusion outside of 5a and conductor 205c, and to prevent conductor 205a and conductor 2 This prevents oxygen from entering from outside 05c and oxidizing the conductor 205b. This CMP process may remove a portion of the insulator 216.

[0252] Next, an insulator 222 is formed on the insulator 216 and the conductor 205 (Figures 10A to 10A). (See Figure 10D). As insulator 222, either or both aluminum and hafnium may be used. It is preferable to form an insulator containing an oxide of the following. Alternatively, as an insulator containing oxides of both, aluminum oxide, hafnium oxide, aluminum It is preferable to use oxides containing um and hafnium (hafnium aluminate), etc. Insulators containing oxides of aluminum and / or hafnium are not suitable for contact with oxygen and water. It has barrier properties against hydrogen and water. The insulator 222 acts as a barrier against hydrogen and water. By having this property, hydrogen contained in the structure provided around transistor 200, and The diffusion of water into the transistor 200 through the insulator 222 is suppressed, and acid This can suppress the formation of oxygen deficiencies in compound 230.

[0253] The insulator 222 was deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using the like. In this embodiment, the insulator 222 is sputtering Hafnium oxide is deposited using the sputtering method. Hydrogen is not required as the deposition gas. By using the ring method, the hydrogen concentration in the insulator 222 can be reduced.

[0254] Next, it is preferable to perform a heat treatment. The heat treatment is preferably performed at a temperature of 250°C to 650°C. It is preferable to carry it out at a temperature of 300°C to 500°C, and more preferably at 320°C to 450°C. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or with an oxidizing gas for 10 minutes. The procedure should be carried out in an atmosphere containing ppm or more, 1% or more, or 10% or more. For example, nitrogen gas and oxygen. When performing heat treatment in a gas mixture atmosphere, it is sufficient to use about 20% oxygen gas. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or an inert gas. After heat treatment in an atmosphere, an oxidizing gas of 10 ppm or more is added to replenish the desorbed oxygen. Heat treatment may be carried out in an atmosphere containing % or more, or 10% or more.

[0255] Furthermore, it is preferable that the gas used in the above heat treatment is highly purified. For example, The amount of moisture contained in the gas used in the heat treatment described above is 1 ppb or less, preferably 0.1 ppb or less. More preferably, the level should be 0.05 ppb or less. Heat treatment using highly purified gas. By performing this process, it is possible to prevent moisture and other substances from being absorbed into the insulator 222, etc., as much as possible. can.

[0256] In this embodiment, as a heat treatment, after the film formation of the insulator 222, nitrogen gas and oxygen gas are used. The treatment is performed at a temperature of 400°C for 1 hour with a flow rate ratio of 4 slm: 1 slm. This method allows for the removal of impurities such as water and hydrogen contained in the insulator 222. Furthermore, when using an oxide containing hafnium as the insulator 222, the heat treatment will In some cases, a portion of the insulator 222 may crystallize. Also, the heat treatment of the insulator 224 This can also be done at other times, such as after film deposition.

[0257] Next, an insulating film 224 is formed on the insulating film 222 (see Figures 10A to 10D). The film deposition of body 224 was carried out using sputtering, CVD, MBE, PLD, ALD, etc. This can be done using the sputtering method. In this embodiment, the insulator 224 is made using the sputtering method. A silicon oxide film is deposited using this method. This is a sputtering method that does not require the use of hydrogen as the deposition gas. By using this method, the hydrogen concentration in the insulator 224 can be reduced. The insulator 224 is Since it will come into contact with oxide 230a in a later process, it is preferable that the hydrogen concentration is reduced in this way. It is suitable.

[0258] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. Plasma treatment may be performed. Oxygen-containing plasma treatment can be performed, for example, using high-density microwaves. It is preferable to use a device that has a power supply for generating rasma. Alternatively, RF( It may have a power supply that applies radio frequency. By doing so, high-density oxygen radicals can be generated, and RF can be applied to the substrate side. This efficiently guides the oxygen radicals generated by the high-density plasma into the insulator 224. This is possible. Alternatively, after performing plasma treatment with an inert gas using this device, Plasma treatment containing oxygen may be performed to replenish the desorbed oxygen. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. It can be removed. In that case, heat treatment is not necessary.

[0259] Here, aluminum oxide is applied to the insulator 224, for example, by sputtering. After film formation, CMP treatment may be performed until the insulator 224 is reached. This process allows for the planarization and smoothing of the surface of the insulator 224. By placing nium on the insulator 224 and performing CMP processing, the endpoint detection of the CMP processing can be easily performed. It becomes easy. Also, due to the CMP treatment, a part of the insulator 224 is polished, and the insulator 224 The film thickness may become thin, but this can be corrected by adjusting the film thickness during the deposition of the insulator 224. 224 Planarizing and smoothing the surface prevents deterioration of the coverage of the oxide film that will be deposited later. This can sometimes prevent a decrease in the yield of semiconductor devices. Also, on the insulator 224 Then, by forming an aluminum oxide film using the sputtering method, an insulator 224 This is preferable because oxygen can be added to it.

[0260] Next, oxide film 230A and oxide film 230B are deposited sequentially on the insulator 224 (Figure 10A). (See Figure 10D). Note that oxide films 230A and 230B are exposed to the atmospheric environment. It is preferable to deposit the film continuously without opening to the atmosphere. By depositing the film without opening to the atmosphere, the oxide film 230A and to prevent impurities or moisture from the atmospheric environment from adhering to the oxide film 230B. This allows the vicinity of the interface between oxide film 230A and oxide film 230B to be kept clean.

[0261] The oxide films 230A and 230B were deposited by sputtering, CVD, and MBE. This can be done using methods such as the PLD method and the ALD method.

[0262] For example, oxide film 230A and oxide film 230B are deposited by sputtering. In this case, oxygen or a mixture of oxygen and a noble gas is used as the sputtering gas. By increasing the proportion of oxygen in the puttering gas, excess oxygen in the formed oxide film... This can increase the amount. Also, when the above oxide film is deposited by sputtering: The above-mentioned In-M-Zn oxide targets can be used.

[0263] In particular, during the deposition of oxide film 230A, some of the oxygen contained in the sputtering gas acts as an insulator. It may be supplied to 224. Therefore, the oxygen contained in the sputtering gas The percentage should be 70% or more, preferably 80% or more, and more preferably 100%.

[0264] Furthermore, when forming oxide film 230B by sputtering, the sputtering gas contains The proportion of oxygen is greater than 30% and less than or equal to 100%, preferably between 70% and 100%. When a film is formed using this method, an oxygen-rich oxide semiconductor is created. The transistors used in the channel formation region offer relatively high reliability. However, this generation One aspect of the present invention is not limited thereto. When the oxide film 230B is formed by sputtering, The proportion of oxygen in the sputtering gas should be 1% or more and 30% or less, preferably 5% or more. When the film is deposited with an oxygen content of 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors using a monocrystalline semiconductor in the channel formation region can achieve relatively high field-effect mobility. Furthermore, by performing film formation while heating the substrate, the crystallinity of the oxide film can be improved. It can be done.

[0265] In this embodiment, the oxide film 230A is formed by sputtering, using the In:Ga: The film is deposited using an oxide target with a Zn = 1:3:4 [atomic ratio]. Also, oxide film 23 As 0B, by sputtering, In:Ga:Zn=4:2:4.1 [atomic ratio] The film is deposited using the oxide target of ]. Note that each oxide film is formed under different deposition conditions and atomic ratios. By selecting appropriately, the desired properties for oxide 230a and oxide 230b can be determined. It is good to form it.

[0266] Next, an oxide film 243A is deposited on the oxide film 230B (see Figures 10A to 10D). The 243A oxide film can be deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using the following methods. The oxide film 243A has an atomic ratio of Ga to In, which is oxidative. It is preferable that the atomic ratio of Ga to In in film 230B is greater than that of film 230B. , as oxide film 243A, by sputtering method, In:Ga:Zn=1:3:4[ The film is deposited using an oxide target with an atomic ratio of [number of atoms].

[0267] Note that the insulator 222, insulator 224, oxide film 230A, oxide film 230B, and oxide film It is preferable to deposit 243A by sputtering without exposing it to the atmosphere. For example, a multi-chamber type film deposition apparatus can be used. This allows for the deposition of insulator 222, The edge body 224, oxide film 230A, oxide film 230B, and oxide film 243A, the hydrogen in the film It reduces the amount of hydrogen present during film formation, and further reduces the amount of hydrogen mixed into the film between each film formation step. can.

[0268] Next, it is preferable to perform a heat treatment. The heat treatment is performed on oxide film 230A and oxide film 230B. The process should be carried out within a temperature range in which the oxide film 243A does not undergo polycrystallization, which is between 250°C and 650°C. The following steps should preferably be performed at a temperature of 400°C to 600°C. Note that the heat treatment is performed using nitrogen gas. Alternatively, an inert gas atmosphere, or an oxidizing gas at 10 ppm or more, 1% or more, The process should be carried out in an atmosphere containing 10% or more of the substance. For example, heat treatment should be performed in a mixed atmosphere of nitrogen and oxygen gas. In this case, the oxygen gas concentration should be around 20%. Also, the heat treatment can be performed under reduced pressure. Alternatively, the heat treatment may involve heating in a nitrogen or inert gas atmosphere followed by desorption. An atmosphere containing oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more to replenish the oxygen. Heat treatment may be performed in an open atmosphere.

[0269] Furthermore, it is preferable that the gas used in the above heat treatment is highly purified. For example, The amount of moisture contained in the gas used in the heat treatment described above is 1 ppb or less, preferably 0.1 ppb or less. More preferably, the level should be 0.05 ppb or less. Heat treatment using highly purified gas. By performing this process, moisture, etc., is removed from oxide film 230A, oxide film 230B, and oxide film 243A. This can prevent it from being absorbed as much as possible.

[0270] In this embodiment, the heat treatment is performed at a temperature of 550°C for 1 hour in a nitrogen atmosphere. After this, the process is carried out continuously in an oxygen atmosphere at a temperature of 550°C for 1 hour. According to the principle, water, hydrogen, etc. in oxide film 230A, oxide film 230B, and oxide film 243A This allows for the removal of impurities, etc. Furthermore, this heat treatment results in the oxide film 230B This improves the crystallinity and creates a denser, more compact structure. The diffusion of oxygen or impurities within the film 230B can be reduced.

[0271] Next, a conductive film 242A is deposited on the oxide film 243A (see Figures 10A to 10D). The conductive film 242A is deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using methods such as sputtering. For example, as conductive film 242A, sputtering can be used. Then, a tantalum nitride film can be formed. Note that before forming the conductive film 242A, heat treatment is performed. Alternatively, the heat treatment may be carried out under reduced pressure and without exposure to the atmosphere, continuously applying the conductive film 24 2A may be formed as a film. By performing such a process, the surface of the oxide film 243A, etc. It removes the water and hydrogen adsorbed on it, and further removes oxide film 230A, oxide film 230B, and Furthermore, the water concentration and hydrogen concentration in the oxide film 243A can be reduced. The temperature is preferably between 100°C and 400°C. In this embodiment, the heat treatment temperature is set to 20 Assume the temperature is 0°C.

[0272] Next, an insulating film 271A is deposited on the conductive film 242A (see Figures 10A to 10D). The insulating film 271A is deposited by sputtering, CVD, MBE, PLD, or AL This can be done using methods such as Method D. The insulating film 271A has the function of suppressing oxygen permeation. It is preferable to use an insulating film that is manufactured by sputtering. For example, as insulating film 271A, A film of aluminum oxide or silicon nitride can be formed using this method.

[0273] Next, an insulating film 273A is deposited on the insulating film 271A (see Figures 10A to 10D). The insulating film 273A is deposited by sputtering, CVD, MBE, PLD, or AL This can be done using methods such as Method D. For example, as the insulating film 273A, sputtering method By doing so, a silicon nitride or silicon oxide film can be formed.

[0274] Furthermore, the conductive film 242A, insulating film 271A, and insulating film 273A are not exposed to the atmosphere. However, it is preferable to deposit the film by sputtering. For example, a multi-chamber system A film deposition apparatus can be used. This will produce a conductive film 242A, an insulating film 271A, and an insulating film. 273A is formed by reducing the amount of hydrogen in the film, and furthermore, hydrogen is mixed into the film between each film formation process. The amount of material entering can be reduced. Also, when a hard mask is provided on the insulating film 273A Furthermore, the film that will serve as the hard mask can be deposited continuously without being exposed to the atmosphere.

[0275] Next, using lithography, oxide film 230A, oxide film 230B, and oxide film 243A were obtained. The conductive film 242A, insulating film 271A, and insulating film 273A are processed into island shapes, and oxide 2 30a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating layer 271B, and An insulating layer 273B is formed (see Figures 11A to 11D). Furthermore, this process is performed using dry etching. The etching method and the wet etching method can be used. Processing by the dry etching method. It is suitable for microfabrication. Also, oxide film 230A, oxide film 230B, oxide film 243A, conductor The processing of the film 242A, the insulating film 271A, and the insulating layer 271B was carried out under different conditions. Processing may be performed. Note that in this process, the oxide 230a of the insulator 224 must not overlap. The film thickness in the region may become thinner. Also, in this process, the insulator 224 is oxide 2 It may also be possible to superimpose it with 30a and process it into an island-like structure.

[0276] In lithography, the resist is first exposed through a mask. Next, exposure... The selected area is removed or left intact using a developer to form a resist mask. Next, By etching through the resist mask, conductors, semiconductors, or insulators can be etched. These can be processed into desired shapes. For example, KrF excimer laser light, ArF excimer laser light Using sima laser light, EUV (Extreme Ultraviolet) light, etc., A resist mask can be formed by exposing the dyst. Also, the relationship between the substrate and the projection lens An immersion technique may be used, in which a liquid (e.g., water) is filled in between and then exposed. Alternatively, the aforementioned light Alternatively, electron beams or ion beams may be used. When using this method, a mask is not required. Note that a resist mask is used in processes such as ashing. After performing dry etching, wet etching, and dry etching Perform wet etching, or dry etching after wet etching. It can be removed by performing the necessary procedures.

[0277] Furthermore, a hard mask made of an insulator or conductor may be used beneath the resist mask. When using a hard mask, an insulating film or conductive film that will serve as the hard mask material will be placed on the conductive film 242A. By forming a hard mask, then forming a resist mask on top of it, and etching the hard mask material... A hard mask of the desired shape can be formed. Etching of conductive film 242A, etc. You can either remove the resist mask before proceeding, or you can proceed with the resist mask still in place. Good. In the latter case, the resist mask may disappear during etching. Conductive film 242 After etching A, the hard mask may be removed by etching. If the mask material does not affect subsequent processes, or can be used in subsequent processes, then it is not necessarily hard. There is no need to remove the mask. In this embodiment, insulating layer 271B and insulating layer 273 B is used as a hard mask. On the other hand, insulating layer 271B is sufficient as a hard mask. If possible, the insulating layer 273B does not necessarily need to be provided. In that case, insulating film 273A Formation of the insulating layer becomes unnecessary. Also, instead of providing insulating layer 273B, insulating layer 271B is used as a hard mask. In this case, the thickness of the insulating layer 271B is adjusted as appropriate, and the conductive film 242A and other materials are not etched during etching. It is preferable to suppress the disappearance of the marginal layer 271B.

[0278] Here, insulating layer 271B and insulating layer 273B function as a mask for conductive layer 242B. Therefore, as shown in Figures 11B to 11D, the conductive layer 242B is curved between the side and top surfaces. It does not have a surface. As a result, the conductors 242a and 242b shown in Figure 3B do not have sides. The end where the top surface intersects with the side surface becomes angular. The end where the top surface of the conductor 242 intersects with the side surface becomes angular. As a result, the cross-sectional area of ​​the conductor 242 becomes larger compared to the case where the end has a curved surface. As a result, the resistance of the conductor 242 is reduced, and the on-current of the transistor 200 is increased. It can be done.

[0279] Also, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating layer Layers 271B and 273B are formed such that at least a portion of them overlaps with the conductor 205. Also, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating The sides of the edge layer 271B and the insulating layer 273B are approximately perpendicular to the upper surface of the insulator 222. It is preferable that there be oxide 230a, oxide 230b, oxide layer 243B, conductive layer 24 The sides of 2B, insulating layer 271B, and insulating layer 273B are roughly relative to the upper surface of the insulator 222. Being nearly vertical allows for miniaturization and high density when installing multiple transistors 200. It becomes possible. Alternatively, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242 The angle between the sides of B, insulating layer 271B, and insulating layer 273B and the upper surface of the insulator 222 is A configuration with a lower angle is also acceptable. In that case, oxide 230a, oxide 230b, oxide The sides of layer 243B, conductive layer 242B, insulating layer 271B, and insulating layer 273B, and the insulator The angle between the top surface of 222 and the surface is preferably 60 degrees or more and less than 70 degrees. In subsequent processes, the coating properties of the insulator 272, insulator 275, etc. are improved, and the porous Which defects can be reduced?

[0280] Furthermore, the by-products generated in the etching process are oxide 230a, oxide 230b, A layer is formed on the sides of the oxide layer 243B, the conductive layer 242B, the insulating layer 271B, and the insulating layer 273B. It may be formed in a layered manner. In this case, the layered by-product is oxide 230a, oxide 230b, oxide 243, conductor 242, insulator 271, and insulator 273 and insulator 2 It will be formed between 72. Similarly, layered by-products will form on the insulator 224. This may occur. With the layered by-product formed on the insulator 224, the insulator Even if film 272 is formed, the addition of oxygen to the insulator 224 is hindered by the layered by-products. Therefore, the layered by-product formed in contact with the upper surface of the insulator 224 is It is preferable to remove it.

[0281] Next, insulator 224, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 2 An insulating film 272A is deposited on 42B, insulating layer 271B, and insulating layer 273B (Figure) (See Figures 12A to 12D). The insulating film 272A is deposited by sputtering, CVD, M This can be done using methods such as the BE method, PLD method, and ALD method. In this embodiment, the insulating film Aluminum oxide is deposited as 272A by sputtering.

[0282] The insulating film 272A is preferably formed using the sputtering method. By depositing the insulating film 272A using the galvanic method, oxygen is added to the insulator 224 and the insulating layer 273B. It can be added. At this time, an insulating layer 271B is provided in contact with the upper surface of the conductive layer 242B. Therefore, oxidation of the conductive layer 242B can be reduced.

[0283] Next, insulating film 275A is deposited on insulating film 272A (see Figures 12A to 12D). The 275A insulating film is deposited using sputtering, CVD, MBE, PLD, and ALD. This can be done using the law, etc. In this embodiment, the insulating film 275A is sputtered. Silicon nitride is deposited using the ring method.

[0284] Next, an insulating film that will become an insulator 280 is deposited on the insulating film 275A. This is done using sputtering, CVD, MBE, PLD, ALD, etc. This can be done. For example, a silicon oxide film can be deposited as the insulating film using the sputtering method. This is how it works. The insulating film that will become insulator 280 is formed by sputtering in an oxygen-containing atmosphere. By forming a film, an insulator 280 containing excess oxygen can be formed. In addition, the film-forming gas By using a sputtering method that does not require hydrogen, the hydrogen concentration in the insulator 280 can be increased. This can be reduced. Furthermore, a heat treatment may be performed before the deposition of the insulating film. The process may be carried out under reduced pressure, and the insulating film may be deposited continuously without exposure to the atmosphere. By performing this process, moisture adsorbed on the surface of the insulating film 275A and Hydrogen is removed, and further oxide 230a, oxide 230b, oxide layer 243B, and an insulating layer The moisture and hydrogen concentrations in the edge body 224 can be reduced. This heat treatment includes, The above-described heat treatment conditions can be used.

[0285] Next, the insulating film that will become the insulator 280 is subjected to CMP treatment, and the insulator 280 has a flat top surface. Form (see Figures 12A to 12D). Furthermore, sputtering is performed on the insulator 280. A silicon nitride film is formed by the ring method, and the silicon nitride is deposited until it reaches the insulator 280. CMP processing may be performed.

[0286] Next, a portion of the insulator 280, a portion of the insulating film 275A, a portion of the insulating film 272A, and insulating layer 2 Part of 73B, part of insulating layer 271B, part of conductive layer 242B, part of oxide layer 243B A portion of the oxide 230b is processed to form an opening that reaches the oxide 230b. It is preferable that the opening be formed so as to overlap with the conductor 205. By forming the opening, Edge 275a, insulator 275b, insulator 272a, insulator 272b, insulator 273a, insulator Edge material 273b, insulator 271a, insulator 271b, conductor 242a, conductor 242b, acid This forms oxide 243a and oxide 243b (see Figures 13A to 13D).

[0287] When forming the above opening, the upper part of oxide 230b is removed. By removing it, grooves are formed in the oxide 230b. Depending on the depth of these grooves, The groove may be formed in the opening formation step described above, or in a step different from the opening formation step described above. It may be formed as follows.

[0288] Also, a portion of the insulator 280, a portion of the insulating film 275A, a portion of the insulating film 272A, and insulating layer 2 Part of 73B, part of insulating layer 271B, part of conductive layer 242B, part of oxide layer 243B Some of the processing of oxide 230b is done by dry etching or wet etching. It can be used. Dry etching is suitable for microfabrication. The processing may be carried out under different conditions. For example, a portion of the insulator 280 may be dry Processed by etching, a portion of insulating film 275A, a portion of insulating film 272A, and insulating layer 273B A portion of the insulating layer 271B is processed by wet etching, and the oxide layer 243B Part of the conductive layer 242B and part of the oxide 230b were processed by dry etching. This may also be done. Furthermore, processing of a portion of the oxide layer 243B and a portion of the conductive layer 242B, and oxidation The processing of part of item 230b may be carried out under different conditions.

[0289] Here, impurities such as oxide 230a and oxide 230b that are attached to the surface or diffused into the interior are considered. It is preferable to remove the material formed on the oxide 230b surface by the above dry etching. It is preferable to remove the damaged area. The impurities include insulator 280, insulating Part of film 275A, part of insulating film 272A, part of insulating layer 273B, part of insulating layer 271B The components contained in the part and conductive layer 242B, and the apparatus used when forming the above-mentioned opening Components contained in the material being cut, components contained in the gas or liquid used for etching, etc. Examples of impurities include aluminum and silicon. These include tantalum, fluorine, and chlorine.

[0290] In particular, impurities such as aluminum or silicon are CAAC-O230b oxide. It inhibits S formation. Therefore, it inhibits CAAC-OS formation of aluminum or silicon. It is preferable that harmful impurity elements are reduced or removed. For example, oxide 230 b, and its vicinity, should have a concentration of aluminum atoms of 5.0 atomic percent or less. Preferably, 2.0 atomic% or less, more preferably 1.5 atomic% or less, and 1.0 atomic% or less. More preferably, and even more preferably less than 0.3 atomic percent.

[0291] Furthermore, impurities such as aluminum or silicon can inhibit the formation of CAAC-OS. , pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like ox The region of the metal oxide that has become an ide semiconductor is considered a non-CAAC region. It may be called that. In the non-CAAC region, the density of the crystal structure is reduced, so V O H It forms in large quantities, making it easier for transistors to become normally-on. Therefore, oxide 230 It is preferable that the non-CAAC region of b is reduced or eliminated.

[0292] In contrast, it is preferable that oxide 230b has a layered CAAC structure. It is preferable that the CAAC structure extends to the lower end of the drain of oxide 230b. In transistor 200, the conductor 242a or conductor 242b, and its vicinity. This functions as a drain. In other words, near the lower end of the conductor 242a (conductor 242b) Preferably, oxide 230b has a CAAC structure. In this way, drain pressure Even at the drain end, which significantly affects the CA, the damaged area of ​​oxide 230b is removed, Having an AC structure further suppresses fluctuations in the electrical characteristics of transistor 200. Yes, it is possible. Furthermore, it can improve the reliability of transistor 200.

[0293] To remove the above-mentioned impurities, a cleaning process is performed. The cleaning method involves using a cleaning solution, etc. These include wet cleaning, plasma treatment using plasma, and cleaning by heat treatment. The cleaning process may be combined as appropriate. Note that this cleaning process will deepen the grooves. It can happen.

[0294] For wet cleaning, use ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc., with carbonated water. Alternatively, the cleaning process may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, etc. Ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. Alternatively, These cleaning methods may be combined as appropriate.

[0295] In this specification, etc., an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water is referred to as diluted hydrofluoric acid. It is called an acid, and a solution obtained by diluting commercially available ammonia water with pure water is sometimes called diluted ammonia water. Yes. Furthermore, the concentration and temperature of the aqueous solution depend on the impurities to be removed and the semiconductor device being cleaned. The composition should be adjusted as appropriate. The ammonia concentration of the diluted ammonia solution should be 0.0 The concentration should be between 1% and 5%, preferably between 0.1% and 0.5%. The hydrogen fluoride concentration of the hydrochloric acid is 0.01 ppm to 100 ppm, preferably 0.1 ppm. It should be between 10 ppm and above.

[0296] For ultrasonic cleaning, a frequency of 200 kHz or higher, preferably 900 kHz or higher, is used. It is preferable to have this. By using this frequency, damage to oxides such as 230b is reduced. It can be reduced.

[0297] Furthermore, the above cleaning process may be performed multiple times, and the cleaning solution may be changed each time the cleaning process is performed. Example For example, the first cleaning treatment involves using diluted hydrofluoric acid or diluted ammonia water. In addition, a second washing treatment using pure water or carbonated water may be performed.

[0298] In this embodiment, as the cleaning process described above, wet cleaning is performed using diluted hydrofluoric acid. Next, wet cleaning is performed using purified water or carbonated water. Removes impurities such as oxide 230a and oxide 230b that are attached to the surface or diffused into the interior. This can be done. Furthermore, the crystallinity of oxide 230b can be increased.

[0299] Previously, processing such as dry etching or the above-mentioned cleaning treatment overlapped with the above-mentioned opening. Furthermore, the thickness of the insulator 224 in the region that does not overlap with the oxide 230b is equal to the thickness of the oxide 230b. In overlapping regions, the thickness may be thinner than that of insulator 224.

[0300] Heat treatment may be performed after the etching or cleaning described above. The heat treatment is 100 The heating process should be carried out at a temperature between 450°C and 450°C, preferably between 350°C and 400°C. The procedure involves an atmosphere of nitrogen gas or an inert gas, or an oxidizing gas at a concentration of 10 ppm or more, or 1%. The procedure should be carried out in an atmosphere containing the above amount, or 10% or more. For example, heat treatment should be performed in an oxygen atmosphere. This is preferable. This supplies oxygen to oxide 230a and oxide 230b, and oxygen V missing O This can reduce oxide 23. The crystallinity of 0b can be improved. Furthermore, the heat treatment may be performed under reduced pressure. Alternatively, the material may be heat-treated in an oxygen atmosphere, followed by continuous heat-treatment in a nitrogen atmosphere without exposure to the atmosphere. You may do so.

[0301] Next, insulating film 250A (insulating film 250Aa and insulating film 250Ab) is deposited (Figure 1). (See Figures 4A to 14D). Heat treatment may be performed before the deposition of the insulating film 250Aa. The heat treatment is carried out under reduced pressure, and an insulating film of 250Aa is continuously deposited without exposure to the atmosphere. This may also be done. Furthermore, it is preferable to carry out the heat treatment in an atmosphere containing oxygen. By performing this treatment, moisture and hydrogen adsorbed on the surface of oxide 230b are removed. Furthermore, the water and hydrogen concentrations in oxides 230a and 230b are reduced. This can be done. The heat treatment temperature is preferably between 100°C and 400°C.

[0302] Insulating film 250Aa can be processed by sputtering, CVD, MBE, PLD, ALD, etc. It can be formed using such methods. In addition, the insulating film 250A has reduced or removed hydrogen atoms. It is preferable to deposit the film using a film deposition method with a gas. This results in an insulating film of 250Aa The hydrogen concentration can be reduced. The insulating film 250Aa is then combined with oxide 230b in a later process. Since the insulator in contact is 250a, it is preferable that the hydrogen concentration is reduced in this way. ru.

[0303] Furthermore, it is preferable to deposit the insulating film 250Aa using the ALD method. The thickness of the insulator 250, which functions as a gate insulating film of the transistor 200, is extremely thin. For example, the wavelength should be between 5nm and 30nm, and the variation should be kept small. Yes. In contrast, the ALD method involves alternately introducing a precursor and a reactant (oxidizing agent). This is a film formation method performed by repeating said cycle, and the film thickness can be adjusted depending on the number of repetitions of this cycle, so precise film thickness adjustment is possible. Accordingly, the accuracy required for a gate insulating film by miniaturized transistor 200 can be achieved. Also, as shown in FIG. 14B and FIG. 14C , insulating film 250Aa needs to be formed with good coverage on the bottom surface and side surfaces of an opening formed by insulator 280 or the like. On the bottom surface and side surfaces of said opening, atomic layers can be deposited one layer at a time, so insulating film 250Aa can be formed with good coverage with respect to said opening .

[0304] Furthermore, for example, when forming insulating film 250Aa using a PECVD method, hydrogen-containing film formation gas is decomposed in plasma to generate a large amount of hydrogen radicals. Through reduction reaction of hydrogen radicals, oxygen in oxide 230b is extracted to form V O defects, which increases the hydrogen concentration in oxide 230b. However, when forming insulating film 250Aa using an ALD method O , generation of hydrogen radicals can be suppressed both during introduction of the precursor and during introduction of the reactant . Therefore, by forming insulating film 250Aa using an ALD method , increase in the hydrogen concentration in oxide 230b can be prevented.

[0305] Note that it is preferable that insulating film 250Aa is formed using an insulator that releases oxygen when heated, and insulating film 250Ab is formed using an insulator having a function of suppressing oxygen diffusion. With such a configuration, diffusion of oxygen contained in insulator 250a into conductor 260 can be suppressed. That is, decrease in the amount of oxygen supplied to oxide 230 can be suppressed ​​​​It can be controlled. Also, the oxidation of the conductor 260 by oxygen contained in the insulator 250a can be controlled. It can be suppressed.

[0306] Specifically, the insulating film 250Ab is made of hafnium, aluminum, gallium, and yt. Titanium, zirconium, tungsten, titanium, tantalum, nickel, germanium, Metal oxides or oxidation products containing one or more selected metals, such as magnesium. A metal oxide that can be used as material 230 can be used. In particular, aluminum It is preferable to use an insulator containing an oxide of either or both of um and hafnium.

[0307] In this embodiment, silicon oxide is deposited as the insulating film 250Aa by the PEALD method. Hafnium oxide is deposited as the insulating film 250Ab by thermal ALD method.

[0308] Next, microwave treatment is performed in an oxygen-containing atmosphere (see Figures 14A to 14D). As shown in Figures 14B to 14D, the dotted lines represent microwaves, RF and other high-frequency waves, and oxygen plasma. , or oxygen radicals, etc. Microwave processing is, for example, high-density processing using microwaves. It is preferable to use a microwave processing apparatus that has a power supply for generating plasma. The microwave processing device may have a power supply that applies RF to the substrate side. By using this method, high-density oxygen radicals can be generated. Furthermore, RF can be applied to the substrate side. By applying this, oxygen ions generated by the high-density plasma are efficiently converted into oxide 23 It can be introduced into 0b. Furthermore, the above microwave processing is preferably carried out under reduced pressure. The pressure is 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more. Furthermore, it is preferable to set it to 400 Pa or higher. Also, the oxygen flow rate ratio (O2 / O2+Ar) The process should be carried out at a concentration of 50% or less, preferably between 10% and 30%. The processing temperature should be 750°C. It is fine to do this at a temperature below ℃, preferably below 500℃, for example, around 400℃. Also, oxygen plasma After the initial treatment, heat treatment may be performed continuously without exposure to the outside air.

[0309] As shown in Figures 14B to 14D, microwave processing is performed in an oxygen-containing atmosphere. Using microwaves or high-frequency waves such as RF, oxygen gas is turned into plasma, and the oxygen plasma It is possible to apply the agent to the region between the conductors 242a and 242b of oxide 230b. At this time, microwaves or high-frequency waves such as RF are irradiated into the region 230bc shown in Figure 2. It is also possible to apply microwaves or high-frequency waves such as RF to region 230bc, or acid It is possible to apply elementary plasma, etc. Through the action of plasma, microwaves, etc., V in region 230bc O By cleaving H, hydrogen H can be removed from region 230bc. Furthermore, in region 230bc, "V O H → H + V O The reaction " occurred in area 230 The hydrogen concentration in bc can be reduced. Therefore, the oxygen deficiency in region 230bc, and V O This can reduce H and lower the carrier concentration. Furthermore, it forms in region 230bc. In the oxygen vacancies created, oxygen radicals generated by the oxygen plasma, or contained in the insulator 250, are added. By supplying oxygen, the oxygen deficiency in region 230bc is further reduced, and the carrier The concentration can be reduced.

[0310] On the other hand, in regions 230ba and 230bb shown in Figure 2, there are conductors 242a and A conductor 242b is provided. As shown in Figures 14B, 14C, and 14D, the conductor 242a and conductor 242b are microwaves or high-frequency waves such as RF, oxygen plasma, etc. Since these effects are blocked, these effects do not extend to regions 230ba and 230bb. No. As a result, microwave processing is performed in regions 230ba and 230bb. V O This prevents a decrease in H and avoids excessive oxygen supply, thus preventing a drop in carrier concentration. It is possible.

[0311] In this way, oxygen vacancies are selectively created in the oxide semiconductor region 230bc, and V O H By removing it, region 230bc can be made type i or substantially type i. Furthermore, Excessive flow in areas 230ba and 230bb, which function as drain areas or drain areas. This suppresses the supply of oxygen and maintains n-type formation. This suppresses fluctuations in the electrical characteristics of transistor 200, preventing variations in the electrical characteristics of transistor 200 within the substrate surface. It can suppress the growth.

[0312] Therefore, it is possible to provide a semiconductor device with less variation in transistor characteristics. Furthermore, it is possible to provide semiconductor devices with good reliability. In addition, it has good electrical characteristics. We can provide semiconductor devices.

[0313] In the process shown in Figures 14A to 14D, after the deposition of the insulating film 250Ab, microwaves are used. Although processing has been performed, the present invention is not limited thereto. For example, the composition of insulating film 250Aa Microwave treatment may be performed after the film is deposited, or microwave treatment may be performed before the deposition of the insulating film 250Aa. You may do this, or you may do it both before and after the deposition of the insulating film 250Aa. Microwave processing may be performed, or after deposition of insulating film 250Aa and insulating film 250Ab Microwave processing may be performed in both cases.

[0314] Furthermore, when the insulating film 250A has the two-layer structure described above, microwave treatment is performed on the insulating film. A silicon oxide film with 250Aa was deposited using the PEALD method, and a hafnium oxide film with 250Ab insulation was formed. The film can be deposited using the thermal ALD method. Here, the above microwave treatment and PEAL of silicon oxide are performed. D film deposition and hafnium oxide thermal ALD film deposition can be performed continuously without exposure to the atmosphere. It is preferable to do so. For example, a multi-chamber type processing device may be used. Also, The microwave processing described above is performed using the PEALD apparatus, which processes plasma-excited reactant (oxidizer). This can be substituted by processing. Here, if oxygen gas is used as the reactant (oxidizing agent) good.

[0315] Alternatively, heat treatment may be performed while maintaining a reduced pressure state after microwave treatment. By performing this treatment, in insulating film 250A, oxide 230b, and oxide 230a It can efficiently remove hydrogen. Also, some of the hydrogen is absorbed by conductor 242 (conductor 2 It may be gettered by 42a and conductor 242b), or by microwave. Even if the step of performing heat treatment while maintaining a reduced pressure state after processing is repeated multiple times Good. By repeatedly performing the heat treatment, the insulating film 250A, the oxide 230b, and the acid Hydrogen in compound 230a can be removed even more efficiently. The heat treatment temperature is as follows: It is preferable to use a temperature between 300°C and 500°C.

[0316] Furthermore, by performing microwave treatment to modify the film quality of the insulating film 250A, hydrogen, water, and other substances can be removed. The diffusion of pure substances can be suppressed. Therefore, the formation of conductive films that become conductors 260, etc. Subsequent processes, such as heat treatment, allow hydrogen, water, impurities, etc. to enter through the insulator 250. However, diffusion into oxides 230b, 230a, etc. can be suppressed.

[0317] Next, a conductive film to become conductor 260a and a conductive film to become conductor 260b are deposited in sequence. The deposition of the conductive film that will become the conductive body 260a and the conductive film that will become the conductive body 260b is performed by sputtering. This can be carried out using methods such as CVD, MBE, PLD, and ALD. Morphologically, a conductive film that will become the conductor 260a is formed using the ALD method, and then the CVD method is used A conductive film is formed to become the conductor 260b.

[0318] Next, the conductive film, which becomes the insulating film 250A and the conductive film 260a, and the conductive film, are formed by CMP treatment. By polishing the conductive film that becomes the electric body 260b until the insulator 280 is exposed, the insulator 250 (insulator 250a, and insulator 250b), and conductor 260 (conductor 260 a) and conductor 260b) are formed (see Figures 15A to 15D). This creates an insulating The edge body 250 has an opening that reaches the oxide 230b and the inner wall (side wall) of the groove of the oxide 230b. It is positioned to cover the bottom surface. Also, the conductor 260 is connected to the insulator 250, It is positioned to embed the above-mentioned opening and groove.

[0319] Next, a portion of insulator 280, a portion of insulator 275b, a portion of insulator 272b, and insulator 2 A portion of 73b and a portion of the insulator 271b are processed to form an opening that reaches the conductor 242b. (See Figures 16A to 16D). Part of insulator 280, part of insulator 275b, insulator The processing of parts of 272b, insulator 273b, and insulator 271b is done by dry etching. Dry etching can be used. The machining process is suitable for micro-machining. Furthermore, the machining may be performed under different conditions. For example, a portion of the insulator 280 is processed by a dry etching method, and a portion of the insulator 275b, Processing of a portion of insulator 272b, a portion of insulator 273b, and a portion of insulator 271b It may also be processed using the wet etching method.

[0320] Next, the insulating film 293A is deposited (see Figures 17A to 17D). The insulating film 293A is, Deposition of films using methods such as sputtering, CVD, MBE, PLD, and ALD. This can be done. Also, as insulating film 293A, gallium oxide, hafnium oxide, zirconium oxide Aluminum oxide, aluminum nitride oxide, aluminum nitride oxide, aluminum nitride Aluminum, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride, aluminum and Oxides containing hafnium, aluminum and hafnium-containing oxide nitrides, silico Oxides having silicon and hafnium, oxides and nitrides having silicon and hafnium These include nitrides containing silicon and hafnium. Also, as insulating film 293A, These films may be stacked and used. In this embodiment, the insulating film 293A is, An insulating film is used, which is layered in the order of zirconium oxide, aluminum oxide, and zirconium oxide. Yes, they are.

[0321] Next, the conductive film 294A is deposited (see Figures 17A to 17D). The films are produced using methods such as sputtering, CVD, MBE, PLD, and ALD. This can be done. In this embodiment, the ALD method is used to form the lower layer of the conductive film 294A, and C The upper layer of conductive film 294A is deposited using the VD method.

[0322] Next, the insulating film 293A and the conductive film 294A are removed from the insulator 280 by CMP treatment. By polishing until exposed, the insulator 293 and the conductor 294 are formed (Figure) (See Figures 18A to 18D). As a result, the insulator 293 has an opening that reaches the conductor 242. It is positioned to cover the inner walls (side walls and bottom surface) of the groove. In addition, the conductor 294 is an insulator. The body 293 is positioned to embed the opening and the groove.

[0323] Next, a heat treatment may be performed under the same conditions as the heat treatment described above. In this embodiment, nitrogen The process is carried out at a temperature of 400°C for 1 hour in a plain atmosphere. This heat treatment causes the insulator 250 This reduces the moisture and hydrogen concentrations in the insulator 293 and the insulator 280. It is possible. Furthermore, after the above heat treatment, the insulator 282 is continuously deposited without exposure to the atmosphere. That's fine.

[0324] Next, on the insulator 250, on the conductor 260, on the insulator 293, on the conductor 294, and the insulation An insulator 282 is formed on the edge 280 (see Figures 19A to 19D). Insulator 282 The film deposition is carried out using methods such as sputtering, CVD, MBE, PLD, and ALD. It is possible to do so. It is preferable to deposit the insulator 282 using the sputtering method. By using a sputtering method that does not require the use of hydrogen as the film deposition gas, in the insulator 282 The hydrogen concentration can be reduced. In addition, using the sputtering method, in an atmosphere containing oxygen By depositing the insulator 282 using gas, oxygen is added to the insulator 280 while the film is being deposited. This can be done. This allows the insulator 280 to contain excess oxygen. At this time, It is preferable to deposit the insulator 282 while heating the substrate.

[0325] In this embodiment, the insulator 282 is an aluminum target in an atmosphere containing oxygen gas. Using a tweezers, aluminum oxide is deposited using the pulsed DC sputtering method. By using the sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film It is possible to improve quality.

[0326] Next, a portion of insulator 282, a portion of insulator 280, a portion of insulator 275, and insulator 272 A portion of the insulator 224, a portion of the insulator 222, and a portion of the insulator 216 are processed. This forms an opening that reaches the insulator 214 (see Figures 20A to 20D). The opening is The transistor 200 and the capacitive element 292 may be formed to surround each other. The opening is such that a plurality of transistors 200 and a plurality of capacitive elements 292 are surrounded. It may be formed in this way. Therefore, in the opening, a part of the side surface of the insulator 282, the insulator Part of the side of 280, part of the side of insulator 275, part of the side of insulator 272, insulator 2 Part of the side of 24, part of the side of insulator 222, and part of the side of insulator 216 are exposed. do.

[0327] Part of insulator 282, part of insulator 280, part of insulator 275, part of insulator 272 The processing of a portion of insulator 224, a portion of insulator 222, and a portion of insulator 216 is carried out by a drill. Dry etching or wet etching can be used. The machining method is suitable for micro-machining. Furthermore, the machining can be performed under different conditions. It is also possible that in this process, the film thickness in the region of the insulator 214 that overlaps with the above-mentioned opening is thin. It can happen.

[0328] Next, insulator 282, insulator 280, insulator 275, insulator 272, insulator 224, insulator The edge 222 and the insulator 216 are covered to form an insulator 284 (Figures 21B to 2 (See 1D). Insulator 284 is preferably formed using conditions equivalent to those for insulator 282. For example, the deposition of insulator 284 can be done by sputtering, CVD, MBE, or PLD. This can be done using methods such as the ALD method.

[0329] Specifically, as the insulator 284, for example, aluminum oxide produced by sputtering. It is preferable to deposit a nium film. Using a sputtering method, insulation is performed in an oxygen-containing atmosphere. By forming a film on body 284, oxygen can be added to the insulator 280 while the film is being formed. It is preferable to form the insulator 284 while heating the substrate. An insulator 282 is formed in contact with the upper surface of the conductor 260 and the upper surface of the conductor 294. Therefore, in the film formation process of the insulator 284, the oxygen contained in the insulator 280 is absorbed by the conductor 260. Furthermore, absorption by the conductor 294 can be suppressed. (See Figures 21B to 21D) As shown, the insulator 284 is in contact with the insulator 214 at the bottom surface of the opening. The transistor 200 and the capacitive element 292 have their top and side surfaces attached to the insulator 284, and their bottom surfaces This will be encased in the insulator 214.

[0330] Next, an insulator 283 is formed on the insulator 284 (see Figures 21B to 21D). The film deposition of edge material 283 can be done using sputtering, CVD, MBE, PLD, ALD, etc. This can be done using [a specific method]. Furthermore, the insulator 283 may be multilayered. For example, [a specific method] A silicon nitride film is formed using the taring method, and then a CVD method is used on the silicon nitride. A silicon nitride film may be formed. As shown in Figures 21B to 21D, the insulator 283 is This configuration encloses the insulator 284. In this way, the insulator 283 has high barrier properties, and the insulator... The transistor 200 and the capacitive element 292 are enclosed in 284 and the insulator 214. This prevents moisture and hydrogen from entering from the outside.

[0331] Next, an insulating film, which will become an insulator 274, is deposited on the insulator 284. The deposition of this insulating film is carried out as follows: This can be done using sputtering, CVD, MBE, PLD, ALD, etc. It is possible. For example, silicon oxide can be deposited using the CVD method. Furthermore, the insulating film is It is preferable to deposit the film using a film deposition method that utilizes a gas from which the hydrogen atoms described above have been reduced or removed. This makes it possible to reduce the hydrogen concentration in the insulating film.

[0332] Next, the insulating film that will become the insulator 274 is subjected to CMP treatment, and the insulator 274 with a flat top surface is formed. Form (see Figures 22B to 22D).

[0333] Next, heat treatment may be performed. In this embodiment, heat treatment is performed at a temperature of 400°C in a nitrogen atmosphere. The process is carried out for one hour. This heat treatment results in the formation of a film of the insulator 282, as shown in Figure 2. The oxygen added by diffuses into insulators 280 and 250, and the oxide 230 is charged. It can be selectively supplied to the flannel formation region. This heat treatment is performed on the insulator 274. This process may be performed not only after formation, but also after the deposition of the insulator 282, after the deposition of the insulator 284, and so on.

[0334] Next, insulator 271a, insulator 273a, insulator 272a, insulator 275a, insulator 2 80, insulator 282, insulator 284, insulator 283, and insulator 274, conductor 24 An opening is formed that reaches 2. In addition, insulators 282, 284, 283, and An opening is formed in the insulator 274 that reaches the conductor 294 (Figures 22A, 22B, (See D). The opening can be formed using lithography. Note that in Figure 22A The shape of the opening is circular when viewed from above, but is not limited to this. For example, the opening may be approximately circular in shape, such as an ellipse, or polygonal in shape, such as a quadrilateral, when viewed from above. The shape may also have rounded corners, such as those of a polygon.

[0335] Next, an insulating film to become an insulator 241 is formed, and the insulating film is anisotropically etched to form an insulator. Forms 241. (See Figures 22A, 22B, and 22D.) Insulator 241 Film deposition can be performed using methods such as sputtering, CVD, MBE, PLD, or ALD. This can be done using an insulating film that suppresses oxygen permeability. It is preferable to use an insulating film with properties. For example, using the ALD method, aluminum oxide It is preferable to deposit a film of 'mu'. Alternatively, silicon nitride can be deposited using the PEALD method. This is preferable. Silicon nitride is preferred because it has high hydrogen blocking properties.

[0336] Furthermore, as an anisotropic etching of the insulating film that becomes the insulator 241, for example, dry etching Methods such as the G method can be used. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be blocked. This suppresses the transmission of the current and prevents oxidation of the conductors 240a and 240b that are to be formed next. This can be done. Also, impurities such as water and hydrogen can be removed from conductors 240a and 240b. It can prevent it from spreading to the outside.

[0337] Next, conductive films that will become conductor 240a and conductor 240b are formed. Conductive 240a The conductive film that forms the conductor 240b has the function of suppressing the permeation of impurities such as water and hydrogen. It is desirable to have a laminated structure that includes a conductive material. For example, tantalum nitride, titanium nitride, etc. It can be made into a laminate of materials such as tungsten, molybdenum, and copper. Conductor 24 The deposition of conductive films with a conductivity of 0 can be done by sputtering, CVD, MBE, PLD, or AL. This can be done using methods such as the D method.

[0338] Next, by performing CMP treatment, the conductive films that become conductor 240a and conductor 240b are formed. A portion is removed, exposing the upper surface of the insulator 274. As a result, the conductive film remains only in the opening. By providing this, it is possible to form conductors 240a and 240b with flat upper surfaces. (See Figures 22A, 22B, and 22D). Furthermore, as a result of this CMP treatment, the insulator 274 A portion of the top surface may be removed.

[0339] Next, a conductive film that will become conductor 246 is formed. The formation of the conductive film that will become conductor 246 is performed by This can be done using methods such as puttering, CVD, MBE, PLD, or ALD. can.

[0340] Next, a conductive film to become conductor 246 is processed by lithography, resulting in conductor 240a. The conductor 246a that is in contact with the upper surface of the conductor 240b, and the conductor 246b that is in contact with the upper surface of the conductor 240b Formed. At this time, the conductors 246a and 246b and the insulator 274 do not overlap. A portion of the insulator 274 in the region may be removed (see Figures 3A, 3B, and 3D).

[0341] Next, an insulating film 286 is formed on the conductive material 246 and the insulating material 274 (Figure 3B). (See Figure 3D). The insulator 286 was deposited by sputtering, CVD, MBE, and PL. This can be done using the D method or the ALD method, etc. Also, the insulator 286 is multilayer Alternatively, a silicon nitride film may be deposited using a sputtering method, and the silicon nitride A silicon nitride film may be deposited on top using the CVD method.

[0342] As described above, the transistor 200 and the capacitive element 292 shown in Figures 3A to 3D are This allows for the fabrication of semiconductor devices.

[0343] <Microwave Processing Equipment> The following describes a microwave processing apparatus that can be used in the above-mentioned semiconductor device fabrication method. I will explain.

[0344] First, Figure 2 shows the configuration of a manufacturing equipment that minimizes the inclusion of impurities during the manufacturing of semiconductor devices and other equipment. 3. This will be explained using Figures 24 and 25.

[0345] Figure 23 schematically shows a top view of the single-wafer multi-chamber manufacturing apparatus 2700. The manufacturing apparatus 2700 includes a cassette port 2761 for housing the substrate and a substrate alignment An alignment port 2762 for performing an atmospheric substrate supply chamber 2701 and an atmospheric substrate From the board supply room 2701, the substrate is transported to the atmospheric substrate transport room 2702, and the substrate is brought in. Furthermore, a load lock chamber that switches the pressure inside the room from atmospheric pressure to reduced pressure, or from reduced pressure to atmospheric pressure. 2703a, and the removal of the substrate, and the room pressure from reduced pressure to atmospheric pressure, or from atmospheric pressure Unload lock chamber 2703b for switching to reduced pressure, and transport chamber 2 for transporting substrates in vacuum. 704, chamber 2706a, chamber 2706b, chamber 2706c It has a chamber 2706d and

[0346] Furthermore, the atmospheric substrate transport chamber 2702 is connected to the load lock chamber 2703a and the unload lock chamber. It is connected to the loading lock chamber 2703b, and the load lock chamber 2703a and the unload lock chamber 270 3b is connected to transport chamber 2704, and transport chamber 2704 is connected to chamber 2706a, It connects to bar 2706b, chamber 2706c, and chamber 2706d.

[0347] Furthermore, gate valves GV are provided at the connection points of each chamber, and the atmospheric substrate supply chamber 270 Except for chamber 1 and the atmospheric substrate transport chamber 2702, each chamber can be independently maintained in a vacuum state. Furthermore, a transport robot 2763a is provided in the atmospheric substrate transport chamber 2702, and transport A transport robot 2763b is installed in the transport room 2704. The transport robot 2763b can transport the substrates within the manufacturing apparatus 2700. ru.

[0348] The back pressure (total pressure) of the transfer chamber 2704 and each chamber is, for example, 1×10 -4 Pa or less , preferably 3×10 -5 Pa or less, more preferably 1×10 -5 Pa or less. Further , the partial pressure of gas molecules ( atoms) with a mass-to-charge ratio (m / z) of 18 in the transfer chamber 2704 and each chamber is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, further more preferably 3×10 -6 Pa or less. In addition, the partial pressure of gas molecules (atoms) with m / z of 28 in the transfer chamber 2704 and each chamber is, for example, 3×10 -5 Pa or less, prefera bly 1×10 -5 Pa or less, more preferably 3×10 -6 Pa or less. Further, the parti al pressure of gas molecules (atoms) with m / z of 44 in the transfer chamber 2704 and each chamber is, for examp le, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, more preferably 3×1 0 -6 Pa or less.

[0349] Note that the total pressure and partial pressure in the transfer chamber 2704 and each chamber can be measured using a mass spectrometer. For example, a quadrupole mass spectrometer (also referred to as Q-mas s) Qulee CGM-051 manufactured by ULVAC, Inc. may be used.

[0350] Further, it is desirable that the transfer chamber 2704 and each chamber have a structure with little external leakage or internal leakage. For example, the leak rate of the transfer chamber 2704 and each chamber is , 3×10 -6 Pa·m 3 / s or less, preferably 1×10 -6 Pa·m3 Set to / s or less. Also, for example, the leak rate of a gas molecule (atom) with m / z 18 is 1 × 10⁻⁶. -7 P a·m 3 / s or less, preferably 3 × 10 -8 Pa·m 3 It should be less than or equal to / s. Also, for example, The leak rate of a gas molecule (atom) with m / z 28 is 1 × 10⁻⁶ -5 Pa·m 3 / s or less Preferably 1 × 10 -6 Pa·m 3 It should be less than or equal to / s. Also, for example, if m / z is 44 The leak rate of gas molecules (atoms) is 3 × 10 -6 Pa·m 3 / s or less, preferably 1× 10 -6 Pa·m 3 Set to / s or less.

[0351] Regarding the leak rate, the total pressure and partial pressure were measured using the aforementioned mass spectrometer. Then we can derive it. The leak rate depends on external leaks and internal leaks. The problem is the inflow of gas from outside the vacuum system due to tiny holes or sealing defects. Leaks are caused by leaks from valves or other partitions within the vacuum system, or by released gases from internal components. To keep the leak rate below the above-mentioned values, both external and internal leaks are addressed. Therefore, countermeasures need to be taken.

[0352] For example, the opening and closing parts of the conveying chamber 2704 and each chamber are sealed with metal gaskets. It is good to do so. Metal gaskets are made of iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal gasket that is coated. Metal gaskets have better adhesion than O-rings. External leakage can be reduced. Also, by using iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal passivation coating, impurities released from the metal gasket are contained. This suppresses the release of gases and reduces internal leakage.

[0353] Furthermore, as a component of the manufacturing apparatus 2700, aluminum with low emission gas containing impurities is used. It uses nium, chromium, titanium, zirconium, nickel, or vanadium. Also, the previous The aforementioned member may be used after being coated with an alloy containing iron, chromium, and nickel. Alloys containing ammonium and nickel are rigid, heat-resistant, and easy to process. Therefore, if the surface irregularities of the material are reduced by polishing or other means in order to reduce the surface area, It can reduce emissions.

[0354] Alternatively, the components of the aforementioned manufacturing apparatus 2700 may be made of iron fluoride, aluminum oxide, chromium oxide, etc. Any covering will do.

[0355] The components of the manufacturing apparatus 2700 are preferably made of metal as much as possible, such as quartz. When installing viewing windows or similar devices, the surface should be treated with iron fluoride to suppress the release of gases. It is best to coat it thinly with aluminum oxide, chromium oxide, or similar materials.

[0356] The adsorbed material present in the transport chamber 2704 and each chamber is adsorbed to the inner walls, etc. This does not affect the pressure in the transport chamber 2704 and each chamber, however, the pressure in the transport chamber 2704 and each chamber This causes gas release when exhausting the chamber. Therefore, the leak rate and exhaust speed are related. Although there is no direct connection, a pump with high exhaust capacity is used to transport chamber 2704 and each chamber. It is important to remove as much of the adsorbed material as possible and to evacuate the system beforehand. To promote the desorption of adsorbed material, the transport chamber 2704 and each chamber may be baked. Baking can increase the desorption rate of adsorbed substances by about 10 times. The process should be carried out at a temperature between 100°C and 450°C. At this time, an inert gas is introduced into the transport chamber 2704. Furthermore, when adsorbed substances are removed while being introduced into each chamber, they are difficult to remove by exhaust alone. The desorption rate of water and other substances can be further increased. By heating it to a temperature similar to that of King, the desorption rate of adsorbed substances can be further increased. It is preferable to use a noble gas as the inert gas in this case.

[0357] Alternatively, by introducing an inert gas such as a heated noble gas or oxygen into the transport chamber 27 The pressure in 04 and each chamber is increased, and after a certain period of time, the transfer chamber 2704 and each It is preferable to perform a process to exhaust the chamber. By introducing heated gas into the conveying chamber 2704 And adsorbed material can be removed from each chamber, transport chamber 2704 and each chamber This process can reduce impurities present in the bar. Note that this process should be repeated between 2 and 30 times. It is more effective to repeat the procedure, preferably between 5 and 15 times. Specifically, warm An inert gas whose temperature is between 40°C and 400°C, preferably between 50°C and 200°C. By introducing oxygen, etc., the pressure inside the transport chamber 2704 and each chamber can be raised to 0.1 Pa or less. Above 10 kPa or less, preferably 1 Pa or more and 1 kPa or less, more preferably 5 Pa or more and 1 The pressure should be 00 Pa or less, and the period for maintaining the pressure should be 1 minute or more and 300 minutes or less, preferably 5 minutes or more and 120 minutes or less. It should be less than a minute. After that, transport chamber 2704 and each chamber should be kept for 5 minutes to 300 minutes. Preferably, exhaust the system for a period of 10 minutes to 120 minutes.

[0358] Next, the cross-sectional model of chambers 2706b and 2706c is shown in Figure 24. I will explain using a diagram.

[0359] Chambers 2706b and 2706c are, for example, used to apply microwaves to the workpiece. This is a chamber capable of performing processing. Note that chamber 2706b and chamber The only difference between this and the 2706c is the atmosphere used during microwave processing. Other configurations Since these points are common to all, they will be explained together below.

[0360] Chambers 2706b and 2706c are connected to slot antenna board 2808. It has a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Outside chambers 2706b and 2706c are the gas supply source 2801 and a valve The components include part 2802, a high-frequency generator 2803, a waveguide 2804, and a mode converter 2805. Gas tube 2806, waveguide 2807, matching box 2815, and high-frequency power supply 28 16, a vacuum pump 2817, and a valve 2818 are provided.

[0361] The high-frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to the slot antenna plate 2808 via the waveguide 2807. It continues. The slot antenna plate 2808 is positioned in contact with the dielectric plate 2809. Furthermore, the gas supply source 2801 is connected to the mode converter 2805 via the valve 2802. And the gas passes through the mode converter 2805, waveguide 2807 and dielectric plate 2809. Gas is supplied to chambers 2706b and 2706c via tube 2806. Furthermore, the vacuum pump 2817 is connected to the valve 2818 and exhaust port 2819. It has the function of exhausting gases, etc., from chamber 2706b and chamber 2706c. Furthermore, the high-frequency power supply 2816 is connected to the board holder 2812 via the matching box 2815. Connecting.

[0362] The substrate holder 2812 has the function of holding the substrate 2811. For example, substrate holder 2 812 has the function of electrostatically or mechanically chucking the substrate 2811. The substrate holder 2812 functions as an electrode that receives power from the high-frequency power supply 2816. It has. In addition, the substrate holder 2812 has a heating mechanism 2813 inside, and the substrate 2811 It has a heating function.

[0363] Vacuum pump 2817 can be used in various ways, such as dry pumps and mechanical booster pumps. Ion pumps, titanium sublimation pumps, cryopumps, or turbomolecular pumps These can be used. In addition, a cryotrap can be used in addition to the vacuum pump 2817. It is acceptable. Using a cryopump and cryotrap allows for efficient water exhaust. This is particularly preferable.

[0364] Furthermore, the heating mechanism 2813 may be a heating mechanism that uses, for example, a resistance heating element. Alternatively, by heat conduction or thermal radiation from a medium such as a heated gas, It may also be used as a heating mechanism. For example, GRTA (Gas Rapid Thermature) (Lamp Annealing) or LRTA (Lamp Rapid Thermal A RTA (Rapid Thermal Annealing) such as annealing This can be used. GRTA performs heat treatment using high-temperature gas. An inert gas is used.

[0365] Furthermore, the gas supply source 2801 is connected to the purifier via a mass flow controller. It is acceptable to use a gas with a dew point of -80°C or lower, preferably -100°C or lower. It is preferable to use oxygen gas, nitrogen gas, and noble gases (such as argon gas). Use it.

[0366] Examples of dielectric plates 2809 include silicon oxide (quartz) and aluminum oxide (aluminum oxide). Mina or yttrium oxide (yttria) can be used. Also, dielectric plate 28 Another protective layer may be formed on the surface of 09. The protective layer may be magnesium oxide. Zium, titanium dioxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, Dielectric plate: Silicon oxide, aluminum oxide, or yttrium oxide can be used. 2809 will be exposed to the particularly high-density region of the high-density plasma 2810, which will be described later. Therefore, damage can be mitigated by providing a protective layer. As a result, particles during processing This can suppress increases in the number of cases, etc.

[0367] The high-frequency generator 2803 can handle frequencies such as 0.3 GHz to 3.0 GHz, and 0.7 GHz. Generates microwaves between z and 1.1 GHz, or between 2.2 GHz and 2.8 GHz. It has the function of causing the microwaves generated by the high-frequency generator 2803 to be transmitted to the waveguide 2804. This is transmitted to the mode converter 2805 via [a certain method]. In the mode converter 2805, the TE mode is [a certain method]. The transmitted microwaves are converted to TEM mode. Then, the microwaves are transmitted through waveguide 280. It is transmitted to the slot antenna board 2808 via 7. The slot antenna board 2808 has multiple A slot hole is provided, and microwaves pass through the slot hole and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, and the high-density plasma 2810 It can be generated. The high-density plasma 2810 is supplied from the gas supply source 2801. Depending on the type of gas, ions and radicals exist. For example, oxygen radicals exist. ru.

[0368] At this time, the substrate 2811 is exposed to ions and radicals generated in the high-density plasma 2810. This allows for modification of films on substrate 2811. Furthermore, the high-frequency power supply 2816 It may be preferable to apply a bias to the substrate 2811 side using the high-frequency power supply 28 16 includes, for example, RF (Radio Frequency) with frequencies such as 13.56MHz and 27.12MHz. A high frequency power supply can be used. By applying a bias to the circuit board, Ions in density plasma 2810 can efficiently reach deep into openings such as films on substrate 2811. It can be achieved.

[0369] For example, in chamber 2706b or chamber 2706c, gas supply source 2801 or By introducing oxygen, oxygen radical treatment using high-density plasma 2810 can be performed. can.

[0370] Next, the cross-sectional model of chambers 2706a and 2706d is shown in Figure 25. I will explain using a diagram.

[0371] Chambers 2706a and 2706d are, for example, used to expose the workpiece to electromagnetic waves. This is a chamber capable of firing. Note that chamber 2706a and chamber 2 The only difference between the 706d and this model is the type of electromagnetic wave they use. Other components are the same. Since there is a lot of information, the following explanation will be summarized.

[0372] Chambers 2706a and 2706d are one or more lamps 2820 It also includes a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. Outside chambers 2706a and 2706d are a gas supply source 2821 and A valve 2822, a vacuum pump 2828, and a valve 2829 are provided.

[0373] The gas supply source 2821 is connected to the gas inlet 2823 via a valve 2822. The vacuum pump 2828 is connected to the exhaust port 2830 via valve 2829. 2820 is positioned opposite the board holder 2825. The board holder 2825 is It has the function of holding the substrate 2824. The substrate holder 2825 also has a heating mechanism inside. It has a component 2826 and a function to heat the substrate 2824.

[0374] Lamp 2820 emits electromagnetic waves such as infrared light, visible light, or ultraviolet light. A light source with the necessary functions can be used. For example, a light source with a wavelength of 10 nm to 2500 nm, 500 Electromagnetic waves having a peak between nm and 2000 nm, or between 40 nm and 340 nm. A light source that has the function of emitting light can be used.

[0375] For example, lamp 2820 could be a halogen lamp, a metal halide lamp, or a xenon lamp. Arc lamps, carbon arc lamps, high-pressure sodium lamps, or high-pressure mercury lamps, etc. You can use this light source.

[0376] For example, some or all of the electromagnetic waves emitted from lamp 2820 are transmitted to substrate 2824 By being absorbed, the film on the substrate 2824 can be modified. For example, the birth of defects It is possible to create or reduce impurities, or remove them. Note that while heating the substrate 2824 This process allows for efficient generation or reduction of defects, or removal of impurities.

[0377] Alternatively, for example, electromagnetic waves emitted from lamp 2820 may affect the substrate holder 2825 The circuit board 2824 may be heated by adding heat to the inside of the circuit board holder 2825. It is not necessary to have a thermal mechanism 2826.

[0378] For vacuum pump 2828, refer to the description for vacuum pump 2817. Also, heating machine Structure 2826 refers to the description of the heating mechanism 2813. Also, gas supply source 2821 See the description for gas source 2801.

[0379] By using the above manufacturing equipment, it is possible to suppress the contamination of the workpiece with impurities while modifying the film. This will become possible.

[0380] (Embodiment 2) In this embodiment, one form of a semiconductor device will be described with reference to Figures 26 to 29.

[0381] [Storage device 2] An example of a semiconductor device (memory device) according to one aspect of the present invention is shown in Figure 26.

[0382] <Example of memory device configuration> Figure 26 is a cross-sectional view of a semiconductor device having a memory device 290. Figure 26 is a cross-sectional view of a semiconductor device having a memory device 290. This corresponds to a cross-sectional view of the channel length direction of the inverter 200. The memory device 29 is shown in Figure 26. 0 is the transistor 20 shown in Figures 3A to 3D, as explained in <Example of semiconductor device configuration 2>. The semiconductor device having 0 and a capacitive element 292 has a different configuration of the conductor 240. Furthermore, the conductor 240 is connected to the conductor 242a, and the conductor 242a, oxide 24 Through 3a, oxide 230a, oxide 230b, insulator 224, and insulator 222 , connected to the conductor 166.

[0383] Furthermore, the semiconductor device shown in Figure 26 is configured to be the same as the semiconductor device described in the previous embodiment. Structures having the same function as the above structure shall be denoted with the same reference numeral. Furthermore, in this section as well, semiconductors The materials used to construct the device are those described in detail in the previous embodiment.

[0384] A wiring layer may be provided on the memory device 290. For example, in Figure 26, On the sta 200 and the capacitive element 292, there is an insulator 160 and an insulator as an interlayer film. 162 is provided. In addition, insulators 160 and 162 have transistor 2 A conductor 166 is embedded which is electrically connected to 00. Note that the conductor 166 is plug , or it functions as wiring.

[0385] Wiring layers may be provided on the insulator 162 and the conductor 166. For example, as shown in Figure 26 In this, insulators 163 and 164 are provided. Also, insulator 163, A conductor 168 is embedded in the insulator 164. The conductor 168 is in the plug, It functions as wiring.

[0386] It is preferable to use insulators 162 and 164 that have a low relative permittivity. For example, insulators 162 and 164 can be used in insulators 280, etc. Any suitable insulator should be used.

[0387] Insulators 160 and 163 are designed to suppress the permeation of impurities such as hydrogen and oxygen. An insulator having the function of [doing something] should be used. For example, insulator 160 and insulator 163 Any insulator that can be used as an insulator 283 or the like is acceptable.

[0388] The above memory device 290 may also be configured in a stacked configuration. Figure 27 shows the memory device A cross-sectional view of a configuration in which five layers of chair 290 are stacked is shown. As shown in Figure 27, memory device 2 90 connects to different memory devices 290 via conductors 240 and 166. Connect electrically.

[0389] As shown in Figure 27, there are multiple memory devices (memory devices 290_1 to The Mori device 290_5) may be enclosed and sealed with insulator 284 and insulator 214. By packaging multiple memory devices together, the process can be simplified. Furthermore, some of the structures constituting transistor 200, and the surrounding area of ​​transistor 200 are provided. By depositing a part of the structure using the sputtering method, transistor 200 The hydrogen concentration can be lowered. Therefore, above transistor 200, different transistors Even when fabricating transistor 200, the hydrogen concentration of transistor 200 located below The degree can be kept low. Therefore, in a configuration in which the memory devices 290 are stacked... In addition, multiple memory devices can be sealed together without individually sealing the memory device 290. By stopping this process, the hydrogen concentration in transistor 200 can be lowered.

[0390] Furthermore, sealing multiple memory devices with insulators 284 and 214 is performed by multiple memory devices. This can be done by encompassing all Mori devices, or by encompassing them one by one.

[0391] Note that multiple memory devices 290 may be arranged in the direction of the channel length, or the channels They may be arranged in a line along the width direction, or in a matrix arrangement. Also, depending on the design Furthermore, they may be arranged without any particular pattern.

[0392] Furthermore, when the same material is used for insulator 214 and insulator 282, insulator 214 and insulator 282 Either of the edge members 282 does not need to be provided. This reduces the number of steps. Cut.

[0393] As shown in Figure 27, multiple memory devices (memory device 290_1 to memory device By stacking Vice 290_5), without increasing the occupied area of ​​the memory device This allows for the integration and arrangement of memory devices. In other words, it allows for the configuration of a 3D memory device. It is possible.

[0394] Note that Figure 27 illustrates a configuration in which each layer has one memory device, but this is not limited to this configuration. It is not possible to do this. Each layer may contain multiple memory devices, and multiple memos The redevices may be arranged in the direction of the channel length or in the direction of the channel width. They may also be arranged in a matrix. Furthermore, depending on the design, they may not follow any regularity. It's fine if it's placed there.

[0395] <Examples of memory devices> Below, using Figures 28A, 28B, and 29, we will explain the configuration of the memory device mentioned above. A transistor 200 and a capacitance element according to one aspect of the present invention, which differ from those shown in the example >. An example of a semiconductor device having child 292 will be described. See Figures 28A, 28B, and In the semiconductor device shown in Figure 29, the semiconductor device shown in the previous embodiment and Figure 26 is constructed Structures having the same function as the structure being constructed shall be denoted with the same symbol. In this section, The constituent materials of the inverter 200 and the capacitive element 292 are as described in the previous embodiment and the previous The materials described in detail in the <Examples of Memory Device Configurations> can be used.

[0396] <<Differential Example of Memory Device 1>> Below, an example of a semiconductor device having a memory device 600 is shown in Figure 28A and Figure 28A. Let's explain using 28B. Memory device 600 is transistor 200a, transistor It has a 200b element, a 292a capacitive element, and a 292b capacitive element.

[0397] Figure 28A is a top view of a semiconductor device having a memory device 600. Also, Figure 28 B is a cross-sectional view of the area shown by the dashed line A1-A2 in Figure 28A, and transistor 200 Figure 28A is also a cross-sectional view of transistor a and transistor 200b in the channel length direction. In the top view, some elements have been omitted for clarity.

[0398] As shown in Figure 28B, the memory device 600 has a dashed line from A3 to A4 as its axis of symmetry. It has a line-symmetric configuration. The source electrode or drain electrode of transistor 200a One side and the other side of the source or drain electrode of transistor 200b are connected by conductor 242 The configuration includes both functions. Furthermore, it is electrically connected to transistor 200a, and the plug and It functions as a conductor, electrically connected to transistor 200b, and acts as a plug. The conductor is configured to also function as the conductor 240c. In this way, two transistors By using the above configuration for the connection between the two capacitive devices and the wiring and plug, miniaturization is achieved. Alternatively, it is possible to provide semiconductor devices that enable high integration.

[0399] Transistor 200a, transistor 200b, capacitive element 292a, and capacitive element 2 The respective components and effects of 92b are shown in Figures 3A to 3D and Figure 26. Examples of semiconductor device configurations can be considered.

[0400] <<Modified Memory Device 2>> Figure 29 shows that the memory unit 470 has a transistor layer 4 with transistor 200T. 13 and the 4-layer memory device layer 415 (memory device layer 415_1 or memory device An example having a layer 415_4) is shown.

[0401] Memory device layers 415_1 through 415_4 each contain multiple memory It has a memory device 420. The memory device 420 includes, for example, the memory device shown in Figure 26. Use vise 290, or memory device 600 shown in Figures 28A and 28B. It is possible.

[0402] The memory device 420 has different memory via the conductors 424 and 166. The memory device 420 of the device layer 415 and the transistor layer 413 Connect electrically to transistor 200T.

[0403] The memory unit 470 consists of insulators 212, 214, 282, and 284. , and sealed by insulator 283 (for convenience, referred to as the sealing structure below). Insulator An insulator 274 is provided around 283. In addition, insulator 274, insulator 212, and A conductor 440 is provided on the insulator 214, and it is electrically connected to the element layer 411.

[0404] Furthermore, insulators 212 and 283 have a function that provides high blocking properties against hydrogen. It is preferable that the material has the following properties. In addition, the insulator 214 and the insulator 282 contain hydrogen It is preferable that the material has the function of capturing or fixing hydrogen.

[0405] For example, materials that have high blocking properties for hydrogen include silicon nitride. Alternatively, silicon nitride and the like are examples. Furthermore, the above hydrogen capture or hydrogen fixation Materials having the function of aluminum oxide, hafnium oxide, and aluminum Examples include hafnium-containing oxides (hafnium aluminate).

[0406] The materials used for insulators 212, 214, 282, and 283 There are no particular limitations on the crystal structure, but it can be amorphous or crystalline. For example, as a material that has the function of capturing or fixing hydrogen, amorphous oxide Aluminum films are preferable. Amorphous aluminum oxide is preferable to highly crystalline aluminum oxide. In some cases, it can capture and solidify hydrogen in greater quantities than aluminum.

[0407] Furthermore, an insulator 280 is provided inside the sealing structure. The insulator 280 is heated It has the function of releasing oxygen. Alternatively, the insulator 280 has an excess oxygen region.

[0408] Here, the excess oxygen in the insulator 280 is replaced by hydrogen in the oxide semiconductor in contact with the insulator 280. The following model can be considered for diffusion.

[0409] Hydrogen present in the oxide semiconductor can be transmitted to other materials via the insulator 280 in contact with the oxide semiconductor. It diffuses into the structure. This hydrogen diffusion occurs when excess oxygen in the insulator 280 is absorbed into the oxide semiconductor. It reacts with hydrogen to form an OH bond and diffuses through the insulator 280. The hydrogen atom having an OH bond , a material having the function of capturing or fixing hydrogen (typically an insulator 282) Upon arrival, the hydrogen atom bonded with an atom in the insulator 282 (for example, a metal atom) in the acid. It reacts with elementary atoms and is captured or fixed in insulator 282. On the other hand, it has an OH bond. It is presumed that the excess oxygen atoms remain in the insulator 280 as excess oxygen. In the diffusion of hydrogen, there is a high probability that the excess oxygen in the insulator 280 plays a bridging role. expensive.

[0410] To satisfy the above model, the semiconductor device manufacturing process is one of the important elements. .

[0411] As an example, an insulator 280 having excess oxygen is formed on an oxide semiconductor, and then insulation Form body 282. After that, it is preferable to perform a heat treatment. This heat treatment is performed on the material Physically, in an atmosphere containing oxygen, an atmosphere containing nitrogen, or a mixed atmosphere of oxygen and nitrogen, The process should be carried out at a temperature of 350°C or higher, preferably 400°C or higher. The heat treatment time should be 1 hour or more. Preferably, it should be 4 hours or more, and more preferably 8 hours or more.

[0412] As a result of the above heat treatment, hydrogen in the oxide semiconductor is released into insulator 280 and insulator 28 It can diffuse outward through 2. In other words, oxide semiconductors, and said oxide semiconductors This can reduce the absolute amount of hydrogen present in the vicinity of the body.

[0413] After the above heat treatment, an insulator 284 is formed. The insulator 284 blocks hydrogen. Because it is a material with high king properties, hydrogen diffused outward, or present in the outside The hydrogen is prevented from entering the interior, specifically the oxide semiconductor or the insulator 280 side. It can be controlled.

[0414] Regarding the above heat treatment, the configuration performed after the formation of the insulator 282 is as follows: The examples given are not limited to these. For example, after the formation of the transistor layer 413, or note After the formation of the redevice layer 415_1 to the memory device layer 415_3, the above heating is performed on each of them. Processing may be performed. Also, when diffusing hydrogen outward by the above heat treatment, Hydrogen diffuses upward or laterally from the lunger layer 413. Similarly, the memory device layer When heat treatment is performed after the formation of 415_1 or the memory device layer 415_3, water The element is diffused upwards or sideways.

[0415] Furthermore, by using the above manufacturing process, the insulator 214 and the insulator 284 are bonded together. This process forms the aforementioned sealing structure.

[0416] As described above, by using the above structure and manufacturing process, the hydrogen concentration is reduced. A semiconductor device using a specified oxide semiconductor can be provided. For example, transistor 2 Oxide 230b, contained in 00T or memory device 420, is obtained by SIMS. The hydrogen concentration that can be achieved is 1 × 10 20 atoms / cm 3 Less than 1 × 10 19 at oms / cm 3 It has a region that is less than [a certain value].

[0417] Based on the above, a semiconductor device with good reliability can be provided. Furthermore, one aspect of the present invention This makes it possible to provide a semiconductor device with good electrical characteristics.

[0418] The configurations, methods, etc. shown in this embodiment may differ from the configurations, structures, methods, etc. shown in other embodiments. They can be used in combination as appropriate.

[0419] (Embodiment 3) In this embodiment, the present invention is described using Figures 30A, 30B, and 31A to 31C. A transistor using an oxide as a semiconductor, according to one aspect of this invention (hereinafter referred to as an OS transistor) In some cases, ), and storage devices to which capacitive elements are applied (hereinafter referred to as OS memory devices) This may be the case.) The OS memory device has at least a capacitive element and a capacitive element This is a memory device that has an OS transistor that controls the charging and discharging of the device. Because the current is extremely small, the OS memory device has excellent retention characteristics and is a non-volatile memory. It can be made to function.

[0420] <Example of storage device configuration> Figure 30A shows an example of the configuration of the OS memory device. The storage device 1400 is connected to peripheral circuit 141 1, and a memory cell array 1470. Peripheral circuit 1411 is a row circuit 1420, It has a column circuit 1430, an output circuit 1440, and a control logic circuit 1460. .

[0421] The column circuit 1430 includes, for example, a column decoder, a pre-charge circuit, a sense amplifier, and a programming circuit. It has circuits, etc. The precharge circuit has the function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. The lines are wiring connected to memory cells in the memory cell array 1470, and more details The details will be explained later. The amplified data signal is sent via the output circuit 1440 to the data signal RDA. The TA is output to the outside of the storage device 1400. Also, the row circuit 1420 is, for example, row It has a decoder, a word line driver circuit, etc., and can select the row to access.

[0422] The storage device 1400 receives a low power supply voltage (VSS) from an external source as the power supply voltage, and peripheral circuits 14 The high power supply voltage (VDD) for 11 and the high power supply voltage (VIL) for the memory cell array 1470 are It is supplied. In addition, the storage device 1400 contains control signals (CE, WE, RE) and address signals. The address signal ADDR and the data signal WDATA are input from an external source. The address signal ADDR is the line The data signal WDATA is input to the decoder and column decoder, and then input to the writing circuit. ru.

[0423] The control logic circuit 1460 receives externally input control signals (CE, WE, R Process E) to generate control signals for the row decoder and column decoder. The control signal CE is a chip The write enable signal is the control signal R E is the read enable signal. The signal processed by the control logic circuit 1460 The signal is not limited to this; other control signals can be input as needed.

[0424] The memory cell array 1470 consists of multiple memory cells MC arranged in a matrix, and multiple It has the wiring. Note that the wiring connecting the memory cell array 1470 and the row circuit 1420 The number of lines is determined by the configuration of the memory cell MC, the number of memory cell MCs in a single row, and other factors. Also, the number of wires connecting the memory cell array 1470 and the column circuit 1430 is noted. This is determined by factors such as the configuration of the recell MC and the number of memory cell MCs in each row.

[0425] In Figure 30A, the peripheral circuit 1411 and the memory cell array 1470 are on the same plane. Although examples of how to form it have been shown, this embodiment is not limited to this. For example, As shown in Figure 30B, the memory cell array 1470 is superimposed on a portion of the peripheral circuit 1411. It may be provided in such a way. For example, so as to overlap below the memory cell array 1470, A configuration that includes a sense amplifier is also possible.

[0426] Figures 31A to 31C show examples of memory cell configurations applicable to the above-mentioned memory cell MC. I will explain.

[0427] [DOSRAM] Figures 31A to 31C show examples of circuit configurations for DRAM memory cells. And, DRAM using a 1OS transistor 1 capacitance element type memory cell is called DOSRAM. (Dynamic Oxide Semiconductor Random Acce It is sometimes called ss Memory. As shown in Figure 31A, memory cell 1471 is a tra It has a transistor M1 and a capacitive element CA. Note that the transistor M1 has a gate (top It has a front gate (sometimes called a back gate) and a back gate.

[0428] The first terminal of transistor M1 is connected to the first terminal of capacitive element CA, and transistor M The second terminal of 1 is connected to wiring BIL, and the gate of transistor M1 is connected to wiring WOL. Next, the back gate of transistor M1 is connected to wiring BGL. Capacitive element C The second terminal of A is connected to wiring CAL.

[0429] Wiring BIL functions as a bit line, and wiring WOL functions as a word line. CAL functions as wiring for applying a predetermined potential to the second terminal of the capacitive element CA. During data writing and reading, wiring LL is at ground potential, but also low-level electrical currents. It can also be used as a position. Wiring BGL is to apply potential to the back gate of transistor M1. It functions as wiring. By applying an arbitrary potential to wiring BGL, the transistor The threshold voltage of M1 can be increased or decreased.

[0430] Here, the memory cell 1471 shown in Figure 31A corresponds to the storage device shown in Figure 26. In other words, transistor M1 becomes transistor 200, and capacitive element CA becomes capacitive element 292. It is compatible.

[0431] Furthermore, the memory cell MC is not limited to memory cell 1471, and the circuit configuration can be changed. This is possible. For example, a memory cell MC can be a memory cell 1472 as shown in Figure 31B. The back gate of transistor M1 is connected to the WOL wiring instead of the BGL wiring. It is also possible to do so. For example, the memory cell MC is like the memory cell 1473 shown in Figure 31C. In addition, a single-gate transistor, that is, a transistor without a back gate, M It may also be a memory cell composed of 1.

[0432] When the semiconductor device shown in the above embodiment is used as a memory cell 1471, etc., a transistor Transistor 200 is used as M1, and capacitive element 292 is used as capacitive element CA. This can be done. By using an OS transistor as transistor M1, the transistor The leakage current of the M1 can be made very small. In other words, the written data can be transmitted via Because it can be retained for a long time by the M1 converter, the frequency of memory cell refresh is reduced. The degree can be reduced. Also, it eliminates the need for memory cell refresh operations. Yes, it is possible. Also, because the leakage current is very small, memory cell 1471 and memory cell 147 2. The memory cell 1473 can hold multi-level data or analog data. ru.

[0433] Furthermore, in DOSRAM, as described above, overlaps below the memory cell array 1470 As shown, by using a configuration that includes a sense amplifier, the bit line can be shortened. This reduces the bit line capacitance and thus the memory cell retention capacity.

[0434] The configuration of the peripheral circuit 1411, memory cell array 1470, etc., as shown in this embodiment is , but not limited to, these circuits, and the wiring connected to them. The arrangement or function of path elements, etc., may be changed, deleted, or added as necessary.

[0435] Generally, semiconductor devices such as computers use various types of storage devices (memory) depending on the application. This is used. Figure 32 shows various storage devices in order of hierarchy. Storage devices located in the upper layers Extremely fast access speeds are required, and lower-level memory devices have larger storage capacities and higher recording capabilities. The density can be determined. In Figure 32, starting from the top layer, the arithmetic processing units such as the CPU have registers. Memory that is mixed in as such, SRAM (Static Random Access Memory) mory), DRAM (Dynamic Random Access Memory) This indicates 3D NAND memory.

[0436] Memory embedded as registers in processing units such as CPUs is used for temporary storage of calculation results. Because it is used in such applications, it is frequently accessed by the processing unit. Therefore, rather than memory capacity... Fast operating speed is required. Also, registers hold configuration information for the arithmetic processing unit. It also has functions.

[0437] SRAM is used, for example, as a cache. The cache is held in main memory. It has the function of duplicating and storing some of the information it holds. Frequently used data is cached. By creating a copy, you can increase the speed of data access.

[0438] DRAM is used, for example, in main memory. Main memory reads from storage. It has the function of retaining the programs and data that are released. The recording density of DRAM is approximately 0.1~0.3Gbit / mm 2 That is the case.

[0439] 3D NAND memory is used, for example, in storage. Storage is for long-term storage. It has the function of holding necessary data and various programs used by the processing unit. Therefore, storage requires a large storage capacity and high recording density rather than just high operating speed. The recording density of storage devices used for storage is approximately 0.6 to 6.0 Gbit / m². m 2 That is the case.

[0440] A storage device according to one aspect of the present invention has a high operating speed and can retain data for a long period of time. A storage device according to one aspect of the invention has a hierarchy in which the cache is located and a hierarchy in which the main memory is located. It can be suitably used as a storage device located in the boundary region 901 which includes both. A storage device according to one aspect of the present invention comprises a hierarchical layer in which the main memory is located and a hierarchical layer in which the storage is located. It can be suitably used as a storage device located in the boundary region 902 which includes both of the above.

[0441] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. It is possible.

[0442] (Embodiment 4) In this embodiment, the semiconductor device of the present invention is mounted using Figures 33A and 33B. An example of chip 1200 is shown. Multiple circuits (systems) are mounted on chip 1200. This technology integrates multiple circuits (systems) onto a single chip. It is sometimes called a System on Chip (SoC).

[0443] As shown in Figure 33A, the chip 1200 consists of a CPU 1211, a GPU 1212, and It consists of multiple analog processing units 1213, one or more memory controllers 1214, and It has multiple interfaces 1215, one or more network circuits 1216, etc. ru.

[0444] The chip 1200 is provided with bumps (not shown), and as shown in Figure 33B, pre The first side of the Printed Circuit Board (PCB) 1201 It connects to this. In addition, multiple bumps 1202 are provided on the back surface of the first face of PCB1201. It is configured to connect to the motherboard 1203.

[0445] Motherboard 1203 includes memory devices such as DRAM 1221 and flash memory 1222. A place may be provided. For example, the DOSR shown in the previous embodiment may be placed in the DRAM1221. AM can be used. Also, for example, in the flash memory 1222, the above embodiment The NOSRAM shown can be used.

[0446] CPU1211 preferably has multiple CPU cores. Also, GPU1212 It is preferable that it has multiple GPU cores. Also, CPU1211 and GPU1 Each of 212 may have memory to temporarily store data. Or, CP The memory common to both U1211 and GPU1212 is provided on chip 1200. This is also acceptable. The aforementioned DOSRAM can be used for this memory. Also, GPU12 12 is suitable for parallel computation of large amounts of data and can be used for image processing and multiply-accumulate operations. The GPU1212 is equipped with an image processing circuit and a multiply-accumulate circuit using the oxide semiconductor of the present invention. By implementing this, image processing and multiply-accumulate operations can be performed with low power consumption.

[0447] Furthermore, because the CPU1211 and GPU1212 are located on the same chip, The wiring between CPU1211 and GPU1212 can be shortened, and CPU1211 or Data transfer to GPU1212, and notes held by CPU1211 and GPU1212. Data transfer between the two systems, and after calculations on GPU1212, data transfer from GPU1212 to CPU12 The transfer of calculation results to 11 can be done at high speed.

[0448] The analog processing unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital / digital) conversion circuit. It has one or both of the digital / analog conversion circuits. Also, analog arithmetic unit 1213 The above-mentioned sum-of-accumulate circuit may be provided.

[0449] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. It also has a circuit that functions as an interface for the flash memory 1222.

[0450] Interface 1215 is for display devices, speakers, microphones, cameras, and controllers. It has an interface circuit for connecting to external devices such as a torpedo. A controller is a motor This includes mice, keyboards, game controllers, etc. USB (Universal Serial Bus), HDMI (registered trademark) (H (using igh-Definition Multimedia Interface, etc.) It is possible to be there.

[0451] The network circuit 1216 is a LAN (Local Area Network), etc. It has a network circuit. It may also have a circuit for network security. stomach.

[0452] The above circuit (system) can be formed on chip 1200 using the same manufacturing process. It is possible. Therefore, even if the number of circuits required for chip 1200 increases, the manufacturing process does not need to be increased. This eliminates the need for additional processing, allowing for the low-cost manufacturing of the Chip 1200.

[0453] PCB1201 equipped with chip 1200 having GPU1212, DRAM122 1, and the motherboard 1203 equipped with flash memory 1222, GPU module It can be called Lure 1204.

[0454] The GPU module 1204 has a chip 1200 that uses SoC technology, Its size can be reduced. Also, because it excels at image processing, smart Phones, tablet devices, laptop PCs, portable (take-out) game consoles, etc. It is suitable for use in portable electronic devices. Also, a multiply-accumulate circuit using the GPU1212. This leads to the development of deep neural networks (DNNs) and convolutional neural networks. (CNN), Recurrent Neural Network (RNN), Autoencoder, Deep Boltzmann It is possible to implement techniques such as machine learning models (DBM) and deep belief networks (DBN). Therefore, the chip 1200 is the AI ​​chip, or the GPU module 1204 is the AI ​​system module. It can be used as a joule.

[0455] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. It is possible.

[0456] (Embodiment 5) This embodiment is an electronic component and electrical device incorporating the storage device shown in the above embodiment. An example of a sub-device is shown.

[0457] <Electronic Components> First, using Figures 34A and 34B, we will show an example of an electronic component incorporating the memory device 720. Then I will give the explanation.

[0458] Figure 34A shows the electronic component 700 and the circuit board (mounted circuit board 704) on which the electronic component 700 is mounted. A perspective view is shown. The electronic component 700 shown in Figure 34A is contained within the mold 711 and the memory device 720. It has. Figure 34A is partially omitted to show the inside of the electronic component 700. The electronic component 700 has a land 712 outside the mold 711. The land 712 is an electrode. The electrode pad 713 is electrically connected to the memory device 720 and the wire 714. Therefore, they are electrically connected. The electronic component 700 is mounted, for example, on a printed circuit board 702. Multiple such electronic components are combined, and each is powered on the printed circuit board 702. The mounting board 704 is completed by connecting the components electrically.

[0459] The storage device 720 includes a drive circuit layer 721 and a storage circuit layer 722.

[0460] Figure 34B shows a perspective view of electronic component 730. Electronic component 730 is a SiP (System Integrity Packaging). An example of an in-package (or MCM - Multi-Chip Module) The electronic component 730 is an interposer on the package substrate 732 (printed circuit board). A 731 is provided, and a semiconductor device 735 and multiple storage devices are mounted on the interposer 731. 720 is provided.

[0461] In electronic component 730, the storage device 720 is a high-bandwidth memory (HBM: High Bandwidth This shows an example of its use as (thread memory). Also, semiconductor device 735 is C Integrated circuits (semiconductor devices) such as PUs, GPUs, and FPGAs can be used.

[0462] The package substrate 732 is a ceramic substrate, plastic substrate, glass epoxy substrate, etc. These can be used. Interposer 731 is a silicone interposer, resin interposer. A tarpaulin or similar device can be used.

[0463] The interposer 731 has multiple wirings and powers multiple integrated circuits with different terminal pitches. It has the function of connecting electrically. Multiple wires are provided in single layer or multi-layer configuration. Also, The interposer 731 packages the integrated circuit provided on the interposer 731 to the package substrate 7 It has the function of electrically connecting to the electrode provided at 32. Interposer is sometimes called a "redistribution board" or "intermediate board." Also, interposer 73 A through electrode is provided in 1, and the integrated circuit and the package substrate 732 are electrically connected using the through electrode. In some cases, it may be connected to a silicon interposer. Also, in silicon interposers, TSVs are used as through electrodes. It is also possible to use (through silicon vias).

[0464] It is preferable to use a silicon interposer as the interposer 731. Because interposers do not require active elements, they can be manufactured at a lower cost than integrated circuits. This is possible. On the other hand, the wiring of the silicon interposer is formed using a semiconductor process. Because this allows for the formation of fine wiring, which is difficult with resin interposers, it is easy.

[0465] In HBM, many wires need to be connected to achieve a wide memory bandwidth. Therefore, interposers that implement HBM require the formation of fine and high-density wiring. Therefore, a silicon interposer is used for the interposer that implements HBM. This is preferable.

[0466] Furthermore, in SiP and MCM using silicon interposers, integrated circuits and interposers are used. Reliability degradation due to differences in expansion coefficients between posers is less likely to occur. Also, silicon interpolation Because the silicon interposer has high surface flatness, integrated circuits and silicon are placed on the silicon interposer. Connection failures between interposers are less likely to occur. In particular, when multiple integrated circuits are placed on the interposer... In 2.5D packages (2.5-dimensional packaging) where components are arranged side by side, silicon interpolation It is preferable to use "za".

[0467] Alternatively, a heat sink (heat dissipation plate) may be provided in conjunction with the electronic component 730. If a configuration is provided, it is preferable to align the heights of the integrated circuits provided on the interposer 731. For example, in the electronic component 730 shown in this embodiment, the storage device 720 and the semiconductor device 73 It is preferable to make the heights of 5 the same.

[0468] To mount the electronic component 730 onto another substrate, an electrode 733 is placed at the bottom of the package substrate 732. It may be provided. Figure 34B shows an example in which electrode 733 is formed with solder balls. By arranging solder balls in a matrix pattern at the bottom of the package substrate 732, BGA (Bal This enables the implementation of a grid array. Furthermore, electrodes 733 are formed with conductive pins. This may be done by providing conductive pins in a matrix pattern on the bottom of the package substrate 732. This enables the implementation of PGA (Pin Grid Array).

[0469] The electronic component 730 can be mounted on other boards using various mounting methods, not limited to BGA and PGA. It can be installed. For example, SPGA (Staggered Pin Grid Ar ray), LGA (Land Grid Array), QFP (Quad Flat Package), QFJ(Quad Flat J-leaded package) , or QFN (Quad Flat Non-leaded package), etc. Implementation methods can be used.

[0470] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. This is possible.

[0471] (Embodiment 6) In this embodiment, regarding the application example of a memory device using the semiconductor device shown in the previous embodiment, Let me explain. The semiconductor device shown in the above embodiment is, for example, used in various electronic devices (for example, information Terminals, computers, smartphones, e-readers, digital cameras (including video cameras) This can be applied to storage devices (including recording and playback devices, navigation systems, etc.). In this context, a computer refers to a tablet computer, a notebook computer, a digital computer, etc. This includes not only desktop computers but also large computers such as server systems. Alternatively, the semiconductor device shown in the above embodiment may contain a memory card (for example, an SD card). Various removable devices such as USB memory sticks, SSDs (Solid State Drives), etc. This applies to removable storage devices. Figures 35A to 35E show several configurations of removable storage devices. An example is schematically shown. For example, the semiconductor device shown in the above embodiment is packaged It is processed into memory chips and used in various storage devices and removable memory.

[0472] Figure 35A is a schematic diagram of a USB memory device. The USB memory device 1100 consists of a casing 1101 and a key It has a cap 1102, a USB connector 1103 and a circuit board 1104. The circuit board 1104 is , housed in the casing 1101. For example, the circuit board 1104 has a memory chip 1105, A controller chip 1106 is installed. The memory chip 1105 and other components are installed as described above. The semiconductor device shown in the form of the installation can be incorporated.

[0473] Figure 35B is a schematic diagram of the external appearance of an SD card, and Figure 35C is a schematic diagram of the internal structure of an SD card. This is a diagram of the equation. The SD card 1110 consists of a housing 1111, a connector 1112, and a circuit board 111. It has 3. The circuit board 1113 is housed in the housing 1111. For example, the circuit board 1113 has A memory chip 1114 and a controller chip 1115 are mounted on the circuit board 11. By also providing a memory chip 1114 on the back side of 13, the capacity of the SD card 1110 can be increased. It is possible to do so. Furthermore, a wireless chip with wireless communication functionality may be provided on the circuit board 1113. Yes. This allows the memory chip to be controlled wirelessly between the host device and the SD card 1110. This enables reading and writing of data to the 1114. A semiconductor device as shown in the embodiment can be incorporated.

[0474] Figure 35D is a schematic diagram of the external appearance of the SSD, and Figure 35E is a schematic diagram of the internal structure of the SSD. The SSD1150 has a housing 1151, a connector 1152, and a circuit board 1153. The circuit board 1153 is housed in the casing 1151. For example, the circuit board 1153 has memory chips. The chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is the work memory of the controller chip 1156, for example D An OSRAM chip can be used. A memory chip 1154 is also provided on the back side of the circuit board 1153. By doing so, the capacity of the SSD1150 can be increased. (This can be done using memory chips 1154, etc.) The semiconductor device shown in the previous embodiment can be incorporated.

[0475] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. This is possible.

[0476] (Embodiment 7) A semiconductor device according to one aspect of the present invention includes a processor such as a CPU or GPU, or a chip. It can be used for the following. Figures 36A to 36H show a CPU and GPU according to one aspect of the present invention. This section provides specific examples of electronic devices equipped with such processors or chips.

[0477] <Electronic Equipment and Systems> A GPU or chip according to one aspect of the present invention can be mounted in various electronic devices. Examples of electronic devices include, for example, television equipment, desktop or notebook computers. Monitors for information terminals, digital signage (electronic signage) In addition to electronic devices with relatively large screens, such as billboards, pachinko machines and other large game machines, Digital cameras, digital video cameras, digital photo frames, e-book readers Examples include mobile phones, portable game consoles, personal digital assistants, and audio playback devices. Furthermore, by providing a GPU or chip according to one aspect of the present invention in an electronic device, It can be equipped with artificial intelligence.

[0478] An electronic device according to one aspect of the present invention may have an antenna. The antenna receives a signal. This allows the display unit to show images, information, etc. Also, the electronic device acts as an antenna. Furthermore, if a secondary battery is present, the antenna may be used for contactless power transmission.

[0479] An electronic device according to one aspect of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation). Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power (including functions for measuring radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation) It is acceptable to have it.

[0480] An electronic device according to one aspect of the present invention can have various functions. For example, various information Functions to display (still images, videos, text images, etc.) on the display unit, touch panel function, calendar Functions to display the date or time, and to run various software (programs). Functions include: wireless communication, and reading programs or data recorded on a recording medium. It can have functions, etc. Figures 36A to 36H show examples of electronic devices.

[0481] [Information terminal] Figure 36A illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5100 has a housing 5101 and a display unit 5102, and an input interface - As a face, a touch panel is provided on the display unit 5102, and buttons are located on the housing 5101. It is provided.

[0482] The information terminal 5100 utilizes artificial intelligence by applying a chip according to one embodiment of the present invention. The application can be run. As an application utilizing artificial intelligence. For example, an application that recognizes a conversation and displays the content of that conversation on the display unit 5102. The display unit 5102 recognizes characters, shapes, etc., entered by the user on the touch panel. The application to be displayed on the display unit 5102, and the biometric authentication such as fingerprints and voiceprints are performed. Applications are one example.

[0483] Figure 36B shows a notebook-type information terminal 5200. Notebook-type information terminal 520 0 comprises an information terminal body 5201, a display unit 5202, and a keyboard 5203. .

[0484] Notebook-type information terminal 5200, like the information terminal 5100 described above, is one embodiment of the present invention. By applying the chip, it becomes possible to run applications that utilize artificial intelligence. Examples of applications utilizing artificial intelligence include design support software and text Examples include editing software and automatic menu generation software. Also, notebook-type information terminals... By using the 5200 chip, it is possible to develop new artificial intelligence.

[0485] In the above, smartphones and notebook computers were used as examples of electronic devices. As illustrated in Figures 36A and 36B, these are smartphones and notebook computers, respectively. Other information terminals can be used. (Smartphones and notebook computers are exceptions.) Examples of information terminals include PDAs (Personal Digital Assistants). Examples include tants, desktop information terminals, and workstations.

[0486] [Game console] Figure 36C shows a portable game console 5300, which is an example of a game console. 5300 consists of casing 5301, casing 5302, casing 5303, display unit 5304, and connection unit 53 05, it has an operation key 5306, etc. Housing 5302 and housing 5303 are housing 530 It can be removed from 1. The connection part 5305 provided on the housing 5301 can be connected to another By mounting it to a housing (not shown), the video output to the display unit 5304 can be displayed on another video device. The output can be sent to a device (not shown). At this time, housing 5302 and housing 5303 Each of these can function as a control unit. This allows multiple players to play simultaneously. The game can be played using the circuit boards of cabinets 5301, 5302, and 5303. The chip shown in the above embodiment can be incorporated into the chip provided therein.

[0487] Figure 36D also shows a home console, model 5400, which is an example of a game console. The 5400 home console can be connected to a controller 5402 either wirelessly or via a wired connection. Yes, they are.

[0488] One aspect of the present invention applies to game consoles such as the portable game console 5300 and the home game console 5400. By applying a GPU or chip, it is possible to create a low-power gaming console. Yes, it is possible. Furthermore, the low power consumption reduces heat generation from the circuit, thus reducing heat generation. This minimizes the impact on the circuit itself, surrounding circuits, and modules.

[0489] Furthermore, applying a GPU or chip according to one aspect of the present invention to a portable game console 5300... Therefore, it is possible to realize the 5300 portable game console equipped with artificial intelligence.

[0490] Originally, the progression of the game, the behavior of creatures appearing in the game, and the phenomena that occur in the game, etc. The expression is determined by the program of the game, but the portable game console 530 By applying artificial intelligence to 0, it becomes possible to create expressions that are not limited to game programs. For example, the questions the player asks, the game's progress, the time, and the characters that appear in the game. This allows for expressions that describe a change in a person's words and actions.

[0491] Furthermore, when playing games that require multiple players on the 5300 handheld game console, artificial intelligence is used. This allows for the creation of anthropomorphic game players, thus enabling the opponent to be represented by artificial intelligence. By making it a night game, it's possible to play the game even by yourself.

[0492] Figures 36C and 36D show examples of game consoles, including a handheld game console and a home console. Although a machine is shown in the illustration, a game machine to which a GPU or chip according to one aspect of the present invention is applied is this The invention is not limited to the above. Examples of game machines to which a GPU or chip according to one aspect of the present invention is applied include: For example, arcade game machines installed in entertainment facilities (game centers, amusement parks, etc.) Examples include pitching machines for batting practice installed in sports facilities.

[0493] [Large computer] A GPU or chip according to one aspect of the present invention can be applied to a large computer.

[0494] Figure 36E shows the Supercomputer 5500, an example of a large-scale computer. Figure 36F shows the rack-mount type computer of the Supercomputer 5500. This is a diagram of 5502.

[0495] The supercomputer 5500 consists of rack 5501 and multiple rack-mount computing devices. It has a machine 5502. Note that multiple computers 5502 are stored in a rack 5501. In addition, the computer 5502 is provided with multiple circuit boards 5504, and the above-mentioned actual It can be equipped with the GPU or chip described in the configuration.

[0496] The Supercomputer 5500 is a large computer primarily used for scientific and technical calculations. Yes. Scientific and technical computing requires high-speed processing of enormous calculations, so power consumption is high. The chip generates a lot of heat. A GPU according to one aspect of the present invention is installed in the supercomputer 5500. By applying this chip, it is possible to realize a low-power supercomputer. Yes, it is possible. Furthermore, the low power consumption reduces heat generation from the circuit, thus reducing heat generation. This minimizes the impact on the circuit itself, surrounding circuits, and modules.

[0497] Figures 36E and 36F illustrate a supercomputer as an example of a large-scale computer. However, a large computer to which a GPU or chip according to one aspect of the present invention is applied has Not limited to, as a large computer to which a GPU or chip according to one aspect of the present invention is applied. For example, a computer (server) that provides a service, a large general-purpose computer (mechanism) Examples include in-frame images.

[0498] [Mobile] A GPU or chip according to one aspect of the present invention is used in a mobile vehicle and in the driver's seat of the vehicle. It can be applied to the surrounding area.

[0499] Figure 36G shows the area around the windshield inside an automobile, which is an example of a moving object. Yes. In Figure 36G, the display panel 5701 is mounted on the dashboard. In addition to 5702 and display panel 5703, the diagram shows a display panel 5704 mounted on the pillar. They are doing it.

[0500] Display panels 5701 to 5703 display the speedometer, tachometer, and By displaying the distance traveled, fuel gauge, gear status, air conditioning settings, and other various ...

Claims

1. A semiconductor device in which multiple memory devices are stacked, The memory device comprises a first transistor, a second transistor, a first capacitor, a second capacitor, and a plug. The first transistor described above is The first oxide semiconductor and, The second oxide semiconductor on the first oxide semiconductor, A first conductor and a second conductor having a region in contact with the second oxide semiconductor, A first insulator having a region in contact with the second oxide semiconductor and in contact with the first conductor and the ends of the second conductor, The third conductor on the first insulator, The present invention comprises a second insulator having a region in contact with the end of the first insulator and a region in contact with the upper surface of the third conductor, The first capacitance has a region that overlaps with the second oxide semiconductor and the first conductor in a cross-sectional view. The second transistor described above is The third oxide semiconductor, The fourth oxide semiconductor on the third oxide semiconductor, The second and fourth conductors having regions in contact with the fourth oxide semiconductor, A third insulator having a region in contact with the fourth oxide semiconductor and in contact with the ends of the second conductor and the fourth conductor, The fifth conductor on the third insulator, The present invention comprises a fourth insulator having a region in contact with the end of the third insulator and a region in contact with the upper surface of the fifth conductor, The second capacitance has a region that overlaps with the fourth oxide semiconductor and the fourth conductor in a cross-sectional view. The first transistor and the first transistor are arranged symmetrically with respect to the plug, A semiconductor device wherein the first capacitor and the first capacitor are arranged symmetrically with respect to the plug.

2. In claim 1, A semiconductor device in which the second conductor serves as either the source electrode or the drain electrode of the first transistor, and also serves as either the source electrode or the drain electrode of the second transistor.

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