Manufacturing method for semiconductor devices

By controlling the surface roughness of copper components in a ceramic copper circuit board within specific parameters, the bonding strength with silver is enhanced, addressing the strength decrease issue and maintaining reliable adhesion and heat dissipation.

JP7881015B2Active Publication Date: 2026-06-26NITERRA MATERIALS CO LTD
View PDF 8 Cites 0 Cited by

Patent Information

Application Number
JP2025068779
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-06-29
Filing Date
2025-04-18
Publication Date
2026-06-26
Estimated Expiration
2043-06-29

AI Technical Summary

Technical Problem

The bonding strength between a silver layer and a copper component of a ceramic copper circuit board decreases due to the average length RSm of the roughness curve elements on the copper surface.

Method used

A ceramic copper circuit board is manufactured by bonding a copper member with a thickness of 0.3 mm or more to a ceramic substrate via a brazing layer containing silver, copper, or active metals, with controlled surface roughness parameters such as average length RSm between 40 μm and 250 μm, and using a paste mainly composed of silver or copper for bonding a semiconductor element.

Benefits of technology

The controlled surface roughness enhances the bonding strength, particularly with silver paste, ensuring reliable adhesion and heat dissipation properties.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007881015000004
    Figure 0007881015000004
  • Figure 0007881015000005
    Figure 0007881015000005
  • Figure 0007881015000006
    Figure 0007881015000006
Patent Text Reader

Abstract

To provide a manufacturing method of a semiconductor device that comprises a ceramic copper circuit board in which average length RSm of a roughness curve element in a surface of a copper member is controlled.SOLUTION: In a manufacturing method of a semiconductor device according to an embodiment, a ceramic copper circuit board, in which a copper member having thickness being more than or equal to 0.3 mm is bonded through a wax material layer that contains one or more materials selected from silver, copper and active metal on one surface of a ceramic substrate, is manufactured. In the ceramic copper circuit board, when average length RSm of a roughness curve element is measured in each of any five places selected from the surface of the copper member, the average value of the five average length RSm is more than or equal to 40 μm and less than or equal to 250 μm. In the manufacturing method, paste having a main component of the silver or the copper is applied on the surface of the copper member to dehydrate. Further, in the manufacturing method, a semiconductor element is mounted on the paste to be bonded to the copper member.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The embodiments described below generally relate to a method for manufacturing a semiconductor device.

Background Art

[0002] A ceramic copper circuit board obtained by joining a ceramic substrate and a copper plate is used as a circuit board for mounting semiconductor elements and the like. Further, with the improvement in performance of semiconductor elements, it is expected that the junction temperature will increase. Along with this, joining using Ag nanoparticles for mounting semiconductor elements has been studied. In performing joining using Ag nanoparticles, providing an Ag layer on the surface of a metal plate has been studied. For example, the ceramic circuit board described in Japanese Patent No. 6262968 (Patent Document 1) is one in which the surface roughness (arithmetic mean roughness Ra) of a circuit board obtained by joining a ceramic substrate and an aluminum plate through a joining layer has been improved. Also, an Ag paste is used for mounting semiconductor elements and the like. In order to improve the adhesion to the silver layer, plating a copper plate surface has also been carried out. A Ni-P plating film is used for the plating film. For example, Japanese Patent Application Laid-Open No. 2019-41108 (Patent Document 2) shows providing recesses on the copper surface.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] As mentioned above, silver (Ag) paste has been used to improve bonding with semiconductor elements. However, when a silver (Ag) layer is provided on the copper component of a ceramic copper circuit board, a decrease in bonding strength occurs. Upon investigation, it was found that the average length RSm of the roughness curve elements on the surface of the copper component was the cause. The present invention aims to address this problem and provides a method for manufacturing a semiconductor device equipped with a ceramic copper circuit board in which the average length RSm of the roughness curve elements on the surface of the copper component is controlled. [Means for solving the problem]

[0005] In the semiconductor device manufacturing method according to the embodiment, a ceramic copper circuit board is manufactured by bonding a copper member with a thickness of 0.3 mm or more to one surface of a ceramic substrate via a brazing layer containing one or more selected from silver, copper, and active metals. In the ceramic copper circuit board, when the average length RSm of the roughness curve elements is measured at each of five arbitrary locations selected from the surface of the copper member, the average value of the five average lengths RSm is 40 μm or more and 250 μm or less. In the manufacturing method, a paste mainly composed of silver or copper is applied to the surface of the copper member and dried. Furthermore, in the manufacturing method, a semiconductor element is mounted on the paste and bonded to the copper member. [Brief explanation of the drawing]

[0006] [Figure 1] A schematic diagram showing an example of a ceramic copper circuit board according to the embodiment. [Figure 2] A schematic diagram illustrating the method of the joint strength (peel strength) test in the example. [Figure 3] A schematic diagram showing an example of a semiconductor device according to this embodiment. [Modes for carrying out the invention]

[0007] In the semiconductor device manufacturing method according to the embodiment, a ceramic copper circuit board is manufactured by bonding a copper member with a thickness of 0.3 mm or more to one surface of a ceramic substrate via a brazing layer containing one or more selected from silver, copper, and active metals. In the ceramic copper circuit board, when the average length RSm of the roughness curve elements is measured at each of five arbitrary locations selected from the surface of the copper member, the average value of the five average lengths RSm is 40 μm or more and 250 μm or less. In the manufacturing method, a paste mainly composed of silver or copper is applied to the surface of the copper member and dried. Furthermore, in the manufacturing method, a semiconductor element is mounted on the paste and bonded to the copper member.

[0008] The drawings of this application will now be described. Figure 1 is a schematic diagram showing an example of a ceramic copper circuit board according to an embodiment of the present invention. Figure 1 shows an example in which two copper plates are bonded to both sides of a ceramic substrate. The copper plates are an example of copper members. In Figure 1, 1 is a ceramic copper circuit board, 2 is a ceramic substrate, 3 is a copper plate (front copper plate), 4 is a copper plate (back copper plate), and 5 is a brazing material layer (active metal brazing material layer).

[0009] In the ceramic copper circuit board 1 shown in Figure 1, copper plates 3 and 4 are arranged on both sides of the ceramic substrate 2, with a brazing layer 5 in between. In the structure shown in Figure 1, the copper plate 3 has a circuit shape, and the copper plate 4 is used as a heat sink. For convenience, the copper plate 3 is called the front copper plate, and the copper plate 4 is called the back copper plate. Also, two front copper plates 3 are arranged. The ceramic copper circuit board 1 according to this embodiment is not limited to this form. Three or more front copper plates 3 may be provided on the ceramic substrate 2, or only one front copper plate 3 may be provided. Also, the ceramic copper circuit board 1 may have a structure in which the circuit shape is provided on the back copper plate 4. Alternatively, the ceramic copper circuit board 1 may have a structure in which only the front copper plate 3 is provided, without a back copper plate 4. Figure 1 shows an example in which copper plates are bonded to both sides of the ceramic substrate 2. When the copper backing plate 4 is used as a heat dissipation component, an aluminum plate may be used as a heat sink instead of the copper backing plate 4.

[0010] Figure 2 is a schematic diagram showing a method for testing bonding strength (peel strength) in an embodiment of the present invention. In Figure 2, 1 is a ceramic copper circuit board, 6 is a bonding layer, and 7 is a silver ribbon. As shown in Figure 2, the peel strength test was performed using a silver ribbon. Figure 3 is a schematic diagram showing an example of a semiconductor device according to an embodiment of the present invention. In Figure 3, 6 is a bonding layer, 8 is a semiconductor element, and 9 is a semiconductor device. In the semiconductor device 9 shown in Figure 3, one semiconductor element 8 is mounted on the surface copper plate 3. Multiple semiconductor elements 8 may be provided in the semiconductor device 9. Multiple semiconductor elements 8 may be mounted on a single surface copper plate 3. Also, in the example shown in Figure 3, the semiconductor device 9 includes a bonding layer 6 (brazing layer), but the bonding layer 6 may not be provided, and the surface copper plate 3 and the semiconductor element 8 may be directly bonded.

[0011] The ceramic substrate 2 can be a silicon nitride substrate, an aluminum nitride substrate, an aluminum oxide substrate, an argyl substrate, etc. The thickness of the ceramic substrate 2 is preferably 0.1 mm or more and 3 mm or less. A substrate thickness of less than 0.1 mm may lead to a decrease in strength. If the substrate thickness is greater than 3 mm, the ceramic substrate 2 may act as a thermal resistor, potentially reducing the heat dissipation of the ceramic copper circuit board 1. A more preferable range for the thickness of the ceramic substrate 2 is 0.2 mm or more and 2 mm or less.

[0012] The three-point bending strength of the silicon nitride substrate is preferably 600 MPa or higher. The thermal conductivity is preferably 80 W / m·K or higher. If the thermal conductivity is 80 W / m·K or higher, the thermal conductivity of the silicon nitride substrate may be 90 W / m·K or higher, or 130 W / m·K or higher. By increasing the strength of the substrate, the substrate thickness can be reduced. For this reason, the three-point bending strength of the silicon nitride substrate is preferably 600 MPa or higher, and more preferably 700 MPa or higher. By using a silicon nitride substrate, the substrate thickness can be reduced to 0.40 mm or less, and even further to 0.30 mm or less.

[0013] The three-point bending strength of aluminum nitride substrates is approximately 300-450 MPa. On the other hand, the thermal conductivity of aluminum nitride substrates is 160 W / m·K or higher. Because aluminum nitride substrates have low strength, a substrate thickness of 0.60 mm or more is preferable. The three-point bending strength of aluminum oxide substrates is approximately 300-450 MPa, but aluminum oxide substrates are inexpensive. The three-point bending strength of argil substrates is high at approximately 550 MPa, but the thermal conductivity is approximately 30-50 W / m·K. An argil substrate is a substrate made from a sintered body of mixed aluminum oxide and zirconium oxide.

[0014] The ceramic substrate 2 is preferably either a silicon nitride substrate or an aluminum nitride substrate. Both the silicon nitride substrate and the aluminum nitride substrate are nitride-based ceramic substrates. Nitride-based ceramics react with an active metal brazing material containing Ti to form titanium nitride. Oxide-based ceramics react with an active metal brazing material containing Ti to form titanium oxide. Nitride-based ceramics can improve the bonding strength with copper members (especially copper plates) by using an active metal bonding method.

[0015] The copper components include oxygen-free copper and copper alloys. Generally, copper has a high thermal conductivity of approximately 400 W / m·K, which can improve the heat dissipation of the ceramic copper circuit board 1. The thickness of copper plate 3 and copper plate 4 may be 0.3 mm or more, and even 0.6 mm or more. Copper plates of 0.6 mm or more include, for example, 1 mm copper plates and 2 mm copper plates.

[0016] By increasing the thickness of the copper plate, the heat dissipation of the bonded body (ceramic copper circuit board 1) can be improved. The thickness of the front copper plate 3 and the back copper plate 4 may be the same or different. The copper member is preferably made of oxygen-free copper or a member in which a graphite layer exists within the copper layer. Oxygen-free copper has a copper purity of 99.96 wt% or higher, as indicated in JIS-H-3100 (ISO1337, etc.). The copper member may be directly bonded to the ceramic substrate 2, or it may be bonded to the ceramic substrate 2 via a brazing layer. A copper member with a circuit shape pre-applied to it by punching or other processes may be bonded to the ceramic substrate. Alternatively, the circuit shape may be applied to the copper plate by etching after it has been bonded to the ceramic substrate. The heat dissipation member may have a shape that protrudes from the ceramic substrate (for example, a shape in which the heat sink and lead frame are integrated). The heat dissipation member may be provided with grooves.

[0017] In the ceramic copper circuit board 1 according to the embodiment, when the average length RSm of the roughness curve elements is measured at each of five arbitrary locations selected from the surface of the copper member, it is preferable that the average value of the five average lengths RSm is 40 μm or more and 250 μm or less. More preferably, the average value of the five average lengths RSm is 50 μm or more and 200 μm or less. Most preferably, the average value of the five average lengths RSm is 60 μm or more and 150 μm or less. When the average length RSm of the roughness curve elements is within the above range, the bonding material can easily penetrate into minute depressions on the surface of the copper plate 4. Therefore, the bond between the copper plate 4 and the bonding layer 6 can be made stronger.

[0018] The five arbitrary locations are selected from regions that do not overlap with each other and are separated by at least 500 μm. Furthermore, "surface" refers to the region excluding the sides. The average length RSm of the roughness curve elements on the sides may be within or outside the preferred range described above.

[0019] The measurement length per time is set to 4 mm. When the measurement length cannot be measured at a value of 4 mm, it is substituted by measurements at a plurality of locations (three locations or less). Each measurement length is set so that the total value of the measurement lengths at the plurality of locations becomes 4 mm, and the average length RSm measured at each location is averaged according to the ratio of the measurement lengths.

[0020] For example, the value of RSm measured at a measurement length of 3 mm at the first location is A μm, and the value of RSm measured at a measurement length of 1 mm at the second location is B μm. In this case, RSm is calculated by the following formula. RSm = (3A + B) / 4

[0021] JIS B0601:2013 is referred to for the calculation of surface roughness such as the average length RSm. JIS-B-060I corresponds to ISO 4287. For the measurement of surface roughness, an apparatus having a measurement accuracy equal to or higher than that of SURFCOM 2000DX-23 manufactured by Tokyo Seimitsu Co., Ltd. is used.

[0022] The minimum value of the five average lengths RSm is preferably 30 μm or more. Therefore, each numerical value (absolute value) of the five average lengths RSm is more preferably 30 μm or more and 250 μm or less. More preferably, each numerical value of the five average lengths RSm is 35 μm or more and 150 μm or less. Most preferably, each numerical value of the five average lengths RSm is 40 μm or more and 140 μm or less. The fact that the value of each individual average length RSm is within the above range indicates that the difference in the average length RSm for each measurement location is small and its variation is controlled. Therefore, the variation in the bonding strength can be reduced, and a more user-friendly ceramic copper circuit board 1 can be obtained.

[0023] Furthermore, it is preferable that the arithmetic mean roughness Ra is also controlled in addition to the average length RSm. When the arithmetic mean roughness Ra is measured at each of five arbitrary locations selected from the surface of the copper member, it is preferable that the average value of the five arithmetic mean roughness Ra values ​​is 0.1 μm or more and 0.7 μm or less. More preferably, the average value of the five arithmetic mean roughness Ra values ​​is 0.2 μm or more and 0.6 μm or less. Also, it is preferable that each of the five arithmetic mean roughness Ra values ​​is greater than 0 μm and 1.5 μm or less. More preferably, each arithmetic mean roughness Ra value is 0.05 μm or more and 1.0 μm or less.

[0024] Preferably, the maximum valley depth Rv of the roughness curve is also controlled. When the maximum valley depth Rv of the roughness curve is measured at each of five arbitrary locations selected from the surface of the copper member, it is preferable that the average value of the five maximum valley depths Rv is 0.4 μm or more and 2.5 μm or less. More preferably, the average value of the five maximum valley depths Rv is 0.5 μm or more and 2.0 μm or less. Even more preferably, the average value of the five maximum valley depths Rv is 0.6 μm or more and 1.8 μm or less.

[0025] It is preferable that the surface roughness is controlled so that the minimum value of the five maximum groove depths Rv is between 0.25 μm and 2.5 μm. It is more preferable that the surface roughness is controlled so that the minimum value of the five maximum groove depths Rv is between 0.3 μm and 2.4 μm. It is even more preferable that the surface roughness is controlled so that the minimum value of the five maximum groove depths Rv is between 0.4 μm and 2.3 μm.

[0026] Furthermore, it is preferable that the maximum height roughness Rz is also controlled. When the maximum height roughness Rz of the roughness curve is measured at each of five arbitrary locations selected from the surface of the copper member, it is preferable that the average value of the five maximum height roughness Rz values ​​is 10 μm or less.

[0027] When measuring average length RSm, arithmetic mean roughness Ra, maximum treble depth Rv, and maximum height roughness Rz, all measurement points are the same. In other words, the five locations where average length RSm is measured, the five locations where arithmetic mean roughness Ra is measured, the five locations where maximum treble depth Rv is measured, and the five locations where maximum height roughness Rz is measured are all the same.

[0028] In a ceramic copper circuit board 1, it is preferable that the ceramic substrate 2 and the copper plate 3 are joined via a brazing layer 5. Furthermore, it is preferable that the brazing layer 5 contains silver (Ag), copper (Cu), or an active metal. Specific examples include a brazing layer containing Ag, Cu, and an active metal, a brazing layer substantially free of Ag and containing copper and an active metal, and a brazing layer containing Cu and magnesium (Mg). "Substantially free of Ag" means that Ag is not intentionally added, and includes cases where Ag is inevitably present as an impurity. Sn or In may be added as needed. The brazing layer 5 may also contain one or more selected from carbon (C), tungsten (W), molybdenum (Mo), and rhenium (Re) in an amount of 0.1% to 10% by mass. good The fluidity of the activated metal brazing material can be controlled by adding carbon, tungsten, molybdenum, and rhenium. Manganese (Mn) may also be added to the brazing layer 5 as needed.

[0029] For joining the ceramic substrate 2 and the copper plate 4, it is preferable to use an activated metal brazing material containing an activated metal. The activated metal is preferably one or more selected from Ti (titanium), Nb (niobium), Zr (zirconium), and Hf (hafnium). The activated metal brazing material preferably contains at least Ti. Furthermore, the thickness of the joining layer is preferably 5 μm or more. More preferably, the thickness of the brazing material layer 5 is 10 μm to 200 μm. Even more preferably, the thickness of the brazing material layer 5 is 15 μm to 150 μm. If the brazing material layer 5 is thin, less than 5 μm, sufficient bonding strength may not be maintained. On the other hand, if the brazing material layer 5 is thicker than 200 μm, it may lead to increased costs.

[0030] Next, the composition of each brazing material component and the joining method will be described. Preferably, the Ag content in the brazing material is in the range of 0% to 95% by mass. Preferably, the Cu content is in the range of 3% to 90% by mass. Preferably, the total content of active metals or active metal hydrides is in the range of 1% to 15% by mass. Preferably, the total content of Sn or In is in the range of 1% to 30% by mass. More preferably, the total content of Sn or In is in the range of 2% to 15% by mass.

[0031] Ag or Cu is the main component of the brazing material layer 5. The activated metal or activated metal hydride is a component that reacts with the ceramic substrate 2 to obtain a strong bond. Sn or In has the effect of lowering the melting point of the activated metal brazing material. The brazing material may also contain other unavoidable impurities.

[0032] The activated metal brazing material may contain 0.1% to 2% by mass of carbon (C). Furthermore, the activated metal brazing material may contain 0.1% to 10% by mass of one or more elements selected from tungsten (W), molybdenum (Mo), and rhenium (Re). The fluidity of the activated metal brazing material can be controlled by the addition of carbon, tungsten, molybdenum, and rhenium. Manganese (Mn) may be added to the brazing material as needed.

[0033] The component ratios of the activated metal brazing material described above are the ratios when the total of each metal component is taken as 100% by mass. For example, when titanium nitride powder is used, the ratio is taken as the mass percentage of titanium. Note that the mass of organic materials such as binders is not counted. In the joining method according to the embodiment, a brazing paste with the above-described composition may be prepared and applied to a ceramic substrate, or a metal foil with the above-described composition may be used instead of the brazing paste. Here, a method using a brazing paste will be described. Each brazing component is mixed, a binder and the like are added, and an activated metal brazing paste is prepared.

[0034] Various substrates can be applied to the ceramic substrate 2. Examples of ceramic substrates include silicon nitride substrates, aluminum nitride substrates, alumina substrates, zirconia substrates, and algil (a mixture of alumina and zirconia) substrates. The types of substrates can also be classified into oxide-based ceramic substrates or nitride-based ceramic substrates. It is also possible to classify the types of substrates according to their metal components, such as silicon-containing ceramic substrates, aluminum-containing ceramic substrates, and zirconium-containing ceramics.

[0035] Silicon nitride substrates and aluminum nitride substrates are called nitride-based ceramic substrates. When nitride-based ceramics and copper plates are joined using the active metal bonding method, the active metal reacts with the nitride-based ceramic substrate to form an active metal nitride layer. When Ti is used as the active metal, a titanium nitride (TiN) layer is formed. The formation of this active metal nitride layer improves the bonding strength between the ceramic substrate 2 and the copper plate 3.

[0036] Aluminum oxide substrates, zirconium oxide substrates, and argyl substrates are called oxide-based ceramic substrates. When an oxide-based ceramic substrate and a copper plate are joined using the active metal bonding method, the active metal reacts with the oxide-based ceramic substrate to form an active metal oxide layer. When Ti is used as the active metal, a titanium oxide (TiO2) layer is formed. The formation of this active metal oxide layer can improve the bonding strength between the ceramic substrate 2 and the copper plate 3.

[0037] The bonded body, formed by joining a ceramic substrate 2 and a copper plate 3, may be a multi-part substrate divided into two or more sections. By dividing the multi-part substrate into multiple sections, individual bonded bodies can be obtained. The bonded bodies may further have notches or through holes for screw fastening or the like. In other words, the shape of the ceramic copper circuit board 1 is not limited to the short shape shown in the figure. Furthermore, it is preferable to obtain the ceramic copper circuit board 1 as shown in Figure 1 by first creating a bonded body by placing copper plates on both sides of the ceramic substrate and heating at 850°C, and then etching the surface copper plate.

[0038] The thickness of the copper component is preferably 0.3 mm or more. Increasing the thickness of the copper plate 3 can improve heat dissipation. It can also increase the current carrying capacity. For this reason, the thickness of the copper plate is preferably 0.3 mm or more, and more preferably 0.6 mm or more. There is no particular upper limit to the thickness of the copper plate, but 5 mm or less is preferred. If it exceeds 5 mm, it may become difficult to impart the circuit shape by etching. It is preferable that both the thickness of the front copper plate 3 and the thickness of the back copper plate 4 are 0.3 mm or more.

[0039] Here, "copper plate" includes copper alloy plates. Preferably, the copper plate is an oxygen-free copper plate. Oxygen-free copper has a copper purity of 99.96 wt% or higher, as indicated in JIS-H-3100. A coating may be applied to the surface of the copper member, or a rust inhibitor may be applied. The rust inhibitor and coating may be applied partially or to the entire surface of the copper member. The copper plate may be given a predetermined shape, such as a circuit shape, before joining by punching or other processes. Furthermore, a rust inhibitor may be applied to the surface of the copper plate.

[0040] Figure 1 shows an example of a ceramic copper circuit board 1 having a three-layer structure of copper-ceramics-copper. The structure of the ceramic copper circuit board 1 is not limited to the illustrated example. For example, the ceramic copper circuit board 1 may have a structure of five or more layers, such as copper-ceramics-copper-ceramics-copper.

[0041] In bonding copper plates and semiconductor elements, it is preferable to use a paste containing one or more elements selected from silver and copper. More preferably, at least one of silver or copper is the main component of the solid components. Here, the main component refers to the component that accounts for 50 wt% or more. Bonding materials containing 50 wt% or more of silver or copper are distinguished from general SnAg solder and SnCu solder. In the paste used for bonding with semiconductor elements, it is preferable that the metal components other than copper or silver do not exceed the level of impurities. More preferably, silver paste or copper paste is used. Even more preferably, silver paste is used. Silver paste may cause ion migration, but it is less prone to oxidation than copper. It is preferable because it can maintain the reliability of the bond. Copper paste is prone to oxidation, but ion migration is less likely to occur. Therefore, the paste may be used differently depending on the application of the ceramic copper circuit board 1.

[0042] Here, a copper member-ceramic substrate-copper member configuration is described as an example of an embodiment of the present invention, but the structure of the ceramic copper circuit board 1 is not particularly limited. The ceramic copper circuit board 1 may have a structure such as copper member-ceramic substrate-copper member-ceramic substrate-copper member. The heat sink may be made of aluminum, such as copper member-ceramic substrate-aluminum member. The thickness of the heat sink and the thickness of the circuit portion (surface copper plate 3) may be different. The heat sink may have a shape integrated with the leads. That is, the copper member may protrude from the ceramic substrate 2.

[0043] Next, a method for controlling surface roughness will be described. First, a ceramic copper circuit board 1 is prepared. Next, the surface roughness of the copper component (surface copper plate 3) is measured and confirmed to be within a desirable range. In general copper components, the surface is often smooth, and the average value of the average length RSm is less than 40 μm. In the process of preparing the ceramic copper circuit board 1, the surface roughness may be controlled by methods other than those exemplified below. For example, the removal process or bonding process of the resist applied to the surface of the copper component may be devised to control the surface roughness to be within a desirable range. If the surface roughness is not within a desirable range, it is preferable to carry out a surface quality control process. The surface quality control process may be carried out without measuring the surface quality. Examples of surface quality control methods include abrasive paper and plasma treatment.

[0044] Examples of abrasive paper include sandpaper. When using sandpaper, it is preferable that its grain size (particle size) is between 20 μm and 50 μm. In addition to controlling the grain size, the surface roughness may also be adjusted by changing the number of times it is rubbed in the same direction. It is preferable that the number of rubs be between 2 and 30 times. The surface roughness is adjusted by rubbing the surface of the copper member with sandpaper. It is controllable. The surface becomes rougher by increasing the number of rubs or the rubbing force. Also, the larger the grain size, the rougher the surface becomes after rubbing.

[0045] When performing plasma treatment, it is preferable to use argon (Ar) gas. Specifically, a ceramic copper circuit board 1 is placed in the treatment space, and an Ar gas plasma is generated. The surface of the copper component becomes rougher when exposed to the plasma. Plasma treatment may be performed at atmospheric pressure or in a reduced-pressure atmosphere. Plasma treatment is preferable because it may also remove elements other than copper that are attached to the surface of the copper component.

[0046] The surface properties of the copper component may be controlled by etching or chemical polishing. In this case, it is preferable to use a chemical solution with a controlled dissolution rate for the copper component. By using a chemical solution with a controlled dissolution rate and controlling the time the copper component is in contact with the chemical solution, the surface of the copper component can be further controlled. The method for controlling the surface properties is preferably one of the methods described above, and two or more methods may be combined.

[0047] When joining semiconductor elements, the holding time for pressure sintering is preferably 100 seconds or more and 280 seconds or less. A holding time of 120 seconds or more and 200 seconds or less is even more preferable. Holding times within the above range are preferable because they reduce variations in bonding. In addition, a reducing agent may be added to the bonding layer between the copper member and the semiconductor element. The difference between the average length RSm of the roughness curve elements of the front copper plate 3 and the average length RSm of the roughness curve elements of the back copper plate 4 is preferably 100 μm or less.

[0048] Examples of semiconductor elements include Si elements, SiC elements, and GaN elements. Of these, SiC elements or GaN elements are preferred. These semiconductor elements may also be elements processed with a dicer.

[0049] (Examples) The following describes embodiments of the present invention. First, copper plates are placed on both sides of a ceramic substrate, separated by an activated metal brazing layer. The laminate is heated to bond the copper plates to the ceramic substrate, thereby obtaining a ceramic copper circuit board. In the ceramic copper circuit board, the ceramic substrate is either a silicon nitride substrate or an aluminum nitride substrate. The thickness of the copper plate was set to 0.3 mm or more and 1.0 mm or less. The thickness of the brazing layer was set to 30 μm or more and 50 μm or less. The types of ceramic substrates, copper plate thicknesses, and brazing layer thicknesses in the embodiments and comparative examples are shown in Table 1.

[0050] [Table 1]

[0051] In Examples 1-11 and Comparative Examples 1-2, the surface of the copper plate of the resulting joint was treated with sandpaper. The grain size of the sandpaper used in the examples was 20 μm to 50 μm. The surface of the copper plate was roughened by rubbing it 2 to 30 times in approximately the same direction. In Comparative Example 1, the surface of the copper member was rubbed 10 times using sandpaper with a grain size of 5 μm or less. In Comparative Example 2, the surface of the copper member was rubbed 20 times using sandpaper with a grain size of 100 μm or more.

[0052] In Examples 1-11 and Comparative Examples 1-2, the surface roughness of copper (Cu) components was measured. The results obtained from the surface roughness measurements are shown in Table 2. A SURFCOM 2000DX-23 manufactured by Tokyo Seimitsu Co., Ltd. was used to measure the surface roughness. The surface roughness was measured at five locations selected from the surface of the copper plate. Each measurement location was separated from the others by at least 500 μm. In addition, the values ​​of RSm, Ra, Rv, and Rz were simultaneously measured from the results of the five measurements. In other words, four parameters, RSm, Ra, Rv, and Rz, were measured simultaneously from a single measurement location.

[0053] Table 2 shows the average values ​​of RSm at five locations, the minimum value among the five RSm values, the average values ​​of Ra at five locations, and the average values ​​of Rv at five locations. In addition, the column for the minimum RSm value shows the value furthest from 145 μm (the average of 40 μm and 250 μm, which is the range described in claim 1) in parentheses. In all examples, the measurement length was standardized to 4.0 mm.

[0054] [Table 2]

[0055] As can be seen from Table 2, in Examples 1-11, the average value of RSm at five points was within the preferred range. In Examples 2-6, 8, and 11, the minimum value of RSm was within the preferred range. On the other hand, in Examples 1, 7, 9, and 10, the minimum value of RSm was outside the preferred range.

[0056] In Examples 1-5, the average value of Ra at the five locations was within the desirable range. In Example 6, the average value of Ra was outside the desirable range. Furthermore, in Examples 1-5, the average value of Rv at the five locations was within the desirable range. In Example 6, the average value of Rv was outside the desirable range. Also, in Examples 1-5, Rz was 10 μm or less at all measurement locations. On the other hand, in Example 6, there were locations where Rz exceeded 10 μm.

[0057] Silver (Ag) paste was applied to the surface of a copper plate and dried. As shown in Figure 2, a silver (Ag) ribbon was mounted on the surface of the copper plate of the resulting ceramic copper circuit board, and pressure sintering was performed. The bonding strength of the silver (Ag) ribbon was measured by a peel strength test. In the peel strength test, the silver ribbon was pulled perpendicularly to the surface direction of the ceramic substrate, and the strength at which the silver ribbon peeled off the copper plate was measured. Examples where the peel strength of the silver ribbon was 4.0 or higher were classified as "best". Examples where the peel strength was 3.0 or higher and less than 4 were classified as "better". Examples where the peel strength was 2.0 or higher and less than 3.0 were classified as "good". Examples where the peel strength was less than 2.0 were classified as "bad".

[0058] The peel strength test was performed using an MX2 series equipment manufactured by Imada Corporation (test speed: 60 mm / min), and the electrical signals obtained from the equipment were converted into numerical values ​​using a Nidec-Shimpo FGP-5 load cell (5 kgf). The results are shown in Table 3.

[0059] [Table 3]

[0060] As can be seen from Table 3, in the examples where the average values ​​of RSm, Ra, and Rv were all within the preferred range, the peel strength was 4.0 or higher. On the other hand, in Example 1, where the minimum value of RSm was outside the preferred range, the peel strength test result was 3.0 or higher and less than 4.0. In Example 6, where the average values ​​of Ra and Rv were outside the preferred range, the peel strength test result was 2.0 or higher and less than 3.0. In Comparative Examples 1-2, where the average values ​​of RSm, Rv, and the minimum value of RSm were outside the preferred range, the peel strength test result was less than 2.0.

[0061] As can be seen from the results in Tables 2 and 3, the surface roughness (especially RSm) value was found to have a significant impact on the peel strength in bonding with the silver layer.

[0062] This is thought to be due to the following reasons: When the average length RSm of the roughness curve elements is less than 40 μm, the period of the surface irregularities on the copper plate is short. The brazing material does not penetrate sufficiently into the irregularities on the copper plate surface, and the bonding strength decreases. On the other hand, when the average length RSm exceeds 250 μm, the period of the irregularities is long, so a sufficient anchoring effect does not work on the bonding layer in contact with the copper plate surface, and the bonding strength decreases. By having an average value of 40 μm or more and 250 μm or less for the average length RSm, the anchoring effect on the bonding layer can be increased, and the bonding strength can be increased.

[0063] The control of surface roughness is particularly useful when a ceramic copper circuit board and a semiconductor element are bonded using silver paste.

[0064] In the embodiments of the present invention, the bonding layer between the silver ribbon and the copper plate was made using silver paste and measured, but the invention is not limited to this, and lead-free solder or copper paste may also be used. Furthermore, a reducing agent may be added to the paste as needed. In addition, the peel strength between the copper plate and the bonding layer was investigated, but any material may be bonded via the bonding layer.

[0065] (Composition 1) Ceramic substrate and The ceramic substrate comprises a copper member bonded to one surface of the ceramic substrate, A ceramic copper circuit board in which, when the average length RSm of the roughness curve elements is measured at each of five arbitrary locations selected from the surface of the copper member, the average value of the five average lengths RSm is 40 μm or more and 250 μm or less. (Configuration 2) The average value of the five average lengths RSm is 60 μm or more and 150 μm or less. composition A ceramic copper circuit board as described in 1. (Composition 3) The minimum value of the five average lengths RSm is 30 μm or more. composition A ceramic copper circuit board as described in 1 or 2. (Composition 4) When the arithmetic mean roughness Ra is measured at each of the five locations, the average value of the five arithmetic mean roughness Ra values ​​is 0.1 μm or more and 0.7 μm or less. composition A ceramic copper circuit board as described in one of the following three items. (Composition 5) When the maximum valley depth Rv of the roughness curve is measured at each of the five locations, the average value of the five maximum valley depths Rv is 0.5 μm or more and 2 μm or less. composition A ceramic copper circuit board as described in one of items 1-4. (Composition 6) The ceramic substrate and the copper member are further joined together by a brazing layer. The brazing layer contains one or more selected from silver, copper, and active metals. composition A ceramic copper circuit board as described in one of items 1 through 5. (Composition 7) The main component of the ceramic substrate is one or more selected from silicon nitride, aluminum nitride, aluminum oxide, or zirconium oxide. composition A ceramic copper circuit board as described in one of items 1 through 6. (Composition 8) The thickness of the copper member is 0.6 mm or more. composition A ceramic copper circuit board as described in one of items 1 through 7. (Composition 9) composition A ceramic copper circuit board described in one of items 1 to 8, A semiconductor element mounted on the copper member, A semiconductor device equipped with the following features. (Composition 10) composition A ceramic copper circuit board described in one of items 1 to 8, A semiconductor element mounted on the copper member, The semiconductor element is bonded to the copper member, and the bonding layer is provided for bonding the semiconductor element to the copper member. The aforementioned bonding layer contains silver or copper, and is a semiconductor device.

[0066] According to embodiments of the present invention, a ceramic copper circuit board and a semiconductor device are provided in which the average length RSm of the roughness curve elements on the surface of the copper member is controlled.

[0067] Although several embodiments of the present invention have been illustrated above, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. Furthermore, the embodiments described above can be implemented in combination with each other. [Explanation of Symbols]

[0068] 1…Circuit board 2…Ceramic substrate 3...Copper parts (front copper plate) 4…Copper component (copper plate on the back) 5… Brazing layer (activated metal brazing layer) 6…Bonding layer (a bonding layer using silver paste or copper paste) 7…Silver Ribbon 8... Semiconductor elements 9… Semiconductor devices

Claims

1. A ceramic copper circuit board is fabricated in which a copper member with a thickness of 0.3 mm or more is bonded to one surface of a ceramic substrate via a brazing layer containing one or more elements selected from silver, copper, and active metals. A paste mainly composed of silver or copper is applied to the surface of the copper member and dried. A method for manufacturing a semiconductor device, comprising mounting a semiconductor element on the paste and joining it with the copper member, A method for manufacturing a semiconductor device, wherein, in the manufactured ceramic copper circuit board, five arbitrary locations are selected from the surface of the copper member, separated by 500 μm or more from each other, and the average length RSm of the roughness curve elements is measured at each of the five locations with a measurement length of 4 mm, and the average value of the five average lengths RSm is 40 μm or more and 250 μm or less, and the arithmetic mean roughness Ra is measured at each of the five locations with a measurement length of 4 mm, and the average value of the five arithmetic mean roughness Ra is 0.1 μm or more and 0.7 μm or less.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the average value of the five average lengths RSm is 60 μm or more and 150 μm or less.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the minimum value of the five average lengths RSm is 30 μm or more.

4. The method for manufacturing a semiconductor device according to claim 1, wherein when the maximum valley depth Rv of the roughness curve is measured at each of the five locations, the average value of the five maximum valley depths Rv is 0.5 μm or more and 2 μm or less.

5. The method for manufacturing a semiconductor device according to claim 2, wherein the minimum value of the five average lengths RSm is 30 μm or more.

6. The method for manufacturing a semiconductor device according to claim 2, wherein when the maximum valley depth Rv of the roughness curve is measured at each of the five locations, the average value of the five maximum valley depths Rv is 0.5 μm or more and 2 μm or less.

7. The method for manufacturing a semiconductor device according to claim 5, wherein when the maximum valley depth Rv of the roughness curve is measured at each of the five locations, the average value of the five maximum valley depths Rv is 0.5 μm or more and 2 μm or less.

8. The method for manufacturing a semiconductor device according to Claim 1, wherein all five arithmetic mean roughnesses Ra are greater than 0 and 1.5 μm or less.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the main component of the ceramic substrate is one or more selected from silicon nitride, aluminum nitride, aluminum oxide, or zirconium oxide.

10. The method for manufacturing a semiconductor device according to claim 5, wherein the main component of the ceramic substrate is one or more selected from silicon nitride, aluminum nitride, aluminum oxide, or zirconium oxide.

11. The method for manufacturing a semiconductor device according to claim 1, wherein the thickness of the copper member is 0.6 mm or more.

12. A method for manufacturing a semiconductor device according to any one of claims 1 to 11, wherein, in the production of the ceramic copper circuit board, the copper member is bonded to one surface of the ceramic board via the brazing layer, and then the surface of the copper member is treated to control the average value of the five average lengths RSm to 40 μm or more and 250 μm or less.

13. The method for manufacturing a semiconductor device according to claim 12, wherein the treatment of the surface of the copper member is one or more selected from polishing with abrasive paper, plasma treatment, etching, and chemical polishing.

Citation Information

Patent Citations

  • Weft yarn removal in fluid jet type loom

    JP1987062968A

  • High thermal conductive substrate

    JP1987216251A

  • Ceramic circuit board

    JP1997036540A

  • Lead frame material and method for manufacturing the same

    JP2017183662A

  • Copper alloy rolled material, manufacturing method therefor and electric and electronic component

    JP2018009206A