Semiconductor equipment

Abstract

To suppress characteristic deterioration of a transistor in a driver circuit.SOLUTION: An embodiment includes: a first transistor; a second transistor to which a second signal is inputted to a gate and one of a source and a drain; a third transistor whose gate is electrically connected to the other of the source or the drain of the first transistor, for controlling whether or not to set a voltage state of an output signal by turning on or off; and a fourth transistor whose gate is electrically connected to the other of the source or the drain of the second transistor, for controlling whether or not to set a voltage state of the output signal by turning on or off.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] Relates to a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a driving method thereof, or a method of producing them. In particular, it relates to a semiconductor device having a driving circuit formed on the same substrate as a pixel portion, a display device, a liquid crystal display device, a light-emitting device, or a driving method thereof. Or, it relates to an electronic device having the semiconductor device, the display device, the liquid crystal display device, or the light-emitting device.

Background Art

[0002] A transistor composed of a non-single crystal semiconductor causes deterioration such as fluctuations in the threshold voltage or a decrease in mobility. As this transistor deteriorates, it becomes difficult for the driving circuit to operate, and there is a problem that an image cannot be displayed. Therefore, Patent Document 1, Patent Document 2, and Non-Patent Document 1 disclose a shift register capable of suppressing deterioration of a transistor (hereinafter also referred to as a pull-down transistor) having a function of maintaining an output signal of a flip-flop at a low level or a function of lowering the output signal to a low level. In these documents, two pull-down transistors are used. These two pull-down transistors are connected to an output terminal of a flip-flop and supplied with a low power supply voltage (also referred to as voltage Vss or a negative power supply).

[0003] ​​​​​​​​​​It is connected between the wiring that will be used. And one pull-down transistor and the other pull The down transistor and the down transistor alternately turn on (also called the on state). Therefore, the time that each pull-down transistor is on becomes shorter, This can suppress the degradation of the characteristics of the inverter. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2005-50502 [Patent Document 2] Japanese Patent Publication No. 2006-24350 [Non-patent literature]

[0005] [Non-Patent Document 1] Yong Ho Jang, et al., “Integrated Gate Driver Circuit Using a-Si TFT with Dual Pull-down Structure”, Proceedings of The 11th International Display Workshops 2004, pp.333-336 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] In the configuration of the conventional technology, a transistor (hereinafter, The gate voltage of a pull-up transistor (also called a pull-up transistor) is the positive power supply voltage or the clock signal. The voltage can sometimes exceed the high-level voltage. For this reason, pull-up transistors are used. A large voltage may be applied. Or, it may be connected to the gate of a pull-up transistor. Large voltages may be applied to transistors. Or, the transistor may degrade. However, the transistor channel width will be larger in order for the shift register to function. There is also the case that, as the channel width of the transistor increases, the gate and the socket of the transistor become larger. This can make it easier for a short circuit to occur between the tube and the drain. Alternatively, the transistor may become short-circuited. As the channel width increases, the parasitic capacitance of each transistor that makes up the shift register increases. This can sometimes happen.

[0007] One aspect of the present invention aims to suppress the degradation of transistor characteristics. Alternatively, the present invention One embodiment of the present invention aims to reduce the channel width of the transistor. One embodiment involves suppressing the degradation of the pull-up transistor's characteristics or reducing the channel width. The problem is to increase the amplitude of the output signal. Alternatively, one aspect of the present invention aims to increase the amplitude of the output signal. Alternatively, one aspect of the present invention aims to increase the on-time of the transistors in a pixel. Alternatively, one aspect of the present invention aims to improve insufficient writing to pixels. Alternatively, one aspect of the present invention aims to shorten the fall time of the output signal. One aspect of the present invention aims to shorten the rise time of the output signal. One aspect of the invention involves writing a video signal to a pixel belonging to another row to a pixel belonging to a certain row. The objective is to prevent the output signal of the drive circuit from being affected. Alternatively, one aspect of the present invention relates to the output signal of the drive circuit. The objective is to reduce the variation in fall time. Alternatively, one aspect of the present invention is to reduce each frame The objective is to keep the feedthrough effect on the element constant. Alternatively, one aspect of the present invention is: The objective is to reduce crosstalk. Alternatively, one aspect of the present invention involves reducing the layout area. The problem is to make it smaller. Or, one aspect of the present invention is to narrow the frame of the display device as a problem. Or, one aspect of the present invention is to make the display device have high definition as a problem. Also one aspect of the present invention is to increase the yield as a problem. Or, one aspect of the present invention is to reduce the manufacturing cost as a problem. Or, one aspect of the present invention is to reduce the smear of the output signal as a problem. Or, one aspect of the present invention is to reduce the delay of the output signal as a problem. Or, one aspect of the present invention is to reduce the power consumption as a problem. Or, one aspect of the present invention is to reduce the current supply capacity of the external circuit as a problem. Or, the present invention is to reduce the size of the external circuit or the size of the display device having the external circuit as a problem. Note that the description of these problems does not prevent the existence of other problems Note that one aspect of the present invention does not need to solve all of these problems.

Means for Solving the Problems

[0008] One aspect of the present invention includes a drive circuit that receives a first input signal and a second input signal and outputs an output signal, and a pixel having a liquid crystal element, wherein a voltage applied to the liquid crystal element is set according to the output signal. The drive circuit has a gate, a source, and a drain, and includes a first transistor having a first signal input to one of the gate, source, and drain, and a second transistor having a gate, a source, and a drain, and having a second signal input to one of the gate, source, and drain. The drive circuit further includes a third transistor having a gate, a source, and a drain, wherein the gate is electrically connected to the other of the source and drain of the first transistor, and turns on or off to control the output of the output signal. Thereby, the output of the output signal is controlled. A third transistor that controls whether or not to set the voltage state of the output signal, and its gate and source. It has a source and a drain, and the gate is electrically connected to the other side of the source and drain of the second transistor. It is connected and controls whether or not to set the voltage state of the output signal by being turned on or off. This is a liquid crystal display device having a fourth transistor that controls [something].

[0009] One aspect of the present invention is a system in which a first input signal, a second input signal, and a third input signal are input, It has a drive circuit that outputs an output signal and a liquid crystal element, and the output signal is applied to the liquid crystal element according to the output signal. A pixel has a voltage set, and the drive circuit has a first distribution to which a first input signal is input. A wire, a second wire into which the second input signal is input, and a third wire into which the third input signal is input. It has a line, a gate, a source, and a drain, and the gate and one of the source and drain are A first transistor electrically connected to the first wiring, and gate, source, and drain The second has a gate and one of its source and drain is electrically connected to the second wiring. A transistor having a gate, source, and drain, the gate being the first transistor The source and drain of the other are electrically connected, and one of the source and drain is a third distribution A third transistor electrically connected to the line, having a gate, source, and drain, The gate is electrically connected to the source and drain of the second transistor, and the source and A fourth transistor, with one of its drains electrically connected to a third wire, and the third transistor The source and drain of the transistor, and the other of the source and drain of the fourth transistor It has a fourth wire that is electrically connected to the other side, and the voltage applied to it becomes the voltage of the output signal. It is a liquid crystal display device.

[0010] One aspect of the present invention relates to a first input signal, a second input signal, a third input signal, and a fourth input It has a drive circuit that receives a signal and outputs an output signal, and a liquid crystal element that moves according to the output signal. The device has a pixel on which a voltage is set applied to the crystal element, and the drive circuit receives a first input signal. The first wiring to be powered, the second wiring to which the second input signal is input, and the third input signal A third wire to be powered, a fourth wire to which the fourth input signal is input, gate, source, and It has a gate and a drain, and one of the source and drain is electrically connected to the first wiring. A first transistor having a gate, source, and drain, with the gate and source A second transistor in which one of the drains and the other is electrically connected to a second wire, and a gate It has a source and a drain, and the gate is the same as the source and drain of the first transistor. The third is electrically connected to the third wiring, with one of the source and drain being electrically connected to the third wiring. It has three transistors, a gate, a source, and a drain, and the gate is a second transistor The source and drain of the other are electrically connected, and one of the source and drain is the fourth A fourth transistor electrically connected to the wiring, and the source and discharge of the third transistor. Electrically connected to the other side of the rain and to the other side of the source and drain of the fourth transistor. A liquid crystal display device having a fifth wiring that, when a voltage is applied, becomes the voltage of the output signal.

[0011] One aspect of the present invention is a system in which a first input signal and a second input signal are input, and an output signal is output. The system includes a drive circuit and liquid crystal elements, and the voltage applied to the liquid crystal elements is set according to the output signal. The pixel has a drive circuit which has a first wiring to which a first input signal is input and a second input signal A second wire into which a signal is input has gate, source, and drain, with gate and source A first transistor in which one of the drains and the other is electrically connected to the first wiring, and a gate It has a source and a drain, and the gate and one of the source and drain are connected to a second wiring. A second transistor is electrically connected, and has a gate, source, and drain. The source and drain of the first transistor are connected to the other source and drain of the first transistor. A third transistor is electrically connected, and has a gate, source, and drain. The source and drain of the second transistor are connected to the other source and drain of the second transistor. The electrically connected fourth transistor and the source and drain of the third transistor. The other side of and the other side of the source and drain of the fourth transistor are electrically connected, A liquid crystal display device having a third wiring whose voltage becomes the voltage of the output signal.

[0012] In one embodiment of the present invention, the channel width of the third transistor is set to the channel width of the fourth transistor. It can also be made equal to the channel width.

[0013] Furthermore, in one embodiment of the present invention, the channel width of the first transistor is set to the channel width of the third transistor It can also be made smaller than the channel width of the first transistor, and the channel width of the second transistor can be made smaller than the second. It can also be made smaller than the channel width of 4 transistors.

[0014] One aspect of the present invention is a system in which a first input signal and a second input signal are input, and an output signal is output. It comprises a drive circuit and pixels whose voltage applied to the liquid crystal element is set according to the output signal, The drive circuit consists of a first wiring to which the first input signal is input, and a second wiring to which the second input signal is input. It has two wires, and a gate, source, and drain, and the gate and source and drain One end of the first transistor is electrically connected to the first wiring, and the gate, source, and do It has a rain, and the gate and one of the source and drain are electrically connected to a second wiring. A second transistor having a positive electrode and a negative electrode, the positive electrode being the source and of the first transistor A first diode electrically connected to the other side of the drain, and having a positive electrode and a negative electrode, the positive electrode is A second diode electrically connected to the source and the other drain of the second transistor. The negative terminal of the first diode and the negative terminal of the second diode are electrically connected, and given This is a liquid crystal display device having a third wiring whose voltage becomes the voltage of the output signal.

[0015] Furthermore, in one embodiment of the present invention, the channel width of the first transistor is set to the second transistor It can also be made equal to the channel width.

[0016] One aspect of the present invention is a liquid crystal display device described in any one of the above paragraphs, and the display of the liquid crystal display device. An electronic device having at least an operating switch to control a [device].

[0017] One aspect of the present invention has a gate, a source, and a drain, and the gate and source and drain A first transistor to which a first signal is input on one side of the input, and a gate, source, and drain A second gate has an input, and a second signal is input to the gate and one of the source and drain. A transistor and switches connected in parallel to each other, one of which is the first Whether or not to set the voltage state of the output signal by turning it on or off in response to the input signal. The other switch controls the output by turning on or off in response to the second input signal. This controls whether or not to set the voltage state of the signal, and when one switch is on, the other switch... A first switch is off when one switch is off and the other switch is on. It has a first switch and a second switch.

[0018] Furthermore, various types of switches can be used. For example, electrical... There are switches and mechanical switches, etc. In other words, anything that can control the flow of electric current. Often, it's not limited to specific things. For example, a transistor can be used as a switch (for example, a... (e.g., ipolar transistors, MOS transistors), diodes (e.g., PN diodes) PIN diode, Schottky diode, MIM (Metal Insulated) or Metal) diode, MIS (Metal Insulator Semiconductor) (Uses diodes, diode-connected transistors, etc.) This is possible. Alternatively, a logic circuit combining these can be used as a switch.

[0019] Examples of mechanical switches include digital micromirror devices (DMDs), There are switches that use MEMS (Micro-Electro-Mechanical System) technology. The switch has electrodes that can be moved mechanically, and when these electrodes move... It operates by controlling the transitions between conductivity and non-conductivity.

[0020] Furthermore, using both N-channel and P-channel transistors, CMOS A type of switch may be used as a switch.

[0021] Furthermore, if it is explicitly stated that A and B are connected, it means that A and B are electrically connected. When A and B are functionally connected, and when A and B are directly connected This includes cases where... Here, A and B are the objects (e.g., devices, elements, circuits). (Wiring, electrodes, terminals, conductive film, layer, etc.) Therefore, a predetermined connection relationship, For example, not limited to the connection relationships shown in the diagram or text, but including the connection relationships shown in the diagram or text. This includes items outside of this category.

[0022] For example, if A and B are electrically connected, it is possible to make the electrical connection between A and B possible. Elements such as switches, transistors, capacitive elements, inductors, resistive elements, and dies. One or more (such as an Od) may be connected between A and B. Or, A and B may be A functionally connected case is a circuit that enables a functional connection between A and B (for example) , logic circuits (inverters, NAND gates, NOR gates, etc.), signal conversion circuits (DA converters) (Path, AD conversion circuit, gamma correction circuit, etc.), voltage level conversion circuit (power supply circuit (boost circuit, Step-down circuits, level shifter circuits that change the voltage level of a signal, voltage sources, current sources, Switching circuits, amplification circuits (circuits that can increase signal amplitude or current, etc., operational amplifiers, differentials) Dynamic amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control A or more circuits may be connected between A and B. For example, between A and B Even if another circuit is in between, if a signal output from A is transmitted to B, then A and B are not connected. It is assumed that they are functionally connected.

[0023] Furthermore, if it is explicitly stated that A and B are electrically connected, then A and B are electrically connected. When directly connected (that is, when A and B are connected with another element or circuit in between) (if there is a connection between A and B) and when A and B are functionally connected (i.e., there is a connection between A and B) (When A and B are functionally connected with a circuit in between) and (When A and B are directly connected) This includes cases where A and B are connected without any other element or circuit in between. Therefore, if you explicitly state that they are electrically connected, then simply state that they are connected. This is equivalent to the case where it is explicitly stated only that it is.

[0024] Furthermore, a display element, a display device having a display element, a light-emitting element, and a device having a light-emitting element The light-emitting device can take on various forms and can have various elements. For example, display elements, display devices, light-emitting elements, or light-emitting devices are EL (electroluminescent). EL elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), L LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors (for current) Transistors that emit light accordingly, electron emission elements, liquid crystal elements, electronic inks, electrophoretic elements, Grating light bulb (GLV), Digital Micromirror Device (DMD), Carbon nanotubes, etc., exhibit electromagnetic effects that affect contrast, brightness, reflectivity, and transparency. It can have a display medium in which the transient rate and other parameters change. Furthermore, the display device can be a plasma display. It can also be a ray or piezoelectric ceramic display. One example of such a device is an EL display, and another example of a display device using an electron-emitting element is a FEEL display. FEDs (Fast Emission Displays) and SEDs (Single-Emission Display) flat-panel displays (SEDs: Su rface-conduction Electron-emitter Displa Examples include y), and a display device using liquid crystal elements is a liquid crystal display (transmissive liquid crystal display). LCDs, transflective LCDs, reflective LCDs, direct-view LCDs (i) Projection liquid crystal displays (LCDs) are display devices that use electronic ink or electrophoretic elements. Then there's e-paper.

[0025] A liquid crystal element is a device that controls the transmission or non-transmission of light through the optical modulation effect of liquid crystals. It consists of a pair of electrodes and liquid crystal. The optical modulation effect of the liquid crystal is as follows: Controlled by the electric field acting on it (including the electric field in the horizontal direction, the electric field in the vertical direction, or the electric field in the diagonal direction) The liquid crystal elements include nematic liquid crystals, cholesteric liquid crystals, and smectic liquid crystals. Crystal, discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, high Molecular liquid crystal, polymer dispersed liquid crystal (PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side Examples include chain-type polymer liquid crystals, plasma addressable liquid crystals (PALC), and banana-type liquid crystals. Yes, it is possible. Also, the LCD driving method is TN (Twisted Nematic) mode. STN (Super Twisted Nematic) mode, IPS (In-Pl) FFS (Fringe Field Switching) mode, FFS (Fringe Field Switching) hing) mode, MVA (Multi-domain Vertical Alignment) ment) mode, PVA (Patterned Vertical Alignment) t) mode, ASV (Advanced Super View) mode, ASM (Ax ally Symmetric aligned Micro-cell) mode, O CB (Optically Compensated Birefringence) Electrically Controlled Birefring (ECB) ence) mode, FLC (Ferroelectric Liquid Crystal) l) Mode, AFLC (AntiFerroelectric Liquid Crys) tal) mode, PDLC (Polymer Dispersed Liquid Cr (host) mode, guest host mode, Blue Phase mode Some use such materials. However, this is not the only option, and various materials can be used as liquid crystal elements. It is possible.

[0026] Furthermore, transistors with various structures can be used as transistors. Therefore, There are no restrictions on the type of transistor used. For example, amorphous silicon, polycrystalline silicon, microcrystalline silicon, etc. Crystals (also called microcrystals, nanocrystals, or semi-amorphous materials) such as silicon. Thin-film transistors (TFTs) having non-single-crystal semiconductor films, such as those exemplified by [examples of thin-film transistors], can be used. can.

[0027] Furthermore, when manufacturing polycrystalline silicon, by using a catalyst (such as nickel), Further improvement in crystallinity will make it possible to manufacture transistors with better electrical properties. When manufacturing microcrystalline silicon, the use of a catalyst (such as nickel) allows for crystallinity. This will further improve the process and make it possible to manufacture transistors with better electrical characteristics. However, It is possible to manufacture polycrystalline silicon and microcrystalline silicon without using catalysts (such as nickel). It is Noh.

[0028] Furthermore, improving the crystallinity of silicon to polycrystalline or microcrystalline forms can affect the entire panel. It is desirable to do so, but it is not limited to this. In only a portion of the panel, silicon The crystallinity of the material may be improved.

[0029] Alternatively, ZnO, α-InGaZnO, SiGe, GaAs, IZO (Indium Zinc Oxide) (Materials), ITO (Indium Tin Oxide), SnO, TiO, AlZnSnO (AZTO) Which transistors have compound semiconductors or oxide semiconductors, and furthermore, these compound semiconductors Thin-film transistors, etc., made by thinning a conductor or oxide semiconductor, can be used. By using these compound semiconductors or oxide semiconductors in the channel portion of a transistor, They can also be used for other purposes. For example, these compound semiconductors or oxides. Semiconductors can be used as resistive elements, pixel electrodes, and light-transmitting electrodes. Furthermore, Since these can be deposited or formed simultaneously with the transistors, costs can be reduced.

[0030] Alternatively, transistors formed using inkjet or printing methods can be used. .

[0031] Alternatively, transistors containing organic semiconductors or carbon nanotubes can be used. These techniques allow transistors to be formed on a flexible substrate. Semiconductor devices using substrates like this can be made more resistant to impact.

[0032] Furthermore, transistors of various structures can be used. For example, MOS type transistors The use of junction transistors, bipolar transistors, etc., as transistors. It is possible.

[0033] Furthermore, MOS transistors, bipolar transistors, etc., are mixed together on a single substrate. It is permissible.

[0034] Furthermore, transistors can be formed using various substrates. The type of substrate is specific. It is not limited to those. For example, the substrate could be a semiconductor substrate (e.g., a single crystal substrate). Substrates (e.g., silicon substrates), SOI substrates, glass substrates, quartz substrates, plastic substrates Metal substrates, stainless steel substrates, substrates with stainless steel foil, tan Tungsten substrates, substrates with tungsten foil, flexible substrates, etc., can be used. Examples of glass substrates include barium borosilicate glass and aluminobosilicate glass. Examples include polyethylene terephthalate (PET) and poly Plastics such as ethylene naphthalate (PEN) and polyethersulfone (PES) Examples include plastics or flexible synthetic resins such as acrylic. Other examples include bonding... Film (polypropylene, polyester, vinyl, polyvinyl fluoride, polyvinyl chloride, etc.) Paper containing fibrous materials, base film (polyester, polyamide, polyimide, inorganic Examples include vapor-deposited films, paper, etc. Alternatively, a transistor can be formed using a certain substrate, Afterward, the transistor may be transferred to another substrate and placed on that substrate. The substrates on which the transistors are transposed include single crystal substrates, SOI substrates, glass substrates, and quartz substrates. Boards, plastic substrates, paper substrates, cellophane substrates, stone substrates, wood substrates, cloth substrates (natural fibers) Fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers Fibers (including acetate, cupro, rayon, recycled polyester, etc.), leather substrate, rubber Using substrates such as stainless steel substrates, stainless steel substrates, and substrates with stainless steel foil. Alternatively, a transistor can be formed using a substrate, and the substrate can be polished to a thin layer. It may be done in this way. Substrates to be polished include single crystal substrates, SOI substrates, glass substrates, and quartz substrates. It includes plates, plastic substrates, stainless steel substrates, and stainless steel foil. Substrates can be used. By using these substrates, good transient characteristics can be achieved. Formation of transistors, formation of low-power transistors, manufacturing of durable devices, heat-resistant coatings It is possible to reduce the weight or thickness of the device.

[0035] Note that the structure of a transistor is not limited to a specific structure. For example, a transistor with two or more gate electrodes... The above multi-gate structure can be applied.

[0036] As another example, a structure can be applied in which gate electrodes are positioned above and below the channel. Furthermore, by arranging gate electrodes above and below the channel, multiple traps can be connected. This results in a circuit configuration equivalent to one in which the transistors are connected in parallel.

[0037] A structure in which the gate electrode is positioned above the channel region, and a structure in which the gate electrode is positioned below the channel region. The structure in which the elements are arranged, the positive staggered structure, the inverse staggered structure, and the channel region are divided into multiple regions. Structures such as a structure in which channel regions are connected in parallel, or a structure in which channel regions are connected in series are also suitable. It can be used. Furthermore, the source electrode and drain electrode overlap the channel region (or a part thereof). The structure can also be applied.

[0038] Furthermore, transistors can be formed using various substrates. Therefore, To achieve the desired functionality, it is possible to form all the necessary circuits on the same circuit board. For example, all the circuits necessary to achieve a predetermined function are made from the same glass substrate, plastic It is also possible to form them using various substrates such as crystalline substrates, single crystal substrates, or SOI substrates. Yes. Alternatively, a part of the circuit necessary to realize a predetermined function is formed on a certain substrate. It is also possible to form another part of the circuit necessary to achieve a predetermined function on a separate circuit board. Yes, that is. In other words, all the circuits necessary to achieve a given function are formed using the same circuit board. It does not have to be done. For example, a part of the circuit necessary to realize a certain function is a A circuit formed by transistors on a lath substrate, necessary to realize a predetermined function. Another part is formed on a single-crystal substrate and consists of transistors formed using the single-crystal substrate. The IC chip is connected to the glass substrate using COG (Chip On Glass), It is also possible to place the IC chip on a lath substrate. Alternatively, the IC chip can be placed on a lath substrate. Using TAB (Tape Automated Bonding) and printed circuit boards It is possible to connect to a circuit board.

[0039] Furthermore, a transistor has at least three terminals, including a gate, a drain, and a source. An element with a child element can also be used. This element has a channel between the drain region and the source region. It has a drain region, and current flows through the drain region, channel region, and source region. This is possible. Here, source and drain are determined by the structure and operating conditions of the transistor. Because it changes, it is difficult to determine which is the source and which is the drain. So, if the areas that function as both source and drain are not referred to as source or drain... In such cases, one example is that they may be referred to as the first terminal and the second terminal, respectively. Alternatively, they may be referred to as the first electrode and the second electrode, respectively. Or, the first region. It may be referred to as the second region. Alternatively, one of the source and drain, or source and drain It is sometimes written as "the other side of n." Also, the gate is sometimes written as the third terminal or third electrode. be.

[0040] Furthermore, a transistor has at least three terminals, including a base, emitter, and collector. It may also be a component that does the same. In this case as well, the emitter and collector are connected to the first terminal and the second terminal. It may be referred to as a terminal, etc. Also, the base can be referred to as a gate. The terms gate, first terminal, and second terminal refer to the base, emitter, and collector, respectively. On the one hand, it can be rephrased as the other side of the emitter and collector.

[0041] Furthermore, it is not explicitly stated that B is formed on top of A, or that B is formed on top of A. When describing it, it is not limited to the case that B is formed in direct contact with A. This also includes cases where there is no intermediary object between A and B. Here, A and B are the objects (for example, devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, (and so on)

[0042] Therefore, for example, explicitly stating that layer B is formed on top of layer A (or on top of layer A) If present, this could mean that layer B is formed directly on top of layer A, or that layer B is directly on top of layer A Another layer (for example, layer C or layer D) is formed in contact with it, and layer B is directly in contact with it. This includes cases where a layer has been formed. Note that other layers (e.g., layer C or layer D) are single It can be a single layer or multiple layers.

[0043] Furthermore, the same applies when it is explicitly stated that B is formed above A. This is not limited to B being in direct contact with A, but also includes cases where another object is interposed between A and B. This includes cases where layer A is present. Therefore, for example, if layer B is formed above layer A, In this case, there are two situations: when layer B is formed in direct contact with layer A, and when layer B is formed in direct contact with layer A. Another layer (for example, layer C or layer D) is formed, and layer B is formed directly in contact with it. This includes cases where... Note that other layers (e.g., layer C or layer D) may be single layers. Stone, or even multiple layers, is acceptable.

[0044] Furthermore, B is formed on top of A, B is formed on top of A, or B is formed above A. When explicitly stating that something has been done, this includes cases where B is formed diagonally upwards. .

[0045] The same applies when B is below A, or when B is below A.

[0046] Furthermore, it is preferable that terms explicitly stated as singular remain singular. However, this is not limited to this, and there can be multiple. Similarly, explicitly as plural It is preferable that there be multiple items listed. However, this is not limited to this. It can also be singular.

[0047] Note that in the diagram, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0048] Note that the figure is a schematic representation of an ideal example and is not limited to the shapes or values ​​shown in the figure. It cannot be fixed. For example, variations in shape due to manufacturing technology, variations in shape due to errors, noise Variations in signals, voltages, or currents, or signals, voltages, due to timing differences. Alternatively, it may include variations in current, etc.

[0049] Note that technical terms may be used to describe specific embodiments or examples. Many, but not limited to, this applies.

[0050] Furthermore, terms that are not defined (including scientific and technical terms such as specialized or academic terms) are generally... It can be used with the same meaning as the general meaning understood by those who are normally skilled in the art. (Dictionaries, etc.) The terminology defined therein should be interpreted in a way that is consistent with the context of the related technology. It is preferable.

[0051] Note that terms such as "1st," "2nd," and "3rd" refer to various elements, components, areas, layers, and regions that are separate from each other. It is used to distinguish and describe things. Therefore, terms such as "first," "second," and "third" refer to elements and parts. It does not limit the number of materials, areas, layers, zones, etc. Furthermore, for example, "the first" It can be replaced with "second" or "third," etc.

[0052] Also, "upwards," "upwards," "downwards," "sideways," "to the right," "to the left," Spatial arrangements such as "diagonally," "backward," "forward," "inside," "outside," or "inside." The phrase indicating placement shows the relationship between one element or feature and another element or feature in a simple diagram. It is often used to indicate, however, not limited to this, but also to indicate their spatial arrangement. The phrase can include directions other than those depicted in the diagram. For example, "on top of A" When explicitly indicated as B, B is not limited to being on top of A. Devices in the diagram Since it can be inverted or rotated 180°, it is possible that B is below A. It is a Noh play. Thus, the phrase "upwards" has the direction of "upwards" as well as the direction of "downwards". It is possible to include, however, the devices in the figure can rotate in various directions. Since it is possible to rotate, the phrase "upwards" can mean not only "upwards" and "downwards" in terms of direction. "To the side", "to the right", "to the left", "diagonally", "to the back", "to the front", "inside", "outside" It is possible to include other directions such as "in" or "inside".

[0053] One aspect of the present invention comprises a first transistor and a second transistor, the first transistor The first terminal of the transistor is electrically connected to the first wiring, and the second terminal of the first transistor is connected to the first wiring. It is electrically connected to the second wiring, and the gate of the first transistor is electrically connected to the third wiring. They are connected, and the first terminal of the second transistor is electrically connected to the first wiring, The terminals of the second transistor are electrically connected to the second wire, and the second transistor The gate is electrically connected to the fourth wiring.

[0054] One aspect of the present invention comprises a first period and a second period, wherein the first period comprises a first sub-period and It has a second sub-period, and the second period has a third sub-period and a fourth sub-period, During sub-period 1, the first transistor is turned on, and the second transistor is turned off. During the second sub-period, the first transistor turns off, and the second transistor The transistor turns off, and in the third sub-period, the first transistor turns off, and Then the second transistor turns on, and in the fourth sub-period, the first transistor turns off This results in the second transistor being turned off.

[0055] One aspect of the present invention is a first transistor, a second transistor, and a third transistor It has a fourth transistor, and the first terminal of the first transistor is connected to the first wiring and power The first transistor's second terminal is electrically connected to the second wiring, The first terminal of the second transistor is electrically connected to the first wiring, and the second transistor The second terminal of the transistor is electrically connected to the second wiring, and the first terminal of the third transistor is The third wiring is electrically connected, and the second terminal of the third transistor is connected to the first transistor. The gate of the third transistor is electrically connected to the third wiring, and the gate of the third transistor is electrically connected to the third wiring. The first terminal of the fourth transistor is connected, and the fourth is electrically connected to the fourth wiring. The second terminal of the transistor is electrically connected to the gate of the second transistor, and the fourth The gate of the transistor is electrically connected to the fourth wire, and the gate of the third transistor It is electrically connected to the fifth wire, and the gate of the fourth transistor is electrically connected to the fifth wire. They are connected to each other.

[0056] One aspect of the present invention comprises a first transistor, a second transistor, and a first circuit. The first terminal of the first transistor is electrically connected to the first wiring, and the first transistor The second terminal of the transistor is electrically connected to the second wiring, and the first terminal of the second transistor is connected to the second wiring. It is electrically connected to the first wiring, and the second terminal of the second transistor is connected to the second wiring. Electrically connected, the first circuit is such that the first signal is in a first voltage state when the first transistor is in a first voltage state. A function to turn on in certain cases, and a function to turn on the second transistor when the second signal is in the first voltage state. It has the function of causing [something].

[0057] Furthermore, one aspect of the present invention has a second circuit, the second circuit performs a first transient for a certain period of time. The function of maintaining the gate voltage of the second transistor in a second voltage state, and the gate of the second transistor The function maintains the voltage at a second voltage state, and maintains the voltage of the second wiring at a second voltage state. It may also have the function of [something].

[0058] Furthermore, one aspect of the present invention has a third circuit, the third circuit being a gateway for the first transistor The function of setting the voltage of the first transistor to a second voltage state, and the function of setting the voltage of the gate of the second transistor to a second voltage state. It has a function to bring the device into a voltage state, and a function to bring the voltage of the second wiring into a second voltage state. It may be considered as such. [Effects of the Invention]

[0059] One aspect of the present invention can suppress the degradation of transistor characteristics. Or, one aspect of the present invention This configuration allows for a reduction in the channel width of the transistor. In particular, pull-up transistors This can suppress the degradation of the characteristics of the DISTA or reduce the channel width. Alternatively, one aspect of the present invention The embodiment allows for a larger signal amplitude. Alternatively, one embodiment of the present invention allows for a pixel to have The on-time of the transistor can be extended. Alternatively, one aspect of the present invention allows writing to a pixel. This can improve insufficient input. Alternatively, in one aspect of the present invention, the falling time of the signal can be improved. It can be shortened. Alternatively, one aspect of the present invention is to shorten the rise time of the signal. This is possible. Alternatively, a video signal intended for a pixel belonging to another row can be written to a pixel belonging to a certain row. This can prevent this from happening. Alternatively, it can reduce variations in the falling edge time of the signal. This can be done. Alternatively, the effect of feedthrough to pixels can be kept constant. Alternatively, Lost talk can be reduced. Alternatively, in one aspect of the present invention, the layout area can be reduced. This is possible. Alternatively, one aspect of the present invention allows for a narrower bezel for the display device. Alternatively, one aspect of the present invention allows the display device to be made high-resolution. Alternatively, one aspect of the present invention This can increase the yield. Alternatively, one aspect of the present invention can reduce costs. This can be done. Alternatively, one aspect of the present invention can reduce signal distortion. Alternatively, this invention One aspect of the present invention can reduce signal delay. Alternatively, one aspect of the present invention can reduce power consumption. This can reduce the current supply capacity of the external circuit. It is possible. Alternatively, one aspect of the present invention relates to the size of the external circuit, or having said external circuit. The size of the display device can be reduced. [Brief explanation of the drawing]

[0060] [Figure 1] An example of a circuit diagram of the semiconductor device in Embodiment 1. [Figure 2] An example of a timing chart to explain the operation of the semiconductor device shown in Figure 1. [Figure 3] An example of a schematic diagram to explain the operation of the semiconductor device shown in Figure 1. [Figure 4] An example of a schematic diagram to explain the operation of the semiconductor device shown in Figure 1. [Figure 5] An example of a timing chart to explain the operation of the semiconductor device shown in Figure 1. [Figure 6] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 7] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 6. [Figure 8] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 6. [Figure 9] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 10] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 11] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 12] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 13] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 14] An example of a circuit diagram of a semiconductor device in Embodiment 2, and an example of a timing chart for explaining its operation. [Figure 15] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 16] An example of a circuit diagram of a semiconductor device in Embodiment 3, and an example of a timing chart for explaining its operation. [Figure 17] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 18] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 19] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 20] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 21] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 22] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 23] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 24] An example of a circuit diagram of the semiconductor device in Embodiment 1. [Figure 25] An example of a timing chart used to explain the operation of the semiconductor device shown in Figure 24. [Figure 26] An example of a block diagram of the display device in Embodiment 4. [Figure 27] An example of a circuit diagram for a shift register in Embodiment 4. [Figure 28] An example of a timing chart to explain the operation of the shift register shown in Figure 27. [Figure 29] An example of a circuit diagram of the signal line drive circuit in Embodiment 5. [Figure 30] An example of a pixel circuit diagram in Embodiment 6, and an example of a timing chart to explain its operation. [Figure 31] An example of a pixel circuit diagram in Embodiment 6. [Figure 32] An example of a cross-sectional view of a transistor in Embodiment 7. [Figure 33] An example of a top view of the display device in Embodiment 8 and an example of a cross-sectional view of the display device. [Figure 34] An example of a cross-sectional view illustrating the transistor fabrication process in Embodiment 9. [Figure 35] An example of a semiconductor device layout diagram in Embodiment 10. [Figure 36] An example of a diagram illustrating the electronic device in Embodiment 11. [Figure 37] An example of a diagram illustrating the electronic device in Embodiment 11. [Figure 38] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 12. [Figure 39] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 12. [Figure 40] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 16. [Figure 41]An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 16. [Figure 42] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 16. [Figure 43] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 16. [Figure 44] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 23. [Figure 45] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 23. [Figure 46] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 23. [Figure 47] An example of a schematic diagram illustrating the operation of the semiconductor device shown in Figure 23. [Figure 48] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 49] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 50] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 51] A timing chart showing the calculation results for the semiconductor device in Embodiment 3. [Modes for carrying out the invention]

[0061] The embodiments will be described below with reference to the drawings. However, the embodiments may differ in many ways. It is possible to implement it in any manner, and without deviating from its purpose and scope, its form and Those skilled in the art will readily understand that the details can be modified in various ways. It should not be interpreted as being limited to the contents described herein. Furthermore, in the configuration described below, Symbols indicating similar parts or functions are shown using common symbols across different drawings. A detailed explanation of the part containing this will be omitted.

[0062] Furthermore, the content described in one embodiment (even a part of it) may vary depending on the form of its implementation. Another content (which may be part of the content) described in a state, and / or application, combination, or replacement For the content (which may be part of the content) described in the form of It is assumed that one aspect can be constituted by performing the following. Therefore, for example, Active elements (such as transistors and diodes), wirings, passive elements (such as capacitor elements and resistor elements) , conductive layers, insulating layers, semiconductor layers, organic materials, inorganic materials, components, substrates, modules, devices, solids , liquids, gases, operation methods, manufacturing methods, etc. are described in a single or plural number in drawings (cross-sectional views, plan views , circuit diagrams, block diagrams, flowcharts, process diagrams, perspective views, elevation views, layout diagrams, timing diagrams , structure diagrams, schematic diagrams, graphs, tables, optical path diagrams, vector diagrams, state diagrams, waveform diagrams, photographs , chemical formulas, etc.) or texts, and it is assumed that one aspect of the invention can be constituted by extracting a part thereof. As an example, It is assumed that one aspect of the invention can be constituted by extracting M (M is an integer and M < N) circuit elements (such as transistors and capacitor elements) from a circuit diagram composed of N (N is an integer) circuit elements . As another example, it is assumed that one aspect of the invention can be constituted by extracting M layers from a cross-sectional view composed of N layers . As another example, it is assumed that one aspect of the invention can be constituted by extracting M elements from a flowchart composed of N elements . As another example, it is assumed that one aspect of the invention can be constituted by extracting M elements from a flowchart composed of N elements . As another example, it is assumed that one aspect of the invention can be constituted by extracting M elements from a flowchart composed of N elements .

[0063] (Embodiment 1) In this embodiment, an example of a semiconductor device which is one aspect of the present invention will be described. In this embodiment The semiconductor device of this form is, as an example, a shift register, a gate driver, or a source driver It can be used in various drive circuits such as those for bars. It can also be referred to as a drive circuit or simply a circuit.

[0064] First, the circuit configuration of the semiconductor device in this embodiment will be described with reference to Figure 1(A). The semiconductor device in Figure 1(A) includes circuit 100 (also called the second control circuit) and circuit 200( It has a first control circuit (also called the first control circuit). Circuit 100 has transistors 101_1~101_ It has multiple transistors, number 2.

[0065] Note that transistors 101_1 to 101_2 are assumed to be N-channel type, for example. In an N-channel transistor, the potential difference (Vgs) between the gate and source is the threshold voltage. It shall turn on when the pressure (Vth) exceeds a certain level. However, it shall not be limited to this, Transistor 101_1 and / or transistor 101_2 are P-channel type. This is possible. A P-channel transistor has a potential difference (Vgs) between the gate and source. It is assumed that the device turns on when the voltage falls below the threshold voltage (Vth).

[0066] Next, we will explain the connection relationships of the semiconductor device in Figure 1(A). Transistor 101_1 The first terminal is connected to wiring 112, and the second terminal of transistor 101_1 is connected to wiring 111 The first terminal of transistor 101_2 is connected to wiring 112, and the transistor The second terminal of terminal 101_2 is connected to wiring 111. Also, circuit 200 is shown in Figure 1(A As shown in ), wiring 113, wiring 114, wiring 115_1~115_2, wiring 116_ 1-116_2, Wiring 117, Wiring 118, Gate of Transistor 101_1, Transistor It is connected to the gate of sta 101_2 and wiring 111. However, it is not limited to this, as shown in the figure. The wiring connected to the semiconductor device shown in 1(A) is just an example. Therefore, in this embodiment, This makes it possible to increase the number of wires connected to the semiconductor device, and the connections to the semiconductor device It is possible to reduce the amount of wiring. For example, circuit 200 has various wiring depending on its configuration. Alternatively, it can be connected to various nodes. Alternatively, circuit 200 can be connected to the wiring described above. It is possible that it is not connected to any of the following.

[0067] Note that in Figure 1(A), the connection point between the gate of transistor 101_1 and circuit 200 is shown. This is indicated as node 11, and the connection point between the gate of transistor 101_2 and circuit 200 is indicated as node 11. It is indicated as D12.

[0068] Next, we will explain the voltages or signals that are input to or output to each wire.

[0069] As an example, let's assume that signal OUT is output from wiring 111. Signal OUT is half The voltage state is set according to the signal input to the conductive device. Also, the signal OUT is, for example, The signal can have a first voltage state and a second voltage state. For example, the signal OUT This is often a digital signal that has two voltage states: high level and low level. Therefore, it can function as an output signal for a semiconductor device. It can function as a signal line or an output signal line. However, it is not limited to this. It is not possible. For example, wiring 111 can be extended and arranged in the pixel area. The wiring 111 can be connected to a pixel. For example, in the case of a liquid crystal display device, Wiring 111 is connected to a pixel having a liquid crystal element, and the voltage applied to the liquid crystal element is determined according to the voltage of wiring 111. The configuration can be set to set the voltage. Alternatively, the wiring 111 can be configured to set the traces of the pixel. Connects to the gate of a transistor (e.g., a selection transistor or switching transistor). It is possible to do so. Therefore, wiring 111 is a gate signal line (hereinafter also called a gate line) (u) or it can function as a scan line. In such cases, the signal OUT It can function as a gate signal or a scanning signal.

[0070] As an example, the signal CK1 is input to wiring 112. The signal can have a first voltage state and a second voltage state. For example, the signal CK 1 is a digital signal that alternates between two voltage states: high level and low level. In many cases, it can function as a clock signal. Therefore, wiring 112 is a signal The device as a clock signal line or clock signal line (hereinafter also referred to as a clock line or clock supply line) It is possible to have this capability. However, it is not limited to this, and voltage is supplied to wiring 112. It is possible for this to happen. Therefore, wiring 112 can function as a power line. That is the case.

[0071] As an example, the signal CK2 is input to wiring 113. The signal can have a first voltage state and a second voltage state. For example, the signal CK 2 is a digital signal that alternates between two voltage states: high level and low level. In many cases, it can function as an inverting clock signal. Note that signal CK2 is, This is the inverted signal of signal CK1, or a signal whose phase is approximately 180° shifted from signal CK1. This is possible. Therefore, wiring 113 is a signal line, or an inverted clock signal line (hereinafter referred to as inverted). It can function as a clock line or inverting clock supply line.

[0072] As an example, voltage V2 is supplied to wiring 114. Voltage V2 is high level The signal is often roughly equal to the power supply voltage, reference voltage, or positive power supply voltage. It is possible to have the function of such a thing. Therefore, wiring 114 has the function of a power line. It is possible to do so.

[0073] As an example, signal SP1 is input to wiring 115_1. Signal SP1 is, For example, it can be a signal having a first voltage state and a second voltage state. SP1 is often a digital signal that is high level and low level, and is a start signal It is possible for it to function as a signal line. Therefore, wiring 115_1 can function as a signal line. It is possible to have a function, however, it is not limited to this. For example, multiple semiconductor devices If the stage is connected in a subordinate position, wiring 115_1 is connected to wiring 111 of another stage (e.g., the previous stage), or It can be connected to other wiring. Therefore, wiring 115_1 is an output signal line. It can function as a gate signal line or a scan line. In such cases, SP1 can function as a transfer signal, gate signal, or scan signal. ru.

[0074] As an example, signal SP2 is input to wiring 115_2. Signal SP2 is, For example, it can be a signal having a first voltage state and a second voltage state. SP2 is often a digital signal and can function as a start signal. It is possible. Therefore, wiring 115_2 can function as a signal line. However, this is not limited to this. For example, when multiple semiconductor devices are connected in a dependent manner, wiring 1 15_2 may be connected to wiring 111 of another stage (for example, the previous stage) or other wiring. It is possible. Therefore, wiring 115_2 can be used as an output signal line, gate signal line, or scan line. It is possible to have the following functions. In such a case, signal SP2 is a transfer signal, gate signal It can function as a signal or a scanning signal.

[0075] As an example, the signal SEL1 is input to wiring 116_1. This can be a signal having, for example, a first voltage state and a second voltage state. The signal SEL1 alternates between high and low levels at regular intervals (e.g., every frame). Often, it is a digital signal that repeats two voltage states, and is used as a control signal or clock signal. It is possible to have the function of a signal line, control line, Alternatively, it can function as a clock signal line.

[0076] As an example, the signal SEL2 is assumed to be input to wiring 116_2. This can be a signal having, for example, a first voltage state and a second voltage state. The SEL2 signal alternates between high and low levels at regular intervals (e.g., every frame). Often, it is a digital signal that alternates between two states. And signal SEL2 is signal S Often, this is the inverted signal of EL1, or a signal that is 180° out of phase from signal SEL1. It can function as a control signal or an inverting clock signal. Therefore, the signal It can function as a line, control line, or inverting clock signal line.

[0077] As an example, the signal RE is input to wiring 117. Signal RE is, for example, the The signal can have a voltage state 1 and a voltage state 2. For example, signal RE is Often being a digital signal, it can function as a reset signal. Therefore, wiring 117 can function as a signal line. However, this It is not limited to this. For example, if multiple semiconductor devices are connected in a dependent manner, the wiring 117 is in a different stage. It can be connected to wiring 111 (for example, the next row) or other wiring. Therefore, wiring 117 may function as an output signal line, a gate signal line, or a scan line. It is possible. In such cases, signal RE can be a transfer signal, a gate signal, or a scan signal. It is possible to have this function.

[0078] As an example, voltage V1 is supplied to wiring 118. Voltage V1 is low level The signal is often roughly equal to the power supply voltage, reference voltage, ground voltage, and It can function as a negative power supply voltage. Therefore, wiring 118 is a power line, Alternatively, it can function as a ground.

[0079] However, this is not limited to wiring 111, wiring 112, wiring 113, wiring 114, wiring 1 15_1, wiring 115_2, wiring 116_1, wiring 116_2, wiring 117, and wiring 1 It is possible to input various signals or voltages to 18. Therefore, these Wiring can have various other functions, and it is not necessary for it to have all of the above functions. It's not necessary.

[0080] Note that "approximately" refers to errors due to noise, errors due to process variations, and manufacturing errors of the element. This includes errors due to variations in degree and / or various other errors such as measurement errors.

[0081] Generally speaking, voltage can refer to the potential difference between two points, and potential is... The electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a single point. -) is sometimes used to refer to the potential at a certain point in an electronic circuit and the reference Since the difference from the potential (e.g., ground potential) is often expressed as the voltage at a certain point, this specification Therefore, unless otherwise specified, when referring to the voltage at a certain point, it means the potential at a certain point. This should indicate the difference from the reference potential.

[0082] For example, let V1 be the voltage of the first voltage state, i.e., the low-level signal, and the second Let V2 be the voltage state, i.e., the voltage of the high-level signal. Then, let V2 > V1. Therefore, when referring to voltage V1, voltage V1 is approximately equal to the low level of the signal. It is assumed to be a value. On the other hand, when it is written as voltage V2, voltage V2 refers to the high level of the signal. It is assumed to be approximately equal to the value of . However, it is not limited to this, and low-level signals. The voltage can be lower than V1, or higher than V1. Alternatively, the voltage of a high-level signal can be lower than V2, and lower than V2. It is possible to be high. For example, depending on the circuit configuration, it may be described as a high-level signal. Even in such a case, the voltage may be lower than V2 or higher than V2. Or, Depending on the circuit configuration, even when described as a low-level signal, the voltage may be lower than V1 or higher than V1.

[0083] Note that the signal CK1 and / or the signal CK2 can be balanced or unbalanced (also referred to as unbalanced). Balance means that in one cycle, the period of being at a high level and the period of being at a low level are approximately equal. Unbalance means that the period of being at a high level and the period of being at a low level are different. Here, different means outside the range of approximately equal cases. Balance refers to the fact that in one cycle, the period of becoming high and the period of becoming low are approximately equal. Unbalance refers to the fact that the period of becoming high and the period of becoming low are different. Here, different means outside the range of approximately equal cases. Balance means that in one cycle, the period of becoming high and the period of becoming low are approximately equal. Unbalance means that the period of becoming high and the period of becoming low are different. Here, different means outside the range of approximately equal cases. It is assumed to be outside the range of approximately equal cases.

[0084] Note that when the signal CK1 and the signal CK2 are unbalanced, the signal CK2 may not be the inverted signal of the signal CK1. In this case, it is possible to make the length of the period when the signal CK1 becomes high and the length of the period when the signal CK2 becomes high approximately equal. However, it is not limited to this. it is not limited to this. it is not limited to this.

[0085] Next, the functions of each circuit and each transistor will be described.

[0086] As an example, the circuit 100 has a function of setting the voltage state of the signal OUT according to the signal input from the circuit 200. Or, the circuit 100 has a function of controlling the conduction state between the wiring 112 and the wiring 111 according to the voltage of the node 11 and / or the voltage of the node 12. As an example, the circuit 100 has a function of setting the voltage state of the signal OUT according to the signal input from the circuit 200. Or, the circuit 100 has a function of controlling the conduction state between the wiring 112 and the wiring 111 according to the voltage of the node 11 and / or the voltage of the node 12. Or, the circuit 100 has a function of controlling the timing of supplying the voltage of the wiring 112 to the wiring 111. Or, the circuit 100 has a function of controlling the timing of supplying the voltage of the wiring 112 to the wiring 111. It has functions. For example, when a voltage such as voltage V2 or a signal such as signal CK1 is supplied to wiring 112, circuit 100 has a function of controlling the timing of supplying the voltage or signal supplied to wiring 112 to wiring 11 1. Or, circuit 100 has a function of controlling the timing of supplying a high-level signal (such as signal CK1) to wiring 111. Or circuit 100 has a function of controlling the timing of supplying a low-level signal (such as signal CK1) to wiring 111. Or circuit 100 has a function of controlling the timing of raising the voltage of wiring 111 to, for example, V2. Or circuit 100 has a function of controlling the timing of reducing the voltage of wiring 111 to, for example, V1. Or circuit 100 has a function of controlling the timing of supplying a low-level signal (such as signal CK1) to wiring 111. Or circuit 100 has a function of controlling the timing of reducing the voltage of wiring 111 to, for example, V1. Or circuit 100 has a function of maintaining the voltage of wiring 111. Or circuit 100 has a function of controlling the timing of raising the voltage of node 11 and / or, for example, raising the voltage of node 12 to V2 or higher by a bootstrap operation As described above, circuit 100 can have functions such as a control circuit, a buffer circuit, or a switch. However, it is not limited to this, and circuit 100 can have various other functions. Note that circuit 100 does not necessarily have all of the above functions. circuit 100 does not necessarily have all of the above functions.

[0087] As an example, circuit 200 has a function of receiving at least two signals and selectively outputting the received signals. Or, circuit 200 has a function of controlling the voltage of node 11, the voltage of node 12, and / or the voltage of wiring 111 according to the input signal or voltage (signal CK2, signal SP1, signal SP2, signal RE, the voltage of node 11, the voltage of node 12, and / or signal OUT, etc.). Or, circuit 200 has a function of controlling the voltage of node 11, the voltage of node 12, and / or the voltage of wiring 111 according to the input signal or voltage (signal CK2, signal SP1, signal SP2, signal RE, the voltage of node 11, the voltage of node 12, and / or, for example, signal OUT, etc.). Or, circuit 200 has a function of controlling the voltage of node 11, the voltage of node 12, and / or the voltage of wiring 111 according to the input signal or voltage (signal CK2, Node 12 has a function to control the timing of supplying a high-level signal or voltage V2 to it. Alternatively, circuit 200 may send a low-level signal to node 11 and / or node 12. Alternatively, it has a function to control the timing of supplying voltage V1. Alternatively, circuit 200 is no It has the function of not supplying signals or voltages to node 11 and / or node 12. The circuit 200 has the function of putting node 11 and / or node 12 into a floating state. Alternatively, circuit 200 supplies a low-level signal or voltage V1 to wiring 111 at the appropriate time. It has a function to control the voltage. Alternatively, circuit 200 reduces the voltage of wiring 111 to, for example, V1. It has a function to control the timing of the action. Alternatively, circuit 200 maintains the voltage of wiring 111. It has the function of being a control circuit. This is possible. However, it is not limited to this, and circuit 200 also has various other functions. This is possible. Note that circuit 200 does not need to have all of the above functions.

[0088] Transistor 101_1, for example, controls the voltage of node 11, and the wiring 112 and wiring It has a function to control the conduction state with 111. Alternatively, transistor 101_1 is connected to wiring 1 It has a function to control the timing of supplying voltage 12 to wiring 111. For example, wiring 1 If a voltage such as voltage V2 or a signal such as signal CK1 is supplied to 12, the transistor The terminal 101_1 supplies voltage or signals, etc., supplied to wiring 112 to wiring 111. It has a function to control the timing. Alternatively, transistor 101_1 receives a high-level signal. It has a function to control the timing of supplying (for example, signal CK1) to wiring 111. Transistor 101_1 has the function of controlling the timing of increasing the voltage of wiring 111. It has. Alternatively, transistor 101_1 receives a low-level signal (e.g., signal CK1) It has a function to control the timing supplied to wiring 111. Or, transistor 101_ 1 controls the timing of reducing the voltage of wiring 111 to, for example, V1, i.e., V1 It has the function of controlling the voltage setting of the wiring 111 to. Alternatively, transistor 101_1 , has the function of maintaining the voltage of wiring 111. Or, transistor 101_1 is boot It has a function to perform strap operation. Alternatively, transistor 101_1 is the power of node 11 It has the function of raising the pressure to, for example, V2 or higher through a bootstrap action. Or, Transistor 101_1 sets the voltage state of the signal OUT by being turned on or off. It has a function to control whether or not to set it. As described above, transistor 101_1 is a battery It can function as a circuit or switch, etc. However, this is not limited to this. It is not fixed, and transistor 101_1 can have various other functions. Oh, transistor 101_1 doesn't need to have all of the above functions.

[0089] Transistor 101_2, for example, depends on the voltage of node 12, and the wiring 112 and wiring It has a function to control the conduction state with 111. Alternatively, transistor 101_2 is connected to wiring 1 It has a function to control the timing of supplying voltage 12 to wiring 111. For example, wiring 1 If a voltage such as voltage V2 or a signal such as signal CK1 is supplied to 12, the transistor The terminal 101_2 supplies voltage or signals supplied to wiring 112 to wiring 111. It has a function of controlling timing. Or, transistor 101_2 has a function of controlling the timing of supplying a high-level signal (e.g., signal CK1) to wiring 111. Or , transistor 101_2 has a function of controlling the timing of raising the voltage of wiring 111 to, for example, V2 . Or, transistor 101_2 has a function of controlling the timing of supplying a low-level signal (e.g., signal CK1) to wiring 111. Or, transistor 101_ 2 has a function of controlling the timing of decreasing the voltage of wiring 111 to, for example, V1, i.e., a function of controlling the setting of the voltage of wiring 111 to V1. Or, transistor 101_2 has a function of maintaining the voltage of wiring 111. Or, transistor 101_ 2 has a function of performing a bootstrap operation. Or, transistor 101_2 has a function of raising the voltage of node 12 to, for example, V2 or higher by a bootstrap operation . Or, transistor 101_2 has a function of controlling whether to set the voltage state of signal OUT by turning on or off. As described above, transistor 101 _2 can have a function as a buffer circuit or a switch, etc. However, it is not limited to this, and transistor 101_2 can have various other functions . Note that transistor 101_2 does not necessarily have all of the above functions. Next, the operation of the semiconductor device in FIG. 1(A) will be described with reference to the timing chart in FIG. 2. In the timing chart of FIG. 2, there are signal SEL1, signal SEL2, signal CK1, signal CK2, signal SP1, signal SP2, signal RE, the voltage of node 11 (Va1), node 1

[0090] Next, the operation of the semiconductor device in FIG. 1(A) will be described with reference to the timing chart in FIG. 2. In the timing chart of FIG. 2, there are signal SEL1, signal SEL2, signal CK1, signal CK2, signal SP1, signal SP2, signal RE, the voltage of node 11 (Va1), node 1 号CK2、信号SP1、信号SP2、信号RE、ノード11の電圧(Va1)、ノード1 The voltage (Va2) and signal OUT are shown. Note that the semiconductor device in Figure 1(A) is the same as the one in Figure 2. It is not limited to timing charts, but can be controlled by various timings. ru.

[0091] Note that the timing chart in Figure 2 shows multiple periods (hereinafter, these periods are also referred to as frame periods). Each period has multiple sub-periods (hereinafter, a sub-period is referred to as a 1-gate selection period) It also has (also known as). For example, the timing chart in Figure 2 has periods T1 and T2. It has multiple periods. Period T1 is a combination of Period A1, Period B1, Period C1, Period D1, and Period Period E1 has multiple sub-periods, and period T2 consists of period A2, period B2, period C2, and period It has multiple sub-periods, such as D2 and period E2. However, it is not limited to these. For example... However, the timing chart in Figure 2 has periods separate from periods T1 and T2. It is possible, and it is possible to omit either period T1 or period T2. 1 can have various periods in addition to the period A1 to E1, and period A1 to E1 It is possible to omit any of the following. Alternatively, period T2 may be any other than periods A2 to E2. It is possible to have various periods, and it is possible to omit any of periods A2 to E2. That is the case.

[0092] For example, let's assume that periods T1 and T2 are arranged alternately. However, However, this is not limited to the above; periods T1 and T2 can be arranged in various orders.

[0093] For example, in period T1, periods A1, B1, and C1 are arranged in that order. After that, until the end of period T1 (or the beginning of period T2), period D1 and period E1 are They shall be arranged alternately. However, this is not limited to this arrangement, and periods A1 to E1 may be arranged in various orders. It is possible to place it in the following order. For example, from the beginning of period T1 to the beginning of period A1 It is possible to include period D1 and / or period E1 within the time period.

[0094] For example, in period T2, periods A2, B2, and C2 are arranged in that order. After that, until the end of period T2 (or the beginning of period T1), period D2 and period E2 are They shall be arranged alternately. However, this is not limited to this arrangement, and periods A2 to E2 may be arranged in various order. It is possible to arrange them. For example, from the beginning of period T2 to the beginning of period A2 It is possible to insert periods D2 and / or E2 in between.

[0095] First, let's explain the operation of period T1. During period T1, signal SP1 is... It becomes high level, and then low level during period B1 to E1. Signal SP2 is high level during period A During period E1, the signal becomes low. Signal SEL1 becomes high, and signal SE L2 is the low level.

[0096] During period A1, as shown in Figure 3(A), the signal SP1 becomes high level, so the circuit 200 supplies voltage V2, or a high-level signal, to node 11. Therefore, node 1 The voltage at 1 begins to rise. At this time, the signal SP2 becomes low level, so circuit 200 A voltage V1 or low-level signal is supplied to node 12. Therefore, the voltage at node 12 is , becomes V1. Alternatively, circuit 200 does not supply voltage or signals to node 12, and circuit 2 Node 00 and node 12 become non-conductive. Therefore, if the initial voltage of node 12 is V1, Then, the voltage at node 12 is maintained at V1. As a result, transistor 101_2 is It goes into an "off" state (also called the "off" state). After that, the voltage at node 11 continues to rise. Eventually, The voltage at node 11 is V1 + Vth101_1 (Vth101_1: Transistor 101_ When the threshold voltage (1) + Vx is reached, transistor 101_1 turns on. Vx is a value greater than 0. Therefore, wire 112 and wire 111 are connected to transistor 1 Since it becomes conductive via 01_1, the low-level signal CK1 is transmitted from wiring 112 through the transistor. It is supplied to wiring 111 via signal 101_1. As a result, signal OUT is low It becomes a bell. After that, the voltage at node 11 rises further. Eventually, circuit 200 becomes no Since the supply of voltage or signal to node 11 is stopped, circuit 200 and node 11 become non-conductive. As a result, node 11 becomes floating, and the voltage at node 11 is V1 + Vth1 It is maintained at 01_1+Vx. However, it is not limited to this. For example, circuit 200 is V It is possible to continuously supply a voltage of 1 + Vth101_1 + Vx to node 11.

[0097] During period A1, circuit 200 receives a voltage V1 or low-level signal to wiring 111. It is possible to supply it. Alternatively, circuit 200 can supply voltage or signals etc. to wiring 111. It is possible not to do so.

[0098] Next, during period B1, as shown in Figure 3(B), signal SP1 becomes low level. Circuit 200 does not supply voltage or signals to node 11. Therefore, Node 11 remains in a floating state, and the voltage at node 11 is V1 + Vth101_1 + Vx It remains in that state. In other words, transistor 101_1 remains on, so wiring 112 and Wiring 111 remains in a conductive state via transistor 101_1. On the other hand, signal S Since P2 remains at a low level, circuit 200 receives a voltage V1 or low-level signal at the node. It supplies to 12. Alternatively, the circuit 200 does not supply voltage or signals to node 12. The circuit 200 and node 12 become non-conductive. Therefore, the voltage at node 12 becomes V1. This state is maintained. As a result, transistor 101_2 remains off. At this time, As signal CK1 rises from a low level to a high level, the voltage across wiring 111 begins to rise. Therefore, since node 11 remains in a floating state, the voltage at node 11 is the voltage at transistor 1 It rises due to the parasitic capacitance between the gate and the second terminal of 01_1. This is known as bootstrapping. This is a wrap operation. Thus, the voltage at node 11 is up to V2 + Vth101_1 + Vx. By increasing the voltage, it becomes possible for the voltage of wiring 111 to rise to a value greater than V2. Yes, in this way, the signal OUT becomes high level.

[0099] During period B1, circuit 200 does not supply voltage or signals to wiring 111. In many cases, however, the circuit 200 is not limited to voltage V2 or high level signal It is possible to supply numbers and other information to wiring 111.

[0100] Next, during period C1, as shown in Figure 3(C), the signal RE becomes high level, Circuit 200 sends a voltage V1 or low-level signal to node 11, node 12, and / or It supplies power to wiring 111. Then the voltage of node 11, the voltage of node 12, and / or the wiring The voltage across line 111 becomes V1. Therefore, transistor 101_1 and transistor 1 Since 01_2 is turned off, wires 112 and 111 become non-conductive. The OUT mark will be at a low level.

[0101] Furthermore, during period C1, the timing at which the voltage of node 11 decreases is earlier than the timing at which signal CK1 occurs. In some cases, the timing of the signal becoming low is earlier. That is, transistor 101_1 Before it turns off, the signal CK1 may become low level. Therefore, the low level signal When CK1 is supplied from wiring 112 to wiring 111 via transistor 101_1 There is. In such a case, the channel width of transistor 101_1 is, for example, that of other transistors When a transistor is present, its channel width is often larger than that of other transistors, so the signal OU The fall time of T can be shortened. Therefore, during period C1, circuit 200 When a low-level signal or voltage V1 is supplied to wiring 111, and when a transistor is supplied from wiring 112 When a low-level signal is supplied to wiring 111 via zista 101_1, and circuit 20 A signal or voltage V1 ranging from 0 to a low level is supplied to wiring 111, and a trace is supplied from wiring 112. In some cases, a low-level signal may be supplied to wiring 111 via inverter 101_1.

[0102] Next, during periods D1 and E1, as shown in Figure 3(D), the circuit 200 has a voltage A V1 or low-level signal is supplied to node 11, node 12, and / or wiring 111. Then, the voltage at node 11, the voltage at node 12, and / or the voltage at wiring 111 are It remains V1. Therefore, transistors 101_1 and 101_2 are O Since it remains in a non-conductive state, wiring 112 and wiring 111 remain non-conductive. And then, The OUT signal will remain at a low level.

[0103] Furthermore, during either period D1 or period E1, the circuit 200 is at voltage V1 or low The bell signal is supplied to node 11, node 12, and / or wiring 111, and during the other period In this circuit, the 200 sends a voltage V1 or low-level signal to node 11, node 12, and Alternatively, it is possible not to supply power to wiring 111.

[0104] Next, we will explain the operation during period T2. During period T2, signal SP1 is used during periods A2 to E2. It becomes low level in period A2, and in period B It becomes low level in 2~E2. Signal SEL1 becomes low level, and signal SEL2 To reach a high level.

[0105] During period A2, as shown in Figure 4(A), the signal SP2 becomes high level, so the circuit 200 supplies voltage V2, or a high-level signal, to node 12. Therefore, node 1 The voltage at point 2 begins to rise. At this point, signal SP1 becomes low level, so circuit 200 A voltage V1 or low-level signal is supplied to node 11. Therefore, the voltage at node 11 is , becomes V1. Alternatively, circuit 200 does not supply voltage or signals to node 11, circuit Node 200 and Node 11 will be in a non-conductive state. Therefore, assume that the initial value of Node 11 is V1. As a result, the voltage at node 11 is maintained at V1. Transistor 101_1 is turned off. It happens. After that, the voltage at node 12 continues to rise. Eventually, the voltage at node 12 reaches V1+ Vth101_2(Vth101_2: threshold voltage of transistor 101_2) + Vx At this point, transistor 101_2 turns on. At this time, Vx is a value greater than 0. Yes. Therefore, wiring 112 and wiring 111 are in a conductive state via transistor 101_2. Therefore, the low-level signal CK1 is transmitted from wiring 112 through transistor 101_2. This is supplied to wiring 111. As a result, signal OUT becomes low level. After that, no The voltage at node 12 rises further. Eventually, circuit 200 outputs a voltage or signal to node 12. Since the supply is cut off, circuit 200 and node 12 become non-conductive. As a result, node 1 Node 2 enters a floating state, and the voltage at node 12 is maintained at V1 + Vth101_2 + Vx. However, it is not limited to this. For example, circuit 200 is V1 + Vth101_2 + V It is possible to continuously supply voltage x to node 12.

[0106] During period A2, circuit 200 receives a voltage V1 or low-level signal from wiring 111. It is possible to supply it. Alternatively, circuit 200 can supply voltage or signals etc. to wiring 111. It is possible not to do so.

[0107] Next, during period B2, as shown in Figure 4(B), signal SP2 becomes low level. Circuit 200 does not supply voltage or signals to node 12. Therefore, Node 12 remains in a floating state, and the voltage at node 12 is V1 + Vth101_2 + Vx It remains in that state. In other words, transistor 101_2 remains on, so wiring 112 and Wiring 111 remains in a conductive state via transistor 101_2. On the other hand, signal S Since P1 remains at a low level, circuit 200 receives a voltage V1 or low-level signal at the node. It supplies to 11. Alternatively, the circuit 200 does not supply voltage or signals to node 11. The circuit 200 and node 11 become non-conductive. Therefore, the voltage at node 11 becomes V1. This state is maintained. As a result, transistor 101_1 remains off. At this time, As signal CK1 rises from a low level to a high level, the voltage across wiring 111 begins to rise. Therefore, since node 12 remains in a floating state, the voltage at node 12 is the voltage at transistor 1 It rises due to the parasitic capacitance between the gate and the second terminal of 01_2. This is known as bootstrapping. This is a wrap operation. Thus, the voltage at node 12 becomes V2 + Vth101_2 + Vx. By rising until the voltage of wiring 111 rises to a value greater than V2, This becomes possible. In this way, the signal OUT becomes high level.

[0108] Furthermore, during period B2, circuit 200 does not supply voltage or signals to wiring 111. In many cases, however, the circuit 200 is not limited to voltage V2 or high level signal It is possible to supply the signal to wiring 111.

[0109] Next, during period C2, as shown in Figure 4(C), the signal RE becomes high level, Circuit 200 sends a voltage V1 or low-level signal to node 11, node 12, and / or It supplies power to wiring 111. Then the voltage of node 11, the voltage of node 12, and / or the wiring The voltage across line 111 becomes V1. Therefore, transistor 101_1 and transistor 1 Since 01_2 is turned off, wires 112 and 111 become non-conductive. The OUT mark will be at a low level.

[0110] Furthermore, during period C2, the timing when signal CK1 decreases is lower than the timing when node 12 decreases. Sometimes the bell sounds earlier. In other words, transistor 101_2 turns off. Before that happens, the signal CK1 may become low level. Therefore, the low level signal CK1 This may be supplied from wiring 112 to wiring 111 via transistor 101_2. In such cases, the channel width of transistor 101_2 is, for example, that of other transistors. When present, it is often larger than the channel width of other transistors, so the signal OUT rise The drop-off time can be shortened. Therefore, during period C2, from circuit 200 to When a level signal or voltage V1 is supplied to wiring 111, and when a transient is supplied from wiring 112 When a low-level signal is supplied to wiring 111 via station 101_2, and circuit 200 A low-level signal or voltage V1 is supplied to wiring 111 from wiring 112, and a transistor is supplied from wiring 112. In some cases, a low-level signal may be supplied to wiring 111 via zista 101_2.

[0111] Next, during periods D2 and E2, as shown in Figure 4(D), the circuit 200 has a voltage A V1 or low-level signal is supplied to node 11, node 12, and / or wiring 111. Then, the voltage at node 11, the voltage at node 12, and / or the voltage at wiring 111 are It remains V1. Therefore, transistors 101_1 and 101_2 are O Since it remains in a non-conductive state, wiring 112 and wiring 111 remain non-conductive. And then, The OUT signal will remain at a low level.

[0112] Furthermore, during only one of the periods D2 or E2, the circuit 200 will have a voltage of V1 or a low voltage. The U level signal can be supplied to node 11, node 12, and / or wiring 111. It is Noh.

[0113] As described above, during period T1, transistor 101_2 is turned off, and during period T2... Therefore, transistor 101_1 can be turned off. The number of times 01_1 and transistor 101_2 are turned on, or transistor 1 By reducing the time that transistors 01_1 and 101_2 are each on, Therefore, the degradation of the characteristics of transistors 101_1 and 101_2 is suppressed. It is possible.

[0114] Alternatively, various benefits can be obtained by suppressing the degradation of transistor characteristics. Yes, it is possible. For example, if wiring 111 functions as a gate signal line or a scan line, When wiring 111 is connected to a pixel, the video signal held by the pixel is in the waveform of signal OUT. It can be affected. For example, the high-level voltage of signal OUT may not rise to V2. In this case, the transistors that the pixel has (e.g., selection transistors or switching transistors) The time the st(s) is on becomes shorter. As a result, insufficient writing of the video signal to the pixels occurs. This can result in a decrease in display quality. Alternatively, the falling edge time of the signal OUT, and the rising edge time may be affected. If the rise time is long, pixels belonging to the selected row will be affected by pixels belonging to another row. The denominator signal may be written to the display. As a result, the display quality may deteriorate. If the falling edge time of the signal OUT varies, the feed to the video signal held by the pixel will be affected. The effects of pass-through can vary. As a result, display inconsistencies such as crosstalk can occur. I end up doing it.

[0115] However, the semiconductor device of this embodiment can suppress the degradation of transistor characteristics. Yes, it is possible. Therefore, the high-level voltage of the signal OUT can be raised to V2. This allows the time that the transistors in the pixels are turned on to be extended. As a result, the pixels This allows for writing the video signal within a sufficient amount of time, thereby improving display quality. This can be done. Alternatively, the falling and rising times of the signal OUT can be shortened. Therefore, the video signal to pixels belonging to another row is written to the pixels belonging to the selected row. This prevents the label from being damaged. As a result, the quality of the label can be improved. Alternatively, variations in the falling edge time of the signal OUT can be suppressed, thus preserving the pixel. This can suppress variations in the effect of feedthrough on the video signal. Therefore, Display inconsistencies can be suppressed.

[0116] Alternatively, in the semiconductor device of this embodiment, the polarity of all transistors is set to N-channel type or P It is possible to make it a channel type. By making the polarity of all transistors the same. Compared to CMOS circuits, it offers advantages such as reduced manufacturing steps, improved yield, increased reliability, and lower costs. This can reduce the amount of transistors used. In particular, all transistors, including those in the pixel section, are N-channel. In the case of a type 1 transistor, the semiconductor layer can be an amorphous semiconductor, a microcrystalline semiconductor, or an organic semiconductor. or oxide semiconductors can be used. However, if these semiconductors are used Transistors are often prone to degradation. However, the semiconductor device of this embodiment uses transistors It can suppress the deterioration of the studs.

[0117] Alternatively, to ensure that the semiconductor device continues to operate even if the characteristics of the transistor deteriorate, There is no need to increase the channel width of the transistor. Therefore, the channel width of the transistor can be reduced. This is possible because, in the semiconductor device of this embodiment, transistor degradation is suppressed. Because it can be controlled.

[0118] Note that in period T1, the period during which transistor 101_1 is turned on (period A1, and period The interval B1) is called the first period or first sub-period, and transistor 101_1 is turned off. The periods (period C1, period D1, and period E1) are referred to as the second period or second sub-period. This is possible. Similarly, during period T2, the period during which transistor 101_2 is turned on ( Periods A2 and B2 are called the third period or third sub-period, and transistor 101 The period during which _2 is off (period C2, period D2, and period E2) is the fourth period or the fourth service It can be called a "bu period."

[0119] Note that the period during which transistor 101_1 is ON (period A1 and period B1) is, This is often shorter than the period during which Zista 101_1 is turned off (period C1~E1). Or, The period during which transistor 101_2 is ON (period A2 and period B2) is when transistor 1 Often, this period is shorter than the time when 01_2 is off (period C2~E2). Or, the transition The period during which transistor 101_1 is ON and the period during which transistor 101_2 is ON are approximately They are often of equal length, but not limited to this.

[0120] Furthermore, in period T1, period B1 functions as an optional period, and periods A1 and C 1. Periods D1 and E1 can function as non-selective periods. In period T2, period B2 functions as a selection period, and period A2, period C2 Periods D2 and E2 can function as non-selective periods.

[0121] Furthermore, periods A1 and A2 function as a set period or a start period. This is possible. Periods B1 and B2 can function as selectable periods. Alternatively, periods C1 and C2 can function as reset periods. ru.

[0122] Furthermore, periods T1 and T2 can function as frame periods. The frame frequency is preferably approximately 60Hz (or 50Hz). However, this is not limited to this. For example, to make the frame frequency higher than 60Hz Therefore, blurring or afterimages in videos can be improved. However, if the frame rate is high... If it goes too far, the driving frequency will increase, which will increase power consumption. Therefore, the power consumption To suppress the increase, the frame frequency should be between 60Hz and 360Hz. Preferred. More preferably, it is preferred to be 60 Hz or more and 240 Hz or less. Preferably, the frequency is between 60 Hz and 120 Hz. On the other hand, the frame frequency By lowering the frequency to below 60Hz, the external circuitry can be made simpler. Alternatively, power consumption can be reduced. Therefore, it can be installed in mobile devices such as mobile phones. It becomes cheaper. However, if the frame rate is too slow, the pixel retention capacity increases, and the pixels The aperture ratio will decrease. Therefore, in order to suppress the decrease in aperture ratio, the frame frequency Preferably, the frequency is between 15 Hz and 60 Hz. More preferably, it is between 30 Hz and 60 Hz. It is preferable that the frequency is 0 Hz or lower.

[0123] Furthermore, periods A1-E1 and A2-E2 are considered sub-periods or single-gate selection periods. It is possible to have this function.

[0124] Furthermore, the terms "period" or "sub-period" can be rephrased as "step," "process," or "action." Yes. For example, when referring to the first period, it could also refer to the first step, the first process, or the first action. It can be rephrased as "creation."

[0125] Furthermore, in period T1, periods D1 and E1 are arranged alternately before period A1, In interval T2, if periods D2 and E2 are alternately placed before period A2, The time from the start time of T1 to the start time of period A1 is the time from the start time of period T2 to the start time of period It is preferable that the time until the start time of A2 is approximately equal to this. However, it is not limited to this. stomach.

[0126] Furthermore, signals CK1 and CK2 can be unbalanced. Figure 5(A) shows For example, in one cycle, the period of high levels is shorter than the period of low levels. The timing chart for the case is shown. By doing this, the period C1 or period C2 This makes it possible to supply a low-level signal CK1 to wiring 111, so signal OU The fall time of T can be shortened. In particular, the wiring 111 extends to the pixel portion. If this is done, it is possible to prevent the writing of unauthorized video signals to pixels. However, Not limited to this, but within a single cycle, if the period of high levels is longer than the period of low levels It is possible.

[0127] Furthermore, it is possible to use multiphase clock signals in semiconductor devices. For example, semiconductor The device can use an n-phase (where n is a natural number greater than or equal to 2) clock signal. A clock signal is a set of n clock signals, each with a period shifted by 1 / n periods. Yes. Figure 5(B) shows, as an example, the case where a three-phase clock signal is used in a semiconductor device. The timing chart is shown. However, it is not limited to this.

[0128] Furthermore, the larger n is, the lower the clock frequency becomes, thus reducing power consumption. Yes, it's possible. However, if n is too large, the number of signals increases, so the layout area will be larger. This can result in the external circuit becoming larger in size. Therefore, n < 8 Preferred. More preferably, n < 6. Even more preferably, n = 4. Alternatively, n=3 is preferable, but it is not limited to this.

[0129] Note that transistors 101_1 and 101_2 can be turned on simultaneously. It is possible. In this case, for example, circuit 200 applies voltage V to nodes 11 and 12. It is possible to supply a signal of level 2 or high level.

[0130] Furthermore, the channel width of transistor 101_1 and the channel width of transistor 101_2 are It is preferable that the transistor sizes be approximately equal. By doing so, the current supply capacity can be made roughly equal. Alternatively, the transistor The degree of degradation of the transistors can be made roughly equal. Therefore, the selected transistors Even when switching, the waveform of the signal OUT can be made to be roughly the same. Therefore, the channel length of transistor 101_1 and the channel length of transistor 101_2 are It is preferable that they are roughly equal. However, this is not limited to transistor 101_ The channel width of channel 1 and the channel width of transistor 101_2 can be different. Alternatively, the channel length of transistor 101_1 and the channel length of transistor 101_2. However, it is possible to do something different.

[0131] Note that when referring to the channel width of a transistor, the W / L (W is the channel) of the transistor is used. This can be rephrased as width (where L is the channel length).

[0132] Note that transistors 101_1 and 101_2 have large gate signal lines, etc. Since it drives a load, the channel width of transistor 101_1, and transistor 101 The channel width of _2 should preferably be larger than the channel widths of the other transistors. For example, The channel width of transistor 101_1 and the channel width of transistor 101_2 are 1 Preferably, the particle size is 000 μm to 30000 μm. More preferably, it is 2000 μm to 20 Preferably, it is 000 μm. More preferably, 3000 μm to 8000 μm, The particle size is preferably 10,000 μm to 18,000 μm. However, it is not limited to this. .

[0133] As shown in Figure 1(B), the circuit 100 consists of transistors 101_1~101_N( It is possible to have multiple transistors (where N is a natural number greater than or equal to 2). The first terminal of transistors 101_1 to 101_N is connected to wiring 112. Transistor 101 The second terminal of transistor 101_1~101_N is connected to wiring 111. The gate of 01_N is connected to circuit 200. Note that transistors 101_1~101 The connection points between the gate of _N and circuit 200 are indicated as nodes 11 to 1N, respectively.

[0134] Furthermore, a larger N indicates the number of times each transistor turns on, or each This can reduce the time the transistor is on. However, if N is too large, The number of transistors increases too much, making the circuit larger. Therefore, N is Preferably 6 or less. More preferably 4 or less. Even more preferably Alternatively, N=2 or N=3 is preferable.

[0135] Furthermore, similar to Figure 1(B), in the configuration described in Figure 1(A), circuit 100 is a transistor. It is possible to have multiple transistors, designated as ZISTA101_1 to 101_N.

[0136] As shown in Figure 1(C), the first terminal of transistor 101_1 and transistor 10 The first terminal of 1_2 can be connected to separate wiring. See Figure 1(C) for an example. Wiring 112 is divided into multiple wires, 112A to 112B. The first terminal of transistor 101_1 is connected to wiring 112A, and the transistor 101_2 The first terminal is connected to wiring 112B. However, it is not limited to this, and transistor 10 The first terminal of 1_1 and the first terminal of transistor 101_2 are connected to various wires, or various It is possible to connect to a node. Note that wiring 112A~112B is connected to wiring 112. It is possible to have similar functionality. Therefore, the wiring 112A to 112B has the signal CK. It is possible to input signals such as 1. However, this is not limited to this, and wiring 112A~ The 112B can accept various signals, voltages, or currents as inputs. Alternatively, separate voltages or separate signals may be supplied to wiring 112A and wiring 112B. It is possible.

[0137] Furthermore, similar to Figure 1(C), in the configuration described in Figures 1(A) to (B), circuit 100 is The transistors that have (for example, transistors 101_1 to 101_2, or transistor 1 The first terminal of 01_1~101_N) can be connected to separate wiring.

[0138] As shown in Figure 1(D), there is a gap between the gate and the second terminal of transistor 101_1. A capacitance element 102_1 is connected, and a capacitance element is placed between the gate and the second terminal of transistor 101_2. It is possible to connect child 102_2. By doing so, bootstrap operation During operation, the voltage at node 11 or node 12 is likely to rise. Therefore, Since the Vgs of transistor 101_1 and transistor 101_2 can be increased, The channel width of these transistors can be reduced. Alternatively, the signal OUT can be reduced. The drop-off time or rise-up time can be shortened. However, this is not limited to this. It is possible to omit either the capacitive element 102_1 or the capacitive element 102_2. For example, an MIS capacitor can be used as the capacitive element.

[0139] Furthermore, the material of one electrode of capacitive element 102_1 and capacitive element 102_2 is a transistor. It is preferable that the material is the same as that of the gates of transistors 101_1 and 101_2. The material of the other electrode of the capacitive element 102_1 and the capacitive element 102_2 is the same as that of transistor 1 The material is the same as that of the source or drain of transistor 01_1 and transistor 101_2. This is preferable. By doing so, the layout area can be reduced. Alternatively, The quantitative value can be increased. However, this is not limited to the capacitive element 102_1, and Various materials can be used for the material of one electrode and the material of the other electrode of the capacitive element 102_2. It is possible to use it.

[0140] Note that the capacitance value of capacitance element 102_1 and the capacitance value of capacitance element 102_2 are approximately equal. This is preferable. Alternatively, the area where one electrode and the other electrode of the capacitive element 102_1 overlap and The area where one electrode and the other electrode of the capacitive element 102_2 overlap is approximately equal to the area where they overlap. This is preferable. By doing so, even when switching between transistors, the transistors The goal is to make the Vgs of transistor 101_1 and the Vgs of transistor 101_2 approximately equal. Since this is possible, the waveform of the signal OUT can be made roughly equal. However, this is not limited to this. Therefore, the capacitance value of capacitance element 102_1 and the capacitance value of capacitance element 102_2 are different. This is possible. Alternatively, the area where one electrode and the other electrode of the capacitive element 102_1 overlap, The overlapping area between one electrode and the other electrode of the capacitive element 102_2 can be different. be.

[0141] Furthermore, similar to Figure 1(D), the configuration described in Figures 1(A) to (C) also involves transistors. (For example, transistors 101_1 to 101_2, or transistors 101_1 to 101_ A capacitive element can be connected between the gate and the second terminal of N).

[0142] As shown in Figure 1(E), transistor 101_1 is connected to one terminal (hereinafter referred to as the positive terminal and One terminal (also called the negative terminal) is connected to node 11, and the other terminal (also called the negative terminal) is connected to wiring 111. It can be replaced with the following diode 101a_1. Similarly, the transistor 101_2 has one terminal (hereinafter also called the positive terminal) connected to node 12, and the other terminal (Hereafter also referred to as the negative terminal) replaces the diode 101a_2 connected to wiring 111. This is possible, however, it is not limited to this. For example, as shown in Figure 1(F), The first terminal of transistor 101_1 is connected to node 11, 101_1 can be configured with diodes. Similarly, transistors The first terminal of 101_2 is connected to node 12, thereby connecting transistor 101_2 This can be configured with diode connections.

[0143] Furthermore, similar to Figures 1(E) to (F), the configuration described in Figures 1(A) to (D) also involves a tiger. Transistors (for example, transistors 101_1 to 101_2, or transistor 101_1 to 101_2) It is possible to replace 101_N) with a diode, or a transistor (for example, a transistor) Transistors 101_1~101_2, or transistors 101_1~101_N) are connected to the diode. It is possible to connect via a code.

[0144] Furthermore, as shown in Figure 24(A), a separate signal for transfer can be generated in addition to the signal OUT. It is possible. For example, suppose multiple semiconductor devices are connected in a dependent manner. In this case, the transmission signal The signal is not input to the gate signal line, but is instead input to the next stage semiconductor device as a start signal. In many cases, the delay or distortion of the transmission signal is smaller compared to the signal output. In many cases, a signal with minimal delay or sag is used to drive the semiconductor device. This allows for reducing the delay of the output signal of a semiconductor device. Alternatively, node Since the timing of inputting a signal to node 11 or node 12 can be made earlier, the operating range The range can be widened. Also, in the operation of the semiconductor device shown in Figure 24(A), each period The waveforms of each signal in between are shown in Figure 25.

[0145] For this reason, the semiconductor device may have a circuit 700. The circuit 700 is a tra It has multiple transistors, namely transistors 701_1 to 701_2. It is preferable that transistors 1_1 to 701_2 have the same polarity as transistors 101_1 to 101_2. It is assumed to be an N-channel type. However, it is not limited to this, transistor 70 1_1~701_2 can be P-channel type.

[0146] The first terminal of transistor 701_1 is connected to wiring 112, and transistor 701_1 The second terminal is connected to wiring 711_1, and the gate of transistor 701_1 is at node It is connected to 11. The first terminal of transistor 701_2 is connected to wiring 112, and the transistor The second terminal of transistor 701_2 is connected to wiring 711_2, and transistor 701_2 The gate is connected to node 12. Note that multiple semiconductor devices are assumed to be connected in a dependent manner. For example, wiring 711_1 is connected to wiring 115_1 of the next semiconductor device. This is possible. Wiring 711_2 is, as an example, the wiring 115_ of the semiconductor device in the next stage. It is possible to connect to 2. In such a case, the wiring 111 extends to the pixel portion and forms It is possible to do so by using the transistors (e.g., switching transistors) that the pixels possess. It can be connected to the gate of a transistor (selection transistor). However, this Not limited.

[0147] The signal SOUT1 is output from wiring 711_1. Often, these are digital signals with both a low and a high level, and are output signals of semiconductor devices. It is possible to have the function of a signal line. Therefore, wiring 711_1 can function as a signal line. It is possible to have this capability. The signal SOUT2 is output from wiring 711_2. Let's assume that signal SOUT2 is a digital signal with high and low levels. There are many of them, and they can function as output signals for semiconductor devices. Therefore, wiring 7 11_2 can function as a signal line.

[0148] Circuit 700, as an example, controls the voltage of node 11, and the wiring 112 and wiring 711_1 A function to control the conduction state of and / or, depending on the voltage of node 12, the wiring 112 and wiring It has a function to control the conductivity state with 711_2. Alternatively, circuit 700 controls the electrical connection of wiring 112. A function that controls the timing of supplying voltage to wiring 711_1 and / or wiring 711_2. It has a voltage such as voltage V2, or a signal such as signal CK1 supplied to wiring 112. If supplied, circuit 700 supplies voltage or signals etc. to wiring 112 to wiring 711 _1, and / or, has a function to control the timing supplied to wiring 711_2. Circuit 700 wires a high-level signal (e.g., signal CK1) to 711_1, and / or , has a function to control the timing supplied to wiring 711_2. Or, circuit 700, Controls the timing for increasing the voltage of wiring 711_1 and / or wiring 711_2. It has the function of wiring a low-level signal (e.g., signal CK1) to circuit 700. It has the function of controlling the timing supplied to 1_1 and / or wiring 711_2. Circuit 700 sets the voltage of wiring 711_1 and / or wiring 711_2 to, for example, V1. It has a function to control the timing of the reduction. Alternatively, circuit 700 has wiring 711_1, and / or, it has the function of maintaining the voltage of wiring 711_2. Or, circuit 700 is no The voltage of node 11 and / or the voltage of node 12 are controlled by a bootstrap operation, for example, V It has the function of raising it to 2 or more. As described above, the circuit 700 has a control circuit and a buffer circuit. It can function as a path or a switch, etc. However, it is not limited to this. Furthermore, circuit 700 can have various other functions. It is not necessary to have all of the above functions.

[0149] Transistor 701_1, for example, controls the voltage of node 11, and the wiring 112 and wiring It has a function to control the conduction state with 711_1. Alternatively, transistor 701_1 is It has a function to control the timing of supplying the voltage from wiring 112 to wiring 711_1. If a voltage such as voltage V2 or a signal such as signal CK1 is supplied to wiring 112, Transistor 701_1 supplies voltage or signals to wiring 112, etc. to wiring 711_1 It has a function to control the timing of supplying to it. Alternatively, transistor 701_1 is high A device that controls the timing of supplying a level signal (e.g., signal CK1) to wiring 711_1. It has the ability to increase the voltage of the wiring 711_1. It has a function to control the ming. Alternatively, transistor 701_1 has a low-level signal ( For example, it has a function to control the timing of supplying signal CK1) to wiring 711_1. Transistor 701_1 reduces the voltage of wiring 711_1 to, for example, V1. It has a function to control the voltage. Alternatively, transistor 701_1 controls the voltage of wiring 711_1. It has the function of maintaining the state. Alternatively, transistor 701_1 performs bootstrap operation. It has the function of... Alternatively, transistor 701_1 controls the voltage of node 11 in the bootstrap... The transistor has the function of raising the voltage to, for example, V2 or higher through its operation. 701_1 can function as a buffer circuit or a switch, etc. However, this is not the only function; transistor 701_1 also has various other functions. This is possible. Note that transistor 701_1 does not need to have all of the above functions. do not have.

[0150] Transistor 701_2, for example, depends on the voltage of node 12, and the wiring 112 and wiring It has a function to control the conduction state with 711_2. Alternatively, transistor 701_2 is distributed It has a function to control the timing of supplying the voltage of line 112 to wiring 711_2. When a voltage such as voltage V2 or a signal such as signal CK1 is supplied to wiring 112, Rangentar 701_2 supplies voltage or signals to wiring 112 to wiring 711_2. It has a function to control the timing of supply. Alternatively, transistor 701_2 is high-speed. A function that controls the timing of supplying the bell signal (e.g., signal CK1) to wiring 711_2. It has. Or, transistor 701_2 raises the voltage of wiring 711_2 at the timing It has a function to control the signal. Alternatively, transistor 701_2 receives a low-level signal (e.g., For example, it has the function of controlling the timing of supplying signal CK1) to wiring 711_2. Transistor 701_2 reduces the voltage of wiring 711_2 to, for example, V1. It has a function to control the voltage. Alternatively, transistor 701_2 controls the voltage of wiring 711_2. It has a maintenance function. Alternatively, transistor 701_2 performs bootstrap operation. It has the function of bootstrapping the voltage at node 12. Alternatively, transistor 701_2 bootstraps the voltage at node 12. It has the function of raising the voltage to, for example, V2 or higher through operation. 01_2 can function as a buffer circuit or a switch, etc. However, this is not the only function; transistor 701_2 also has various other functions. This is possible. Note that transistor 701_2 does not need to have all of the above functions. stomach.

[0151] Note that when signals SOUT1 and SOUT2 are used as transmission signals, wiring The load on 711_1 and the load on wiring 711_2 may be smaller than the load on wiring 111. There are many. Therefore, the channel width of transistor 701_1 is the channel width of transistor 101_1. It is preferable that it be smaller than the channel width. Similarly, the channel width of transistor 701_2 is It is preferable that it be smaller than the channel width of transistor 101_2. However, it is not limited to this. It will not be done.

[0152] Note that the channel length of transistor 701_1 is equal to the channel length of transistor 101_1. It is possible to make them roughly equal. Alternatively, the channel length of transistor 701_2 is It is possible to make it approximately equal to the channel length of transistor 101_2. However, Not limited to, the channel length of transistor 701_1 is the channel length of transistor 101_1. The channel length can be different, and the channel length of transistor 701_2 is the transistor It is possible to have a different channel length than that of TA101_2.

[0153] Note that the channel width of transistor 701_1 and the channel width of transistor 701_2 The particle size is preferably 100 μm to 5000 μm. More preferably 300 μm to 2 Preferably, it is 000 μm. More preferably, it is 500 μm to 1000 μm. This is preferable, but not limited to this.

[0154] Furthermore, the channel width of transistor 701_1 and the channel width of transistor 701_2 are It is preferable that the transistor sizes be approximately equal. By doing so, the current supply capacity can be made roughly equal. Alternatively, the transistor The degree of degradation of the signal can be made roughly equal. Therefore, the waveform of signal SOUT1 and the signal The waveform of SOUT2 can be made to be roughly the same. Also, for the same reason, The channel length of transistor 701_1 and the channel length of transistor 701_2 are approximately It is preferable that they be equal. However, this is not limited to the channel of transistor 701_1. The width and the channel width of transistor 701_2 can be different.

[0155] Furthermore, as shown in Figure 24(B), similar to Figure 1(B), the circuit 700 has transistor 7 It is possible to have multiple transistors, numbered 01_1 to 701_N. The first terminal of transistors 701_1 to 701_N is connected to wiring 112. Transistor 701 The second terminals of _1~701_N are connected to wiring 711_1~711_N, respectively. The gates of transistors 701_1 to 701_N are connected to nodes 11 to 1N, respectively.

[0156] Furthermore, similar to Figure 24(B), in the configuration described in Figure 24(A), the circuit 700 is also... It is possible to have multiple transistors, namely 701_1 to 701_N. .

[0157] Furthermore, as shown in Figure 24(C), similar to Figure 1(C), the first of transistors 701_1 The terminal and the first terminal of transistor 701_2 can be connected to separate wires. In the example shown in Figure 1(C), wiring 112 is divided into multiple wirings, 112C to 112D. And the first terminal of transistor 701_1 is connected to wiring 112C, The first terminal of ZISTA 701_2 is connected to wiring 112D. However, it is not limited to this. The first terminal of transistor 701_1 and the first terminal of transistor 701_2 are various It can be wired in various ways or connected to various nodes. Note that wiring 112C~112 D can have the same function as wiring 112. Therefore, wiring 112C~11 2D can accept input signals such as signal CK1. However, it is not limited to this. In addition, various signals, voltages, or currents are input to the wiring 112C~112D. It is possible.

[0158] Furthermore, similar to Figure 24(C), in the configuration described in Figures 24(A) to (B), circuit 70 The transistors that 0 possesses (for example, transistors 701_1 to 701_2, or transistors The first terminal of (701_1~701_N) can be connected to separate wiring.

[0159] Furthermore, as shown in Figure 24(D), similar to Figure 1(D), the gate of transistor 701_1 A capacitive element 702_1 is connected between the gate and the second terminal, and the gate of transistor 701_2 and It is possible to connect the capacitive element 702_2 between the second terminal and the other terminal.

[0160] Furthermore, similar to Figure 24(D), the configuration described in Figures 24(A) to (C) also involves transitions. STA (for example, transistors 701_1~701_2, or transistors 701_1~70 A capacitive element can be connected between the gate and the second terminal of (1_N).

[0161] Furthermore, as shown in Figure 24(E), transistor 701_1 is configured similarly to Figure 1(E). One terminal (hereinafter also referred to as the positive terminal) is connected to node 11, and the other terminal (hereinafter also referred to as the negative terminal) It is possible to replace the diode 701a_1 connected to wiring 711_1 with this. Yes. Similarly, transistor 701_2 has one terminal (hereinafter also called the positive terminal) at the node. A die connected to 12, with the other terminal (hereinafter also referred to as the negative terminal) connected to wiring 711_2. It can be replaced with Od 701a_2. However, it is not limited to this. For example, As shown in Figure 24(F), similar to Figure 1(F), the first terminal of transistor 701_1 By connecting the child to node 11, transistor 701_1 is diode-connected. It is possible to do so. Similarly, the first terminal of transistor 701_2 is connected to node 12. By doing so, transistor 701_2 can be diode-connected. .

[0162] Furthermore, similar to Figures 24(E) to (F), the configuration described in Figures 24(A) to (D) also applies. Transistors (for example, transistors 701_1 to 701_2, or transistor 701_ Replacing 1~701_N) with a diode, or a transistor (e.g., a transistor Transistors 701_1 to 701_2, or transistors 701_1 to 701_N, are connected to a diode. It is possible to create a continuous configuration.

[0163] (Embodiment 2) In this embodiment, a specific example of the circuit 200 described in Embodiment 1 will be explained. Circuit 200 can be described as a semiconductor device or a drive circuit. The details to be described will be omitted. Note that the details described in this embodiment are the same as those in Embodiment 1. It can be freely combined with the content described above.

[0164] First, an example of circuit 200 will be explained with reference to Figure 6(A). Circuit 200 has circuit 300. Circuit 300 is a part of circuit 200. For example, the 300 can have one or more transistors. It is preferable that the transistors have the same polarity as transistors 101_1 to 101_2. i. However, it is not limited to this.

[0165] Circuit 300, as an example, includes wiring 115_1, wiring 115_2, node 11, and node It is connected to 12. However, it is not limited to this, and the circuit 300 may also be connected to other devices depending on its configuration. It can also be connected to various wires, various nodes, or various terminals. For example If the circuit 300 is configured to require a power supply voltage, the circuit 300 will have wiring 114, and Alternatively, it can be connected to wiring 118. Or, circuit 300 may also require other signals. If required, circuit 300 is wire 112, wire 113, wire 116_1, wire 116_ 2. It is possible to connect to wiring 117 and / or wiring 111.

[0166] Circuit 300, as an example, receives input signals or voltages (e.g., signal SP1 and signal SP1). It has the function of controlling the voltage settings of node 11 and node 12 according to (2, etc.). Alternatively, circuit 300 may send a high-level signal to node 11 and / or node 12. It has a function to control the timing of supplying voltage V2. Alternatively, circuit 300 is at node 1 1. The timing of supplying a low-level signal or voltage V1 to node 12. It has a control function. Alternatively, the circuit 300 has a control function for node 11 and / or node 12. It has a function of selectively not supplying signals or voltages, etc. Alternatively, circuit 300 is node 11 , and / or, it has the function of putting node 12 into a floating state. However, it is not limited to this, Circuit 300 can also have various other functions. It is not necessary to have all of its functions.

[0167] Next, refer to the timing chart in Figure 2 for an example of the operation of circuit 300 in Figure 6(A). I will explain it.

[0168] During period A1, signal SP1 becomes high level, so circuit 300 has voltage V2, or A high-level signal is supplied to node 11. Subsequently, the voltage at node 11 becomes V1 + Vth1 At the point where it becomes 01_1+Vx, circuit 300 stops supplying voltage or signal to node 11. On the other hand, signal SP2 becomes low level, so circuit 300 has voltage V1 or low level It is possible to supply the bell signal to node 12. Alternatively, circuit 300 can supply the signal to node 12 It is possible not to supply voltage or signals to it.

[0169] During period B1, circuit 300 does not supply voltage or signals to node 11. Meanwhile, circuit 300 supplies voltage V1 or a low-level signal to node 12. This is possible. Alternatively, circuit 300 may not supply voltage or signals to node 12. It is possible.

[0170] During periods C1 to E1, circuit 300 sends a voltage V1 or a low-level signal to node 1 It is possible to supply to 1. Alternatively, circuit 300 can supply voltage or signals etc to node 11. It is possible not to supply it. On the other hand, circuit 300 receives a voltage V1 or low-level signal. It is possible to supply power to node 12. Alternatively, circuit 300 can supply voltage or signal to node 12. It is possible to not supply numbers, etc.

[0171] During period A2, signal SP1 becomes low level, so circuit 300 has a voltage of V1 or low It is possible to supply a U level signal to node 11. Alternatively, circuit 300 can supply a node It is possible not to supply voltage or signals to 11. On the other hand, if signal SP2 is high level Therefore, circuit 300 supplies voltage V2 or a high-level signal to node 12. Then, when the voltage at node 12 becomes V1 + Vth101_2 + Vx, circuit 30 A value of 0 stops the supply of voltage or signal to node 12.

[0172] During period B2, circuit 300 supplies voltage V1 or a low-level signal to node 11. It is possible to do so. Alternatively, the circuit 300 does not supply voltage or signals to node 11. This is possible. On the other hand, circuit 300 does not supply voltage or signals to node 12. It will remain as it is.

[0173] During periods C2 to E2, circuit 300 sends a voltage V1 or a low-level signal to node 1 It is possible to supply to 1. Alternatively, circuit 300 can supply voltage or signals etc to node 11. It is possible not to supply it. On the other hand, circuit 300 receives a voltage V1 or low-level signal. It is possible to supply power to node 12. Alternatively, circuit 300 can supply voltage or signal to node 12. It is possible to not supply numbers, etc.

[0174] Next, a specific example of circuit 300 will be explained with reference to Figure 6(B). Circuit 300 is... It has multiple transistors, namely transistors 301_1 to 301_2. Transistor 3 01_1~301_2 have the same polarity as transistors 101_1~101_2. Preferably, it shall be an N-channel type. However, it shall not be limited to this, and transistor 3 01_1 to 301_2 can be P-channel type.

[0175] The first terminal of transistor 301_1 is connected to wiring 115_1, and transistor 301 The second terminal of _1 is connected to node 11, and the gate of transistor 301_1 is connected to wiring 1 It is connected to 15_1. The first terminal of transistor 301_2 is connected to wiring 115_2. The second terminal of transistor 301_2 is connected to node 12, and transistor 301 The gate of _2 is connected to wiring 115_2.

[0176] Transistor 301_1 controls, for example, the conductivity between wiring 115_1 and node 11. It has the function of controlling. Alternatively, transistor 301_1 controls the voltage of wiring 115_1 at the node It has a function to control the timing of supplying voltage to 11. For example, the voltage V is supplied to wiring 115_1. When a voltage such as 1 or voltage V2, or a signal such as signal SP1 is supplied, the transient Station 301_1 supplies voltage or signals, etc., supplied to wiring 115_1 to node 11. It has a function to control the timing of the operation. Alternatively, transistor 301_1 is high level Controls the timing of supplying the signal (e.g., signal SP1) or voltage V2 to node 11. It has the function of raising the voltage of node 11. It has a function to control the signal. Alternatively, transistor 301_1 has a function to control signals or voltages. It has the function of not supplying power to node 11. Alternatively, transistor 301_1 floats node 11. It has the function of putting it into an idle state. As described above, transistor 301_1 is a diode, and It functions as a rectifier element, such as a diode-connected transistor. However, this Without being limited, transistor 301_1 can have a variety of other functions. Note that transistor 301_1 does not need to have all of the above functions.

[0177] Transistor 301_2 controls, for example, the conductivity between wiring 115_2 and node 12. It has the function of controlling. Alternatively, transistor 301_2 controls the voltage of wiring 115_2 at the node It has a function to control the timing of supplying voltage to 12. For example, voltage V is supplied to wiring 115_2. When a voltage such as 1 or voltage V2, or a signal such as signal SP2 is supplied, the transient Station 301_2 supplies voltage or signals, etc., supplied to wiring 115_2 to node 12. It has a function to control the timing of the operation. Alternatively, transistor 301_2 is high level Controls the timing of supplying the signal (e.g., signal SP2) or voltage V2 to node 12. It has the function of raising the voltage at node 12. It has a function to control the signal. Alternatively, transistor 301_2 has a function to control signals or voltages. It has the function of not supplying power to node 12. Alternatively, transistor 301_2 floats node 12. It has the function of putting it into an idle state. As described above, transistor 301_2 is a diode, and It functions as a rectifier element, such as a diode-connected transistor. However, this Without being limited, transistor 301_2 can also have various other functions. Note that transistor 301_2 does not need to have all of the above functions.

[0178] Next, refer to the timing chart in Figure 2 for an example of the operation of circuit 300 in Figure 6(B). This will be explained. A schematic diagram of the operation of the semiconductor device during period A1 is shown in Figure 7(A). A schematic diagram of the operation of the semiconductor device during period B1 is shown in Figure 7(B), and the semiconductor device during period C1 A schematic diagram of the operation of the device is shown in Figure 7(C), and the semiconductor device during periods D1 and E1 A schematic diagram of the operation is shown in Figure 7(D). Note that the schematic diagram of the operation of the semiconductor device during period A2 is Figure 8(A) shows the operation of the semiconductor device during period B2, and Figure 8(B) shows a schematic diagram of the operation of the semiconductor device during period B2. A schematic diagram of the operation of the semiconductor device during period C2 is shown in Figure 8(C), and during periods D2 and E2... A schematic diagram of the operation of the semiconductor device is shown in Figure 8(D).

[0179] During period A1, signal SP1 becomes high level, so transistor 301_1 turns on. Therefore, the wire 115_1 and node 11 are connected via transistor 301_1. Since it enters a continuous state, the high-level signal SP1 is transmitted from wiring 115_1 to transistor 301. It is supplied to node 11 via _1. As a result, the voltage at node 11 rises. The voltage at node 11 is equal to the gate voltage of transistor 301_1 (high level of signal SP1). The threshold voltage of transistor 301_1 (Vth301_1) was subtracted from the voltage (V2). When the value rises above (V2-Vth301_1), transistor 301_1 turns off. Therefore, since wiring 115_1 and node 11 are not conductive, node 11 is floating. It enters a idle state. Meanwhile, signal SP2 becomes low level, so transistor 301_2 It turns off. Therefore, wiring 115_2 and node 12 become non-conductive.

[0180] During period B1 to E1, signal SP1 is at a low level, so transistor 301_1 It turns off. Therefore, wiring 115_1 and node 11 become non-conductive. On the other hand, Since signal SP2 will be at a low level, transistor 301_2 will be turned off. Therefore, the wiring... Node 115_2 and node 12 become non-conductive.

[0181] During period A2, signal SP1 is at a low level, so transistor 301_1 is turned off. Therefore, wiring 115_1 and node 11 become non-conductive. On the other hand, signal SP Since 2 becomes high level, transistor 301_2 turns on. Therefore, wiring 115 _2 and node 12 become conductive via transistor 301_2, so high level The signal SP2 is supplied to node 12 via transistor 301_2 from wiring 115_2. It is supplied. As a result, the voltage at node 12 rises. Subsequently, the voltage at node 12 is transmitted From the gate voltage of ZISTA301_2 (high-level voltage of signal SP2 (V2)) to the transistor The value obtained by subtracting the threshold voltage of ZISTA301_2 (Vth301_2) (V2-Vth301_2 When the voltage rises above ), transistor 301_2 turns off. Therefore, wiring 115_ Since node 2 and node 12 become non-conductive, node 12 enters a floating state.

[0182] During the period B2 to E2, signal SP1 becomes low level, so transistor 301_1 It turns off. Therefore, wiring 115_1 and node 11 become non-conductive. On the other hand, Since signal SP2 will be at a low level, transistor 301_2 will be turned off. Therefore, the wiring... Node 115_2 and node 12 become non-conductive.

[0183] As described above, the signal supplied to wiring 115_1 (e.g., SP1) and the signal supplied to wiring 115_2 The supplied signal (SP2) is made high level. In this way, transistor 101_1 and Choose whether to turn on Rangista 101_2 or this option. However, this is not the only option. For example, both the signal supplied to wiring 115_1 and the signal supplied to wiring 115_2 It is possible to raise the level. In this case, transistor 101_1 and transistor Since both 101_2 and 112 are turned on, wire 112 and wire 111 are connected to transistor 1 01_1 and transistor 101_2 are connected in parallel, creating a conductive state. Therefore, the signal OU The fall time or rise time of T can be shortened.

[0184] Note that transistors 301_1 and 301_2 have similar functions, The channel width of transistor 301_1 and the channel width of transistor 301_2 are... It is preferable that the transistor sizes be roughly equal. This allows the current supply capability to be made roughly equal. Alternatively, the inferiority of the transistor The degree of transformation can be made roughly equal. Therefore, the voltage at node 11 and the voltage at node 12 Since the voltage can be made roughly equal, the waveform of the signal OUT can be made roughly equal. This is possible. Furthermore, for the same reason, the channel length of transistor 301_1 and the transistor It is preferable that the channel length of STA301_2 is approximately equal to that of STA301_2. However, it is not limited to this. The channel width of transistor 301_1 and the channel width of transistor 301_2 are not used. This means that something different is possible. Alternatively, the channel length of transistor 301_1 and the transistor The channel length of ZISTA301_2 can be different.

[0185] Note that the load of transistor 301_1 (for example, node 11) is transistor 101_1 Since it is often smaller than the load (e.g., wiring 111), the transistor 301_1 The channel width is preferably smaller than the channel width of transistor 101_1. The load of transistor 301_2 (e.g., node 12) is the negative load of transistor 101_2. Since it is often smaller than the load (for example, wiring 112), the channel of transistor 301_2 The channel width is preferably smaller than the channel width of transistor 101_2. However, However, the channel width of transistor 301_1 is less than the channel width of transistor 101_1. It is possible to have a value greater than the channel width. Alternatively, the channel width of transistor 301_2 is This can be greater than the channel width of transistor 101_2.

[0186] Note that the channel width of transistor 301_1 and the channel width of transistor 301_2 The particle size is preferably 500 μm to 3000 μm. More preferably 800 μm to 2 Preferably, it is 500 μm. More preferably, it is 1000 μm to 2000 μm. It is preferable to do so, however, it is not limited to this.

[0187] Furthermore, as shown in Figure 9(A), the gate of transistor 301_1 and transistor 3 The gate of 01_2 can be connected to wiring 113. In such cases, the wiring If signal CK2 is input to 113, then in periods A1 and A2, signal C Since K2 becomes high level, transistors 301_1 and 301_2 It turns on. Therefore, during period A1, the high-level signal SP1 is on wiring 115_1 or The low-level signal SP2 is supplied to node 11 via transistor 301_1. It is supplied from wiring 115_2 to node 12 via transistor 301_2. On the other hand, During period A2, the low-level signal SP1 is transmitted from wiring 115_1 to transistor 301. The high-level signal SP2 is supplied to node 11 via _1, and from wiring 115_2 It is supplied to node 12 via transistor 301_2. In this way, over a predetermined period of time Therefore, the voltage at node 11 or the voltage at node 12 can be fixed, making it resistant to noise. A semiconductor device can be obtained, but it is not limited to this.

[0188] For example, the gates of transistor 301_1 and transistor 301_2 are In addition to wire 113, it can be connected to various other wires. For example, transistor 30 The gate of transistor 1_1 and the gate of transistor 301_2 are in period A1 and / or period In A2, a high-level signal or voltage V2 is supplied to the wiring (for example, wiring 114, It can be connected to wiring 116_1 or wiring 116_2, etc.

[0189] As another example, as shown in Figure 9(B), wiring 113 can be divided into multiple wirings 113A and 113B. It is possible to divide it into several wires. The gate of transistor 301_1 is wire 113A. The gate of transistor 301_2 is connected to wiring 113B.

[0190] As another example, as shown in Figure 9(C), the gate of transistor 301_1 is connected to wiring 11 The gate of transistor 301_2 is connected to wire 116_2, and is connected to wire 6_1. This is possible. However, it is not limited to this. For example, the gateway of transistor 301_1 The wiring to which a high-level signal or voltage V2 is supplied during period A1 (for example, wiring It can be connected to wiring 113, wiring 114, wiring 115_1, or wiring 116_1, etc. It is possible. Similarly, the gate of transistor 301_2 is high during period A2. Wiring to which the signal or voltage V2 is supplied (e.g., wiring 113, wiring 114, wiring 115_2) It can be connected to, or to wiring 116_2, etc.

[0191] As shown in Figure 9(D), the first terminal of transistor 301_1 is connected to wiring 114. Next, the second terminal of transistor 301_1 is connected to node 11, and transistor 3 The gate of 01_1 can be connected to wiring 115_1. Similarly, the transient The first terminal of transistor 301_2 is connected to wiring 114, and the second terminal of transistor 301_2 is connected to wiring 114. The child is connected to node 12, and the gate of transistor 301_2 is connected to wiring 115_2. It is possible to continue. In such a case, during period A1, signal SP1 is high level When this happens, transistor 301_1 turns on. Therefore, voltage V2 is supplied to wiring 114. If supplied, voltage V2 is supplied from wiring 114 through transistor 301_1 to node It is supplied to 11. On the other hand, during period A2, when signal SP2 becomes high level, Transistor 301_2 turns on. Therefore, the voltage V2 is from wiring 114 to transistor 3. It is supplied to node 12 via 01_2, but is not limited to this.

[0192] For example, the first terminal of transistor 301_1 and the first terminal of transistor 301_2 are In addition to wiring 114, it can be connected to various other wirings. For example, a transistor The first terminal of 301_1 and transistor 301_2 are connected during period A1 and / or period A In 2, a high-level signal or voltage V2 is supplied to the wiring (for example, wiring 113, wiring It is possible to connect to line 116_1 or wiring 116_2). In such cases, Since a reverse bias can be applied to the transistor, the degradation of the transistor's characteristics is suppressed. It is possible.

[0193] As another example, as shown in Figure 9(E), wiring 114 can be divided into multiple wirings 114A and 114B. It is possible to divide it into several wires. The first terminal of transistor 301_1 is wire 11 It is connected to 4A, and the first terminal of transistor 301_2 is connected to wiring 114B.

[0194] As another example, as shown in Figure 9(F), the first terminal of transistor 301_1 is connected to wiring 11 It is connected to 6_1, and the first terminal of transistor 301_2 is connected to wiring 116_2. This is possible. In such cases, a reverse bias can be applied to the transistor. This can suppress the degradation of transistor characteristics. However, it is not limited to this. For example, the first terminal of transistor 301_1 receives a high-level signal or during period A1. Wiring to which voltage V2 is supplied (for example, wiring 113, wiring 114, wiring 115_1, or wiring It is possible to connect to wire 116_1, etc. Similarly, transistor 301_2 The first terminal is the wiring to which a high-level signal or voltage V2 is supplied during period A2 (for example) If connected, it will be connected to wiring 113, wiring 114, wiring 115_2, or wiring 116_2, etc. It is possible.

[0195] Furthermore, as shown in Figure 1(B), the circuit 100 consists of transistors 101_1 to 101_N. When there are multiple transistors, the circuit 300 is configured as shown in Figure 10(B) It is possible to have multiple transistors, such as 301_1 to 301_N. The first terminals of converters 301_1 to 301_N are connected to wiring 115_1 to 115_N, respectively. The second terminals of transistors 301_1 to 301_N are, respectively, nodes 11 to 1N. The gates of transistors 301_1 to 301_N are connected to wiring 115_1, respectively. It is connected to ~115_N.

[0196] Furthermore, similar to Figure 10(A), in the configuration described in Figures 9(A) to (F), circuit 300 It is possible to have multiple transistors, namely transistors 301_1 to 301_N. As an example, Figure 10(B) shows that in Figure 9(A), circuit 300 is a transistor This shows the configuration when there are multiple transistors labeled 301_1 to 301_N.

[0197] Furthermore, as shown in Figure 10(C), wiring 115_1 and wiring 115_2 are shared. It is possible. The second terminal and gate of transistor 301_2 are connected to wiring 115_1. This applies. However, it is not limited to this. For example, the second terminal and the gate of transistor 301_1. The terminal and the second terminal and gate of transistor 301_2 are different from wiring 115_1. It is possible to connect to the wiring. Note that sharing multiple wires means connecting each wire to This refers to connecting the elements to be connected to the same wiring. Alternatively, one of the wirings may be omitted, and the other wiring may be connected. This refers to connecting an element that is connected to one wire to the wiring on the other side.

[0198] Furthermore, as with Figure 10(C), the same applies to Figures 9(A)-(F) and 10(A)-(B). In terms of configuration, it is possible to share wiring 115_1 and wiring 115_2. In Figures 10(A) and 10(B), it is possible to share wiring 115_1 to 115_N. As an example, Figure 10(D) shows wiring 115_1 and wiring 1 The configuration when sharing with 15_2 is shown.

[0199] As shown in Figure 11(A), circuit 300 is connected to transistors 302_1~302_2 It is possible to have multiple transistors, such as transistors 302_1 to 302. _2 preferably has the same polarity as transistors 301_1 to 301_2, and N-channel They are often of the Nell type. However, they are not limited to this, and transistors 302_1~302 _2 can be a P-channel type.

[0200] For example, transistor 302_1 has the function of putting node 11 into a floating state. Alternatively, transistor 302_1 has the function of preventing charge leakage from node 11. Alternatively, transistor 302_1 has the function of preventing a decrease in the voltage at node 11. Thus, transistor 302_1 is, for example, a diode, or a diode connection. It functions as a rectifier element such as a transistor. However, it is not limited to this, The ZISTA302_1 can also have various other functions. 302_1 does not need to have all of the above functions.

[0201] For example, transistor 302_2 has the function of making node 12 floating. Alternatively, transistor 302_2 has the function of preventing charge leakage from node 12. Alternatively, transistor 302_2 has the function of preventing a decrease in the voltage at node 12. Thus, transistor 302_2 is a diode, or a diode-connected transistor. It functions as a rectifier element, such as a transistor. However, it is not limited to this; The 302_2 can also have various other functions. _2 does not need to have all of the above functions.

[0202] Furthermore, transistor 302_1 is connected to the second terminal of transistor 301_1 and node 11. Connected in between, transistor 302_2 is connected to the second terminal of transistor 301_2 and the node It is connected between 12 and transistor 302_1. The first terminal of transistor 302_1 is connected to transistor 301_ The second terminal of transistor 302_1 is connected to node 11. The gate of transistor 302_1 is connected to the second terminal of transistor 301_1. The first terminal of transistor 302_2 is connected to the second terminal of transistor 301_2. The second terminal of transistor 302_2 is connected to node 12, and transistor 302_ The gate of transistor 2 is connected to the second terminal of transistor 301_2. However, this is not the only way. I can't.

[0203] Furthermore, as with Figure 11(A), the same principles will be discussed in Figures 9(A) to (F) and Figures 10(A) to (D). In terms of configuration, circuit 300 consists of multiple transistors 302_1 to 302_2. It is possible to have an inverter. Figure 11(B) shows, as an example, Figure 9(A) The circuit 300 has multiple transistors, namely transistors 302_1 to 302_2. The configuration in this case is shown. Figure 11(C) shows, as an example, the circuit 300 in Figure 9(D) The configuration when it has multiple transistors, namely transistors 302_1 to 302_2. show.

[0204] Furthermore, as shown in Figure 11(D), the gate of transistor 302_1 is connected to wiring 115_1. It is possible to connect them. Alternatively, the gate of transistor 302_2 is connected to wiring 115_2. It is possible to connect it to transistor 302_1. However, it is not limited to this, and transistor 302_1 The gate, and the gate of transistor 302_2, are connected to various wires or terminals. It is possible to do this. For example, the gate of transistor 302_1 is transistor 30 It can be connected to the first terminal or gate of 1_1. Or, transistor 302 The gate of _2 can be connected to the first terminal or gate of transistor 301_2. That is the case.

[0205] Furthermore, similar to Figure 11(D), Figures 9(A)-(F), 10(A)-(D), and Figure 11 In the configurations described in (A) to (C), the gate of transistor 302_1 is The first terminal and gate of transistor 301_1 are connected, and the gate of transistor 302_2 is connected, It is possible to connect to the first terminal and gate of transistor 301_1. Figure 11( E) As an example, in the configuration shown in Figure 11(C), transistor 302_1 The gate of transistor 302_2 is connected to wiring 114, and the gate of transistor 302_2 is connected to wiring 114. The configuration in the case of this is shown.

[0206] As shown in Figure 11(F), transistor 302_1 is a component of transistor 301_1. It is not limited to the second terminal side, but can also be connected to the first terminal side of transistor 301_1. It is possible. Alternatively, transistor 302_2 is limited to the second terminal side of transistor 301_2. It is not fixed and can be connected to the first terminal side of transistor 301_2. , transistor 302_1 is between the first terminal of transistor 301_1 and the wiring 115_1 It is possible to connect to transistor 301_. Alternatively, transistor 302_2 can be connected to transistor 301_ It is possible to connect the first terminal of 2 to the wiring 115_2. Transistor 30 The first terminal of 2_1 is connected to wiring 115_1, and the second terminal of transistor 302_1 is The first terminal of transistor 301_1 is connected, and the gate of transistor 302_1 is It is connected to wiring 115_1. The first terminal of transistor 302_2 is connected to wiring 115_2. The second terminal of transistor 302_2 is connected to the first terminal of transistor 301_2. The gate of transistor 302_2 is connected to wiring 115_2. However, This is not limited to this.

[0207] Note that, similar to Figure 11(F), Figures 9(A)-(F), 10(A)-(D), and Figure 11 In the configurations described in (A) to (E), transistor 302_1 is transistor 30 It is not limited to the second terminal side of 1_1, but can also be connected to the first terminal side of transistor 301_1. This is possible. Alternatively, transistor 302_2 is the second terminal of transistor 301_2. It is not limited to one side, but can also be connected to the first terminal side of transistor 301_2. Figure 11(G) shows, as an example, the configuration described in Figure 11(C), where transistor 30 2_1 is connected between the first terminal of transistor 301_1 and wiring 114, and the transistor When 302_2 is connected between the first terminal of transistor 301_2 and wiring 114 The configuration is shown. The first terminal of transistor 302_1 is connected to wiring 114, and the transistor The second terminal of transistor 302_1 is connected to the first terminal of transistor 301_1, and the transistor The gate of transistor 302_1 is connected to wiring 114. The first terminal of transistor 302_2 The child is connected to wiring 114, and the second terminal of transistor 302_2 is connected to transistor 30 The first terminal of 1_2 is connected, and the gate of transistor 302_2 is connected to wiring 114. It can be done.

[0208] As shown in Figure 12(A), circuit 300 is connected to transistors 303_1~303_2 It is possible to have multiple transistors, such as transistors 303_1 to 303. _2 preferably has the same polarity as transistors 301_1 to 301_2, and N-channel They are often of the Nell type. However, they are not limited to this, and transistors 303_1~303 _2 can be a P-channel type.

[0209] Transistor 303_1, as an example, is connected to wiring 118 and node 1 in response to signal SEL1. It has a function to control the conductivity state with 2. Alternatively, transistor 303_1 is connected to wiring 118 It has a function to control the timing of supplying the voltage to node 12. For example, wiring 118 When a signal such as voltage V1 is supplied to it, or when a signal is supplied, transistor 303_1 is wired A device that controls the timing of supplying voltage or signals, etc., supplied to 118 to node 12. It has the ability. Alternatively, transistor 303_1 supplies voltage V1 to node 12 at the timing It has a function to control the signal. Alternatively, transistor 303_1 receives a low-level signal (e.g., For example, send signals SP1, SP2, SEL1, or SEL2 to node 12. It has a function to control the timing of supply. Alternatively, transistor 303_1 is a node It has a function to control the timing of reducing the voltage of 12 to, for example, V1. Or, Trans The transistor 303_1 has the function of maintaining the voltage at node 12. As described above, The ZISTA 303_1 can function as a switch. However, this Without being limited, transistor 303_1 can have a variety of other functions. Note that transistor 303_1 does not need to have all of the above functions.

[0210] Transistor 303_2, as an example, is connected to wiring 118 and node 1 in response to signal SEL2. It has a function to control the conductivity state with 1. Alternatively, transistor 303_2 is connected to wiring 118 It has a function to control the timing of supplying the voltage to node 11. For example, wiring 118 When a signal such as voltage V1 is supplied to it, or when a signal is supplied, transistor 303_2 is wired A device that controls the timing of supplying voltage or signals, etc., supplied to 118 to node 11. It has the ability. Alternatively, transistor 303_2 supplies voltage V1 to node 11 at the timing It has a function to control the signal. Alternatively, transistor 303_2 receives a low-level signal (e.g., For example, send signals SP1, SP2, SEL1, or SEL2 to node 11. It has a function to control the timing of supply. Alternatively, transistor 303_2 is node It has a function to control the timing of reducing the voltage of 11 to, for example, V1. Or, Trans The transistor 303_2 has the function of maintaining the voltage at node 11. As described above, The ZISTA 303_2 can function as a switch. However, this Without being limited, transistor 303_2 can have a variety of other functions. Note that transistor 303_2 does not need to have all of the above functions.

[0211] The first terminal of transistor 303_1 is connected to wire 118, and transistor 303_1 The second terminal is connected to node 12, and the gate of transistor 303_1 is connected to wiring 116 It is connected to _1. The first terminal of transistor 303_2 is connected to wiring 118, and the transistor The second terminal of transistor 303_2 is connected to node 11, and the gate of transistor 303_2 The wire is connected to wiring 116_2, but is not limited to this.

[0212] The operation of the semiconductor device shown in Figure 12(A) will be explained with reference to the timing chart in Figure 2. Figure 38(A) shows a schematic diagram of the operation of the semiconductor device during period A1, and period B1 Figure 38(B) shows a schematic diagram of the operation of the semiconductor device in period C1. A schematic diagram of the operation is shown in Figure 38(C), illustrating the operation of the semiconductor device during periods D1 and E1. A schematic diagram is shown in Figure 38(D). A schematic diagram of the operation of the semiconductor device during period A2 is shown in Figure 38(D). Figure 39(A) shows the operation of the semiconductor device during period B2, and Figure 39(B) shows a schematic diagram of the operation of the semiconductor device during period B2. A schematic diagram of the operation of the semiconductor device during period C2 is shown in Figure 39(C), and periods D2 and E A schematic diagram of the operation of the semiconductor device in 2 is shown in Figure 39(D). Note that Figures 38 to 39 are The operation when the semiconductor device in Figure 6(B) and the semiconductor device in Figure 12(A) are combined is as follows: A schematic diagram is shown.

[0213] During the period A1-E1, the signal SEL1 becomes high level, so transistor 303_ 1 is turned on. Therefore, the connection between wire 118 and node 12 is via transistor 303_1. As it becomes conductive, the voltage V1 is transmitted from wiring 118 through transistor 303_1. This is supplied to node 12. As a result, the voltage at node 12 is maintained at V1. On the other hand, since the signal SEL2 becomes low level, transistor 303_2 turns off. Therefore, wiring 118 and node 11 become non-conductive.

[0214] During period A2 to E2, the signal SEL1 becomes low level, so transistor 303_ 1 is turned off. Therefore, wiring 118 and node 12 become non-conductive. On the other hand, the signal Since SEL2 becomes high level, transistor 303_2 turns on. Therefore, wiring 118 and node 11 become conductive via transistor 303_2, so the voltage V 1 is supplied from wiring 118 to node 11 via transistor 303_2. As a result, the voltage at node 11 is maintained at V1.

[0215] Thus, even when transistor 301_1 is off, transistor 303_2 By turning it on, the voltage at node 11 can be fixed. Alternatively, the transistor Even when transistor 301_2 is off, transistor 303_1 turns on. The voltage at node 12 can be fixed. In this way, the voltage at node 11, or node Since the voltage can be fixed at 12, a semiconductor device that is resistant to noise can be obtained.

[0216] Furthermore, similar to Figure 12(A), Figures 9(A)-(F), 10(A)-(D), and Figure 11 In the configurations described in (A) to (G), the circuit 300 is composed of transistors 303_1 to 30 It is possible to have multiple transistors of type 3_2. Figure 12(B) shows an example. In the configuration shown in Figure 9(A), the circuit 300 is composed of transistors 303_1 to 303 The configuration for a device with multiple transistors, namely _2, is shown. Figure 12(C) shows an example. In the configuration described in Figure 9(D), the circuit 300 is composed of transistors 303_1 to 303_ The configuration for a device with multiple transistors, number 2, is shown. Figure 12(D) shows an example. In the configuration shown in Figure 11(B), the circuit 300 is composed of transistors 303_1 to 303_ The configuration for a system with multiple transistors, number 2, is shown. Figure 12(E) shows an example. In the configuration shown in Figure 11(C), the circuit 300 is composed of transistors 303_1 to 303_ The configuration for a system with multiple transistors, number 2, is shown. Figure 13(A) shows an example. In the configuration shown in Figure 11(F), the circuit 300 is composed of transistors 303_1 to 303_ This shows the configuration when there are two or more transistors.

[0217] As shown in Figure 13(B), the second terminal of transistor 303_1 is connected to transistor 3 The connection point between the second terminal of 01_2 and the first terminal of transistor 302_2 is to be connected. This is possible. Alternatively, the second terminal of transistor 303_2 may be connected to the second terminal of transistor 301_1. It is possible to connect the two terminals to the first terminal of transistor 302_1. However, this is not limited to the second terminal of transistor 303_1, which may be connected to various wires or other connections. It can be connected to various nodes. Alternatively, the second terminal of transistor 303_2 is It can be connected to various wiring or various nodes. For example, transistor 3 The second terminal of 03_1 is connected to the second terminal of transistor 301_2 and transistor 302_2. The connection point with the first terminal, or the first terminal of transistor 301_2 and transistor 302_ It can be connected to the connection point with the second terminal of 2, etc. Alternatively, transistor 3 The second terminal of 03_2 is connected to the second terminal of transistor 301_1 and transistor 302_1. The connection point with the first terminal, or the first terminal of transistor 301_2 and transistor 302_ It can be connected to the connection point with the second terminal of 1, etc.

[0218] In addition, similar to Figure 13(B), Figures 9(A)-(F), 10(A)-(D), and 11(A) In the configurations described in )~(G), Figures 12(A)~(E), and Figure 13(A), The second terminal of transistor 303_1 connects to the second terminal of transistor 301_2 and transistor 30 The connection point with the first terminal of 2_2, or the connection between the first terminal of transistor 301_2 and the transistor It can be connected to the connection point of the second terminal of 302_2, or to the transistor. The second terminal of transistor 303_2 is connected to the second terminal of transistor 301_1 and transistor 30 The connection point with the first terminal of 2_1, or the connection between the first terminal of transistor 301_1 and the transistor It can be connected to the second terminal of 302_1, for example.

[0219] As shown in Figure 13(C), the first terminal of transistor 303_1 and transistor 3 The first terminal of 03_2 can be connected to a separate wire. Figure 13(C) In this example, wiring 118 is divided into multiple wirings, 118A and 118B. The first terminal of transistor 303_1 is connected to wiring 118A, and transistor 303 The first terminal of _2 is connected to wiring 118B. However, it is not limited to this, the transistor The first terminal of transistor 303_1 and the first terminal of transistor 303_2 are connected to various wires, or It can be connected to various nodes. Note that wiring 118A~118B is wiring 1 It is possible to have the same function as 18. Therefore, wiring 118A~118B is It is possible to input signals such as CK1. However, this is not limited to this, wiring 11 Various signals, voltages, or currents can be input to 8A~B.

[0220] Furthermore, similar to Figure 13(C), Figures 9(A)-(F), 10(A)-(D), and 11(A) In the configurations described in )~(G), Figures 12(A)~(E), and Figures 13(A)~(B), The first terminal of transistor 303_1 and the first terminal of transistor 303_2 are separate. It can be connected to the wiring.

[0221] As shown in Figure 13(D), the first terminal of transistor 303_1 is connected to wiring 116_ It is possible to connect to 2. Alternatively, the first terminal of transistor 303_2 is connected to wiring 1. It is possible to connect to 16_1. By doing so, transistor 303_ During the period when 1 is OFF, a high-level signal can be supplied to the first terminal. Similarly, during the period when transistor 303_2 is off, the first terminal is high-frequency. This allows the bell signal to be supplied. Therefore, a reverse bias is applied to the transistor. This allows for mitigating the degradation of transistor characteristics.

[0222] In addition, similar to Figure 13(D), Figures 9(A)-(F), 10(A)-(D), and 11(A) In the configurations described in )~(G), Figures 12(A)~(E), and Figures 13(A)~(C), The first terminal of transistor 303_1 can be connected to wiring 116_2. Alternatively, the first terminal of transistor 303_2 can be connected to wiring 116_1. That is the case.

[0223] As shown in Figure 13(E), transistor 301_1 is connected to one terminal (hereinafter referred to as the positive terminal). (Also known as) is connected to node 12, and the other terminal (hereinafter also known as the negative terminal) is connected to wiring 116_ It is possible to replace diode 303a_1 connected to 1. Alternatively, the transient STA301_2 has one terminal (hereinafter also called the positive terminal) connected to node 11, and the other terminal The terminal (hereinafter also referred to as the negative terminal) is connected to the diode 303a_2 which is connected to the wiring 116_2. It is possible to replace it. However, it is not limited to this. For example, as shown in Figure 13(F) As shown above, the first terminal of transistor 303_1 is connected to node 12, The transistor 303_1 can be configured to be diode-connected. Similarly, The first terminal of transistor 303_2 is connected to node 11, 303_2 can be configured with diode connections.

[0224] Furthermore, similar to Figures 13(E)-(F), Figures 9(A)-(F), 10(A)-(D), and Figure The configuration described in 11(A)-(G), Figures 12(A)-(E), and Figures 13(A)-(D) Even if you replace the transistor (for example, transistors 303_1 to 303_2) with a diode... To replace, or to replace transistors (e.g., transistors 303_1 to 303_2) It is possible to configure it with an iodine connection.

[0225] Furthermore, as shown in Figure 11(H), transistors 302_1 to 302_2 are connected to resistor element 3 It is possible to replace them with 04_1~304_2. Alternatively, as shown in Figure 12(F) Replace transistors 302_1~302_2 with diodes 305_1~305_2. It is possible to do so. However, it is not limited to this.

[0226] Furthermore, similar to Figure 11(H) or Figure 12(F), Figures 9(A)~(F) and 10(A)~( D), as described in Figures 11(A)-(G), 12(A)-(E), and 13(A)-(F). Even in this configuration, it is possible to replace the transistor with a resistor or diode. ru.

[0227] As shown in Figure 14(A), a P-channel transistor is used as the transistor. It is possible. Transistors 101p_1~101p_2 are transistor 10 Corresponding to 1_1~101_2, it is a P-channel type. Transistors 301p_1~301 p_2 corresponds to transistors 301_1 to 301_2 and is a P-channel type. As shown in Figure 14(B), if the transistor polarity is P-channel type, then wiring 113 Voltage V1 is supplied to the wiring 118, and voltage V2 is supplied to the signal CK1, signal CK2, Signal SP1, Signal SP2, Signal SEL1, Signal SEL2, Signal RE, Voltage at Node 11, The voltage and signal OUT at node 12 are inverted compared to the timing chart in Figure 2. It should be noted that...

[0228] In addition, similar to Figure 14(A), Figures 9(A)-(F), 10(A)-(D), and 11(A) In the configurations described in )~(H), Figures 12(A)~(F), and Figures 13(A)~(F), Therefore, a P-channel transistor can be used as the transistor.

[0229] (Embodiment 3) In this embodiment, a specific example of the circuit 200, different from that of Embodiment 2, will be described. The details described in Embodiments 1 and 2 will be omitted from this explanation. The contents described in this section can be appropriately combined with the contents described in Embodiments 1 and 2. can.

[0230] First, an example of circuit 200 will be explained with reference to Figure 15(A). In this example, circuit 200 has circuit 400. Circuit 400 is a part of circuit 200. Circuit 400 may, for example, have one or more transistors. These transistors should have the same polarity as transistors 101_1 to 101_2. It seems so. However, it is not limited to this.

[0231] Furthermore, as shown in Figure 15(B), circuit 200, in addition to circuit 400, is described in Embodiment 2. It is possible to have a bell circuit 300. Note that circuit 300 and circuit 400 are circuits It is possible for some or all of it to be shared.

[0232] Circuit 400, as an example, includes wiring 114, wiring 118, node 11, node 12, and wiring It is connected to line 111. However, it is not limited to this, and circuit 400 may be connected in any way depending on its configuration. It can also be connected to various other wires, nodes, or terminals. For example... For example, if circuit 400 requires a signal, circuit 400 will use wiring 112, wiring 113, and Wire 115_1, Wire 115_2, Wire 116_1, Wire 116_2, and / or Wire 1 It is possible to connect to 17.

[0233] Circuit 400, as an example, measures the voltage at node 11, the voltage at node 12, and / or wiring 1 Depending on the voltage of 11, the voltage of node 11, the voltage of node 12, and / or the wiring 111 It has a function to control the voltage. Alternatively, circuit 400 is node 11, node 12, and / or This function controls the timing of supplying a low-level signal or voltage V1 to wiring 111. It has. Alternatively, circuit 400 floats node 11, node 12, and / or wiring 111. It has a function to put it into a idle state. Alternatively, the circuit 400 has a function to put the wiring 111 and node 11 into a state of continuity. It has a function to control the continuity state between the wiring 111 and node 12. It has a control function. However, it is not limited to this, and circuit 400 also has various other functions. It is possible to have these functions. However, circuit 400 does not need to have all of the above functions. .

[0234] Next, regarding an example of the operation of circuit 400 in Figure 15(A), refer to the timing chart in Figure 2. I will explain by referring to it.

[0235] During period A1, circuit 400 often does not supply signals or voltages to node 11. i. On the other hand, circuit 400 sends a voltage V1 or low-level signal to node 12, and / or It is possible to supply power to wiring 111. Alternatively, circuit 400 can supply voltage or signals etc. It is possible not to supply power to wire 12 and / or wire 111.

[0236] During period B1, circuit 400 sends signals or voltages to node 11 and / or wiring 1 Often, it is not supplied to 11. On the other hand, circuit 400 receives a voltage V1 or low-level signal. It is possible to supply to node 12. Alternatively, circuit 400 can supply voltage or signals etc. It is possible not to supply to D12.

[0237] During periods C1 to E1, circuit 400 sends a voltage V1 or low-level signal to node 11. It is possible to supply to node 12 and / or wiring 111. Alternatively, circuit 400 is , do not supply voltage or signals etc. to node 11, node 12, and / or wiring 111. This is possible.

[0238] During period A2, circuit 400 often does not supply signals or voltages to node 12. i. On the other hand, circuit 400 sends a voltage V1 or low-level signal to node 11, and / or It is possible to supply power to wiring 111. Alternatively, circuit 400 can supply voltage or signals etc. It is possible not to supply power to wire 11 and / or wiring 111.

[0239] During period B2, circuit 400 sends signals or voltages to node 12 and / or wiring 1 Often, it is not supplied to 11. On the other hand, circuit 400 receives a voltage V1 or low-level signal. It is possible to supply to node 11. Alternatively, circuit 400 can supply voltage or signals etc. It is possible not to supply to D11.

[0240] During periods C2 to E2, circuit 400 receives a voltage V1 or low-level signal at node 11. It is possible to supply to node 12 and / or wiring 111. Alternatively, circuit 400 is , do not supply voltage or signals etc. to node 11, node 12, and / or wiring 111. This is possible.

[0241] Next, a specific example of circuit 400 will be explained with reference to Figure 16(A). Circuit 400 is, Circuit 500, multiple transistors 401_1~401_2, and It has transistor 402. Multiple transistors 401_1~401_2 Transistor 402 has the same polarity as transistors 101_1 to 101_2. It is preferable that it be an N-channel type, however, it is not limited to this. For example Omit either transistors 401_1 to 401_2, or transistor 402. It is possible to use multiple transistors, such as transistors 401_1 to 401_2. Transistors 402 and 402 can be P-channel type.

[0242] The first terminal of transistor 401_1 is connected to wiring 118, and transistor 401_1 The second terminal of transistor 401_2 is connected to node 11. The first terminal of transistor 401_2 is connected to wiring 1. The second terminal of transistor 401_2 is connected to node 12, and is connected to node 18. The first terminal of transistor 402 is connected to wiring 118, and the second terminal of transistor 402 is , is connected to wiring 111. Circuit 500 is connected to wiring 118, wiring 114, node 11, node D12, Wiring 111, Gate of transistor 401_1, Gate of transistor 401_2 It is connected to the gate of transistor 402, and / or to the gate of transistor 402. However, it is not limited to this. The circuit 500 can be connected to various wires or nodes depending on its configuration. It is possible.

[0243] The connection point between the gate of transistor 401_1 and circuit 500 is indicated as node 21. The connection point between the gate of transistor 401_2 and circuit 500 is indicated as node 22. The connection point between the gate of ZISTA 402 and circuit 500 is indicated as node 31.

[0244] Transistor 401_1 controls, for example, the conductivity state between wiring 118 and node 11. It has the function of supplying the voltage of wiring 118 to node 11. It has a function to control the timing of supply. For example, a voltage such as voltage V1 is supplied to wiring 118. , or when a signal such as signal CK2 is supplied, transistor 401_1 is connected to wiring 118 It has a function to control the timing of supplying voltage or signals, etc., to node 11. Therefore, as described above, transistor 401_1 has the function of a switch. It is possible. However, it is not limited to this; transistor 401_1 has various other functions. It is possible to have all of the above functions. There's no need to do that.

[0245] Transistor 401_2 controls, for example, the conductivity state between wiring 118 and node 12. It has the function of supplying the voltage of wiring 118 to node 12. It has a function to control the timing of supply. For example, a voltage such as voltage V1 is supplied to wiring 118. , or when a signal such as signal CK2 is supplied, transistor 401_2 is connected to wiring 118 It has a function to control the timing of supplying voltage or signals, etc., to node 12. Therefore, as described above, transistor 401_2 has the function of a switch. It is possible. However, it is not limited to this; transistor 401_2 has various other functions. It is possible to have all of the above functions. There's no need to do that.

[0246] Transistor 402, for example, controls the conductivity between wire 118 and wire 111. It has the ability to supply the voltage of wiring 118 to wiring 111. It has a function to control the timing. For example, a voltage such as voltage V1 or a signal is applied to the wiring 118. When signals such as CK2 are supplied, transistor 402 is supplied to wiring 118. It has a function to control the timing of supplying voltage or signals to the wiring 111. Thus, transistor 402 can function as a switch. Furthermore, the transistor 402 is not limited to this and can have various other functions. Yes, it does. However, transistor 402 does not need to possess all of the above functions.

[0247] Circuit 500, as an example, measures the voltage at node 11, the voltage at node 12, and / or wiring 1 Depending on 11, the voltage at node 21, the voltage at node 22, and / or the voltage at node 31 It has a function to control the timing of the control. Alternatively, circuit 500 has node 21, node 22, and / or node 31, a high-level signal, a low-level signal, voltage V1, or It has the function of controlling the timing of supplying voltages such as voltage V2. Circuit 500 has the function of a control circuit. However, it is not limited to this, and circuit 500 may Furthermore, it is possible to have various other functions. Note that circuit 500 does not have all of the above functions. It is not necessary to have it.

[0248] Next, regarding an example of the operation of circuit 400 in Figure 16(A), the timing chart of 16(B) Please refer to Figure 40(A) for an explanation. A schematic diagram of the operation of the semiconductor device during period A1 is shown in Figure 40(A). Figure 40(B) shows a schematic diagram of the operation of the semiconductor device during period B1, and period C1 A schematic diagram of the operation of the semiconductor device in Figure 41(A) is shown, and during periods D1 and E1 A schematic diagram of the operation of the semiconductor device is shown in Figure 41(B). Note that the semiconductor device during period A2 A schematic diagram of the operation is shown in Figure 42(A), and a schematic diagram of the operation of the semiconductor device during period B2 is shown in Figure 42(A). Figure 42(B) shows the schematic diagram of the operation of the semiconductor device during period C2, and Figure 43(A) shows the schematic diagram of the operation of the semiconductor device during period C2. A schematic diagram of the operation of the semiconductor device during periods D2 and E2 is shown in Figure 43(B). In Figures 40 to 43, the semiconductor device shown in Figure 6(B) is used as circuit 300, and circuit 400 is... The configuration when using the semiconductor device shown in Figure 16(A) is shown below.

[0249] During period A1, signal SP1 becomes high level, causing the voltage at node 11 to rise. Therefore, circuit 500 supplies a low-level signal or voltage V1 to node 21. Transistor 401_1 is turned off, so wiring 118 and node 11 are in a non-conductive state. Yes. Signal SP2 will be at a low level, so node 12 will be kept roughly at V1. Therefore, the circuit 500 supplies a high-level signal or voltage V2 to node 22. Then, transistor 401_2 turns on, so wiring 118 and node 12 are connected. Conduction occurs via transistor 401_2. Therefore, voltage V1 is transmitted through transistor 401_2. It is supplied to node 12 via 2. A low-level signal CK1 is supplied to wiring 111. Therefore, the voltage of wiring 111 becomes V1. Thus, circuit 500 receives a high-level signal or This supplies voltage V2 to node 31. Then transistor 402 turns on, so Line 118 and wiring 111 become conductive via transistor 402. Therefore, voltage V 1 is supplied to wiring 111 via transistor 402. However, it is not limited to this. For example, during period A1, circuit 500 receives a low-level signal or voltage V1 at node 2 It is possible to supply power to 2. In this case, transistor 401_2 will be turned off, Wiring 118 and node 12 can be in a non-conductive state. As another example, period A In step 1, the circuit 500 supplies a low-level signal or voltage V1 to node 31. This is possible. In this case, transistor 402 will be turned off, so wire 118 and wire 11 It is possible to be in a non-conductive state with 1.

[0250] During period B1, the voltage at node 11 rises due to the bootstrap operation, Circuit 500 supplies a low-level signal or voltage V1 to node 21. Then, the transistor Since ZISTA 401_1 is turned off, wiring 118 and node 11 become non-conductive. Since the voltage of circuit 12 is maintained to be approximately V1, circuit 500 is high level The signal or voltage V2 is supplied to node 22. Then, transistor 401_2 turns on. Therefore, wiring 118 and node 12 become electrically connected via transistor 401_2. Therefore, voltage V1 is supplied to node 12 via transistor 401_2. Wiring 1 Since a high-level signal CK1 is supplied to 11, the voltage across wiring 111 becomes V2. Therefore, circuit 500 supplies a low-level signal or voltage V1 to node 31. As a result, transistor 402 turns off, and wires 118 and 111 become non-conductive. However, it is not limited to this. For example, during period B1, circuit 500 is low level It is possible to supply the signal or voltage V1 to node 22. In this case, the transistor Since 401_2 is turned off, it is possible for wiring 118 and node 12 to become non-conductive. That is the case.

[0251] During periods C1 to E1, the voltage at node 11 is approximately V1, so circuit 500 This supplies a high-level signal or voltage V2 to node 21. Therefore, transistor 40 Since 1_1 is turned on, the wiring 118 and node 11 are connected via transistor 401_1. The state becomes open. Then, voltage V1 is transmitted from wiring 118 through transistor 401_1. It is supplied to node 11. Since the voltage at node 12 is approximately V1, circuit 500 is A level signal or voltage V2 is supplied to node 22. Therefore, transistor 401_2 Since it turns on, wiring 118 and node 12 are in a conductive state via transistor 401_2. This results in the voltage V1 being transmitted from wiring 118 through transistor 401_2 to node 1. It is supplied to 2. The voltage of wiring 111 is approximately V1, so circuit 500 is high level. The signal or voltage V2 is supplied to node 31. Therefore, transistor 402 turns on. Therefore, wire 118 and wire 111 become electrically connected via transistor 402. Voltage V1 is supplied from wiring 118 to wiring 111 via transistor 402. Furthermore, it is not limited to this. For example, in either period D1 or period E1, circuit 500 The low-level signal or voltage V1 is sent to node 21, node 22, and / or node 31. It is possible to supply to transistor 401_1, transistor 401_ 2. And / or, transistor 402 can be turned off. And wiring 11 8 and node 11, wiring 118 and node 12, and / or wiring 118 and wiring 111 are not It is possible to achieve a conductive state.

[0252] During period A2, signal SP1 becomes low level, so node 11 remains roughly V1. Therefore, the circuit 500 supplies a high-level signal or voltage V2 to node 21. Then, transistor 401_1 turns on, so wiring 118 and node 11 are connected. Conduction occurs via transistor 401_1. Therefore, voltage V1 is transmitted through transistor 401. It is supplied to node 11 via _1. Also, since signal SP2 becomes high level, no The voltage at point 12 rises. Therefore, circuit 500 does not accept a low-level signal or voltage V1. Supply power to D22. Then, transistor 401_2 will turn off, so wire 118 and NO The circuit becomes non-conductive with respect to 12. A low-level signal CK1 is supplied to wiring 111. Therefore, the voltage across wiring 111 becomes V1. Thus, circuit 500 receives a high-level signal or electricity. Voltage V2 is supplied to node 31. Then transistor 402 turns on, so wiring 1 18 and wiring 111 become conductive via transistor 402. Therefore, voltage V1 is Power is supplied to wiring 111 via transistor 402. However, it is not limited to this. Example For example, during period A2, circuit 500 sends a low-level signal or voltage V1 to node 21. It is possible to supply power. In this case, transistor 401_1 will be turned off, so wiring 118 and node 11 can be in a non-conductive state. As another example, in period A2 In this configuration, circuit 500 can supply a low-level signal or voltage V1 to node 31. It is possible. In this case, transistor 402 will be turned off, so wire 118 and wire 111 and It is possible for it to become non-conductive.

[0253] During period B2, the voltage at node 11 is maintained at approximately V1, so circuit 500 is, A high-level signal or voltage V2 is supplied to node 21. Then, transistor 401_ Since 1 is turned on, there is conductivity between wire 118 and node 11 via transistor 401_1. This is the state that occurs. Therefore, voltage V1 is supplied to node 11 via transistor 401_1. The voltage at node 12 rises due to the bootstrap operation, so circuit 500, A low-level signal or voltage V1 is supplied to node 22. Then, transistor 401_ Since 2 is turned off, wiring 118 and node 12 become non-conductive. Wiring 111 is Since a high-level signal CK1 is supplied, the voltage across wiring 111 becomes V2. Therefore, The path 500 supplies a low-level signal or voltage V1 to node 31. Then the transient Since station 402 is turned off, wiring 118 and wiring 111 become non-conductive. However, This is not limited to this. For example, during period B2, circuit 500 receives a low-level signal or It is possible to supply voltage V1 to node 21. In this case, transistor 401_1 Since it is turned off, it is possible for wiring 118 and node 11 to be in a non-conductive state.

[0254] During periods C2 to E2, the voltage at node 11 is approximately V1, so circuit 500 This supplies a high-level signal or voltage V2 to node 21. Therefore, transistor 40 Since 1_1 is turned on, the wiring 118 and node 11 are connected via transistor 401_1. The state becomes open. Then, voltage V1 is transmitted from wiring 118 through transistor 401_1. It is supplied to node 11. Since the voltage at node 12 is approximately V1, circuit 500 is A level signal or voltage V2 is supplied to node 22. Therefore, transistor 401_2 Since it turns on, wiring 118 and node 12 are in a conductive state via transistor 401_2. This results in the voltage V1 being transmitted from wiring 118 through transistor 401_2 to node 1. It is supplied to 2. The voltage of wiring 111 is approximately V1, so circuit 500 is high level. The signal or voltage V2 is supplied to node 31. Therefore, transistor 402 turns on. Therefore, wire 118 and wire 111 become electrically connected via transistor 402. Voltage V1 is supplied from wiring 118 to wiring 111 via transistor 402. Furthermore, it is not limited to this. For example, in either period D2 or period E2, circuit 500 The low-level signal or voltage V1 is sent to node 21, node 22, and / or node 31. It is possible to supply to transistor 401_1, transistor 401_ 2. And / or, transistor 402 can be turned off. And wiring 11 8 and node 11, wiring 118 and node 12, and / or wiring 118 and wiring 111 are not It is possible to achieve a conductive state.

[0255] Note that the channel width of transistor 401_1 and the channel width of transistor 401_2 are It is preferable that they be approximately equal. By doing so, the values ​​of node 11 in period T1 The change in voltage is made to be approximately equal to the change in voltage at node 12 during period T2. Yes, it is possible. Therefore, the waveform of the signal OUT can be made to be roughly equal. However, this Not limited to the channel width of transistor 401_1 and the channel of transistor 401_2 Width can be different.

[0256] Note that the channel width of transistor 401_1 and the channel width of transistor 401_2 The particle size is preferably 100 μm to 4000 μm. More preferably 500 μm to 30 Preferably, it is 00 μm. More preferably, it is 1000 μm to 2000 μm. This is preferable, but not limited to this.

[0257] Furthermore, the channel width of transistor 402 is preferably 500 μm to 5000 μm. It is preferable that it be 1000 μm to 3000 μm. More preferably, the particle size is 2000 μm to 3000 μm. However, it is not limited to this. stomach.

[0258] Furthermore, as shown in Figure 17(A), multiple transistors are connected in parallel. This is possible. And these multiple transistors can be turned on sequentially or randomly. It is possible. Figure 17(A) shows an example where two transistors are connected in parallel. The combined configuration is shown. In this case, the two transistors are either one gate selection period or crossed. It is possible to repeatedly switch on and off every half-cycle of the signal. Transistor 401_ In transistors 1-401_2 and transistor 402, each transistor is connected in parallel with the respective transistor. The transistors are connected in this manner. For example, transistor 401_1 is connected in parallel. To enable this, transistor 411_1 is newly added. Terminal 1 is connected to wiring 118, and terminal 2 of transistor 411_1 is connected to node 11. The gate of transistor 411_1 is connected to circuit 500. Alternatively, transistor A transistor 411_2 is added to be connected in parallel with 401_2. The first terminal of transistor 411_2 is connected to wiring 118, and the second terminal of transistor 411_2 Terminal 2 is connected to node 11, and the gate of transistor 411_2 is connected to circuit 500. A transistor 412 is added so that it is connected in parallel with transistor 402. The first terminal of transistor 412 is connected to wiring 118, and the transistor 412 The second terminal is connected to node 11, and the gate of transistor 412 is connected to circuit 500. However, this is not limited to transistors 411_1~411_2, and transistors It is possible to add only one of the Ta412 models.

[0259] As shown in Figure 17(B), the first terminal of transistor 411_1 is connected to wiring 115_ Connected to 1, the gate of transistor 411_1 can be connected to wiring 113. Alternatively, the first terminal of transistor 411_2 is connected to wiring 115_2, and the transistor The gate of inverter 411_2 can be connected to wiring 113. Alternatively, The gate of the inverter 412 can be connected to wiring 113. Therefore, the conduction state of transistors 411_1 to 411_2 and transistor 412 is controlled. The circuit for controlling it can be omitted. However, it is not limited to this, and transistors It can be connected in various configurations. For example, transistor 401_ The second terminal of transistor 1, the second terminal of transistor 401_2, and / or transistor 402 The second terminal can be connected to wiring 113. By doing so, Since a reverse bias can be applied to the transistor, the degradation of the transistor's characteristics can be suppressed. This is possible.

[0260] Furthermore, as shown in Figures 18(A) and 18(B), transistors 401_1~401_ The gates of transistor 2 and transistor 402 can be connected to each other. In the semiconductor device shown in Figure 18(A), transistors 401_1 to 401_2 are transistors This configuration is connected to the gate of transistor 402, and Figure 18(B) shows transistor 401_1 Alternatively, 401_2 is connected to the gate of transistor 402. In this case, the circuit 500 is a low-level signal or voltage V during periods A1-B1 and A2-B2. 1 is the gateway of transistor 401_1, transistor 401_2, and transistor 402. It supplies to the. Meanwhile, circuit 500, during periods C1 to E1 and C2 to E2, A high-level signal or voltage V2 is supplied to the gates of these transistors. Therefore, Transistors 401_1~401_2 and transistor 402 are used during periods A1~B1, and It is turned off during periods A2-B2, and turned on during periods C1-E1 and C2-E2. It is possible to achieve this. Thus, transistors 401_1~401_2, and Since the circuit for controlling the conduction state of the ZISTA 402 can be made common, the circuit size This can be simplified. However, it is not limited to this. For example, circuit 500 is In either period D1 or period E1, and in either period D2 or period E2, the low level of confidence The voltage V1 is set to the gate of transistors 401_1~401_2 and transistor 402. It is possible to supply to the circuit. Alternatively, circuit 500 can supply to period C1~E1 and period C2~E In one of the two cases, a low-level signal or voltage V1 is transmitted to transistors 401_1~401 It is possible to supply _2 and the gate of transistor 402. By doing so, The transistor repeatedly switches on and off for each gate selection period, or each frame. This makes it possible to suppress the degradation of transistor characteristics. Another example is... The gate of transistor 402 is connected to the gate of transistor 401_1 and transistor 4 It is possible to connect to only one of the gates, 01_2 or the other gate.

[0261] Furthermore, as shown in Figure 18(C), the first terminal of transistor 401_1, transistor 4 The first terminal of 01_2 and the first terminal of transistor 402 are connected to separate wires. This is possible. In Figure 18(C), as an example, wiring 118 is wiring 118C~118 It is divided into multiple wires F. Then, circuit 500 is connected to wire 118C, The first terminal of transistor 401_1 is connected to wiring 118D, and transistor 401_2 The first terminal of transistor 402 is connected to wiring 118E, and the first terminal of transistor 402 is connected to wiring 118 It is connected to F. However, it is not limited to this. For example, the first The terminals, the first terminal of transistor 401_2, and the first terminal of transistor 402 are various It can be wired in various ways or connected to various nodes. Note that wiring 118C~118 F can have the same function as wiring 118. Therefore, wiring 118C~11 It is possible to input a voltage such as voltage V1 to 8F. However, this is not limited to this. Wiring 118C~118F can be used to input various signals, voltages, or currents. This is possible.

[0262] Furthermore, similar to Figure 18(A), Figures 16(A), 17(A)-(B), and 18(B) In the configuration described in (C), the second terminals of transistors 401_1 to 401_2, and The second terminal of transistor 402 can be connected to separate wiring. In particular, In the configuration shown in Figures 17(A) and 17(B), transistors 411_1 to 411_2 The second terminal and the second terminal of transistor 412 can be connected to separate wires. be.

[0263] As shown in Figure 19(A), transistor 401_1 is connected to one terminal (hereinafter referred to as the positive terminal). (Also known as) is connected to node 11, and the other terminal (hereinafter also known as the negative terminal) is connected to node 21. It can be replaced with the connected diode 401a_1. Alternatively, a transistor 401_2 has one terminal (hereinafter also called the positive terminal) connected to node 12, and the other terminal (Hereafter also referred to as the negative electrode) replaces diode 401a_2 connected to node 22. This is possible. Alternatively, transistor 402 can be configured such that one terminal (hereinafter also referred to as the positive terminal) It is connected to wiring 111, and the other terminal (hereinafter also called the negative terminal) is connected to node 31. It can be replaced with iod 402a, however, it is not limited to this. For example, As shown in Figure 19(A), the first terminal of transistor 401_1 is connected to node 21. Therefore, the second terminal of transistor 401_1 is connected to node 11, The transistor 401_1 can be diode-connected. Alternatively, transistor 40 The first terminal of 1_2 is connected to node 22, and the second terminal of transistor 401_2 is connected to node By being connected to 12, transistor 401_2 becomes diode-connected. This is possible. The first terminal of transistor 402 is connected to node 31, and transistor 4 By connecting the second terminal of 02 to the wiring 111, transistor 402 is connected to the diode It is possible to connect via a code.

[0264] Furthermore, similar to Figures 19(A)-(B), Figures 16(A), 17(A)-(B), and Figure 1 In the configurations described in 8(A) to (C), the transistors are replaced with diodes. This is possible, and these transistors can be connected in a diode configuration.

[0265] Next, a specific example of circuit 500 will be explained with reference to Figure 20(A). Circuit 500 is, It has circuits 501_1 to 501_2 and circuit 502. And circuit 502 may, for example, have the function of a NOT gate or an inverter. This is possible. The input terminal of circuit 501_1 is connected to node 11, and the circuit 501_1 The output terminal is connected to node 21. The input terminal of circuit 501_2 is connected to node 12. The output terminal of circuit 501_2 is connected to node 22. The input terminal of circuit 502 is The output terminal of circuit 502 is connected to node 31, and is connected to wiring 111.

[0266] Another example of circuit 500 will be explained with reference to Figure 20(B). Circuit 500 is a modified version of circuit 5 Circuit 503 has 03. Circuit 503 functions, for example, as a 2-input NOR gate. This is possible. One input terminal of circuit 503 is connected to node 11, and the other input terminal of circuit 503 is connected to node 11. The input terminal is connected to node 12, and the output terminal of circuit 503 is connected to transistor 401 The gate of transistor 401, the gate of transistor 401_2, and / or the gate of transistor 402 It connects to the .

[0267] Another example of circuit 500 will be explained with reference to Figure 20(C). Circuit 500 is a modified version of circuit 5 It has circuits 11_1 to 511_2, and circuit 512. As an example, path 512 is a logic circuit that combines a 2-input AND gate and a NOT gate. It is possible to have the function of being connected to one input terminal of circuit 511_1, wiring 113 The other input terminal of circuit 511_1 is connected to node 11, and circuit 511_ Output terminal 1 is connected to node 21. One input terminal of circuit 511_2 is connected to wiring 1. The other input terminal of circuit 511_2 is connected to node 12 and circuit 51 The output terminal of 1_2 is connected to node 22. One of the input terminals of circuit 512 is connected to wiring 1. The other input terminal of circuit 512 is connected to wiring 111, and the other input terminal of circuit 512 is connected to wiring 111. The output terminal is connected to node 31.

[0268] Another example of circuit 500 will be explained with reference to Figure 20(D). Circuit 500 is a modified version of circuit 5 It has 13. Circuit 513 is a logic circuit that combines a 3-input AND gate and a NOT gate. It can function as a path. The first input terminal of circuit 513 is connected to wiring 113. The second input terminal of circuit 513 is connected to node 11, and the third input terminal of circuit 513 is connected to node 11. The input terminal is connected to node 12, and the output terminal of circuit 513 is connected to transistor 401_ Gate 1, gate 401_2, and / or gate 402 It is connected to T.

[0269] Another example of circuit 500 is described with reference to Figure 20(E). Circuit 500 is a modified version of circuit 5 It has circuits 21_1 to 521_2, and circuit 522. For example, path 522 can function as a two-input NOR gate. One input terminal of circuit 521_1 is connected to wiring 113, and the other input of circuit 521_1 The power terminal is connected to node 11, and the output terminal of circuit 521_1 is connected to node 21. One input terminal of circuit 521_2 is connected to wiring 113, and the other input terminal of circuit 521_2 is connected to wiring 113. The input terminal is connected to node 12, and the output terminal of circuit 521_2 is connected to node 22. One input terminal of circuit 522 is connected to wiring 113, and the other input of circuit 522 The power terminal is connected to wiring 111, and the output terminal of circuit 522 is connected to node 31.

[0270] Another example of circuit 500 will be explained with reference to Figure 20(F). Circuit 500 is a modified version of circuit 5 It has 23. Circuit 523 can function as a 3-input NOR circuit. The first input terminal of circuit 523 is connected to wiring 113, and the second input terminal of circuit 523 The child is connected to node 11, and the third input terminal of circuit 523 is connected to node 12. The output terminals of circuit 523 are the gate of transistor 401_1 and transistor 401_2. It is connected to the gate and / or the gate of transistor 402.

[0271] Another example of circuit 500 will be explained with reference to Figure 20(G). Circuit 500 is a modified version of circuit 5 It has 14. Circuit 514 is a logic circuit that combines a 2-input AND gate and a NOT gate. It can function as a path. The first input terminal of circuit 514 is connected to wiring 113 The second input terminal of circuit 514 is connected to wiring 111, and the output terminal of circuit 514 is connected to wiring 111. The child is the gate of transistor 401_1, the gate of transistor 401_2, and / or It is connected to the gate of transistor 402.

[0272] Another example of circuit 500 will be explained with reference to Figure 20(H). Circuit 500 is a modified version of circuit 5 It has 24. Circuit 524 can function as a 2-input NOR gate. The first input terminal of circuit 524 is connected to wiring 113, and the second input terminal of circuit 524 The child is connected to wiring 111, and the output terminal of circuit 524 is the gateway of transistor 401_1. The gates of transistors 401_2 and / or 402 are connected. It will be done.

[0273] Next, circuits 501_1 to 501_2, circuit 502, and circuit 50 shown in Figures 20(A) to (H) 3, circuit 511_1~511_2, circuit 512, circuit 513, circuit 514, circuit 521_ Examples of circuits 1-521_2, 522, 523, and 524 are shown in Figure 21(A Refer to (F) and Figures 22(A) to (D) for explanation. However, circuit 501_1~ 501_2, circuit 502, circuit 503, circuit 511_1~511_2, circuit 512, circuit 513, circuit 514, circuit 521_1~521_2, circuit 522, circuit 523, circuit 52 As for option 4, various other configurations can also be used.

[0274] In the circuit shown in Figure 21(A), the first terminal is connected to wiring 114, and the second terminal is connected to output terminal 591. A transistor 531 is connected, with its gate connected to wiring 114, and the first terminal is connected to wiring 11 It is connected to terminal 8, the second terminal is connected to output terminal 591, and the gate is connected to input terminal 592. It has a transistor 532. The circuit in Figure 21(A) is circuit 501_1, 501_2 , and / or it can be applied to circuit 502, etc. Therefore, output terminal 591 is It can be connected to node 21, node 22, or node 31, etc. Or, Input terminal 592 can be connected to node 11, node 12, or wiring 111, etc. It is Noh.

[0275] In the circuit shown in Figure 21(B), the first terminal is connected to wiring 114, and the second terminal is connected to transistor 53. A transistor 531 is connected to the gate of 3, and its gate is connected to wiring 114, and the first terminal The child is connected to wiring 118, and the second terminal is connected to the gate of transistor 533, gate The transistor 532 is connected to input terminal 592, and the first terminal is connected to wiring 114. The second terminal of transistor 533 is connected to output terminal 591, and the first terminal is connected to wiring 118 The second terminal is connected to the output terminal 591, and the gate is connected to the input terminal 592. It has transistor 534. The circuit in Figure 21(B) is circuit 501_1, 501_2 , and / or it can be applied to circuit 502, etc. Therefore, output terminal 591 is It can be connected to node 21, node 22, or node 31, etc. Or, Input terminal 592 can be connected to node 11, node 12, or wiring 111, etc. It is Noh.

[0276] In the circuit shown in Figure 21(C), the first terminal is connected to wiring 114, and the second terminal is connected to output terminal 591. A transistor 541 is connected, with its gate connected to wiring 114, and the first terminal is connected to wiring 11 It is connected to terminal 8, the second terminal is connected to output terminal 591, and the gate is connected to input terminal 592. The transistor 542 has its first terminal connected to wiring 118, and its second terminal is the output terminal 59. It has a transistor 543 connected to terminal 1, with its gate connected to input terminal 593. Circuit 21(C) is circuit 503, circuit 521_1, circuit 521_2, circuit 522, or It can be applied to circuits such as 524. Therefore, the output terminal 591 is a transistor The connection point between the gates of transistors 401_1 and 401_2 and the gate of transistor 402, node 2. 1. It can be connected to node 22 or node 31, etc. Alternatively, input terminal 5 92-593 are connected to node 11, node 12, wiring 111, or wiring 113, etc. It is possible to do so.

[0277] In the circuit shown in Figure 21(D), the first terminal is connected to wiring 114, and the second terminal is connected to transistor 54. A transistor 541 is connected to the gate of 4, and its gate is connected to wiring 114, and the first terminal The child is connected to wiring 118, and the second terminal is connected to the gate of transistor 544, gate The transistor 542 is connected to input terminal 592, and the first terminal is connected to wiring 118. The second terminal is connected to the gate of transistor 544, and the gate is connected to input terminal 593. The transistor 543 has its first terminal connected to wiring 114, and its second terminal is the output terminal 59. Transistor 544 is connected to 1, and its first terminal is connected to wiring 118, and its second terminal is connected to A transistor 545 is connected to the power terminal 591, and its gate is connected to the input terminal 592. The first terminal is connected to wiring 118, the second terminal is connected to output terminal 591, and the gate is input. It has a transistor 546 connected to terminal 593. The circuit in Figure 21(D) is circuit 5 03. Applicable to circuits 521_1, 521_2, 522, or 524, etc. This is possible. Therefore, output terminal 591 is the gateway for transistors 401_1~401_2. The connection point between the node and the gate of transistor 402, node 21, node 22, or node It can be connected to 31, etc. Alternatively, input terminals 592~593 can be connected to node 11. It can be connected to node 12, wiring 111, or wiring 113, etc.

[0278] In the circuit shown in Figure 21(E), the first terminal is connected to wiring 114, and the second terminal is connected to output terminal 591. A transistor 541 is connected, with its gate connected to wiring 114, and the first terminal is connected to wiring 11 It is connected to terminal 8, the second terminal is connected to output terminal 591, and the gate is connected to input terminal 592. The transistor 542 has its first terminal connected to wiring 118, and its second terminal is the output terminal 59. A transistor 543 is connected to 1, and its gate is connected to input terminal 593, and the first terminal is It is connected to wiring 118, the second terminal is connected to output terminal 591, and the gate is connected to input terminal 595 It has a transistor 547 connected to it. The circuit in Figure 21(E) is connected to circuit 523 etc. It is possible to apply this. Therefore, output terminal 591 is transistor 401_1~40 It can be connected to the connection point between the gate of 1_2 and the gate of transistor 402, etc. Alternatively, input terminals 592-594 are connected to node 11, node 12, or wiring 113. It is possible to connect to it.

[0279] In the circuit shown in Figure 21(F), the first terminal is connected to wire 114, and the second terminal is connected to transistor 54. A transistor 541 is connected to the gate of 4, and its gate is connected to wiring 114, and the first terminal The child is connected to wiring 118, and the second terminal is connected to the gate of transistor 544, gate The transistor 542 is connected to input terminal 592, and the first terminal is connected to wiring 118. The second terminal is connected to the gate of transistor 544, and the gate is connected to input terminal 593. The transistor 543 has its first terminal connected to wiring 118, and its second terminal is connected to the transistor. The gate of transistor 547 is connected to the gate of 544, and the gate of transistor 547 is connected to the input terminal 594. The first terminal is connected to wiring 114, and the second terminal is connected to output terminal 595. Terminal 544 has its first terminal connected to wiring 118, and its second terminal connected to output terminal 595. The gate of transistor 545 is connected to input terminal 592, and the first terminal is connected to wiring 118. The second terminal is connected to the output terminal 595, and the gate is connected to the input terminal 593. The transistor 546 has its first terminal connected to wiring 118 and its second terminal connected to output terminal 595. It has a transistor 548 whose gate is connected to input terminal 594. (Figure 21) Circuit F) can be applied to circuits such as 523. Therefore, output terminal 595 is , connection between the gates of transistors 401_1~401_2 and the gate of transistor 402 It can be connected to locations such as [location]. Alternatively, input terminals 592~594 are connected to node 11 It can be connected to node 12, or wiring 113, etc.

[0280] In the circuit shown in Figure 22(A), the first terminal is connected to input terminal 592, and the second terminal is connected to a transistor. The gate of transistor 551 is connected to the gate of 553, and the gate of transistor 551 is connected to the input terminal 592. The first terminal is connected to wiring 118, and the second terminal is connected to the gate of transistor 553. The gate of transistor 552 is connected to input terminal 593, and the first terminal is connected to input terminal 59 A transistor 553 is connected to terminal 2, and its second terminal is connected to output terminal 591, and terminal 1 The wire is connected to wiring 118, the second terminal is connected to output terminal 591, and the gate is connected to input terminal 59 It has a transistor 554 connected to 3. The circuit in Figure 22(A) is circuit 511_1 It can be applied to circuits 511_2, 512, and / or 514, etc. Therefore, output terminal 591 is connected to node 21, node 22, or node 31, etc. It is possible to do so. Alternatively, input terminal 592 can be connected to wiring 113, etc. It is possible. Alternatively, input terminal 593 can be connected to node 11, node 12, or wiring 111, etc. It is possible to continue.

[0281] In the circuit shown in Figure 22(B), the first terminal is connected to input terminal 592, and the second terminal is connected to a transistor. The gate of transistor 551 is connected to the gate of 553, and the gate of transistor 551 is connected to the input terminal 592. The first terminal is connected to wiring 118, and the second terminal is connected to the gate of transistor 553. The gate of transistor 552 is connected to input terminal 593, and the first terminal is connected to input terminal 59 A transistor 553 is connected to terminal 2, and its second terminal is connected to output terminal 591, and terminal 1 The wire is connected to wiring 118, the second terminal is connected to output terminal 591, and the gate is connected to input terminal 59 Transistor 554 is connected to 3, and its first terminal is connected to wiring 118, and its second terminal is connected to A transistor connected to the gate of transistor 553, whose gate is connected to input terminal 594 Terminal 555 has its first terminal connected to wiring 118, and its second terminal connected to output terminal 591. The gate has a transistor 556 connected to input terminal 594. Figure 22(B) The path can be applied to circuits such as 513. Therefore, output terminal 591 is a transistor Connection points between the gates of transistors 401_1~401_2 and the gate of transistor 402, etc. It is possible to connect to the following. Alternatively, input terminal 592 can be connected to wiring 113, etc. This is possible. Alternatively, input terminals 593-594 are node 11 or node 12, etc. It is possible to connect to it.

[0282] In the circuit shown in Figure 22(C), the first terminal is connected to wiring 118, and the second terminal is connected to output terminal 591. A transistor 561 is connected, with its gate connected to input terminal 593, and one of its electrodes is connected to input terminal 593. A capacitive element 562 is connected to the force terminal 592, and the other electrode is connected to the output terminal 591. It has. The circuit in Figure 22(C) is circuit 511_1, circuit 511_2, circuit 512, and / Alternatively, it can be applied to circuit 514, etc. Therefore, output terminal 591 is node 21, node 22, node 31, or the gate and of transistors 401_1~401_2 It can be connected to the gate connection point of the transistor 402, or to the input Terminal 592 can be connected to wiring 113, etc. Alternatively, input terminal 593 is It can be connected to node 11, node 12, or wiring 111, etc.

[0283] In the circuit shown in Figure 22(D), the first terminal is connected to wiring 118, and the second terminal is connected to output terminal 591. A transistor 561 is connected, with its gate connected to input terminal 593, and one of its electrodes is connected to input terminal 593. A capacitive element 562 is connected to the force terminal 592, and the other electrode is connected to the output terminal 591, The first terminal is connected to wiring 118, the second terminal is connected to output terminal 591, and the gate is input. It has a transistor 563 connected to terminal 594. The circuit in Figure 22(D) is the same as in Figure 20 This can be applied to circuits such as the one shown in D, 513, etc. Therefore, the output terminal 591 is a transistor The connection point between the gates of transistors 401_1~401_2 and the gate of transistor 402. It is possible to connect to the following. Alternatively, input terminal 592 can be connected to wiring 113, etc. It is possible to do so. Alternatively, input terminals 593~594 are node 11 or node 12. It is possible to connect to it.

[0284] Note that the circuit configuration is not limited to those shown in Figures 21(A) to (F) and Figures 22(A) to (D). For example, as shown in Figure 22(E), each terminal of the transistor is either a separate wire or a separate terminal. It can be connected to a child. Or, in the example in Figure 22(E), transistor 551 The first terminal of transistor 553 is connected to wire 581, and the first terminal of transistor 553 is connected to wire 582. The first terminal of transistor 552 is connected to the wiring 583, and transistor 55 The first terminal of 4 is connected to wiring 584. These are connected to each terminal of these transistors. Wiring (for example, wiring 581-584) is connected to various other wiring or nodes. This is possible. Alternatively, the wiring connected to each terminal of these transistors can handle voltage or signals. These can be inputs and can function as power lines or signal lines. As another example, as shown in Figure 22(F), instead of a diode-connected transistor... It is possible to use a resistor or another element such as a diode. Element 535 is used as a replacement for 531. One terminal of element 535 is connected to wiring 114. The other terminal of element 535 is connected to the output terminal 591. Element 535 is a resistor Devices with an anti-resistance component (e.g., transistors, resistors, or diodes) It has the ability. As another example, as shown in Figure 22(G), the capacitive element is a transistor It is possible to use a transistor or MIS capacitance. The capacitance element 562 is a transistor. 562A is used. The first and second terminals of transistor 562A are output terminals 59 It is connected to terminal 1, and the gate of transistor 562A is connected to input terminal 592.

[0285] Next, another example of circuit 200 will be explained with reference to Figure 23(A). Circuit 200 is It is possible to have circuit 600. Circuit 600 is a part of circuit 200. Figure 23(A) shows, as an example, circuit 200 is connected to circuit 300, circuit 400, and circuit 600. The configuration when having the following is shown. Circuits 300, 400, and 600 are part of the circuit or It is possible for everything to be shared. Circuit 600, for example, is one or more transistors It is possible to have a transistor. These transistors are transistor 101_1~ It is preferable that it has the same polarity as 101_2, but it is not limited to this.

[0286] Circuit 600, as an example, includes wiring 117, wiring 118, node 11, node 12, and wiring It is connected to line 111. However, it is not limited to this, and circuit 600 may be connected in any way depending on its configuration. It can also be connected to various other wires, nodes, or terminals.

[0287] As an example, circuit 600 checks the continuity state between wiring 118 and node 11 in response to signal RE. The state of continuity between wiring 118 and node 12, and / or the state of continuity between wiring 118 and wiring 111. It has a function to control the state. For example, a signal such as voltage V1 or signal CK is connected to wiring 118. When a voltage such as 2 is supplied, the circuit 600 receives the voltage or signal supplied to the wiring 118. This controls the timing of supplying these to node 11, node 12, and / or wiring 111. It has the function of reducing the voltage of the wiring 111 to, for example, V1. It has a function to control the ming. As described above, circuit 600 has a control circuit and a reset operation. It has the function of a circuit or switch that performs the following. However, it is not limited to this, a circuit The 600 can also have various other functions. Note that circuit 600 has the above functions. You don't need to have all of them.

[0288] Next, regarding an example of the operation of circuit 600 in Figure 23(A), refer to the timing chart in Figure 2. I will explain by referring to it.

[0289] During periods A1-B1, D1-E1, A2-B2, and D2-E2, the signal Since RE is low level, circuit 600 sends signals or voltages to nodes 11 and 12. And it is often not supplied to wiring 111. However, it is not limited to this. For example, during period A 1. During periods D1 to E1, A2, and / or D2 to E2, circuit 600 A voltage V1 or low-level signal is sent to node 11, node 12, and / or wiring 111. It is possible to supply it.

[0290] During periods C1 and C2, the signal RE becomes high level, so circuit 600 is powered A voltage V1 or low-level signal is supplied to node 11, node 12, and / or wiring 111. It is possible to do so. However, it is not limited to this, and the circuit 600 may also use voltage or signals, etc. It is possible not to supply power to node 11, node 12, and / or wiring 111.

[0291] Next, a specific example of circuit 600 will be explained with reference to Figure 23(B). Circuit 600 is, Multiple transistors, namely transistors 601_1 to 601_2, and transistor 60 It has 2. However, it is not limited to this, and the circuit 600 has transistors 601_1~60 It has only one or more transistors, 1_2 and transistor 602. It is possible to do so. Multiple transistors, namely transistors 601_1 to 601_2, And transistor 602 has the same polarity as transistors 101_1 to 101_2. Preferably, it should be an N-channel type. However, it is not limited to this, a transistor Multiple transistors, numbered 601_1 to 601_2, and transistor 602, are P-channels. It is possible for it to be a flannel type.

[0292] The first terminal of transistor 601_1 is connected to wiring 118, and transistor 601_1 The second terminal is connected to node 11, and the gate of transistor 601_1 is connected to wiring 117 It is connected to the first terminal of transistor 601_2, and the transistor The second terminal of transistor 601_2 is connected to node 12 and the gate of transistor 601_1. It is connected to wiring 117. The first terminal of transistor 602 is connected to wiring 118. The second terminal of transistor 602 is connected to wiring 111, and the gate of transistor 602 The wire is connected to wiring 117.

[0293] Transistor 601_1 controls, for example, the conductivity state between wiring 118 and node 11. It has the function of supplying the voltage of wiring 118 to node 11. It has a function to control the timing of supply. For example, a voltage such as voltage V1 is supplied to wiring 118. , or when a signal such as signal CK2 is supplied, transistor 601_1 is connected to wiring 118 It has a function to control the timing of supplying voltage or signals, etc., to node 11. Therefore, as described above, transistor 601_1 has the function of a switch. It is possible. However, it is not limited to this; transistor 601_1 has various other functions. It is possible to have all of the above functions. There's no need to do that.

[0294] Transistor 601_2 controls, for example, the conductivity state between wiring 118 and node 12. It has the function of supplying the voltage of wiring 118 to node 12. It has a function to control the timing of supply. For example, a voltage such as voltage V1 is supplied to wiring 118. , or when a signal such as signal CK2 is supplied, transistor 601_2 is connected to wiring 118 It has a function to control the timing of supplying voltage or signals, etc., to node 12. Therefore, as described above, transistor 601_2 has the function of a switch. It is possible. However, it is not limited to this; transistor 601_2 has various other functions. It is possible to have all of the above functions. There's no need to do that.

[0295] Transistor 602, for example, controls the conductivity between wire 118 and wire 111. It has the ability to supply the voltage of wiring 118 to wiring 111. It has a function to control the timing. For example, a voltage such as voltage V1 or a signal is applied to the wiring 118. When a signal such as CK2 is supplied, transistor 602 is supplied to wiring 118. It has a function to control the timing of supplying voltage or signals to the wiring 111. Thus, transistor 602 can function as a switch. Furthermore, the transistor 602 is not limited to this and can have a variety of other functions. Yes, it does. However, transistor 602 does not need to possess all of the above functions.

[0296] Next, we will explain an example of the operation of the semiconductor device shown in Figure 23(A). Note that the half of Figure 23(A) The operation of the conductive device has some similarities to the operation of the semiconductor device in Figure 16(A), therefore, Figure 16(B) The timing chart of the semiconductor device during period A1 will be explained by referring to it as appropriate. A schematic diagram of the operation is shown in Figure 44(A), and a schematic diagram of the operation of the semiconductor device during period B1 is shown in Figure 44. Figure 45(A) shows a schematic diagram of the operation of the semiconductor device during period C1, as shown in 4(B). A schematic diagram of the operation of the semiconductor device during interval D1 and period E1 is shown in Figure 45(B). A schematic diagram of the operation of the semiconductor device during period A2 is shown in Figure 46(A), and the semiconductor device during period B2 A schematic diagram of the operation of the device is shown in Figure 46(B), and the schematic diagram of the operation of the semiconductor device during period C2 is shown. Figure 47(A) shows a schematic diagram of the operation of the semiconductor device during periods D2 and E2. This is shown in 47(B). Note that Figures 45 to 47 use the configuration of Figure 6(B) as circuit 300. For circuit 400, the semiconductor device shown in Figure 16(A) is used, and for circuit 600, Figure 23(B) This will show the case using the following configuration.

[0297] During periods A1-B1, D1-E1, A2-B2, and D2-E2, the signal RE will be at a low level, so transistors 601_1~601_2, and transistor 602 will be turned off. Therefore, wiring 118 and node 11, wiring 118 and node 12, and Wiring 118 and wiring 111 become non-conductive.

[0298] During periods C1 and C2, the signal RE becomes high level, so transistor 60 1_1~601_2 and transistor 602 are turned on. Therefore, wiring 118 and NO Node 11, wiring 118 and node 12, and wiring 118 and wiring 111 are in a conductive state.

[0299] Note that the channel width of transistor 601_1 and the channel width of transistor 601_2 are It is preferable that they be approximately equal. By doing so, the values ​​of node 11 in period T1 The change in voltage is made to be approximately equal to the change in voltage at node 12 during period T2. Yes, it is possible. Therefore, the waveform of the signal OUT can be made to be roughly equal. However, this Not limited to the channel width of transistor 601_1 and the channel of transistor 601_2 Width can be different.

[0300] Note that the channel width of transistor 601_1 and the channel width of transistor 601_2 The particle size is preferably 100 μm to 3000 μm. More preferably 300 μm to 2 Preferably, it is 000 μm. More preferably, it is 300 μm to 1000 μm. This is preferable, but not limited to this.

[0301] Furthermore, the channel width of transistor 602 is preferably 500 μm to 5000 μm. It is preferable that it be 1000 μm to 3000 μm. More preferably, the particle size is 2000 μm to 3000 μm. However, it is not limited to this. stomach.

[0302] Furthermore, circuit 600 is transistors 601_1 to 601_2 and transistor 602 You don't need to have all of them. One or two of these transistors... It is possible to have it.

[0303] Furthermore, as shown in Figure 23(C), the first terminal of transistor 601_1, transistor 6 The first terminal of 01_2 and the first terminal of transistor 602 are connected to separate wires. This is possible. In one example in Figure 23(C), wiring 118 is connected to wiring 118G~118I. It is divided into multiple wires. And the first terminal of transistor 601_1 is wire 118G The first terminal of transistor 601_2 is connected to wire 118H, and the transistor The first terminal of terminal 602 is connected to wiring 118I. However, it is not limited to this, and the transient The first terminal of transistor 601_1, the first terminal of transistor 601_2, and transistor 60 The first terminal of 2 can be connected to various wires or various nodes. Wirings 118G to 118I can have the same function as wiring 118. Therefore Wiring 118G~118I can be used to input voltages such as voltage V1, and power lines It can function as such. However, it is not limited to this, and wiring 118G~118I It is possible to input various signals, voltages, or currents into it.

[0304] As shown in Figure 23(D), transistor 601_1 is connected to one terminal (hereinafter referred to as the positive terminal). (Also known as) is connected to node 11, and the other terminal (hereinafter also known as the negative terminal) is connected to wiring 118 It is possible to replace the connected diode 601a_1. Similarly, the transistor One terminal of TA601_2 (hereinafter also called the positive terminal) is connected to node 12, and the other terminal The child (hereinafter also referred to as the negative terminal) replaces diode 601a_2 connected to wiring 118. It is possible to do so. Similarly, transistor 602 is connected to one terminal (hereinafter also referred to as the positive terminal). One terminal is connected to wiring 111, and the other terminal (hereinafter also referred to as the negative terminal) is connected to wiring 118. It can be replaced with diode 602a. However, it is not limited to this. For example, as shown in Figure 23(E), the first terminal of transistor 601_1 is connected to node 11. By continuing this connection, transistor 601_1 will be configured to be diode-connected. This is possible. Similarly, the first terminal of transistor 601_2 is connected to node 12. Therefore, transistor 601_2 can be configured to be diode-connected. Similarly, by connecting the first terminal of transistor 602 to wiring 111, The transistor 602 can be configured to be connected by diodes.

[0305] Furthermore, similar to Figures 23(D) to (E), the configuration described in Figures 23(B) to (C) also applies. Transistors (for example, transistors 601_1 to 601_2, or transistor 602) It is possible to replace it with a diode, and it is possible to connect them as diodes.

[0306] Here, one semiconductor device when combining the contents described in Embodiments 1 to 3 Examples are shown in Figures 48 and 49. However, the embodiments are not limited to these, and other embodiments are also shown. By combining the elements described in State 4, it is possible to create various configurations for semiconductor devices.

[0307] The semiconductor device in Figure 48 has circuits 100 and 200, and circuit 200 is connected to circuit 300. It has circuits 400 and 600, and circuit 400 has circuit 500. Figure 48 shows semiconductor In the device, the configuration shown in Figure 1(A) is used as circuit 100. Circuit 200 has The configuration shown in Figure 6(B) is used as the circuit 300. The circuit 40 of the circuit 200 As 0, the configuration shown in Figure 16(A) is used. Circuit 600 of circuit 200 is The configuration shown in Figure 23(B) is used. As for the circuit 500 that circuit 400 has, Figure 20 The configuration shown in (A) is used. Circuit 500 has circuits 501_1 to 501_2 and For route 502, the configuration shown in Figure 21(A) is used.

[0308] In the semiconductor device shown in Figure 49, the configuration shown in Figure 1(A) is used as circuit 100. The circuit 300 that 200 has is configured as shown in Figure 12(A). The circuit 400 has the configuration shown in Figure 18(A). The configuration shown in Figure 23(B) is used as path 600. Circuit 500 is a component of circuit 400. The configuration shown in Figure 21(D) is used.

[0309] In the semiconductor device shown in Figure 50, the configuration shown in Figure 1(A) is used as circuit 100. The circuit 300 that 200 has is configured as shown in Figure 12(A). The circuit 400 has the configuration shown in Figure 17(B). The configuration shown in Figure 23(B) is used as path 600. Circuit 500 is a component of circuit 400. The configuration shown in Figure 22(A) is used.

[0310] As an example, the operation of the semiconductor device shown in Figure 48 will be explained. During period A1... The signal SP1 becomes high level. Then, transistor 301_1 turns on, Wiring 115_1 and node 11 become conductive. Therefore, the high-level signal SP1 is no Since it is supplied to node 11, the voltage at node 11 rises. At this time, transistor 10 Since 1_1 is turned on, wires 118 and 111 become conductive. Low level signal Since signal CK1 is supplied to wiring 111, the voltage of wiring 111 decreases. Meanwhile, signal S P2 goes to a low level. Then transistor 301_2 turns off. Here, If the initial voltage of node 12 is V1, then the voltage of node 12 will remain at V1. In circuit 501_1, transistor 532A turns on, so wiring 118 and The gate of transistor 401_1 becomes conductive. Therefore, the voltage V1 is equal to that of transistor 4 Since it is supplied to the gate of 01_1, the gate voltage of transistor 401_1 decreases. Then, transistor 401_1 turns off, and wiring 118 and node 11 become decoupled. The circuit enters a continuous state. In circuit 501_2, transistor 532B turns off, so the wiring 118 and the gate of transistor 401_2 become non-conductive. Therefore, the voltage V2 is Since it is supplied to the gate of transistor 401_2 via transistor 531B, The gate voltage of transistor 401_2 increases. Then, transistor 401_2 turns on. Therefore, wiring 118 and node 12 become conductive. Thus, voltage V1 is at node 12 It is supplied to. In circuit 502, transistor 532C is turned off, so wiring 11 8 and the gate of transistor 402 become non-conductive. Therefore, the voltage V2 of the transistor Since it is supplied to the gate of transistor 402 via TA531C, transistor 402 The gate voltage increases. As a result, transistor 402 turns on, so wiring 118 The wiring 111 becomes conductive. Therefore, voltage V1 is supplied to the wiring 111.

[0311] During period B1, node 11 remains V2 + Vth101_1 + Vx, and node 1 2 will remain roughly V1. Therefore, transistor 101_1 will remain on. As a result, wiring 112 and wiring 111 remain in a conductive state. Then, a high-level signal CK is detected. Since 1 is supplied to wiring 111, the voltage of wiring 111 rises. At this time, circuit 501 In period _1, transistor 532A remains ON, just like in period A1. Therefore, The inverter 401_1 remains off. In circuit 501_1, similar to period A1, Transistor 532B remains off. Therefore, transistor 401_2 remains on. Yes. In circuit 502, transistor 532C is turned on, so the wiring 118 and the transistor The gate of transistor 402 becomes conductive. Therefore, the voltage V1 is the gate voltage of transistor 402. As it is supplied to the gate, the gate voltage of transistor 402 decreases. Then the transistor Since st402 is turned off, wiring 118 and wiring 111 become non-conductive.

[0312] During periods C1 and C2, the signal RE becomes high level. Then, transistor 60 Since transistors 1_1, 601_2, and 602 are turned on, wiring 11 8 and node 11 become conductive, and wiring 118 and node 12 become conductive, wiring Wiring 118 and 111 are in a conductive state. Therefore, voltage V1 is at node 11 and node 12. , and supplied to wiring 111, so the voltage of node 11, the voltage of node 12, and wiring 1 The voltage at 11 decreases. At this time, in circuit 501_1, transistor 532A turns off. Therefore, the wiring 118 and the gate of transistor 401_1 become non-conductive. Voltage V2 is supplied to the gate of transistor 401_1 via transistor 531A. Therefore, the gate voltage of transistor 401_1 rises. Then, transistor 40 Since 1_1 is turned on, wiring 118 and node 11 become conductive. Circuit 501_2 In this case, as in period A1, transistor 532B remains off. Therefore, Transistor 401_2 remains on. In circuit 502, similar to period A1, the transient The transistor 532C remains off. Therefore, the transistor 402 remains on.

[0313] During periods D1-E1 and D2-E2, transistor 401_1 and transistor 40 Since 1_2 and transistor 402 are turned on, there is conductivity between wiring 118 and node 11. In this state, wiring 118 and node 12 become conductive, and wiring 118 and wiring 111 become conductive. The circuit becomes open. Therefore, voltage V1 is supplied to node 11, node 12, and wiring 111. Therefore, the voltage at node 11, the voltage at node 12, and the voltage at wiring 111 are approximately V1 It is maintained in this state. At this time, in circuit 501_1, transistor 532 is maintained in the same way as during period C1. A turns off. Therefore, transistor 401_1 turns on. Circuit 501_2 Therefore, just like in period A1, transistor 532B remains off. Transistor 401_2 remains on. In circuit 502, similar to period A1, transistor 5 32C remains off. Therefore, transistor 402 remains on.

[0314] During period A2, signal SP1 becomes low level. Then transistor 301_2 It turns off. Here, assuming the initial voltage of node 11 is V1, the voltage of node 11 is V1 remains constant. Meanwhile, signal SP2 becomes high level. Then, transistor 30 Since 1_2 is turned on, wiring 115_2 and node 12 become conductive. Therefore, Since the level signal SP2 is supplied to node 12, the voltage at node 12 rises. At that time, transistor 101_2 turns on, so wire 118 and wire 111 become conductive. This is the state. Therefore, a low-level signal CK1 is supplied to wiring 111, so wiring 111 The voltage decreases. At this time, in circuit 501_1, similar to period C1, the transistor Transistor 532A turns off. Therefore, transistor 401_1 turns on. Circuit 501_ In step 2, transistor 532B turns on, so wire 118 and transistor 401 The gate of _2 becomes conductive. Therefore, the voltage V1 is transmitted through transistor 531B. Since it is supplied to the gate of transistor 401_2, the power to the gate of transistor 401_2 The voltage decreases. As a result, transistor 401_2 turns off, so the wire 118 and the node 12 becomes non-conductive. In circuit 502, similar to period A1, transistor 53 2C turns off. Therefore, transistor 402 turns off.

[0315] During period B2, node 11 remained largely V1, while node 12 became V2+Vth. The state remains 101_2 + Vx. Therefore, transistor 101_2 remains on. As a result, wiring 112 and wiring 111 remain in a conductive state. Then, a high-level signal CK is detected. Since 1 is supplied to wiring 111, the voltage of wiring 111 rises. At this time, circuit 501 In period _1, as in period A2, transistor 532A remains off. Therefore, The inverter 401_1 remains on. In circuit 501_2, similar to period A2, Transistor 532B remains ON. Therefore, transistor 401_2 remains OFF. Yes. In circuit 502, transistor 532C turns on, just like in period B1. Therefore. Transistor 402 turns off.

[0316] Furthermore, the operation of the semiconductor device shown in Figure 49 was verified. The verification results are shown in Figure 51. Figure 51 shows the calculation results for the semiconductor device of this embodiment. Verification was performed using SPIC. The E simulator was used. Additionally, as a comparative example, the transient of the semiconductor device shown in Figure 49... Transistor 101_2, Transistor 301_2, Transistor 303_1, Transistor 30 3_2, transistor 401_2, transistor 555, transistor 556, and transistor We also performed operational verification on semiconductor devices with a circuit configuration that does not include the inverter 601_2. The verification was performed with Vdd=30V, Vss=0V, and clock frequency=25kHz (1 period=20 (μsec), mobility of each transistor = 1cm 2 / Vs, threshold voltage of each transistor = 5 The test was performed with V and output capacitance = 50pF.

[0317] Figure 51(A) is a timing chart showing the verification results for the comparative semiconductor device. As shown in 51(A), in the comparative example semiconductor device, both period T1 and period T2 are at node n Transistor 101_1 turns on according to the voltage of 1, and wires 112 and 111 are connected. The transistor 101_1 becomes conductive, and the signal CK1 is transmitted from wiring 112 through the transistor. It is supplied to wiring 111 via sta 101_1.

[0318] Figure 51(B) is a timing chart showing the verification results for the semiconductor device shown in Figure 48. As shown in Figure 51(B), the semiconductor device shown in Figure 48, during period T1, receives the signal SEL1 The voltage at node 11 changes accordingly, and transistor 101_1 changes according to the voltage at node 11. When it turns on, wiring 112 and wiring 111 become conductive via transistor 101_1. As a result, signal CK1 is supplied from wiring 112 to wiring 111 via transistor 101_1. During period T2, the voltage at node 12 changes according to the signal SEL2, and the power of node 12 Transistor 101_2 turns on according to the pressure, and wiring 112 and wiring 111 are connected by the transistor Conduction occurs via transistor 101_1, and signal CK1 is transmitted from wiring 112 to transistor 1 It is supplied to wiring 111 via 01_1. Therefore, as shown in Figure 49, in this embodiment In semiconductor devices, each transistor operates by turning on a different transistor during each period. It can be seen that the number of times the inverter is turned on and the duration of that on period can be reduced.

[0319] (Embodiment 4) This embodiment describes an example of a display device and a shift register included in the display device. The shift register has the semiconductor device of Embodiments 1 to 3. It is possible. Note that a shift register can also refer to a semiconductor device or a gate driver. It is possible. Furthermore, the details described in Embodiments 1 to 3 will be omitted from further explanation. The contents described in Embodiments 1 to 3 can be freely combined with the contents described in this embodiment. They can be combined.

[0320] First, an example of a display device will be explained with reference to Figures 26(A) to (D). Figure 26(A The display device includes circuit 1001, circuit 1002, circuit 1003_1, pixel section 1004, and It has terminals 1005. Multiple wires extend from circuit 1003_1 to the pixel section 1004. These multiple wires can be arranged as gate signal lines or scan lines. It is possible to have a function. Alternatively, the pixel section 1004 may have a circuit 1002 or a terminal 10 Multiple wires can be extended and positioned from 05. These multiple wires are for video It functions as a signal line or a data line. Alternatively, the pixel section 1004 has terminal 1005 or Multiple wires can be extended and arranged. These multiple wires are power lines or It can function as a node line, but is not limited to this. Pixel section The wiring placed on 1004 will vary depending on the configuration of the pixels in the pixel unit 1004. It is possible to place them.

[0321] Circuit 1001 supplies signals, voltage, or current to circuits 1002 and 1003. It has a function to control the timing of the operation. Alternatively, circuit 1001 controls circuit 1002, and the operation It has the function of controlling path 1003. Thus, circuit 1001 is a controller, control It has functions as a circuit, timing generator, power supply circuit, or regulator, etc. It is possible.

[0322] Circuit 1002 has the function of controlling the timing of supplying the video signal to the pixel unit 1004. Alternatively, the circuit 1002 includes a pixel section 1004 having pixels, and the pixel section 1004 having It has a function to control the brightness or transmittance of the pixels. In this way, the circuit 1002 drives It functions as a circuit, source driver, or signal line drive circuit, among other things.

[0323] Circuit 1003_1 supplies a scanning signal or a gate signal to the pixel unit 1004 at the appropriate time. It has a function to control the pixel. Alternatively, circuit 1003_1 selects the pixel of pixel unit 1004. It has a function to select. Thus, circuit 1003_1 is a drive circuit, a gate driver, and It functions as a scan line driving circuit. Note that circuit 1003_1 is connected to the pixel unit 1004. It is formed on the same substrate 1006. However, it is not limited to this, and the circuit 1003_1 is a pixel It is possible to form it on a substrate separate from part 1004.

[0324] Furthermore, as shown in Figure 26(B), the display device may have circuit 1003_2. Yes. Circuit 1003_2 has the same function as circuit 1003_1. For example, circuit 10 Circuits 03_1 and 1003_2 supply signals to the pixel unit 1004 at the same time. This is possible. By doing so, the load can be reduced, so the display device It can be made larger. Alternatively, circuit 1003_1 selects pixels in odd-numbered rows, and circuit 100 3_2 allows the selection of even-numbered pixels. By doing so, the drive frequency Since the size becomes smaller, power consumption can be reduced. Alternatively, the layout per stage This allows for a larger area to be used, making it possible to increase the resolution of the display device. ru.

[0325] Furthermore, as shown in Figure 26(C), the circuit 1002 is mounted on the same substrate 1006 as the pixel unit 1004. It is possible to form it. Alternatively, as shown in Figure 26(D), a portion of the circuit 1002 It is possible to form the path 1002a on the same substrate 1006 as the pixel section 1004. The other circuit 1002b can be formed on a substrate separate from substrate 1006.

[0326] Next, an example of a shift register will be explained with reference to Figure 27. This is included in circuit 1002, circuit 1003_1, and / or circuit 1003_2. It is possible. Alternatively, the shift register can be used as a semiconductor device, a drive circuit, or a gate driver. It is possible to demonstrate this.

[0327] The shift register 1100 has flip-flops 1101_1 to 1101_N (where N is 2 or greater). It has multiple flip-flops (natural numbers of ). Flip-flop 1101_1~1 101_N corresponds to the semiconductor device described in Embodiments 1 to 3. Figure 27 For example, the flip-flops 1101_1 to 1101_N are each half of Figure 24(A). The configuration when a conductive device is used is shown. However, it is not limited to this, and flip-flops are also used. Examples of 1101_1 to 1101_N are described in Embodiments 1 to 3. It is possible to use semiconductor devices or circuits.

[0328] Shift register 1100 is connected to wiring 1111_1~1111_N, wiring 1112, wiring 11 13, Wiring 1114, Wiring 1115_1~1115_2, Wiring 1116_1~1116_ 2. Wiring 1117, Wiring 1118, Wiring 1200_1~1200_N, and Wiring 1201 It is connected to _1~1201_N. And the flip-flop 1101_i (where i is 1~ In any one of N, wiring 111, wiring 112, wiring 113, wiring 114, wiring 1 15_1, Wiring 115_2, Wiring 116_1, Wiring 116_2, Wiring 117, Wiring 118 Wiring 711_1 and wiring 711_2 are, respectively, wiring 1111_i and wiring 1112. Wire 1113, Wiring 1114, Wiring 1200_i-1, Wiring 1201_i-1, Wiring 111 6_1, Wiring 1116_2, Wiring 1111_i+1, Wiring 1118, Wiring 1200_i, It is connected to wiring 1201_i. However, odd-numbered flip-flops and even-numbered flip-flops In many cases, the connections of wires 112 and 113 differ between a flop and a pflop. For example, i In the first stage flip-flop, wire 112 is connected to wire 1112, and wire 113 is When connected to wiring 1113, the i+1 stage flip-flop or i-1 stage flip-flop In a flop, wire 112 is connected to wire 1113, and wire 113 is connected to wire 1112. In many cases, this continues. Furthermore, in the flip-flop 1101_1, wiring 115_1 is When wiring 1115_1 is connected, and wiring 115_2 is connected to wiring 1115_2 There are many. Furthermore, in the flip-flop 1101_N, wiring 117 is the same as wiring 1117. In most cases, a connection is made. However, this is not the only option.

[0329] From wiring 1111_1 to 1111_N, as an example, signals GOUT_1 to GOU Assume that T_N is output. Signals GOUT_1 to GOUT_N are flip-flops. These are the output signals of rop 1101_1~1101_N. And signals GOUT_1~GO UT_N has the same function as signal OUT. Wiring 1112, for example, has signal G CK1 is input, and for example, signal GCK2 is input to wiring 1113. Signals GCK1 and GCK2 have the same function as signal CK1 or signal CK2. For example, voltage V2 is supplied to wiring 1114. Wiring 1115_ For example, signal GSP1 is input to 1, and for example, signal GSP1 is input to wiring 1115_2. It is assumed that signal SSP2 is input. Signal GSP1 has the same function as signal SP1. Signal GSP2 has the same function as signal SP2. Wiring 1116_1 is an example. When signal SEL1 is input, as an example, signal SEL2 is input to wiring 1116_2. It shall be assumed that the signal GRE is input to wiring 1117, for example. Signal GRE has the same function as signal RE. Wiring 1118, for example, has voltage V It is assumed that 1 is supplied. From wiring 1200_1 to 1200_N, as an example, a signal SOUT1_1 to SOUT1_N are output, and from wiring 1201_1 to 1201_N, As an example, let's assume that signals SOUT2_1 to SOUT2_N are output. T1_1~SOUT1_N has the same function as signal SOUT1, and signal SOUT2_1 ~SOUT2_N has the same function as the signal SOUT2. However, it is not limited to this. These wires can also be used to input various other signals, voltages, or currents. It is possible.

[0330] Next, regarding the operation of the shift register in Figure 27, please refer to the timing chart in Figure 28. Let me explain. Figure 28 is an example of a timing chart to illustrate the operation of a shift register. Figure 28 shows signals GCK1, GCK2, GSP1, GSP2, and signal GRE, signal SEL1, signal SEL2, signal GOUT_1~GOUT_N, signal SOUT An example of signals 1_1~SOUT1_N and SOUT2_1~SOUT2_N is shown.

[0331] Regarding the operation of flip-flop 1101_i in the kth frame (where k is a natural number greater than or equal to 2) Let me explain. First, the signal SOUT1_i-1 becomes high level. Then the flip flip Rop 1101_i starts operation during period A1. Subsequently, signal GCK1, and The signal GCK2 is inverted. Then the flip-flop 1101_i in period B1 The operation begins, and signals GOUT_i and SOUT1_i become high. OUT1_i is input to flip-flop 1101_i+1, so flip-flop P1101_i+1 starts operation during period A1. Subsequently, signals GCK1 and When signal GCK2 inverts again, flip-flop 1101_i+1 in period B1 The operation begins, and signals GOUT_i+1 and SOUT1_i+1 become high level. The signal GOUT_i+1 is input to the flip-flop 1101_i, so the flip... The flop 1101_i starts operating during period C1. Therefore, the signal GOUT_ i becomes low level. Then, until the signal SOUT1_i-1 becomes high level again. The flip-flop 1101_i operates in period D1 and in period E1. Repeat this process.

[0332] Let's explain the operation of flip-flop 1101_i in the k+1th frame. The signal SOUT2_i-1 becomes high level. Then, flip-flop 1101_i The operation in period A2 begins. Subsequently, signals GCK1 and GCK2 are inverted. Then, the flip-flop 1101_i starts operating during period B2, and the signal GOUT_i and signal SOUT2_i become high levels. Signal SOUT2_i is Since it is input to the lip-flop 1101_i+1, flip-flop 1101_i+1 The operation in period A2 begins. After that, signals GCK1 and GCK2 are again When inverted, flip-flop 1101_i+1 begins operation in period B2, and Signal GOUT_i+1 and signal SOUT2_i+1 become high levels. Signal GOUT_ i+1 is input to flip-flop 1101_i, so flip-flop 1101 _i starts operation during period C2. Therefore, the signal GOUT_i is at a low level. Yes. After that, the flip-flop will remain open until the signal SOUT2_i-1 becomes high again. P1101_i repeats the actions performed during period D2 and the actions performed during period E2.

[0333] Note that in flip-flop 1101_1, the output signal of the previous flip-flop is replaced by In addition, signal GSP1 is input via wiring 1115_1, and signal GSP2 is input via wiring 1115 It is input via _2. Therefore, the flip-flop 1101_1 is activated when the signal GSP1 is When the signal GSP2 reaches a high level, the operation in period A1 begins, and when the signal GSP2 reaches a high level, Start the operation in section A2.

[0334] Note that in flip-flop 1101_N, the output signal of the next stage flip-flop is replaced by Furthermore, the signal GRE is input via wiring 1117. Therefore, the signal GRE is high level. When this happens, the flip-flop 1101_N starts operating in period C1 or period C2. do.

[0335] (Embodiment 5) In this embodiment, an example of a signal line driving circuit will be described. Note that the signal line driving circuit will be half It can be described as a conductor device or a signal generating circuit.

[0336] An example of a signal line driving circuit will be explained with reference to Figure 29(A). The signal line driving circuit is: Multiple circuits named Circuit 2002_1 to 2002_N (where N is a natural number greater than or equal to 2), and Circuit 20 It has 00 and circuit 2001. And circuits 2002_1 to 2002_N are, respectively, Multiple transistors called transistors 2003_1 to 2003_k (where k is a natural number greater than or equal to 2) It has a sta. Transistors 2003_1~2003_k are N-channel type and However, this is not limited to this, and transistors 2003_1 to 2003_k are P-channels. It is possible to use a Nell-type switch or a CMOS-type switch.

[0337] The connection relationships of the signal line drive circuit will be explained using circuit 2002_1 as an example. Transis The first terminal of terminals 2003_1 to 2003_k is connected to wiring 2005_1. The second terminals of sta2003_1~2003_k are connected to wiring S1~Sk, respectively. The gates of Rangista 2003_1~2003_k are wired to 2004_1~2004 respectively. It is connected to _k. For example, the first terminal of transistor 2003_1 is connected to wiring 2005_1. The second terminal of transistor 2003_1 is connected to wiring S1, and the transistor The gate of TA2003_1 is connected to wiring 2004_1.

[0338] Circuit 2000 transmits signals to circuits 2002_1~ via wiring 2004_1~2004_k. It has the function of supplying power to 2002_N and functions as a shift register or decoder, etc. This is possible. The signal in question is often a digital signal and functions as a selection signal. It is possible to do so. And the wiring 2004_1~2004_k functions as a signal line. It is possible to do so.

[0339] Circuit 2001 has the function of outputting signals to circuits 2002_1 to 2002_N, and video It can function as a signal generation circuit, etc. For example, circuit 2001 has wiring 20 A signal is supplied to circuit 2002_1 via 05_1. At the same time, via wiring 2005_2 The signal is then supplied to circuit 2002_2. This signal is often an analog signal, and It can function as a deo signal. And wiring 2005_1~2005_N It can function as a signal line.

[0340] Circuits 2002_1 to 2002_N: To which wire should the output signal of circuit 2001 be output? It has the function of selecting and can function as a selector circuit. For example, circuit 2002_1 outputs the signal that circuit 2001 outputs to wiring 2005_1, and wiring S1~Sk It has a function to select which wiring to output to.

[0341] Transistors 2003_1 to 2003_N each respond according to the output signal of circuit 2000. It has the function of controlling the continuity state between wiring 2005_1 and wiring S1~Sk, and acts as a switch. It functions.

[0342] Next, regarding the operation of the signal line drive circuit in Figure 29(A), see the timing chart in Figure 29(B). Refer to Figure 29(B) for explanation. The signal 614_ input to wiring 2004_1 is shown. 1. Signal 614_2 input to wiring 2004_2, signal input to wiring 2004_k Signal 615_1 is input to wiring 2005_1, and signal 614_k is input to wiring 2005_1, and signal 615_1 is input to wiring 2005_2. An example of the signal 615_2 being applied is shown.

[0343] Furthermore, one operating period of the signal line drive circuit corresponds to one gate selection period in the display device. The gate selection period is when a pixel belonging to a certain row is selected and a video signal is written to that pixel. This refers to the period during which it is possible to do something.

[0344] The gate selection period is divided into period T0 and periods T1 to Tk. This is the period for simultaneously applying a pre-charge voltage to the pixels belonging to the selected row. It can function as a pre-charge period. Periods T1 to Tk can each be selected. This is the period for writing a video signal to the pixels belonging to the row, and is defined as the writing period. It is possible to do so.

[0345] For convenience, the operation of the signal line drive circuit will be explained using the operation of circuit 2002_1 as an example.

[0346] First, during period T0, circuit 2000 is high-level to wiring 2004_1~2004_k. It outputs a signal. Then transistors 2003_1~2003_k turn on. Then, wiring 2005_1 and wiring S1~Sk become conductive. At this time, circuit 2001 Since the precharge voltage Vp is supplied to wiring 2005_1, the precharge voltage V p is output to wiring S1 to Sk via transistors 2003_1 to 2003_k, respectively. The precharge voltage Vp is then written to the pixels belonging to the selected row. Therefore, the pixels belonging to the selected row are precharged.

[0347] Next, during period T1, circuit 2000 outputs a high-level signal to wiring 2004_1. Then, transistor 2003_1 will turn on, so wire 2005_1 and wire S Wiring 1 becomes conductive. Wiring 2005_1 and wiring S2~Sk become non-conductive. At this time, circuit 2001 outputs the signal Data(S1) to wiring 2005_1. If so, the signal Data(S1) is transmitted to wiring S1 via transistor 2003_1. The output is generated. In this way, the signal Data(S1) is selected from among the pixels connected to wiring S1. The pixels belonging to the selected row are written to.

[0348] Next, during period T2, circuit 2000 outputs a high-level signal to wiring 2004_2. Then, transistor 2003_2 will turn on, so wire 2005_2 and wire S Wiring 2 becomes conductive. Then, wiring 2005_1 and wiring S1 become non-conductive, Line 2005_1 and wiring S3~Sk remain in a non-conductive state. At this time, circuit 2001 Assuming that the signal Data(S2) is output to wiring 2005_1, the signal Data( S2) is output to wiring S2 via transistor 2003_2. In this way, the signal Data(S1) is written to the pixels belonging to the selected row among the pixels connected to wiring S1. To be incorporated.

[0349] Subsequently, until period Tk, circuit 2000 is high-level to wiring 2004_1~2004_k. Since the signals are output sequentially, the same applies to periods T1 and T2, from period T3 to period Tk. Circuit 2000 outputs high-level signals sequentially to wiring 2004_3 to 2004_k. Therefore, transistors 2003_3 to 2003_k are turned on in order, so the transistors The terminals 2003_1 to 2003_N are turned on in order. Therefore, the output from circuit 2001 is The signals are output sequentially to wiring S1 to Sk. In this way, the pixels belonging to the selected row are output. This makes it possible to write signals sequentially.

[0350] The above describes an example of a signal line drive circuit. The signal line drive circuit of this embodiment is a selector Because it has a circuit that functions as a connector, the number of signals or wires can be reduced. Alternatively, a voltage for precharging may be applied before writing the video signal to the pixels (period T0). Because it writes to the pixels, the video signal writing time can be shortened. Therefore, This allows for larger and higher-resolution display devices. However, it is not limited to this. It is possible to omit period T0 and not precharge the pixels.

[0351] Furthermore, if k is too large, the writing time to the pixels will be shortened, so the video signal to the pixels The writing process may not complete within the allotted time. Therefore, it is preferable that k ≤ 6. It is more preferable that k ≤ 3. Even more preferable that k = 2. It's nice.

[0352] In particular, when the color elements of a pixel are divided into n (where n is a natural number greater than or equal to 2), k = n. This is possible. For example, if the color elements of a pixel are divided into three parts: red (R), green (G), and blue (B) If this is the case, k=3 is possible. In this case, the gate selection period is period T0, It is divided into periods T1, T2, and T3. Then, in periods T1, T2, and T3... This involves writing the video signal to the red (R) pixels, green (G) pixels, and blue (B) pixels, respectively. This is possible. However, it is not limited to this, and the order of period T1, period T2, and period T3 is arbitrary. It is possible to set it as desired.

[0353] In particular, a pixel has n (where n is a natural number greater than or equal to 2) subpixels (hereinafter referred to as subpixels or subpixels) When it is divided into (also known as) sub-pixels, it is possible to set k=n. For example, sub-pixels with 2 pixels When divided into pixels, k=2 is possible. In this case, the 1-gate selection period is The period is divided into periods T0, T1, and T2. In period T1, there are two subpixels. Write the video signal to one of the two subpixels, and during period T2, write the video signal to the other of the two subpixels. It is possible to fill it.

[0354] Note that the drive frequencies of circuits 2000 and 2002_1~2002_N are as follows: Often lower than 1, and formed in the same process as the transistors formed in the pixel area. The inverter can be used in circuit 2000 and circuits 2002_1 to 2002_N. Circuit 2000 and circuits 2002_1 to 2002_N are formed on the same substrate as the pixel section. This makes it possible to reduce the number of connections between the substrate on which the pixel is formed and the external circuit. This allows for improvements in yield and reliability. Furthermore, as shown in Figure 24(C), the scan line driving circuit is also formed on the same substrate as the pixel section. This further reduces the number of connections to external circuits.

[0355] Note that circuit 2000 is the semiconductor device or shift resistor of Embodiments 1 to 4. It is possible to use a transistor. In this case, all the transistors in circuit 2000 The properties can be set to either an N-channel type or a P-channel type. Therefore, the number of process steps can be reduced. This can lead to a reduction in waste, improved yield, or cost savings.

[0356] Furthermore, not only circuit 2000, but all transistors in circuits 2002_1 to 2002_N The polarity of the zista can also be set to either an N-channel or P-channel type. Therefore, Circuit 2000 and circuits 2002_1 to 2002_N are formed on the same substrate as the pixel section. In some cases, it is possible to reduce the number of processes, improve yield, or reduce costs. In particular, all By making the polarity of each transistor an N-channel type, the semiconductor layer of the transistor and Therefore, amorphous semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors can be used. Yes, it is possible. Because the drive frequencies of circuits 2000 and 2002_1~2002_N are Often lower than circuit 2001, and formed using the same process as the transistors formed in the pixel area. This is because the transistors that are created can be used in circuits 2002_1 to 2002_N. ru.

[0357] (Embodiment 6) In this embodiment, the pixel configuration and pixel operation applicable to the liquid crystal display device are described below. explain.

[0358] Figure 30(A) shows an example of a pixel. Pixel 3020 is composed of a transistor 3021 and a liquid crystal element. It has 3022 and a capacitive element 3023. And the first terminal of transistor 3021 is The wiring 3031 is connected, and the second terminal of transistor 3021 is connected to one of the liquid crystal elements 3022. One electrode and one electrode of the capacitive element 3023 are connected to the gate of transistor 3021. It is connected to wiring 3032. The other electrode of liquid crystal element 3022 is connected to electrode 3034. The other electrode of the capacitive element 3023 is connected to the wiring 3033.

[0359] For example, a video signal can be input to wiring 3031. For example, a scan signal, selection signal, or gate signal can be input to 2. For example, a constant voltage can be supplied to wiring 3033. Electrode 3 For example, a constant voltage can be supplied to 034. However, this is not limited to this. The video signal is not specified, and a precharge voltage is supplied to wiring 3031. It is possible to shorten the writing time. Alternatively, a signal can be input to wiring 3033. This makes it possible to control the voltage applied to the liquid crystal element 3022. Alternatively, Frame inversion drive is achieved when a signal is input to line 3033 or electrode 3034. It is possible to do so.

[0360] Wiring 3031 can function as a signal line, video signal line, or source line. Wiring 3032 can function as a signal line, scan line, or gate signal line. Wiring 3033 can function as a power line or a capacitance line. Electrode 3 034 can function as a common electrode or a counter electrode. However, this is not limited to If the voltage is not specified and voltage is supplied to wiring 3031 and wiring 3032, these wirings will be electrical It can function as a source line. Alternatively, if a signal is input to wiring 3033, Line 3033 can function as a signal line.

[0361] Transistor 3021 determines the conductivity between wiring 3031 and one electrode of liquid crystal element 3022. By controlling it, it has the function of controlling the timing of writing the video signal to the pixel. It can function as a switch. Capacitive element 3023 is one of the liquid crystal elements 3022. The voltage difference between the electrode and the wiring 3033 is maintained, and the voltage applied to the liquid crystal element 3022 is maintained. It has the function of maintaining a constant value and functions as a holding capacity. However, it is not limited to this.

[0362] Figure 30(B) shows a timing chart to explain the operation of the pixels in Figure 30(A). An example is shown. Figure 30(B) shows the signal 3042_j (where j is a natural number) and the signal 3042_j+1 This shows signal 3041_i (where i is a natural number), signal 3041_i+1, and voltage 3043. Then, Figure 30(B) shows the kth frame (where k is a natural number greater than or equal to 2) and the k+1th frame. This indicates the following: Note that signals 3042_j, ​​3042_j+1, 3041_i, and 30 41_i+1 and voltage 3043 are signals input to the j-th row wiring 3032, respectively. +1 The signal input to wire 3032 in row 1, the signal input to wire 3031 in column i, i This is an example of the signal input to wiring 3031 in the first row and the voltage supplied to wiring 3033. .

[0363] The operation of pixel 3020, located in row j and column i, is described below. The signal 3042_j is high level. When this happens, transistor 3021 turns on. Therefore, the wiring in the i-th row 3031 and the LCD Since one electrode of element 3022 becomes conductive, signal 3041_j is transmitted to transistor 3 It is input to one electrode of the liquid crystal element 3022 via 021. Then, the capacitive element 3023 This is the potential difference between the potential of one electrode of the liquid crystal element 3022 and the potential of the wiring 3033 at this time. Therefore, the liquid crystal element holds until the signal 3042_j goes high again. The voltage applied to 3022 remains constant. The liquid crystal element 3022 then... It expresses tonal gradations accordingly.

[0364] In Figure 30(B), positive and negative polarity signals are alternately distributed for each row selection period. An example of what happens when input is made to line 3031 is shown. A positive polarity signal is one in which the voltage is equal to a reference value (for example). A signal higher than the potential of electrode 3034 is a negative polarity signal, where the voltage is higher than the reference value. This refers to a signal lower than (for example, the potential of electrode 3034). However, it is not limited to this. The signal input to wiring 3031 can have the same polarity for the duration of one frame. ru.

[0365] Note that Figure 30(B) shows the polarity of signal 3041_i and the polarity of signal 3041_i+1. An example of a case where they are different is shown. However, it is not limited to this, and the polarity of signal 3041_i and The polarity of signal 3041_i+1 can be the same.

[0366] Figure 30(B) shows the period during which signal 3042_j is at a high level, and signal 3042_ This shows an example of a case where the period when j+1 is at a high level does not overlap. However, this is not limited to this example. It is not fixed, and as shown in Figure 30(C), the period during which signal 3042_j is at a high level and It is possible that this period will overlap with the period when code 3042_j+1 is at a high level. It is preferable that the same polarity signal is supplied to line 3031 for the duration of one frame. By doing so, the signal 3041_j written to the j-th pixel is used for the j+1-th row. The pixels can be pre-charged. In this way, the time it takes to write the video signal to the pixels This can shorten the time. Therefore, the display device can be made high-resolution. Alternatively, the display device The display area can be made larger. Alternatively, during one frame period, the wiring 3031 Since signals of the same polarity are input, power consumption can be reduced.

[0367] Furthermore, the pixel configuration in Figure 31(A) and the timing chart in Figure 30(C) are combined. This enables dot inversion driving. In the pixel configuration shown in Figure 31(A), Pixel 3020(i, j) is connected to wiring 3031_i. On the other hand, pixel 3020(i, j+1) is connected to wiring 3031_i+1. In other words, the pixels belonging to the i-th column are in row 1. The wires are connected alternately, one at a time, to wire 3031_i and the other to wire 3031_i+1. In this way, the i-th row The pixels belonging to the eye are written with alternating positive and negative polarity signals, one row at a time. This enables dot inversion driving. However, it is not limited to this, and also applies to the i-th column. The pixels are arranged alternately in multiple rows (for example, 2 or 3 rows), with wiring 3031_i and wiring 3031 It is possible to connect it to _i+1.

[0368] Furthermore, a subpixel structure can be used as the pixel configuration. Figure 31(B) Figure 31( B) is called 1S+2G (for example, using one signal line and two scan lines). The subpixel structure is shown, and Figure 31(C) shows 2S+1G (for example, two signal lines and one This shows a subpixel structure called a subpixel that uses scan lines. Subpixel 3020A and Pixel 3020B corresponds to pixel 3020. Transistor 3021A and transistor Transistor 3021B corresponds to transistor 3021. Liquid crystal element 3022A and liquid crystal element 3 022B corresponds to liquid crystal element 3022. Capacitive element 3023A and capacitive element 3023B This corresponds to capacitive element 3023. Wiring 3031A and wiring 3031B correspond to wiring 3031 This corresponds to the following. Wiring 3032A and wiring 3032B correspond to wiring 3032.

[0369] Here, the pixels of this embodiment, the semiconductor devices of Embodiments 1 to 5, and the shift register By combining it with a station, display device, or signal line drive circuit, various advantages can be obtained. It can be obtained. For example, when using a subpixel structure as pixels, the display device can be driven The number of signals required to operate increases. Therefore, the number of gate signal lines, or source The number of lines increases. As a result, the number of connections between the substrate on which the pixel is formed and the external circuitry increases. The width may increase. However, even if the number of gate signal lines increases, as shown in Embodiment 5 Thus, it is possible to form the scanning line driving circuit on the same substrate as the pixel section. Without significantly increasing the number of connections between the substrate on which the pixel portion is formed and the external circuit, sub-pixels A pixel with a linear structure can be used. Alternatively, even if the number of source lines increases, the signal of Embodiment 5 By using a wire drive circuit, the number of source wires can be reduced. Therefore, Without significantly increasing the number of connections between the substrate on which the pixel is formed and the external circuitry, subpixel The pixels of the structure can be used.

[0370] Alternatively, when inputting a signal to a capacitance line, the number of connections between the substrate on which the pixel unit is formed and the external circuit is... In some cases, the capacitance can increase significantly. Therefore, the capacitance line is connected to the semiconductor of Embodiments 1 to 5. It is possible to supply signals using a body device or a shift register. And, in practice The semiconductor device or shift register of Embodiments 1 to 5 is formed on the same substrate as the pixel portion. This is possible. Therefore, the number of connections between the substrate on which the pixel section is formed and the external circuit can be significantly reduced. The signal can be input to the capacitance line without increasing its capacity.

[0371] Alternatively, when using AC drive, the time required to write the video signal to the pixels becomes longer. As a result, there may be insufficient time to write the video signal to the pixels. Furthermore, when using pixels with a subpixel structure, the time required to write the video signal to the pixels is shortened. As a result, there may be insufficient time to write the video signal to the pixels. Therefore, using the signal line driving circuit of Embodiment 5, it is possible to write a video signal to the pixels. It is possible. In this case, before writing the video signal to the pixel, a pre-charge voltage is applied to the pixel. Because it is written, the video signal can be written to the pixels in a short time. Alternatively, as shown in Figure 21. By overlapping the period during which one row is selected with the period during which another row is selected, It is possible to use the video signal from another line as the voltage for precharging.

[0372] (Embodiment 7) In this embodiment, an example of the transistor structure is shown in Figures 32(A), (B), and (C). (See the references below for further explanation.)

[0373] Figure 32(A) shows an example of the structure of a display device, and also shows a top-gate type transistor. This figure shows an example of the structure of a ZISTA. Figure 32(B) shows an example of the structure of a display device. This figure shows an example of the structure of a bottom-gate transistor. Figure 32(C) This figure shows an example of the structure of a transistor fabricated using a semiconductor substrate.

[0374] An example of a transistor in Figure 32(A) is formed on a substrate 5260 with an insulating layer 5261 and , formed on the insulating layer 5261, region 5262a, region 5262b, region 5262c, A semiconductor layer 5262 having regions 5262d and 5262e, and covering the semiconductor layer 5262 An insulating layer 5263 is formed in such a way, and a semiconductor layer 5262 and an insulating layer 5263 are formed on top of the insulating layer 5263. A conductive layer 5264 is formed on the insulating layer 5263 and the conductive layer 5264, and has an opening. An insulating layer 5265 and a guide formed on the insulating layer 5265 and in the opening of the insulating layer 5265 It has an electrolytic layer 5266.

[0375] An example of a transistor in Figure 32(B) consists of a substrate 5300 and a transistor formed on the substrate 5300. A conductive layer 5301, an insulating layer 5302 formed to cover the conductive layer 5301, and a conductive layer 5 A semiconductor layer 5303a formed on 301 and the insulating layer 5302, and semiconductor layer 5303a A semiconductor layer 5303b formed on top of the semiconductor layer 5303b and the insulating layer 5302 A conductive layer 5304 is formed on top of the insulating layer 5302 and on top of the conductive layer 5304. The insulating layer 5305 has openings, and the insulating layer 5305 is on top of the insulating layer 5305 and the openings of the insulating layer 5305 It has a conductive layer 5306 formed thereon.

[0376] An example of a transistor in Figure 32(C) is a semiconductor substrate having regions 5353 and 5355. A plate 5352, an insulating layer 5356 formed on the semiconductor substrate 5352, and a semiconductor substrate 53 An insulating layer 5354 formed on 52, and a conductive layer 535 formed on the insulating layer 5356 7 and are formed on insulating layer 5354, insulating layer 5356, and conductive layer 5357, and the opening is An insulating layer 5358 is provided, and is formed on the insulating layer 5358 and in the openings of the insulating layer 5358. It has a conductive layer 5359. Thus, region 5350 and region 5351 are each made of Zista is created.

[0377] Furthermore, when configuring a display device using the transistors in this embodiment, for example, Figure As shown in 32(A), an opening is formed on the conductive layer 5266 and the insulating layer 5265. An insulating layer 5267 having a portion, and formed on the insulating layer 5267 and in the opening of the insulating layer 5267 A conductive layer 5268 is formed on the insulating layer 5267 and on the conductive layer 5268, and openings An insulating layer 5269 having and formed on the insulating layer 5269 and in the openings of the insulating layer 5269 A light-emitting layer 5270 and a conductive layer 5 formed on the insulating layer 5269 and on the light-emitting layer 5270. It is possible to form 271.

[0378] Furthermore, as shown in Figure 32(B), the insulating layer 5305 and the conductive layer 5306 are arranged on top of each other. A liquid crystal layer 5307 and a conductive layer 5308 formed on top of the liquid crystal layer 5307 are formed. This is possible.

[0379] The insulating layer 5261 can function as an undercoat. The insulating layer 5354 is between elements. It functions as a separation layer (e.g., a field oxide film). Insulating layer 5263, insulating layer 5302, The insulating layer 5356 can function as a gate insulating film. The conductive layer 5264, The electrode layer 5301 and the conductive layer 5357 can function as gate electrodes. Insulating layer 5265, insulating layer 5267, insulating layer 5305, and insulating layer 5358 are interlayer films or flat It can function as a film. Conductive layer 5266, conductive layer 5304, and conductive layer 5 359 can function as wiring, a transistor electrode, or a capacitive element electrode, etc. It is possible. The conductive layer 5268 and the conductive layer 5306 are used as pixel electrodes or reflective electrodes, etc. It is possible for it to function. The insulating layer 5269 can function as a partition. The conductive layer 5271 and the conductive layer 5308 function as counter electrodes or common electrodes, etc. This is possible.

[0380] Examples of substrates 5260 and 5300 include glass substrates, quartz substrates, and semiconductor substrates. For example, silicon substrates, SOI substrates, plastic substrates, metal substrates, stainless steel substrates, etc. Substrates with stainless steel foil, tungsten substrates, and tungsten foil Examples of substrates include glass substrates or flexible substrates. An example of a glass substrate is barium borosilicate glass. Examples include lath and aluminoborosilicate glass. Polyethylene is an example of a flexible substrate. Terephthalate (PET), polyethylene naphthalate (PEN), polyether sulf Plastics such as PES, or flexible synthetic resins such as acrylic. There are others. In addition, laminated films (polypropylene, polyester, vinyl, poly Paper containing fibrous materials (such as polyvinyl fluoride and polyvinyl chloride), base film (polyester) Examples include polyamides, polyimides, inorganic vapor-deposited films, and papers.

[0381] As an example of the semiconductor substrate 5352, a single crystal Si group having n-type or p-type conductivity A plate can be used. Region 5353 is, for example, an impurity in the semiconductor substrate 5352. This is a region where a substance is added, and it functions as a well. For example, if the semiconductor substrate 5352 is p-type If it has a conductivity type, region 5353 has an n-type conductivity and functions as an n-well. On the other hand, if the semiconductor substrate 5352 has an n-type conductivity, then region 5353 has a p-type conductivity. It has an electrochemical type and functions as a p-well. Region 5355 is, for example, a semiconductor group where impurities are present. This is an area added to plate 5352 and functions as either a source area or a drain area. Therefore, it is possible to form an LDD region on the semiconductor substrate 5352.

[0382] Examples of insulating layer 5261 include silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxide. Silicon oxide (SiOxNy) (x>y>0), silicon nitride oxide (SiNxOy) (x>y>0) These include films containing oxygen or nitrogen, or laminated structures thereof. Insulating layer 5261 One example of a case where it is provided in a two-layer structure is to provide a silicon nitride film as the first insulating layer. A silicon oxide film can be provided as the second insulating layer. The insulating layer 5261 has a three-layer structure. One example of how it can be provided is to provide a silicon oxide film as the first insulating layer, and the second insulating layer It is possible to provide a silicon nitride film as the edge layer and a silicon oxide film as the third insulating layer. ru.

[0383] Examples of semiconductor layers 5262, 5303a, and 5303b include non-single Crystalline semiconductors (e.g., amorphous silicon, polycrystalline silicon, microcrystalline silicon) (etc.), single crystal semiconductors, oxide semiconductors (e.g., ZnO, InGaZnO, IZO, ITO) (SnO, TiO, AZTO), compound semiconductors (e.g., SiGe, GaAs), organic semiconductors Examples include conductors or carbon nanotubes.

[0384] For example, region 5262a is an intrinsic region where no impurities are added to the semiconductor layer 5262. This state functions as a channel region. However, an impurity is added to region 5262a. It is possible that the impurities added to region 5262a are region 5262b, region 526 The concentration of impurities added to region 2c, region 5262d, or region 5262e is lower than that of the impurities added to region 5262e. Preferred. Regions 5262b and 5262d are region 5262c or region 5262e This is a region where a lower concentration of impurities is added, and is called LDD (Lightly Doped Drain (LDD) functions as an area. However, areas 5262b and 5262 d can be omitted. Regions 5262c and 5262e are impurities at high concentrations. This is a region where the material is added to the semiconductor layer 5262, and it functions as either a source region or a drain region. do.

[0385] Furthermore, semiconductor layer 5303b is a semiconductor layer to which phosphorus and other impurity elements are added. It has an n-type conductivity.

[0386] Furthermore, when an oxide semiconductor or a compound semiconductor is used as the semiconductor layer 5303a, The semiconductor layer 5303b can be omitted.

[0387] Examples of insulating layers 5263, 5273, and 5356 include silicon dioxide (Si Ox), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y>0), nitriding acid A film containing oxygen or nitrogen, such as silicon dioxide (SiNxOy) (x>y>0), or these This includes layered structures, etc.

[0388] Conductive layer 5264, conductive layer 5266, conductive layer 5268, conductive layer 5271, conductive layer 5301, Conductive layer 5304, conductive layer 5306, conductive layer 5308, conductive layer 5357, and conductive layer 535 9 can be a single-layer structure or a multi-layer structure, and is formed using a conductive film. Examples include aluminum (Al), tantalum (Ta), titanium (Ti), molybdenum ( Mo), tungsten (W), neodymium (Nd), chromium (Cr), nickel (Ni), Platinum (Pt), gold (Au), silver (Ag), copper (Cu), manganese (Mn), cobalt (C) o), niobium (Nb), silicon (Si), iron (Fe), palladium (Pd), carbon (C) ), scandium (Sc), zinc (Zn), gallium (Ga), indium (In), tin Selected from the group consisting of (Sn), zirconium (Zr), and cesium (Ce). Examples include single-element films, or compounds containing one or more elements selected from a group. The individual membranes or compounds are phosphorus (P), boron (B), arsenic (As), and / or It is possible to include oxygen (O), etc. Examples of compounds include the several mentioned above. Alloys containing one or more elements selected from the elements (for example, indium tin oxide (I TO), indium zinc oxide (IZO), silicon oxide-containing indium tin oxide (ITS) O), zinc oxide (ZnO), tin oxide (SnO), cadmium tin oxide (CTO), aluminum Umneodymium (Al-Nd), aluminum tungsten (Al-Ta), aluminum Zirconium (Al-Zr), aluminum titanium (Al-Ti), aluminum cesium Al-Ce (Al-Ce), Magnesium-Silver (Mg-Ag), Molybdenum-Niobium (Mo-Nb), Alloy materials such as molybdenum tungsten (Mo-W) and molybdenum tantalum (Mo-Ta) (Material), a compound of nitrogen with one or more elements selected from the aforementioned elements (for example) For example, a nitride film such as titanium nitride, tantalum nitride, or molybdenum nitride, or the aforementioned multiple A compound of silicon with one or more elements selected from the elements (for example, tungsten) Silicide, titanium silicide, nickel silicide, aluminum silicon, molybdenum Examples include silicon silicide films. Other examples include carbon nanotubes. Nanotube materials such as organic nanotubes, inorganic nanotubes, or metallic nanotubes be.

[0389] Insulating layer 5265, insulating layer 5267, insulating layer 5269, insulating layer 5305, and insulating layer 535 Examples of 8 include single-layer insulating layers or multi-layered structures thereof. Examples include silicon dioxide (SiOx), silicon nitride (SiNx), or silicon oxide-nitride (Si Ox(OxNy) (x>y>0), silicon nitride (SiNxOy) (x>y>0), etc. Alternatively, a film containing nitrogen, a film containing carbon such as DLC (diamond-like carbon), or Siloxane resin, epoxy, polyimide, polyamide, polyvinylphenol, benzo Examples include cyclobutene or organic materials such as acrylic.

[0390] Examples of the light-emitting layer 5270 include organic EL elements and inorganic EL elements. Examples of elements include a hole injection layer made of a hole injection material and a hole transport layer made of a hole transport material. A layer consisting of a light-emitting layer made of a light-emitting material, an electron transport layer made of an electron transport material, and an electron injection material An electron injection layer, or a single-layer structure of a layer made by mixing multiple of these materials, or These include layered structures.

[0391] An example of liquid crystal layer 5307, an example of a liquid crystal material applicable to liquid crystal layer 5307, or liquid crystal layer 530 Examples of liquid crystal modes applicable to liquid crystal elements including 7 include nematic liquid crystals and cholesterol liquid crystals. Smetic LCD, disco-tic LCD, thermotropic LCD, liotropic Low molecular weight liquid crystals, low molecular weight liquid crystals, high molecular weight liquid crystals, high molecular weight dispersed liquid crystals (PDLCs), Ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain polymer liquid crystal, plasma address liquid crystal (P ALC), banana-shaped LCD, TN (Twisted Nematic) mode, STN (S (Super Twisted Nematic) mode, IPS (In-Plane-Switch) itching mode, FFS (Fringe Field Switching) mode MVA (Multi-domain Vertical Alignment) code, PVA (Patterned Vertical Alignment), ASV (Advanced Super View) mode, ASM (Axially Sym metric aligned Micro-cell) mode, OCB (Optica) (Compensated Birefringence) mode, ECB (Elec) (Trially Controlled Birefringence) Mode, FL C (Ferroelectric Liquid Crystal) mode, AFLC ( AntiFerroelectric Liquid Crystal) mode, PDL C (Polymer Dispersed Liquid Crystal) mode, There are modes such as Stohst mode and Blue Phase mode.

[0392] Furthermore, an insulating layer that functions as an alignment film is placed on top of the insulating layer 5305 and on top of the conductive layer 5306. It is possible to form insulating layers and other structures that function as protrusions.

[0393] Furthermore, on top of the conductive layer 5308, there are color filters, black matrices, or protrusions. It is possible to form insulating layers and the like that which function as conductive layers. Below the conductive layer 5308, there is an alignment film and It is possible to form an insulating layer that functions in this way.

[0394] The transistor of this embodiment can be applied to embodiments 1 to 6. In particular, in Figure 32(B), the semiconductor layer is an amorphous semiconductor, a microcrystalline semiconductor, and an organic When using semiconductors or oxide semiconductors, transistors may degrade. Therefore, the transistor of this embodiment can be used in a semiconductor device, a shift register, or a display device. Using them shortens their lifespan. However, half of Embodiments 1 to 6 In conductive devices, shift registers, or display devices, transistor degradation can be suppressed. Therefore, the transistor of this embodiment is the semiconductor of Embodiments 1 to 6. By applying it to devices, shift registers, or display devices, their lifespan can be extended. It is possible.

[0395] (Embodiment 8) In this embodiment, an example of the cross-sectional structure of the display device is shown in Figures 33(A), (B), and ( Refer to C) for further explanation. For the example, a liquid crystal display device will be described here.

[0396] Figure 33(A) is an example of a top view of a display device. A drive circuit 5392 and A pixel section 5393 is formed. An example of a drive circuit 5392 is a scan line drive circuit , or a signal line drive circuit, etc. The pixel section 5393 has pixels, and the pixels are driven by the drive circuit 53 The operation is controlled by 92. For example, in the case of a liquid crystal display device, the output of the drive circuit 5392. The voltage applied to the liquid crystal element is set by the signal.

[0397] Figure 33(B) shows an example of the AB section of Figure 33(A). And in Figure 33(B) , a substrate 5400, a conductive layer 5401 formed on the substrate 5400, and the conductive layer 5401 An insulating layer 5402 is formed to cover the conductive layer 5401 and the insulating layer 5402. A semiconductor layer 5403a is formed, and a semiconductor layer 5403b is formed on top of the semiconductor layer 5403a. Furthermore, a conductive layer 5404 is formed on the semiconductor layer 5403b and the insulating layer 5402, and An insulating layer 5405 having an opening is formed on the edge layer 5402 and the conductive layer 5404. , a conductive layer 5406 formed on the insulating layer 5405 and in the openings of the insulating layer 5405, and insulation An insulating layer 5408 is placed on top of layer 5405 and on top of the conductive layer 5406, and insulating layer 5405 A liquid crystal layer 5407 formed on top of the liquid crystal layer 5407 and an insulating layer 5405 formed on top of the liquid crystal layer 5407 The conductive layer 5409 and the substrate 5410 formed on the conductive layer 5409 are shown.

[0398] The conductive layer 5401 can function as a gate electrode. The insulating layer 5402 is a gate electrode. It can function as a conductive insulating film. The conductive layer 5404 is used for wiring and transistors. It can function as an electrode, or an electrode of a capacitive element. The insulating layer 5405 is a layer It can function as an interlayer or planarization layer. The conductive layer 5406 is used for wiring, pixel electricity It can function as a pole or a reflector electrode. The insulating layer 5408 is a sealing material. It is possible for it to function. The conductive layer 5409 can function as a counter electrode or a common electrode. It is possible.

[0399] In this case, parasitic capacitance may occur between the drive circuit 5392 and the conductive layer 5409. As a result, the output signal of the drive circuit 5392 or the voltage of each node may have a distortion or delay. This can occur, or power consumption can increase. However, as shown in Figure 33(B) An insulating layer 5408 capable of functioning as a sealant is formed on top of the drive circuit 5392. By doing so, the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409 is reduced. It can be reduced. This is because the dielectric constant of the sealing material is lower than that of the liquid crystal layer. Because there are many. Therefore, the output signal of the drive circuit 5392 or the voltage of each node is a smudge. Alternatively, delay can be reduced. Alternatively, the power consumption of the drive circuit 5392 can be reduced. can.

[0400] Furthermore, as shown in Figure 33(C), a portion of the drive circuit 5392 is placed on top of it, functioning as a sealing material. It is possible to form an insulating layer 5408 that allows for this. This makes it possible to reduce the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409. Therefore, the output signal of the drive circuit 5392 or the voltage of each node can be reduced. Yes, it is possible. However, it is not limited to this, and on the drive circuit 5392, a material that functions as a sealant can be used. It is possible that an insulating layer 5408 is not formed.

[0401] Furthermore, the display element is not limited to liquid crystal elements, but can include various other elements such as EL elements or electrophoretic elements. It is possible to use indicative elements.

[0402] In this embodiment, an example of the cross-sectional structure of the display device has been described. This involves combining the semiconductor device or shift register of Embodiments 1 to 5. This is possible. For example, amorphous semiconductors, microcrystalline semiconductors, as semiconductor layers of transistors. When using organic semiconductors or oxide semiconductors, the channel width of the transistor becomes larger. This is often the case. However, as in this embodiment, if the parasitic capacitance of the drive circuit can be reduced, The channel width of the transistor can be reduced. Therefore, the layout area can be reduced. Since this can be measured, the bezel of the display device can be made narrower. Alternatively, the display device can be made high-resolution. It can be made finer.

[0403] (Embodiment 9) This embodiment shows an example of the manufacturing process for transistors and capacitive elements. In particular, semiconductors The fabrication process when using an oxide semiconductor as the layer will be described below.

[0404] Refer to Figures 34(A) to (C) to fabricate transistor 5441 and capacitive element 5442. Let's describe an example of the process. Figures 34(A) to (C) show transistors and capacitive elements. This is an example of the manufacturing process. Transistor 5441 is an example of an inverse staggered thin-film transistor. Wiring is provided on the oxide semiconductor layer via a source electrode or drain electrode. This is an example of a transistor.

[0405] First, a first conductive layer is formed over the entire surface of the substrate 5420 by sputtering. Next, Using a resist mask formed by a photolithography process using a first photomask Then, the first conductive layer is selectively etched to form conductive layer 5421 and conductive layer 5...

Claims

1. Having first to third transistors, The source electrode or drain electrode of the first transistor is always in contact with the scan line. The source electrode or the other drain electrode of the first transistor is always in electrical contact with the power line. The source electrode or drain electrode of the second transistor is always in contact with the scan line. The source electrode or the other drain electrode of the second transistor is always in electrical contact with the power line. The source electrode or drain electrode of the third transistor is always in electrical contact with the gate electrode of the first transistor. The first conductive layer, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The second conductive layer, which functions as the other of the source electrode or drain electrode of the first transistor, has the function of the other of the source electrode or drain electrode of the second transistor. In a plan view, the first conductive layer has a plurality of first regions extending in a first direction, and a second region connected to the plurality of first regions in a region that does not overlap with the semiconductor layer having the channel formation region of the first transistor. In a plan view, the second conductive layer has a plurality of third regions extending in the first direction, and a fourth region connected to the plurality of third regions in a region overlapping with the semiconductor layer. The second conductive layer has an opening, The opening has a region that overlaps with the semiconductor layer and a region that does not overlap with the semiconductor layer. The opening has a region that overlaps with a third conductive layer that functions as the gate electrode of the first transistor, and a region that does not overlap with the third conductive layer.

2. Having first to fourth transistors, The source electrode or drain electrode of the first transistor is always in contact with the scan line. The source electrode or the other drain electrode of the first transistor is always in electrical contact with the power line. The source electrode or drain electrode of the second transistor is always in contact with the scan line. The source electrode or the other drain electrode of the second transistor is always in electrical contact with the power line. The source electrode or drain electrode of the third transistor is always in electrical contact with the gate electrode of the first transistor. The source electrode or drain electrode of the fourth transistor is always in electrical contact with the gate electrode of the second transistor. The first conductive layer, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The second conductive layer, which functions as the other of the source electrode or drain electrode of the first transistor, has the function of the other of the source electrode or drain electrode of the second transistor. In a plan view, the first conductive layer has a plurality of first regions extending in a first direction, and a second region connected to the plurality of first regions in a region that does not overlap with the semiconductor layer having the channel formation region of the first transistor. In a plan view, the second conductive layer has a plurality of third regions extending in the first direction, and a fourth region connected to the plurality of third regions in a region overlapping with the semiconductor layer. The second conductive layer has an opening, The opening has a region that overlaps with the semiconductor layer and a region that does not overlap with the semiconductor layer. The opening has a region that overlaps with a third conductive layer that functions as the gate electrode of the first transistor, and a region that does not overlap with the third conductive layer.

3. In Claim 1 or Claim 2, A semiconductor device wherein the third conductive layer is always electrically connected to a fifth conductive layer, which functions as either the source electrode or the drain electrode of the third transistor, via a fourth conductive layer.

4. In any one of Claims 1 to 3, The first conductive layer is always electrically connected to the scanning line via the sixth conductive layer in a semiconductor device.

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