Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor in which the stress concentration on a capacitor main body by contact with an interposer can be reduced, and a manufacturing method for the multilayer ceramic capacitor.SOLUTION: A multilayer ceramic capacitor 1 according to the present invention includes a multilayer body 2, a capacitor main body 1A including external electrodes 3 including a first external electrode 3 provided at a first end surface CS1 of the multilayer body and a second external electrode 3 provided at a second end surface CS2 of the multilayer body, and a first interposer 4A disposed on the first external electrode 3 and a second interposer 4B disposed on the second external electrode 3 on a second main surface AS2 of the multilayer body of the capacitor main body 1A. The first interposer 4A and the second interposer 4B are apart from each other and each include an electrode connection region in contact with the external electrode 3 and an electrode non-connection region extending from the electrode connection region to a center in a length direction. An insulating resin material enters the electrode non-connection region.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic capacitor.

Background Art

[0002] In recent years, there has been a demand for a multilayer ceramic capacitor having a large capacitance and a small size. Such a multilayer ceramic capacitor has an inner layer portion in which dielectric layers, which are ferroelectric materials having a relatively high dielectric constant, and internal electrodes are alternately stacked. Then, dielectric layers as outer layer portions are disposed above and below the inner layer portion to form a rectangular parallelepiped laminate, and external electrodes are provided on both end faces in the longitudinal direction of the laminate to form a capacitor body. Furthermore, in order to suppress the occurrence of so-called "whining", a multilayer ceramic capacitor provided with an interposer disposed on the side of the capacitor body mounted on a substrate is known (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, when stress due to bending or the like is applied to the substrate on which the multilayer ceramic capacitor is mounted, the end portion of the interposer presses the capacitor body, and stress concentrates on the contact portion, which may cause cracks in the capacitor body.

[0005] An object of the present invention is to provide a multilayer ceramic capacitor capable of reducing stress concentration due to contact with an interposer on a capacitor body.

Means for Solving the Problems

[0006] To solve the above problems, a multilayer ceramic capacitor is provided, comprising: a laminate including a first main surface and a second main surface of the laminate facing each other in the stacking direction, a first end surface and a second end surface of the laminate facing each other in the length direction, and a first side surface and a second side surface of the laminate facing each other in the width direction; an external electrode including a first external electrode provided on the first end surface of the laminate and a second external electrode provided on the second end surface of the laminate; and a first interposer disposed on the first external electrode and a second interposer disposed on the second external electrode on the second main surface of the laminate of the capacitor body, wherein the first interposer and the second interposer are spaced apart from each other, and each has an electrode connection region in contact with the external electrode and an electrode non-connection region extending from the electrode connection region toward the center in the length direction, with an insulating resin material filling the electrode non-connection region. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can reduce stress concentration caused by contact between the capacitor body and the interposer. [Brief explanation of the drawing]

[0008] [Figure 1] This is a schematic perspective view of the multilayer ceramic capacitor 1 of the first embodiment. [Figure 2] This is a cross-sectional view of the multilayer ceramic capacitor 1 of the first embodiment along the line II-II in Figure 1. [Figure 3] This is a cross-sectional view of the multilayer ceramic capacitor 1 of the first embodiment along the line III-III in Figure 1. [Figure 4] This is a flowchart illustrating the manufacturing method of the multilayer ceramic capacitor 1. [Figure 5] This diagram illustrates the capacitor manufacturing process S1. [Figure 6] This diagram illustrates the interposer placement process S2 and the insulating resin film formation process S3. [Figure 7] This is a cross-sectional view of the multilayer ceramic capacitor 200 according to the second embodiment. [Figure 8] This is a cross-sectional view of the multilayer ceramic capacitor 300 according to the third embodiment. [Figure 9] This is a cross-sectional view of the multilayer ceramic capacitor 400 according to the fourth embodiment. [Modes for carrying out the invention]

[0009] (First Embodiment) First, a multilayer ceramic capacitor 1 according to the first embodiment of the present invention will be described. Figure 1 is a schematic perspective view of the multilayer ceramic capacitor 1 of the first embodiment. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor 1 of the first embodiment along the line II-II in Figure 1. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor 1 of the first embodiment along the line III-III in Figure 1.

[0010] The multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and comprises a capacitor body 1A having a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2, an interposer 4 attached to the capacitor body 1A, and an insulating resin film 50. The laminate 2 also includes an inner layer portion 11 which contains multiple sets of dielectric layers 14 and internal electrode layers 15.

[0011] In the following description, the orientation of the multilayer ceramic capacitor 1 is described as follows: The direction in which the pair of external electrodes 3 are provided in the multilayer ceramic capacitor 1 is defined as the length direction L. The direction in which the dielectric layer 14 and the internal electrode layer 15 are stacked is defined as the stacking direction T. The direction that intersects both the length direction L and the stacking direction T is defined as the width direction W. In this embodiment, the width direction W is perpendicular to both the length direction L and the stacking direction T.

[0012] (Outer surface of laminate 2) Furthermore, of the six outer surfaces of the laminate 2, a pair of outer surfaces facing the lamination direction T are designated as the first main surface AS1 and the second main surface AS2 of the laminate, a pair of outer surfaces facing the width direction W are designated as the first side surface BS1 and the second side surface BS2 of the laminate, and a pair of outer surfaces facing the length direction L are designated as the first end surface CS1 and the second end surface CS2 of the laminate. Furthermore, when there is no need to distinguish between the first main surface AS1 and the second main surface AS2 of the laminate, they will be collectively referred to as the main surface AS of the laminate; when there is no need to distinguish between the first side surface BS1 and the second side surface BS2 of the laminate, they will be collectively referred to as the side surface BS of the laminate; and when there is no need to distinguish between the first end surface CS1 and the second end surface CS2 of the laminate, they will be collectively referred to as the end surface CS of the laminate.

[0013] (Outer surface of the 1A capacitor body) Furthermore, of the six outer surfaces of the capacitor body 1A, the pair of outer surfaces facing the stacking direction T are designated as the first main surface AC1 and the second main surface AC2 of the capacitor, the pair of outer surfaces facing the width direction W are designated as the first side surface BC1 and the second side surface BC2 of the capacitor, and the pair of outer surfaces facing the length direction L are designated as the first end surface CC1 and the second end surface CC2 of the capacitor. Note that the second main surface AC2 of the capacitor is also the board mounting side surface AC2 of the capacitor body 1A. When there is no need to distinguish between the first main surface AC1 and the second main surface AC2 of the capacitor, they are collectively referred to as the main surface AC. Similarly, when there is no need to distinguish between the first side surface BC1 and the second side surface BC2 of the capacitor, they are collectively referred to as the side surface BC. When there is no need to distinguish between the first end surface CC1 and the second end surface CC2 of the capacitor, they are collectively referred to as the end surface CC.

[0014] (Outer surface of interposer 4) Also, two interposers 4 are provided, namely a first interposer 4A and a second interposer 4B. Of the six outer surfaces of each interposer 4, the outer surface on the capacitor body 1A side of a pair of outer surfaces facing each other in the stacking direction T is defined as a capacitor facing surface AI, and the surfaces of the first interposer 4A and the second interposer 4B provided in the length direction L and facing each other are defined as an interposer facing surface CI. The capacitor facing surface AI of the interposer 4 faces the substrate mounting side surface AC2 of the capacitor body 1A, and the interposer facing surface CI of the first interposer 4A faces the interposer facing surface CI of the second interposer 4B.

[0015] The laminate 2 preferably has rounded corners at the ridge line portions R1 including the corners. The ridge line portion R1 is a portion where two surfaces of the laminate 2, that is, the laminate main surface AS and the laminate side surface BS, the laminate main surface A and the laminate end surface CS, or the laminate side surface BS and the laminate end surface CS intersect. The dimensions of the laminate 2 are not particularly limited, but preferably, the dimension in the length direction L is 0.2 mm or more and 10 mm or less, the dimension in the width direction W is 0.1 mm or more and 10 mm or less, and the dimension in the stacking direction T is 0.1 mm or more and 5 mm or less.

[0016] (Laminate 2) The laminate 2 includes a laminate body 10 having an inner layer portion 11 and outer layer portions 12 respectively disposed on both sides of the inner layer portion 11 in the stacking direction T, and side gap portions 30 provided on both sides of the laminate body 10 in the width direction W.

[0017] (Inner layer portion 11) The inner layer portion 11 includes a plurality of sets of dielectric layers 14 and internal electrode layers 15 alternately stacked along the stacking direction T. The dielectric layer 14 has a thickness of 0.5 μm or less. The dielectric layer 14 is made of a ceramic material. As the ceramic material, for example, a dielectric ceramic mainly composed of BaTiO3 can be used. Alternatively, as the ceramic material, at least one of the minor components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds may be added to these main components. It is preferable that the number of dielectric layers 14, including the outer layer 12, be between 15 and 700.

[0018] The internal electrode layer 15 comprises a plurality of first internal electrode layers 15a and a plurality of second internal electrode layers 15b. The first internal electrode layers 15a and the second internal electrode layers 15b are arranged alternately. When there is no need to specifically distinguish between the first internal electrode layers 15a and the second internal electrode layers 15b, they are described together as the internal electrode layer 15.

[0019] The first internal electrode layer 15a comprises a first opposing portion 152a facing the second internal electrode layer 15b, and a first pull-out portion 151a extending from the first opposing portion 152a toward the first end face CS1 of the laminate. The end of the first pull-out portion 151a is exposed to the first end face CS1 of the laminate and is electrically connected to the first external electrode 3a, which will be described later. The second internal electrode layer 15b comprises a second opposing portion 152b facing the first internal electrode layer 15a, and a second leading portion 151b extending from the second opposing portion 152b to the second end face CS2 of the laminate. The end of the second leading portion 151b is electrically connected to the second external electrode 3b, which will be described later. Charge accumulates on the first opposing portion 152a of the first internal electrode layer 15a and the second opposing portion 152b of the second internal electrode layer 15b, and the characteristics of a capacitor are manifested.

[0020] The internal electrode layer 15 is preferably formed from a metallic material such as Ni, Cu, Ag, Pd, Ag-Pd alloy, or Au. The thickness of the internal electrode layer 15 is preferably, for example, 0.5 μm to about 2.0 mm. The number of internal electrode layers 15, including the first internal electrode layer 15a and the second internal electrode layer 15b, is preferably 15 to 700.

[0021] (Outer layer part 12) The outer layer 12 is manufactured from the same material as the dielectric layer 14 of the inner layer 11. The thickness of the outer layer 12 is, for example, 20 μm or less, and more preferably 10 μm or less.

[0022] The side gap portion 30 comprises a first side gap portion 30a provided on the laminate side BS side of the laminate body 10, and a second side gap portion 30b provided on the laminate second side BS2 side of the laminate body 10. In cases where there is no need to distinguish between the first side gap portion 30a and the second side gap portion 30b, they will be described together as the side gap portion 30.

[0023] (Side gap section 30) The side gap portion 30 is manufactured from the same material as the dielectric layer 14. The thickness of the side gap portion 30 is, for example, 20 μm, and preferably 10 μm or less.

[0024] (External electrode 3) The external electrode 3 comprises a first external electrode 3a provided on the first end face CS1 of the laminate and a second external electrode 3b provided on the second end face CS2 of the laminate. When there is no need to distinguish between the first external electrode 3a and the second external electrode 3b, they will be described together as the external electrode 3. The external electrode 3 covers not only the end face CS of the laminate, but also a portion of the main surface AS of the laminate and the side surface BS of the laminate on the end face CS side.

[0025] As described above, the end of the first lead-out portion 151a of the first internal electrode layer 15a is exposed to the first end face CS1 of the laminate and is electrically connected to the first external electrode 3a. Similarly, the end of the second lead-out portion 151b of the second internal electrode layer 15b is exposed to the second end face CS2 of the laminate and is electrically connected to the second external electrode 3b. As a result, the structure between the first external electrode 3a and the second external electrode 3b consists of multiple capacitor elements electrically connected in parallel.

[0026] Furthermore, the external electrode 3 may have a two-layer structure, for example, consisting of a base electrode layer and a plating layer. The plating layer may be one layer or two layers. In addition, a conductive resin layer may be provided between the base electrode layer and the plating layer. The base electrode layer is formed, for example, by applying and baking a conductive paste containing a conductive metal and glass. Examples of conductive metals that can be used for the base electrode layer include Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The plating layer is preferably made of a plating of one metal selected from the group consisting of, for example, Cu, Ni, Su, Ag, Pd, Ag-Pd alloy, Au, etc., or an alloy containing said metal.

[0027] (Interposer 4) The interposer 4 comprises a pair of first interposers 4A and second interposers 4B. Hereafter, unless it is necessary to distinguish between the first interposer 4A and the second interposer 4B, they will be referred to collectively as the interposer 4.

[0028] On the board mounting side AC2 of the capacitor body 1A, a first interposer 4A is positioned on one of the capacitor's first end faces CC1 in the longitudinal direction L, and a second interposer 4B is positioned on the other capacitor's second end face CC2. The first interposer 4A and the second interposer 4B are identical in shape, face each other, and are positioned at a certain distance apart.

[0029] The interposer 4 is composed of a material whose main component is an intermetallic compound containing at least one high-melting-point metal selected from Cu and Ni, and Sn as a low-melting-point metal. In addition to the intermetallic compound, the interposer 4 also contains elemental Sn metal. The Sn metal in the interposer 4 ensures good solderability when the multilayer ceramic capacitor 1 is mounted on the substrate.

[0030] As shown in Figure 2, the capacitor-facing surface AI of the interposer 4 has an electrode connection region AI1 that is in contact with the portion of the substrate mounting side AC2 of the capacitor body 1A where the external electrode 3 is provided, and an electrode non-connection region AI2 that extends further toward the center in the longitudinal direction L from the electrode connection region.

[0031] A gap D equal to the thickness of the external electrode 3 is formed between the portion of the capacitor body 1A's substrate mounting side AC2 where the external electrode 3 is not provided, i.e., the portion where the second main surface AS2 of the laminate is exposed, and the electrode non-connection region AI2. The gap D has a gap DA on the first interposer 4A side and a gap DB on the second interposer 4B side. Gaps DA and DB are provided for the insertion of the insulating resin film 50, which will be described later.

[0032] (Insulating resin film 50) The insulating resin film 50 has a portion located in the gap DA on the first interposer 4A side, a portion located in the gap DB on the second interposer 4B side, and a portion connecting gaps DA and DB. That is, the insulating resin film 50 extends along the substrate mounting side AC2 of the capacitor body 1A so as to fill gaps DA and DB and connect them. In the first embodiment, the insulating resin film 50 has a substantially uniform thickness in the lamination direction T. The insulating resin film 50 is also manufactured from, for example, polystyrene.

[0033] (Manufacturing method for multilayer ceramic capacitors) Figure 4 is a flowchart illustrating the manufacturing method of the multilayer ceramic capacitor 1. The manufacturing method of the multilayer ceramic capacitor 1 comprises a capacitor body manufacturing step S1, an interposer placement step S2, and an insulating resin film formation step S3. Figure 5 illustrates the capacitor body manufacturing process S1. Figure 6 illustrates the interposer placement process S2 and the insulating resin film formation process S3.

[0034] (Capacitor body manufacturing process S1) The capacitor body manufacturing process S1 comprises a laminate manufacturing process S11 and an external electrode formation process S12.

[0035] (Laminate manufacturing process S11) A ceramic slurry containing ceramic powder, a binder, and a solvent is formed into a sheet on a carrier film using a die coater, gravure coater, microgravure coater, etc., to produce a laminated ceramic green sheet 101 that will become a dielectric layer 14. Next, a conductive paste is printed in strips onto the laminated ceramic green sheet 101 by screen printing, inkjet printing, gravure printing, etc., and a conductive pattern 102 that will become the internal electrode layer 15 is printed on the surface of the laminated ceramic green sheet 101 to produce a printed material sheet 103.

[0036] Next, as shown in Figure 5(a), multiple material sheets 103 are stacked such that the conductive patterns 102 are all facing the same direction and the conductive patterns 102 are offset by half a pitch in the width direction between adjacent material sheets 103. Furthermore, ceramic green sheets 112 for the upper outer layer, which will become the outer layer 12, are stacked on both sides of the multiple stacked material sheets 103. Multiple stacked material sheets 103 and the outer layer ceramic green sheet 113 are heat-pressed together to create the mother block 110 shown in Figure 5(b). Next, the mother block 110 is cut along the cutting line X and the cutting line Y that intersects with cutting line X shown in Figure 5(b) to manufacture multiple laminated bodies 10 as shown in Figure 5(c).

[0037] (External electrode formation step S12) Next, as shown in Figure 5(d), an external electrode 3 is formed by applying and baking a conductive paste containing a conductive metal and glass onto the end face CS of the laminate 2. The external electrode 3 extends not only to the end face CS on both sides of the laminate 2, but also to the main surface AS and the side surface of the laminate, and is formed to cover a portion of the main surface AS on the end face CS side of the laminate. The capacitor body 1A is manufactured through the above process.

[0038] (Interposer placement process S2) A metal material paste is prepared containing at least one high-melting-point metal selected from Cu and Ni, which will be used as the interposer material, and Sn as a low-melting-point metal. In addition, a retaining plate 40 is prepared that does not bond to the metal material paste under reflow conditions, such as an alumina plate. As shown in Figure 6(a), a metal material paste thick film 41 is formed on the holding plate 40 by applying the metal material paste using a screen printing method or a dispensing method.

[0039] As shown in Figure 6(b), the capacitor body 1A is mounted on the retaining plate 40 with its substrate mounting side AC2 facing the retaining plate 40. At this time, the external electrodes 3 of the capacitor body 1A and the metal material paste thick film 41 are aligned, and the metal material paste thick film 41 adheres to the capacitor body 1A. The metal material paste thick film 41 adheres such that gaps DA and DB are provided between it and the laminate 2.

[0040] In this state, a reflow process is performed. This causes the metal in the metal material paste thick film 41 to form intermetallic compounds, and the metal material paste thick film 41 hardens, forming an interposer 4 that is bonded to the capacitor body 1A and the external electrode 3. Subsequently, the capacitor body 1A, along with the interposer 4, is separated from the retaining plate 40, resulting in the state shown in Figure 6(c). Through the above process, a multilayer ceramic capacitor 1B is manufactured in which the interposer 4 is attached to the capacitor body 1A, but the insulating resin film 50 has not yet been applied.

[0041] (Insulating resin film formation process S3) The insulating resin film formation step S3 comprises an insulating resin placement step S31, an insulating resin expansion step S32, and an insulating resin curing step S33.

[0042] (Insulating resin placement process S31) Next, as shown in Figure 6(d), a resin material 51, which is a thermosetting resin without fillers and is not yet cured, is placed on the second main surface AS2 portion of the laminate on the substrate mounting side AC2 of the multilayer ceramic capacitor 1B where the external electrodes 3 are not provided, as the material for the insulating resin film. At this point, the resin material 51 has not yet entered the gap D.

[0043] (Insulating resin expansion process S32) The multilayer ceramic capacitor 1B, coated with resin material 51, is placed in a vacuum desiccator for 15 minutes. During this time, the resin material 51 expands and enters the gap D as shown in Figure 6(e). Also, by placing the multilayer ceramic capacitor 1B in a vacuum desiccator for 15 minutes, the resin material 51 is degassed.

[0044] (Insulating resin curing process S33) The multilayer ceramic capacitor 1B, in which the resin material 51 has spread and penetrated the gap D, is placed in an environment at, for example, 230°C for 60 minutes, thereby causing the resin material 51 to heat-cur. In this embodiment, a thermosetting resin was used as the resin material 51, but it is not limited to this, and a photocuring resin may also be used. As a result, as shown in Figure 6(f), the resin material 51 hardens into an insulating resin film 50, filling the gap D and connecting gaps DA and DB, thereby manufacturing a multilayer ceramic capacitor 1 that extends along the substrate mounting side AC2 of the capacitor body 1A. After this, the multilayer ceramic capacitor 1 is mounted on the substrate. In the first embodiment, the resin material 51 was placed after the interposer 4 was placed, but the invention is not limited to this, and the interposer 4 may be placed after the resin material 51.

[0045] (Effects of the first embodiment) Stress may be applied to the substrate on which the multilayer ceramic capacitor 1 is mounted due to bending or other factors. In this case, if the insulating resin film 50 is not present, the corner K shown in Figure 2 between the interposer-facing surface CI and the capacitor-facing surface AI of the interposer 4 may come into contact with the second main surface AS2 of the laminate on the substrate mounting side AC2 of the capacitor body 1A, where the external electrodes 3 are not provided. At this point, the portion of the capacitor body 1A that the corner K contacts does not have an external electrode 3 and is the ceramic portion of the laminate 2. Therefore, if stress concentrates at this contact point, cracks may occur in the ceramic portion.

[0046] However, in this embodiment, an insulating resin film 50 exists between the corner K of the interposer 4 and the second main surface AS2 portion of the laminate on the substrate mounting side AC2. Therefore, the corner K does not directly contact the second main surface AS2 of the laminate. Therefore, it becomes possible to reduce stress concentration caused by contact between the capacitor body 1A and the interposer 4, thereby reducing the possibility of crack formation in the capacitor body 1A.

[0047] (Second Embodiment) Next, a multilayer ceramic capacitor 200 according to a second embodiment of the present invention will be described. Figure 7 is a cross-sectional view of the multilayer ceramic capacitor 200 according to the second embodiment, which corresponds to Figure 2 of the first embodiment. The only difference between the multilayer ceramic capacitor 200 of the second embodiment and the first embodiment is the insulating resin film 50; otherwise, it is the same as the first embodiment, so a detailed explanation is omitted.

[0048] The insulating resin film 50 of the second embodiment comprises an insulating resin film 50A located in the gap DA on the first interposer 4A side and extending slightly toward the central part in the longitudinal direction L from the gap DA, and an insulating resin film 50B located in the gap DB on the second interposer 4B side and extending slightly toward the central part in the longitudinal direction L from the gap DB. The insulating resin film 50A and the insulating resin film 50B are not connected and are separate.

[0049] Thus, even though the insulating resin film 50 is separated into insulating resin film 50A and insulating resin film 50B, insulating resin film 50A is positioned between the corner K of the first interposer 4A and the second main surface AS2 of the laminate on the substrate mounting side AC2, and insulating resin film 50B is positioned between the corner K of the second interposer 4B and the second main surface AS2 of the laminate on the substrate mounting side AC2. Therefore, both corners K do not directly contact the second main surface AS2 of the laminate. Thus, it is possible to reduce stress concentration caused by contact between the interposer 4 and the capacitor body 1A, and the possibility of crack formation in the capacitor body 1A is reduced.

[0050] (Third embodiment) Next, a multilayer ceramic capacitor 300 according to the third embodiment of the present invention will be described. Figure 8 is a cross-sectional view of the multilayer ceramic capacitor 300 according to the third embodiment, which corresponds to Figure 2 of the first embodiment. The only difference between the multilayer ceramic capacitor 300 of the third embodiment and the first embodiment is the insulating resin film 50; otherwise, it is the same as the first embodiment, so a detailed explanation is omitted. The insulating resin film 50 of the third embodiment is the same as in the first embodiment in that it has a portion located in the gap DA on the first interposer 4A side, a portion located in the gap DB on the second interposer 4B side, and a portion connecting the gap DA and the gap DB. However, in the third embodiment, the insulating resin film 50 has a thickness in the portion connecting gap DA and gap DB that is greater than the portion located in gap DA and the portion located in gap DB.

[0051] In the third embodiment as well, an insulating resin film 50 is placed between the corner K of the first interposer 4A and the second main surface AS2 portion of the laminate on the substrate mounting side AC2, and between the corner K of the second interposer 4B and the second main surface AS2 portion of the laminate on the substrate mounting side AC2. Therefore, both corners K do not directly contact the second main surface AS2 of the laminate. Thus, it is possible to reduce stress concentration caused by contact between the interposer 4 and the capacitor body 1A, and the possibility of crack formation in the capacitor body 1A is reduced. Furthermore, since it is not necessary to precisely adjust the amount of resin material 51 during the manufacturing of the insulating resin film 50 to ensure that the thickness of the insulating resin film 50 is uniform, the manufacturing of the multilayer ceramic capacitor 1 is easy.

[0052] (Fourth Embodiment) Next, a multilayer ceramic capacitor 400 according to a fourth embodiment of the present invention will be described. Figure 9 is a cross-sectional view of the multilayer ceramic capacitor 400 according to the fourth embodiment, and also shows the substrate 100 on which the multilayer ceramic capacitor 400 is mounted. In the fourth embodiment, the capacitor body 1A is the same as in the first embodiment, so the explanation of the capacitor body 1A will be omitted.

[0053] The interposer 404 of the fourth embodiment is not divided into a first interposer and a second interposer, but comprises a single plate-shaped substrate body 430, a first body connection electrode 432A and a second body connection electrode 432B, and a first mounting electrode 433A and a second mounting electrode 433B.

[0054] The substrate body 430 is made of an insulating resin. Furthermore, a first groove 431A and a second groove 431B are provided at the center of the width direction W on both end faces of the substrate body 430, extending in the stacking direction T and having a semi-circular planar shape.

[0055] The first main body connection electrode 432A and the second main body connection electrode 432B are formed on the capacitor-facing surface AI of the substrate body 430. The first main body connection electrode 432A is connected to the external electrode 3a by solder or the like. The second main body connection electrode 432B is connected to the external electrode 3b by solder or the like.

[0056] A gap D is formed between the capacitor-facing surface AI of the interposer 404 and the second main surface AS2 of the laminate 2, which is part of the second main surface AC2 of the capacitor body 1A. The thickness of the gap D in the lamination direction T is the sum of the thickness of the external electrode 3 and the main body connection electrode 432, and an insulating resin film 50 is placed in this gap D.

[0057] The first mounting electrode 433A and the second mounting electrode 433B are formed on the substrate mounting surface AI2 of the substrate body 430. On the other hand, the substrate 100 is provided with the first mounting land 101A and the second mounting land 101B. When mounting the interposer 404 onto the substrate 100, the first mounting electrode 433A of the interposer 404 is connected to the first mounting land 101A of the substrate 100 with solder, and the second mounting electrode 433B is connected to the second mounting land 101B with solder.

[0058] Solder is placed in the first groove 431A, filling the first groove 431A and extending beyond the first main body connection electrode 432A to the first external electrode 3a, and further extending beyond the first mounting electrode 433A to the first mounting land 101A, forming a first side electrode 434A. The first side electrode 434A makes electrical contact with the main body connection electrode 432A, the mounting electrode 433A, and the first mounting land 101A.

[0059] Solder is placed in the second groove 431B, filling the second groove 431B and extending beyond the second main body connection electrode 432B to the second external electrode 3b, and further extending beyond the second mounting electrode 433B to the second mounting land 101B, forming the second side electrode 434B. The second side electrode 434B makes electrical connections between the main body connection electrode 432B, the mounting electrode 433B, and the second mounting land 101B.

[0060] Furthermore, when manufacturing the multilayer ceramic capacitor 400 of the fourth embodiment, unlike the first embodiment, for example, the interposer 404 is placed after the resin material 51 is placed, and then the insulating resin film is cured.

[0061] In the fourth embodiment, the interposer 404 is a single plate member, so there are no corners K. However, even in this case, if the insulating resin film 50 is not provided, when stress such as bending is applied to the mounting substrate on which the multilayer ceramic capacitor 400 is mounted, a part of the capacitor-facing surface AI of the interposer 404 may come into contact with and press against the second main surface AS2 of the laminate, causing stress to concentrate at the contact point and potentially resulting in cracks on the second main surface AS2 of the laminate.

[0062] However, in the fourth embodiment, an insulating resin film 50 is placed between the capacitor-facing surface AI of the interposer 404 and the second main surface AS2 of the laminate. Therefore, the capacitor-facing surface AI of the interposer 404 does not directly contact the second main surface AS2 of the laminate. Thus, it is possible to reduce stress concentration due to contact between the interposer 4 and the capacitor body 1A, and the possibility of crack formation in the capacitor body 1A is reduced.

[0063] Although embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications are possible within the scope of the invention. [Explanation of Symbols]

[0064] AS laminate main surface BS laminate side view CS laminate end face AC Capacitor Main Surface AC1 Capacitor 1st Main Surface AC2 Capacitor, Second Main Surface (Side of PCB Mounting) BC capacitor side CC capacitor end face AI capacitor opposite side AI1 electrode connection area AI2 Electrode Non-Connected Region CI interposer opposing surface D Gap DA gap DB gap K Corner 1. Multilayer ceramic capacitor 1A Capacitor Body 2 Laminate 3 External electrode 4 Interposer 4A First Interposer 4B Second Interposer 10 Laminate body 11 Inner layer 12 Outer layer 14 Dielectric layer 15 Internal electrode layer 50 Insulating resin film 50A insulating resin film 50B insulating resin film 51 Resin materials 200 Multilayer Ceramic Capacitors 300 Multilayer Ceramic Capacitors

Claims

1. A laminate including a first main surface and a second main surface of the laminate facing each other in the stacking direction, a first end surface and a second end surface of the laminate facing each other in the length direction, and a first side surface and a second side surface of the laminate facing each other in the width direction, External electrodes including a first external electrode provided on the first end face of the laminate and a second external electrode provided on the second end face of the laminate A capacitor body having, A multilayer ceramic capacitor comprising a first interposer disposed on the first external electrode and a second interposer disposed on the second external electrode on the second main surface of the laminate of the capacitor body, The first interposer and the second interposer are spaced apart from each other, and each has an electrode connection region that is in contact with the external electrode and an electrode non-connection region that extends from the electrode connection region toward the center in the longitudinal direction. An insulating resin material enters the electrode non-connected region, The resin material is connected to the laminate and the first and second interposers. The aforementioned resin material is The first portion that extends into the electrode non-connection region on the first interposer side, The second portion that extends into the electrode non-connection region on the second interposer side, A portion extending from the first interposer to the center in the longitudinal direction, The portion extending from the second interposer to the center in the longitudinal direction and Equipped with, A multilayer ceramic capacitor in which the portion extending from the first interposer toward the center in the longitudinal direction and the portion extending from the second interposer toward the central part in the longitudinal direction are not connected.

2. The multilayer ceramic capacitor according to claim 1, wherein the resin material is a thermosetting resin or a photocurable resin.

3. The first interposer and the second interposer have corners that are positioned in the electrode non-connection region, The multilayer ceramic capacitor according to claim 1 or 2, wherein the resin material is embedded between the corner and the second main surface of the laminate.

4. The first interposer and the second interposer are, A multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the main component is an intermetallic compound containing at least one high-melting-point metal selected from Cu and Ni and Sn as a low-melting-point metal.

5. The multilayer ceramic capacitor according to claim 4, wherein the first interposer and the second interposer each include the intermetallic compound and elemental Sn metal.

6. The laminated body is The aforementioned lengthwise dimension is 0.2 mm or more and 10 mm or less. The aforementioned width dimension is 0.1 mm or more and 10 mm or less. A multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the dimension in the stacking direction is 0.1 mm or more and 5.0 mm or less.

7. The laminated body is Equipped with a laminated body, The aforementioned laminated body is The inner layer and, Outer layers are arranged on both sides of the inner layer in the stacking direction. Equipped with, The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the thickness of the outer layer is 20 μm or less.

8. The multilayer ceramic capacitor according to claim 7, wherein the thickness of the outer layer is 10 μm or less.

9. The laminated body is The laminated body and The laminate body comprises side gap portions arranged on both sides in the width direction, The multilayer ceramic capacitor according to any one of claims 1 to 8, wherein the thickness of the side gap portion is 20 μm or less.

10. The multilayer ceramic capacitor according to claim 9, wherein the thickness of the side gap portion is 10 μm or less.

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