Synchronous communication device and its control method

Abstract

To provide a synchronous communication device that can appropriately execute synchronous processing even if mismatch occurs in association between a reception packet and a reception time stamp in the device.SOLUTION: A synchronous communication device comprises: output means that outputs a reception packet and a reception time stamp indicating the time when the device receives the reception packet; first storage means that stores the reception packet; second storage means that stores the reception time stamp; determination means that, based on the free space of the first storage means, determines whether the reception packet can be stored in the first storage means; and processing means that executes time synchronization processing by using the reception packet stored in the first storage means and the reception time stamp stored in the second storage means, and that, when the determination means determines that the reception packet cannot be stored, does not use the reception time stamp corresponding to the reception packet.SELECTED DRAWING: Figure 1B

Description

Technical Field

[0001] The present invention relates to a synchronous communication device and a control method thereof.

Background Art

[0002] Techniques for performing synchronous communication using timestamps are known. In obtaining a timestamp, Patent Document 1 discloses a technique for realizing highly accurate time synchronization processing by marking time with a hardware clock (internal clock). The synchronization signal output device of Patent Document 1 has a data transmission / reception unit that transmits and receives packets (data) to and from a time server (source device), and the internal clock generates and stores, as a timestamp, the time when packets are transmitted and received to and from the time server.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When the data transmission / reception unit outputs a reception timestamp and a reception packet with respective independent interfaces, it is necessary to guarantee the association between the reception timestamp and the reception packet. The number of reception packets and reception timestamps output by the data transmission / reception unit is the same. Therefore, even if the reception packets and reception timestamps are stored in different FIFO memories (hereinafter simply referred to as FIFO), the association between the reception packets and reception timestamps is guaranteed by managing their respective storage orders.

[0005] However, if the system is also performing high-load reception processing on packets other than PTP packets, a problem may occur where received packets cannot be loaded into the device's FIFO due to FIFO overflow. Although the size of each received packet differs, the received timestamp is the same size regardless of the packet type, so the timing of overflows in each FIFO will not be synchronized. Therefore, it is possible that received packets may not be loaded into a FIFO (received packets are lost within the device), while the received timestamp, which is sufficiently small compared to the packet size, may be loaded into another FIFO. This means that an inconsistency occurs in the association between received packets and received timestamps based on the storage order, making it difficult to achieve highly accurate synchronization. The objective of the present invention is to provide a synchronous communication device that can properly perform synchronization processing even if an inconsistency occurs in the association between received packets and received timestamps within the device itself. [Means for solving the problem]

[0006] To solve the above problems, a synchronous communication device according to one aspect of the present invention includes: an output means that outputs a received packet and a received timestamp indicating the time the received packet was received; a first storage means for storing the received packet; a second storage means for storing the received timestamp; a determination means for determining whether or not to store the received packet in the first storage means based on the available capacity of the first storage means; and a processing means for performing time synchronization processing using the received packet stored in the first storage means and the received timestamp stored in the second storage means, wherein if the determination means determines that the received packet cannot be stored, the processing means does not use the received timestamp corresponding to the received packet. [Effects of the Invention]

[0007] According to the present invention, even if an inconsistency occurs in the association between received packets and received timestamps within the device, the synchronization process can be performed appropriately. [Brief explanation of the drawing]

[0008] [Figure 1A] This is a schematic diagram of a system having a synchronous communication device according to Embodiment 1. [Figure 1B] Figure 1A is a block diagram showing the details of the synchronous communication device. [Figure 2] This is a block diagram of the packet drop processing unit. [Figure 3] This is a flowchart to explain the processing of the FIFO monitoring unit. [Figure 4] This is a flowchart to explain the processing of the packet analysis unit. [Figure 5] This is a flowchart to explain the processing of the judgment unit. [Figure 6] This is a timing chart for the packet drop processing unit. [Figure 7] This is a block diagram of the packet drop processing unit in Embodiment 2. [Figure 8] This figure shows the buffering status of each FIFO in Embodiment 2. [Modes for carrying out the invention]

[0009] The embodiments will be described in detail below with reference to the attached drawings. Note that the following embodiments do not limit the invention as defined in the claims. While the embodiments describe multiple features, not all of these features are essential to the invention, and the features may be combined in any way. In the attached drawings, identical or similar configurations are given the same reference numerals, and redundant descriptions are omitted.

[0010] Embodiment 1 <System> Figure 1A shows an example of a system 100 to which the present invention can be applied. System 100 includes a time server 101, a switching hub 102, a synchronous communication device 110, and a group of application servers 104. The time server 101 and the switching hub 102 are connected by a cable 103 (network). The switching hub 102 and the synchronous communication device 110 are also connected by a cable 103. The switching hub 102 and the group of application servers 104 are connected by multiple cables 103 (shown as two lines in the figure). Note that another synchronous communication device 110 may be connected to the cable 103 extending from the lower right of the switching hub 102.

[0011] IEEE 1588v2 is a technology for synchronizing the time between devices connected by cables (networks), etc. When system 100 performs synchronous communication compliant with IEEE 1588v2, the synchronous communication device 110 performs time synchronization by exchanging packets called PTP packets between the time source device (time server 101) and the synchronization destination device (synchronous communication device 110). When the synchronous communication device 110 performs time synchronization processing, it uses the time at which it receives the packets sent from the time server 101 (hereinafter referred to as the "received timestamp"). The synchronous communication device 110 also uses the transmission time of the PTP packets sent from the synchronous communication device 110 to the time server 101 when performing time synchronization processing (hereinafter referred to as the "transmission timestamp"). PTP is an abbreviation for Precision Time Protocol.

[0012] The time server 101 has a function to distribute time, and the synchronous communication device 110 distributes time for time synchronization with the time server 101. The switching hub 102 is a switching hub with a Transparent Clock (hereinafter referred to as "TC") function. The TC function measures the dwell time of PTP packets within the switching hub 102 and bridges the PTP packets by adding the measured dwell time to them. The switching hub 102 can also send and receive TCP / IP packets and other packets. The synchronous communication device 110 is, for example, an imaging device equipped with communication functions or a display device equipped with a display.

[0013] Cable 103 is an Ethernet® cable, and each device (time server 101, switching hub 102, synchronous communication device 110, application server group 104) is connected via Ethernet. The application server group 104 consists of one or more servers that provide services to the synchronous communication device 110. The application server group 104 may include, for example, a file server that can read and write files from an external source, or an image distribution server capable of distributing moving images. If the synchronous communication device 110 has a display function, the synchronous communication device 110 can display moving images distributed by the image distribution server. In this embodiment, the application server group 104 includes an image distribution server, and the image distribution server is described as distributing images to the synchronous communication device 110. The EtherType value of the packets used for image distribution is set to 0x01FF, and the maximum packet length of the image transmission packets does not exceed 8000 bytes.

[0014] <Synchronized communication device> FIG. 1B shows the details of the synchronization communication device 110. The synchronization communication device 110 includes a CPU 111, a memory 112, a transmission DMAC 113, a transmission packet FIFO memory 114, a data transceiver 115, a reception DMAC 116, a reception packet FIFO memory 117, and a synchronization processing unit 118. Also, the synchronization communication device 110 includes a transmission timestamp I / F 119, a reception timestamp I / F 121, a reception timestamp FIFO memory 122, a reception packet I / F 123, a time adjustment I / F 124, a packet drop processing unit 200, and an internal clock 130. CPU is the abbreviation of Central Processing Unit. DMAC is the abbreviation of Direct Memory Access Controller. FIFO is the abbreviation of First In, First Out. I / F is the abbreviation of Interface. Reference numeral 125 is a bus within the synchronization communication device 110. In the following description, the FIFO memory is simply referred to as "FIFO".

[0015] The CPU 111 is a module that controls the entire synchronization communication device 110. The synchronization processing unit 118 is provided as a program operating on the CPU 111 and has a function for synchronizing the synchronization communication device 110 with the time server 101. Specifically, the synchronization processing unit 118 calculates the time difference and network delay time with the time server 101 using PTP packets. Then, based on the calculation result, the synchronization processing unit 118 performs correction processing on the time of the internal clock 130 of the data transceiver 115. This correction processing is executed via the time adjustment I / F 124. The memory 112 stores programs executed by the CPU 111 and packets received from other devices / packets to be transmitted to other devices. The transmission DMAC 113 reads a packet from the memory 112 based on an instruction from the CPU 111 and transfers it to the transmission packet FIFO 114. The transmission packet FIFO 114 temporarily stores the transmission packet sent from the transmission DMAC 113 and transmits it to the data transceiver 115.

[0016] The data transmission / reception unit 115 transmits the transmission packet received from the transmission packet FIFO 114 to the cable 103. When the data transmission / reception unit 115 transmits a packet, the time at that moment is output from the transmission timestamp I / F 119 as the transmission timestamp. Also, the data transmission / reception unit 115 outputs the received packet received from the cable 103 from the received packet I / F 123. The data transmission / reception unit 115 generates a reception timestamp at the timing of receiving the received packet and outputs it from the reception timestamp I / F 121. The data transmission / reception unit 115 includes an internal clock 130 to generate the timestamps for transmission and reception. Note that the internal clock 130 may be arranged outside the data transmission / reception unit 115 as long as the time can be used by the data transmission / reception unit 115 and the configuration can be corrected by the synchronization processing unit 118.

[0017] The received packet FIFO 117 temporarily stores the received packet sent from the packet drop processing unit 200 and transmits the received packet to the received DMAC 116 in response to the request from the received DMAC 116. Assume that the total capacity of the received packet FIFO 117 is known in advance. The received timestamp FIFO 122 is a FIFO that stores the received timestamp output from the packet drop processing unit 200. The received timestamp FIFO 122 is configured to be accessible from the synchronization processing unit 118 via the bus 125. The received DMAC 116 transfers the data read from the received packet FIFO 117 to the memory 112. The packet drop processing unit 200 determines whether a packet can be stored successfully when the data transmission / reception unit 115 stores the packet in the received packet FIFO 117. If it determines that the packet cannot be stored successfully, the packet drop processing unit 200 executes a process to prevent the packet from being stored in the received packet FIFO 117. The packet drop processing unit 200 also controls whether or not to store the received timestamp output from the received timestamp I / F 121 in the received timestamp FIFO 122, and if it does store the timestamp, it also stores any information associated with the received timestamp. Details of the control and processing performed by the packet drop processing unit 200 will be described later.

[0018] <Packet drop processing unit> Next, the details of the packet drop processing unit 200 will be explained using Figure 2. Furthermore, various signals input and output from peripheral modules (data transmission / reception unit 115, receiving DMAC 116, received packet FIFO 117, received timestamp FIFO 122, etc.) necessary for explaining the packet drop processing unit 200 will also be explained. The packet drop processing unit 200 includes a packet analysis unit 201, a FIFO monitoring unit 202, a determination unit 203, a delay processing unit 204, and two AND circuits 205 and 206. The two AND circuits may be referred to as AND1 and AND2 in the following explanation.

[0019] The packet drop processing unit 200 is composed of digital circuits and operates entirely on clock signals. The received packet I / F 123 of the data transmission / reception unit 115 is an interface for outputting received packets and consists of three signal lines (pkt_vld_0 (211), pkt_dat_0 (212), pkt_lst_0 (213)). pkt_vld_0 (211) is a signal that is asserted to 1 when the data transmission / reception unit 115 outputs a received packet. The pkt_dat_0 (212) signal line is the signal line on which the received packet is output, and the data constituting the received packet is output from the beginning in predetermined increments. pkt_lst_0 (213) is last information that is output (asserted to 1) at the same time as the data output to pkt_dat_0 (212) when that data is the last data of the packet.

[0020] The received timestamp interface 121 consists of two signal lines (ts_vld_0 (214) and ts_dat_0 (215)). ts_vld_0 (214) is a signal that is asserted to 1 only when the received timestamp is output. ts_dat_0 (215) is the value of the received timestamp. When the data transmission / reception unit 115 receives a packet, the value of the internal clock 130 of the data transmission / reception unit 115 is output as the value of the received timestamp. The delay processing unit 204 outputs the received packet I / F 123 and received timestamp I / F 121 signals output from the data transmission / reception unit 115 with a delay of a certain clock cycle.

[0021] The received packet FIFO117 is a FIFO that stores received packets output from the delay processing unit 204. When pkt_push(238) is asserted, the received packet FIFO117 stores pkt_dat_1(222) and pkt_lst_1(223). Then, when pkt_pop(231) is asserted due to a forwarding request from the receiving DMAC116, the received packet FIFO117 outputs pkt_dat_2(232) and pkt_lst_2(233). The received timestamp FIFO122 is a FIFO that stores the received timestamp output from the delay processing unit 204. When ts_push(240) is asserted, the received timestamp FIFO122 stores ts_dat_1(225). Then, when ts_pop(234) is asserted in response to an access request from the synchronization processing unit 118, the received timestamp FIFO122 outputs ts_dat_2(235).

[0022] The packet analysis unit 201 acquires and analyzes the received packets flowing through the received packet I / F 123 via the snoop bus 109, and outputs the analysis result, rx_pkt_info(241), to the determination unit 203. The FIFO monitoring unit 202 monitors various signals connected to the received packet FIFO 117 and the received timestamp FIFO 122, and outputs fifo_info(242), which is FIFO status information. The determination unit 203 determines whether the received packet output from the delay processing unit 204 can be stored in the received packet FIFO 117. The determination is made based on rx_pkt_info(241) and fifo_info(242). The determination unit 203 then outputs store_en(236), which is the determination result.

[0023] AND1(205) is an element that performs an AND operation on the pkt_vld_1(221) signal and the store_en(236) signal. AND1(205) masks the pkt_vld_1(221), which is the output timing signal of the received packet, with the store_en(236), which is the signal indicating whether the received packet can be stored in the FIFO117, and inputs it to the received packet FIFO117. AND2(206) is an element that performs an AND operation on the ts_vld_1(224) signal and the store_en(236) signal. AND2(206) masks the ts_vld_1(224), which is the output timing signal of the received timestamp, with the store_en(236), which is the signal indicating whether or not the received packet can be stored in the FIFO117, and inputs it to the received timestamp FIFO122. The reception packet FIFO 117 inputs the number of stages in use of the reception packet FIFO 117 to the FIFO monitoring unit 202 by pkt_fifo_used(237). The reception timestamp FIFO 122 inputs the number of stages in use of the reception timestamp FIFO 122 to the FIFO monitoring unit 202 by ts_fifo_used(239).

[0024] Although the synchronization processing unit 118 is assumed to be a program operating on the CPU 111, it may be implemented by dedicated hardware such as an ASIC. ASIC is an abbreviation for Application Specific Integrated Circuit (integrated circuit for specific applications).

[0025] <Processing of FIFO monitoring unit> Next, the processing of the FIFO monitoring unit 202 will be described. FIG. 3 is a flowchart regarding the operations (increment, decrement, maintenance / unchanged) of pkt_cnt indicating the number of stages in use of the reception packet FIFO 117, which is managed within the FIFO monitoring unit 202. First, in S301, pkt_cnt is initialized. Then, in FIG. 3, pkt_cnt is operated based on the values of pkt_push(238) and pkt_pop(231) by the processing of S302 to S308. The operation will be described in detail below. [[ID=Next, in S302, it is determined whether pkt_push(238)=1. If the determination result is Yes, the process proceeds to S303. If the determination result is No, the process proceeds to S306.]] In S303, it is determined whether pkt_pop(231)=1. If the determination result is Yes, the process proceeds to S304. If the determination result is No, the process proceeds to S305. In S306, it is also determined whether pkt_pop(231)=1. If the determination result is Yes, the process proceeds to S307. If the determination result is No, the process proceeds to S308.

[0027] ​​If the process proceeds to S304, that is, if pkt_push(238) = pkt_pop(231) = 1, then pkt_cnt will not be updated. If the process proceeds to S305, that is, if pkt_push(238)=1 and pkt_pop(231)=0, then pkt_cnt is incremented. If the process proceeds to S307, that is, if pkt_push(238)=0 and pkt_pop(231)=1, then pkt_cnt is decremented. If the process proceeds to S308, that is, if pkt_push(238)=pkt_pop(231)=0, then pkt_cnt will not be updated. This process continues until the user issues a termination instruction (S309). The termination instruction is sent, for example, from the application server group 104 to the synchronous communication device 110.

[0028] The FIFO monitoring unit 202 calculates the usage of the received packet FIFO 117 by multiplying the value of pkt_cnt by the bus width of pkt_dat_1(222). Since the total capacity of the received packet FIFO 117 is known in advance, the value obtained by subtracting the usage from the total capacity can be used as the free capacity of the received packet FIFO 117. The FIFO monitoring unit 202 outputs this free capacity as fifo_info(242).

[0029] <Processing by the packet analysis unit> Next, the processing of the packet analysis unit 201 will be explained using Figure 4. The packet analysis unit 201 continues to monitor pkt_vld_0(211) (S401). In this embodiment, the packet analysis unit 201 continues to monitor pkt_vld_0(211) until it is asserted a predetermined number of times (a predetermined cycle) (S402). When the EtherType field of the received packet is output to pkt_dat_0 (212) (Yes in S402), the packet analysis unit 201 checks the EtherType field (S403). Next, the packet analysis unit 201 outputs the EtherType field value as rx_pkt_info(241) (S404). This analysis process is executed with every packet until the user issues a termination instruction (S405).

[0030] <Processing by the packet analysis unit and the determination unit> Next, the processing of the packet analysis unit 201 and the determination unit 203 will be explained using Figure 5. First, in S501, the packet analysis unit 201 determines whether it has detected the output of the received packet. If the result is Yes, the process proceeds to S502. If the result is No, S501 is repeated. In S502, the packet analysis unit 201 performs analysis processing. In this embodiment, the determination unit 203 performs determination processing based on the analysis result in S502 (S503-S509). First, in S503, it is determined whether the received packet is a PTP packet. If the determination result is Yes, the process proceeds to S504. If the determination result is No, the process proceeds to S506. In S506, it is determined whether the received packet is an image transmission packet. If the determination result is Yes, the process proceeds to S507. If the determination result is No, the process proceeds to S508. Then, depending on the determination result in S504, S507, or S508, store_en is asserted or set to 0 (S505, S509). The following describes this process in detail.

[0031] If the received packet is a PTP packet (Yes in S503) and there are 84 bytes or more of free space in the received packet's FIFO117 (Yes in S504), the determination unit 203 determines that it can be stored and asserts store_en (S505). If the received packet is an image transmission packet (Yes in S506) and there is 8000 bytes or more of free space in the received packet FIFO117 (Yes in S507), the determination unit 203 determines that it can be stored and asserts store_en (S505). If the process proceeds to S508, that is, if the received packet is neither a PTP packet nor an image transmission packet, the determination unit 203 determines whether there is 1514 bytes or more of free space in the received packet FIFO 117. If the result of the determination in S508 is Yes, it is determined that storage is possible and store_en is asserted (S505). In all other cases, that is, if the result of S504 is No, if the result of S507 is No, or if the result of S508 is No, the determination unit 203 determines that the received packet cannot be stored in the received packet FIFO 117 and sets store_en=0 (S509). This determination process is also performed for each packet until the user instructs it to terminate (S510).

[0032] As explained in S503 to S509, it is preferable to change (set) the threshold for the available capacity of the received packet FIFO117 for each packet type. For example, PTP packets generally do not contain large amounts of data, so they can be stored even with a small amount of available capacity. Therefore, in this embodiment, the threshold for PTP packets (threshold in S504) was set to 84 bytes. Note that the threshold may be set to an appropriate value depending on the usage environment. Also, in this embodiment, image transmission packets are exchanged as jumbo packets with an upper limit of 8000 bytes, so the threshold for image transmission packets (threshold in S507) was set to 8000 bytes. Furthermore, the threshold for packets that are neither PTP packets nor image transmission packets (threshold in S508) was set to 1514 bytes in this embodiment. The MTU (Maximum Transmission Unit) value commonly used in Ethernet is 1500 bytes. Adding the 14 bytes of the MAC header to this value gives 1514 bytes, which was used as the threshold in S508. Note that specific thresholds may be set for each other specific protocol.

[0033] <Operation of subblocks that constitute the packet drop processing unit> Next, we will explain how the subblocks that make up the packet drop processing unit 200 work together using Figure 6. Figure 6 is a timing chart of the internal signals of the packet drop processing unit 200. At time T3, the data transmission / reception unit 115 begins outputting the received packet (S601). Also at time T3, the data transmission / reception unit 115 outputs a received timestamp (S602). Note that the received timestamp does not necessarily need to be output simultaneously with the received packet, as it is sufficient that it can be passed to the synchronization processing unit 118 at the appropriate time.

[0034] When pkt_vld_0 (211) is asserted a predetermined number of times from the beginning of the packet, the EtherType field appears in pkt_dat_0 (212), and its value is stored in rx_pkt_info (241) (S603). In the example in Figure 6, assume that an image transmission packet (EtherType=0x01FF) has been received. Once both rx_pkt_info(241) and fifo_info(242) information are available, the determination unit 203 outputs the determination result (S604). In the example in Figure 6, when a PTP packet is received, the available capacity of the received packet FIFO117 is 144 bytes (i.e., less than 8000 bytes), so the determination unit 203 outputs the determination result that it cannot be stored (store_en(236)=0).

[0035] On the other hand, the received packet and received timestamp output from the data transmission / reception unit 115 are delayed by 7 cycles by the delay processing unit 204 and then sent to the received packet FIFO 117 and received timestamp FIFO 122 (S605). However, since store_en(236)=0, pkt_push(238) becomes 0 and ts_push(240) also becomes 0. Therefore, the data (received packet and received timestamp) is not pushed to the received packet FIFO 117 and received timestamp FIFO 122 (S606). In other words, the received packet is discarded and the received timestamp is also discarded. This ensures consistency between the received packet and the received timestamp, so that even if the received packet is a PTP packet, the number of stored packets and timestamps can be the same. Note that discarding the received timestamp can also be expressed as not using the received timestamp.

[0036] As described above, the synchronous communication device 110 of this embodiment is a synchronous communication device that can appropriately respond to packet loss within the device itself, and can continue high-precision synchronization even when packet loss occurring inside the device (synchronous communication device 110) is detected. In this embodiment, if it is determined that a received packet cannot be stored in the received packet FIFO117, the synchronization process is performed without using the received timestamp corresponding to the received packet. Therefore, according to this embodiment, highly accurate synchronization processing can be performed even in situations where packet reception processing is congested and packets are lost within the device. In conventional synchronous communication devices, packet loss disrupts the correspondence with the received timestamp, making it difficult to perform high-precision synchronization processing. However, this phenomenon does not occur in the synchronous communication device 110 of this embodiment. Note that the synchronization technology used in system 100 is not limited to that which conforms to IEEE 1588v2. Also, although Figure 1 shows an application server group 104 representing multiple application servers connected to the switching hub 102, system 100 may also consist of a single application server connected to the switching hub 102.

[0037] Embodiment 2 Embodiment 2 of the present invention will be described with reference to Figures 7 and 8. In Embodiment 2, a packet drop processing unit 700 is used instead of the packet drop processing unit 200 of Embodiment 1. Also, in Embodiment 2, a receive timestamp FIFO 701 is used instead of the receive timestamp FIFO 122 of Embodiment 1. In the following description, the same configurations, operations, and processes as in Embodiment 1 will be omitted from the explanation, and only the differences will be described. The same reference numerals are used for the same configurations, operations, and signals as in Embodiment 1.

[0038] <Packet drop processing unit> Figure 7 shows the packet drop processing unit 700 of Embodiment 2. The packet drop processing unit 700 includes a packet analysis unit 201, a FIFO monitoring unit 202, a delay processing unit 204, an AND circuit 205, a TS associated information FIFO 702, and a determination unit 705. The TS associated information FIFO 702 is a FIFO that stores information (associated information) associated with each timestamp stored in the received timestamp FIFO 701. The same number of associated information items as the number of received timestamps are stored in the TS associated information FIFO 702 by the determination unit 705. In this embodiment, flag information indicating whether the received timestamp is valid or invalid is set (used) as associated information. When store_en(236) is controlled by the determination unit 705, one flag information item is set in the TS associated information FIFO 702 via tstmp_opt_info_0(703). This information is also stored in the received timestamp FIFO 701 (tstmp_opt_info_1(704)). It is preferable to configure the system so that the flag information (tstmp_opt_info_2(706)) can be obtained simultaneously when the synchronization processing unit 118 obtains the received timestamp from the received timestamp FIFO 701 (tstmp_dat_2(235)). Furthermore, the only signal masked by store_en(236) is pkt_vld_1(221), while ts_vld_1(224) is connected to the received timestamp FIFO701 without being masked (there is no AND2 in Figure 2).

[0039] <FIFOにストックされるデータ> Next, the data stored (stocked) in the received packet FIFO117 and the received timestamp FIFO701 will be explained using Figure 8. Figure 8 shows an example where the received packet FIFO117 received four packets (packet 1, packet 2, packet 3, and packet 4) from the data transmission / reception unit 115, but could not store packet 3. Figure 8(A) shows the data in the received packet FIFO117, and Figure 8(B) shows the data in the received timestamp FIFO701. As shown in Figure 8(A), received packet 3 is not stored in the received packet FIFO117. As shown in Figure 8(B), the received timestamp corresponding to the packet that could not be stored has the TS associated information flag information set to 0 (invalid) (801). By doing this, the synchronization processing unit 118 can verify the consistency between the received PTP packet and the received timestamp. That is, when a received PTP packet is acquired, the received timestamp and flag information are also acquired together, and if the flag information is 0, the received timestamp is discarded. Then, the received timestamp FIFO701 should be read until a timestamp with flag information of 1 is obtained. When a timestamp with flag information of 1 appears, using it helps maintain consistency between the PTP packet and the received timestamp.

[0040] As described above, the synchronous communication device 110 of this embodiment can also obtain the same effects as in Embodiment 1. That is, even if packet loss occurs within the device (synchronous communication device 110), high-precision synchronization can be maintained by utilizing the accompanying information (flag information).

[0041] Embodiment 3 A modification of Embodiment 2 will be described as Embodiment 3. In Embodiment 2, flag information indicating validity / invalidity is set as information attached to the received timestamp. The attached information of the present invention is not limited to flag information indicating validity / invalidity. For example, information that can uniquely identify a received packet (identification information) may be used as attached information. Specifically, the FCS (Field Check Sequence), which is an error detection code of a received packet, may be stored as attached information in the TS attached information FIFO 702 in correspondence with the storage of the timestamp. Then, when a PTP packet is received, the timestamp at which the FCS of the PTP packet matches the FCS obtained from the received timestamp FIFO 701 is associated with the PTP packet. This ensures consistency between the received packet and the received timestamp. If an FCS is attached to the received packet, the packet analysis unit 201 can read the FCS and output it from rx_pkt_info(241). If an FCS is not attached, the packet analysis unit 201 can calculate the FCS. Furthermore, in addition to FCS, multiple pieces of information such as packet type and sequence number may be combined and treated as identification information (accompanying information).

[0042] The synchronous communication device 110 of this embodiment can also obtain the same effects as in Embodiment 2. That is, even if packet loss occurring within the device is detected, high-precision synchronization can be maintained by utilizing the accompanying information (identification information).

[0043] <Modification of the judgment section> In embodiments 1 to 3, the determination units 203 and 705 performed a determination by fixing the required free space (using three thresholds: 84 bytes, 8000 bytes, and 1514 bytes) according to the packet type (PTP packet, image transmission packet, and other packets). Alternatively, the FIFO monitoring unit 202 may calculate the average value (average extracted data amount) of the amount of data extracted from the received packet FIFO 117 (extracted data amount) over a predetermined time or predetermined clock cycle, and perform the determination using this value. Taking the average extracted data amount into account, it may be possible to start storing the received packet even if there is not enough free space in the received packet FIFO 117 to fit one packet. This is because, if the average extracted data amount is large, packets that have already been stored will be extracted even while the received packet is being stored in the FIFO (received packet FIFO 117). The threshold for free space may be determined (and changed) based on the average extracted data amount. Furthermore, since the average extracted data amount described above is the amount of extracted data per unit time (a predetermined time or predetermined clock cycle), it may also be called the average extracted data rate. Furthermore, the packet analysis unit 201 may analyze not only the type of received packet but also its packet length. In this case, the determination unit 203 may use the two analysis results (packet type and packet length) from the packet analysis unit 201 to perform the determination. Alternatively, the packet analysis unit 201 may analyze only the packet length of the received packet, and the determination unit 203 may perform the determination based on that analysis result. For example, if the packet length is short, the determination result may be Yes even if there are not 1514 bytes or more of free space in S508 in Figure 5.

[0044] Other embodiments The present invention can also be achieved by supplying a program that implements one or more of the functions of the above embodiments to a system or device via a network or storage medium, and by having one or more processors in the computer of that system or device read and execute the program. Therefore, the program code installed on the computer to implement the functional processing of the present invention also implements the present invention. In other words, the present invention includes the computer program itself for implementing the functional processing of the present invention. In that case, it may be in the form of object code, a program executed by an interpreter, script data supplied to the OS, etc., as long as it has the function of a program. Furthermore, the present invention can also be implemented by a circuit (e.g., ASIC) that implements one or more functions. OS is an abbreviation for Operating System.

[0045] This embodiment includes the following configurations and methods. Configuration 1 An output means that outputs a received packet and a reception timestamp indicating the time the received packet was received, A first storage means for storing the received packets, A second storage means for storing the received timestamp, A determination means that determines whether or not to store the received packet in the first storage means based on the available capacity of the first storage means, A processing means that performs time synchronization processing using the received packet stored in the first storage means and the received timestamp stored in the second storage means, wherein if the determination means determines that the received packet cannot be stored, the processing means does not use the received timestamp corresponding to the received packet. A synchronous communication device characterized by comprising:

[0046] Configuration 2 The synchronous communication device according to configuration 1, further comprising a storage control means that prevents the second storage means from storing the received timestamp when the determination means determines that the received packet cannot be stored. Configuration 3 The system further includes an accompanying storage means for storing information corresponding to the determination result of the determination means in the second storage means, along with the received timestamp. The synchronous communication device according to Configuration 1, characterized in that, when the determination means determines that the received packet cannot be stored, the processing means does not use the received timestamp to which information corresponding to the determination result that the received packet cannot be stored is attached.

[0047] Configuration 4 The system further includes an associated storage means for storing identification information that identifies the received packet, attached to the reception timestamp, in the second storage means. The synchronous communication device according to Configuration 1, characterized in that the processing means uses the received timestamp only when the identification information of the received packet matches the identification information associated with the received timestamp. Configuration 5 The system further comprises analysis means for analyzing the received packets, The synchronous communication device according to any one of configurations 1 to 4, characterized in that the determination means makes the determination based on the analysis result of the analysis means. Configuration 6 The synchronous communication device according to configuration 5, wherein the analysis means analyzes at least the type of the received packet or the packet length of the received packet. Configuration 7 The system further includes monitoring means for monitoring the available capacity of the first storage means or the speed at which data is retrieved from the first storage means. The synchronous communication device according to any one of configurations 1 to 6, characterized in that the determination means makes the determination based on the monitoring result of the monitoring means.

[0048] Configuration 8 The synchronous communication device is characterized by performing synchronous communication in accordance with IEEE1588v2, as described in any one of configurations 1 to 7. Configuration 9 The synchronous communication device according to any one of configurations 1 to 8, characterized in that the first storage means and the second storage means are each FIFO memories. Method 1 A control method for a synchronous communication device having an output unit, a first storage unit, a second storage unit, and a synchronization processing unit, The output unit outputs a received packet and a reception timestamp indicating the time the received packet was received. The steps include storing the received packet in the first storage unit, The steps include storing the received timestamp in the second storage unit, A step of determining whether or not to store the received packet in the first storage unit based on the available capacity of the first storage unit, The synchronization processing unit includes the step of performing a time synchronization process using the received packet stored in the first storage unit and the received timestamp stored in the second storage unit, A control method characterized in that, if the determination step determines that the received packet cannot be stored, the step of executing the time synchronization process does not use the received timestamp corresponding to the received packet. [Explanation of symbols]

[0049] 101...Time server, 110...Synchronization communication device, 111...CPU, 115...Data transmission / reception unit, 117...Received packet FIFO, 118...Synchronization processing unit, 122...Received timestamp FIFO, 200...Packet drop processing unit, 201...Packet analysis unit, 202...FIFO monitoring unit, 203...Determination unit

Claims

1. An output means that outputs a received packet and a reception timestamp indicating the time the received packet was received, A first storage means for storing the received packets, A second storage means for storing the received timestamp, A determination means that determines whether or not to store the received packet in the first storage means based on the available capacity of the first storage means, A processing means that performs time synchronization processing using the received packet stored in the first storage means and the received timestamp stored in the second storage means, wherein if the determination means determines that the received packet cannot be stored, the processing means does not use the received timestamp corresponding to the received packet. A synchronous communication device characterized by comprising:

2. The synchronous communication device according to claim 1, further comprising a storage control means that prevents the second storage means from storing the received timestamp when the determination means determines that the received packet cannot be stored.

3. The system further includes an accompanying storage means for storing information corresponding to the determination result of the determination means in the second storage means, along with the received timestamp. The synchronous communication device according to claim 1, characterized in that, when the determination means determines that the received packet cannot be stored, the processing means does not use the received timestamp to which information corresponding to the determination result that the received packet cannot be stored is attached.

4. The system further includes an associated storage means for storing identification information that identifies the received packet, attached to the reception timestamp, in the second storage means. The synchronous communication device according to claim 1, characterized in that the processing means uses the received timestamp only when the identification information of the received packet matches the identification information associated with the received timestamp.

5. The system further comprises analysis means for analyzing the received packets, The synchronous communication device according to any one of claims 1 to 4, characterized in that the determination means makes the determination based on the analysis result of the analysis means.

6. The synchronous communication device according to claim 5, wherein the analysis means analyzes at least the type of the received packet or the packet length of the received packet.

7. The system further includes monitoring means for monitoring the available capacity of the first storage means or the speed at which data is retrieved from the first storage means. The synchronous communication device according to any one of claims 1 to 4, characterized in that the determination means makes the determination based on the monitoring result of the monitoring means.

8. The system further includes monitoring means for monitoring the available capacity of the first storage means or the speed at which data is retrieved from the first storage means. The synchronous communication device according to claim 5, characterized in that the determination means makes the determination based on the monitoring result of the monitoring means.

9. The system further includes monitoring means for monitoring the available capacity of the first storage means or the speed at which data is retrieved from the first storage means. The synchronous communication device according to claim 6, characterized in that the determination means makes the determination based on the monitoring result of the monitoring means.

10. The synchronous communication device according to any one of claims 1 to 4, characterized in that it performs synchronous communication in accordance with IEEE 1588v2.

11. The synchronous communication device according to claim 5, characterized in that the synchronous communication device performs synchronous communication in accordance with IEEE 1588v2.

12. The synchronous communication device according to claim 6, characterized in that the synchronous communication device performs synchronous communication in accordance with IEEE 1588v2.

13. The synchronous communication device according to claim 7, characterized in that it performs synchronous communication in accordance with IEEE 1588v2.

14. The synchronous communication device according to any one of claims 1 to 4, characterized in that the first storage means and the second storage means are each FIFO memories.

15. The synchronous communication device according to claim 5, characterized in that the first storage means and the second storage means are each a FIFO memory.

16. The synchronous communication device according to claim 6, characterized in that the first storage means and the second storage means are each a FIFO memory.

17. The synchronous communication device according to claim 7, characterized in that the first storage means and the second storage means are each a FIFO memory.

18. The synchronous communication device according to claim 8, characterized in that the first storage means and the second storage means are each a FIFO memory.

19. A control method for a synchronous communication device having an output unit, a first storage unit, a second storage unit, and a synchronization processing unit, The output unit outputs a received packet and a reception timestamp indicating the time the received packet was received. The steps include storing the received packet in the first storage unit, The steps include storing the received timestamp in the second storage unit, A step of determining whether or not to store the received packet in the first storage unit based on the available capacity of the first storage unit, The synchronization processing unit includes the step of performing a time synchronization process using the received packet stored in the first storage unit and the received timestamp stored in the second storage unit, A control method characterized in that, if the determination step determines that the received packet cannot be stored, the step of executing the time synchronization process does not use the received timestamp corresponding to the received packet.

20. A program for causing a computer to operate as one of the means of a synchronous communication device according to any one of claims 1 to 4.

21. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 5.

22. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 6.

23. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 7.

24. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 8.

25. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 9.

26. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 10.

27. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 11.

28. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 12.

29. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 13.

30. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 14.

31. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 15.

32. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 16.

33. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 17.

34. A program for causing a computer to operate as each of the means of the synchronous communication device described in claim 18.

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