Organic electroluminescent display device
By employing inverse tapered spacers around red subpixels to disconnect the cathode electrode and extend transport layers, the display device mitigates lateral leakage current, ensuring uniform brightness and stable voltage levels.
Patent Information
- Application Number
- JP2024100278
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-12-29
- Filing Date
- 2024-06-21
- Publication Date
- 2026-07-13
- Estimated Expiration
- 2042-12-02
Smart Images

Figure 0007888656000001 
Figure 0007888656000002 
Figure 0007888656000003
Abstract
Description
Technical Field
[0001] The present invention relates to an organic electroluminescent display device, and particularly to an organic electroluminescent display device capable of preventing side leakage current and preventing an increase in low-potential voltage.
Background Art
[0002] In recent years, with the development of multimedia, the importance of flat panel display devices has been increasing. Accordingly, flat panel display devices such as liquid crystal display devices, plasma display devices, and organic electroluminescent display devices have become commonly used. Among such flat panel display devices, organic electroluminescent display devices are widely used because of their fast response speed, high brightness, and excellent viewing angle.
[0003] However, such an organic electroluminescent display device has a problem that side leakage current occurs, the low-potential voltage increases, the driving voltage and power consumption increase, and the brightness becomes non-uniform.
Summary of the Invention
Problems to be Solved by the Invention
[0004] The present invention is for solving the above-described problems, and an object thereof is to provide a display device capable of minimizing side leakage current and preventing an increase in low-potential voltage.
Means for Solving the Problems
[0005] To achieve the aforementioned objectives, the display device according to the present invention comprises a first substrate, a bank layer formed on the first substrate and partitioning a plurality of R (red), G (green), and B (blue) subpixels, thin-film transistors arranged in each subpixel, organic light-emitting elements arranged in each subpixel, and a plurality of spacers arranged around the R subpixel on the bank layer, wherein each organic light-emitting element includes an anode electrode, a hole transport layer, a light-emitting layer, an electron transport layer, and a cathode electrode arranged in each subpixel, the spacers are formed in an inverse tapered shape, the hole transport layer and the electron transport layer extend to adjacent subpixels via the side and top surfaces of the spacers, and the cathode electrode is disconnected by the inverse tapered side surface.
[0006] The aforementioned plurality of spacers are arranged spaced apart from each other around the R subpixel, surrounding the R subpixel, and each of the plurality of spacers is composed of multiple spacers spaced apart from each other at a predetermined distance.
[0007] The spacer may be made of a different material from the bank layer, or it may be made of the same material.
[0008] The bank layer around the R subpixel further includes at least an aperture, which is formed in the shape of a closed curve surrounding the R subpixel.
[0009] The side walls of the opening are formed in an inverse tapered shape, the hole transport layer and the electron transport layer are formed on the side walls and bottom surface of the opening, and the cathode electrode is disconnected by the side walls of the opening. [Effects of the Invention]
[0010] In this invention, by forming spacers only around the R subpixel, which is most affected by lateral leakage current, and not forming spacers around the G subpixel and B subpixel, which are minimally (or almost) affected by lateral leakage current, defects due to lateral leakage current can be effectively prevented.
[0011] Furthermore, in this invention, since spacers are formed only on the sub-pixels that are most affected by lateral leakage current, the increase in the path length of the Vss current due to the spacers and the resulting rise in low potential voltage can be minimized. [Brief explanation of the drawing]
[0012] [Figure 1] This is a schematic block diagram showing an organic electroluminescent display device according to a first embodiment of the present invention. [Figure 2] This is a circuit diagram of a subpixel in an organic electroluminescent display device according to a first embodiment of the present invention. [Figure 3] This is a schematic plan view showing an organic electroluminescent display device according to a first embodiment of the present invention. [Figure 4] This is a cross-sectional view along the line IV-IV in Figure 3. [Figure 5] This is a cross-sectional view along the VV line in Figure 3. [Figure 6] This figure shows the path of the lateral leakage current flowing into the R subpixel. [Figure 7] This is a schematic plan view showing an organic electroluminescent display device according to a second embodiment of the present invention. [Figure 8] This is a cross-sectional view along the line VIII-VIII in Figure 7. [Figure 9] This is a cross-sectional view along the line IX-IX in Figure 7. [Figure 10] This figure shows an organic electroluminescent display device according to a third embodiment of the present invention, and is a cross-sectional view taken along the line VIII-VIII in Figure 7. [Figure 11] This figure shows an organic electroluminescent display device according to a third embodiment of the present invention, and is a cross-sectional view taken along the line XI-XI in Figure 7. [Figure 12] This is a schematic cross-sectional view showing an organic electroluminescent display device according to a fourth embodiment of the present invention. [Modes for carrying out the invention]
[0013] The advantages and features of the present invention, and the method for achieving them, will become clear by referring to the embodiments described in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below and can be embodied in various different forms. However, these embodiments are provided to make the disclosure of the present invention complete and to enable those with ordinary knowledge in the technical field to which the present invention pertains to fully understand the scope of the invention, and the present invention is defined by the claims.
[0014] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary and the present invention is not limited thereto. Throughout the specification, the same reference numerals indicate the same components. Also, when explaining the present invention, if it is determined that a specific explanation of related known technologies obscures the gist of the present invention, the detailed explanation thereof will be omitted. When "comprises", "includes", "has", "holds", "becomes", etc. are described in this specification, other parts can be added unless both "only" are described. Also, when a component is described in the singular form, it can be interpreted in the plural form unless otherwise explicitly stated.
[0015] Also, when interpreting a component, it shall include an error range even without an explicit description.
[0016] For example, when explaining the positional relationship between two components with "above", "on the upper part", "on the lower part", "sideways", etc., if "directly" or "immediately" is not described, one or more other components can also be located between the two components.
[0017] Also, in the explanation of the time relationship, for example, when explaining the temporal front-back relationship with "after", "subsequent to", "next", "before", etc., if "directly" or "immediately" is not described, discontinuous cases can be included.
[0018] Furthermore, while terms such as "first" and "second" are used to distinguish the components, the components are not limited to these terms. Therefore, the first component mentioned below may also be the second component within the technical concept of the present invention.
[0019] In describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc., may be used. However, such terms are used solely to distinguish components and do not limit their nature, order, sequence, number, etc. When it is stated that one component is “linked,” “joined,” or “connected” to another component, it should be understood that both components may be directly linked, joined, or connected, but that another component may be interposed between each component, and each component may be “linked,” “joined,” or “connected” through that other component.
[0020] In the present invention, "display device" can include a display device in the narrow sense, such as a display module that includes a display panel and a drive unit for driving the display panel. It can also include a set electronic device or set device, such as a notebook computer, television, computer monitor, or automotive equipment or other forms of vehicle equipment, which are final products equipped with a display module, or a mobile electronic device such as a smartphone or electronic pad.
[0021] Therefore, the display device in the present invention can include the display device itself in the narrow sense, such as a display module, as well as application products equipped with a display module, or even a set device which is the final product.
[0022] The present invention will be described in detail below with reference to the drawings.
[0023] Figure 1 is a schematic block diagram showing the organic electroluminescent display device 100 according to the present invention.
[0024] As shown in Figure 1, the organic electroluminescent display device 100 is composed of an image processing unit 101, a timing control unit 102, a gate drive unit 103, a data drive unit 104, a power supply unit 106, and a display panel PNL.
[0025] The video processing unit 101 outputs multiple timing signals to drive various devices along with the video data supplied from an external source. For example, the multiple timing signals output from the video processing unit 101 may include data enable signals, vertical synchronization signals, horizontal synchronization signals, clock signals, and so on.
[0026] The timing control unit 102 receives multiple timing signals along with the video data input to the video processing unit 101. Based on the multiple timing signals input from the video processing unit 101, the timing control unit 102 generates and outputs a gate control signal GDC for controlling the operation timing of the gate drive unit 103 and a data control signal DDC for controlling the operation timing of the data drive unit 104.
[0027] The gate drive unit 103 outputs a scan signal to the display panel PNL in response to the gate control signal GDC supplied from the timing control unit 102. The gate drive unit 103 outputs the scan signal via multiple gate lines GL1 to GLm. At this time, the gate drive unit 103 can be formed in the form of an IC (Integrated Circuit), but is not limited to this. In particular, the gate drive unit 103 can be configured as a GIP (Gate In Panel) structure formed by directly stacking thin-film transistors on a substrate inside the organic electroluminescent display device 100. The GIP can include multiple circuits such as a shift register and a level shifter.
[0028] The data drive unit 104 outputs a data voltage to the display panel PNL in response to the data control signal DDC input from the timing control unit 102. The data drive unit 104 samples and latches the digital data signal DATA supplied from the timing control unit 102 and converts it into an analog data voltage based on gamma voltage. The data drive unit 104 outputs the data voltage via multiple data lines DL1 to DLn.
[0029] In this case, the data drive unit 104 may be mounted on the upper surface of the display panel PNL in the form of an IC, or it may be formed by directly stacking various patterns and layers on the display panel PNL, but is not limited to these.
[0030] The power supply unit 106 outputs a high-potential drive voltage EVDD and a low-potential drive voltage EVSS, and supplies them to the display panel PNL. The high-potential drive voltage EVDD and the low-potential drive voltage EVSS are supplied to the display panel PNL via the power line. At this time, the voltage output from the power supply unit 106 can be output to the gate drive unit 103 or the data drive unit 104 and used to drive them.
[0031] The display panel PNL responds to the data voltage and scan signal supplied from the gate drive unit 103 and the data drive unit 104, and the power supplied from the power supply unit 106, and displays images.
[0032] The display panel PNL is composed of multiple subpixels SP, which actually display the image. The subpixels SP include red R subpixels, green G subpixels, and blue B subpixels. Alternatively, they may include white W subpixels, red R subpixels, green G subpixels, and blue B subpixels. In this case, the W, R, G, and B subpixels SP may all be formed to have the same area, or they may be formed to have different areas from each other.
[0033] Figure 2 is a circuit diagram of an organic electroluminescent display panel PNL provided in the display device DIS according to the present invention.
[0034] The organic electroluminescent display panel PNL according to the present invention consists of a display area and a pad area, the display area including a plurality of subpixels SP. Each subpixel SP displays a single color on the organic electroluminescent display device. For example, each subpixel SP displays one of the following colors: red, green, blue, and white. In this case, the red, green, blue, and white subpixels SP can be defined as a single pixel. The plurality of subpixels SP are arranged in a matrix on the substrate of the organic electroluminescent display device, and a plurality of wiring can be arranged between the plurality of subpixels SP within the display area.
[0035] Furthermore, any wiring that is electrically connected to the wiring arranged in the display area and applies signals to the light-emitting elements of the organic electroluminescent display device can be placed in the pad area. The wiring may include, for example, Vdd wiring, Vdata wiring, reference wiring (Vref wiring), Vss wiring, etc.
[0036] As shown in Figure 2, each subpixel SP of the organic electroluminescent display panel PNL according to the present invention includes a switching thin-film transistor T1, a driving thin-film transistor T2, a storage capacitor Cst, a sensing thin-film transistor T3, an auxiliary thin-film transistor T4, and a light-emitting element E. Since the subpixel SP of the organic electroluminescent display device according to the present invention includes four thin-film transistors and one capacitor, it can be referred to as a 4T1C structure. However, the structure of the subpixel SPX of the organic electroluminescent display device according to the present invention is not limited to this, and can be formed into various compensation structures such as a 4T2C structure including four thin-film transistors and two capacitors, a 5T2C structure including five thin-film transistors and two capacitors, a 6T2C structure including six thin-film transistors and two capacitors, and a 7T2C structure including seven thin-film transistors and two capacitors.
[0037] The four thin-film transistors included in the subpixel SP each consist of a semiconductor layer, gate electrode, source electrode, and drain electrode, and may be either P-type or N-type thin-film transistors. For ease of explanation, Figure 2 shows an N-type thin-film transistor.
[0038] The switching thin-film transistor T1 includes a drain electrode connected to the data wiring, a source electrode connected to the first node N1, and a gate electrode connected to the gate wiring. The switching thin-film transistor T1 is turned on based on the gate voltage Vg applied to the gate wiring from the gate drive unit, and charges the first node N1 with the data voltage Vdata applied to the data wiring from the data drive unit.
[0039] The driving thin-film transistor T2 includes a drain electrode connected to a high-potential wiring (i.e., Vdd wiring), a source electrode connected to the anode electrode of the light-emitting element E, and a gate electrode connected to the first node N1. The driving thin-film transistor T2 turns on when the voltage at the first node N1 is higher than the threshold voltage (Vth), and turns off when the voltage at the first node N1 is lower than the threshold voltage, supplying a driving current from the Vdd wiring to the light-emitting element E.
[0040] The storage capacitor Cst includes a first electrode connected to the first node N1 and a second electrode connected to the source electrode of the driving thin-film transistor T2. The storage capacitor Cst also maintains a constant drive current to the light-emitting element E by maintaining a potential difference between the gate electrode and the source electrode of the driving thin-film transistor T2 during the light-emitting time of the light-emitting element E.
[0041] The sensing thin-film transistor T3 includes a drain electrode connected to the source electrode of the driving thin-film transistor T2, a source electrode connected to a reference wiring, and a gate electrode connected to the sensing wiring. Furthermore, the sensing thin-film transistor T3 is a thin-film transistor for sensing the threshold voltage of the driving thin-film transistor T2.
[0042] The auxiliary thin-film transistor T4 includes a drain electrode electrically connected to the cathode electrode of the light-emitting element E, a source electrode electrically connected to the reference wiring, and a gate electrode electrically connected to the auxiliary wiring. The auxiliary thin-film transistor T4 is also turned on during the light-emitting section and supplies a low potential voltage (i.e., Vss voltage) to the cathode electrode of the light-emitting element E.
[0043] Figure 3 is a schematic plan view showing an organic electroluminescent display device 100 according to a first embodiment of the present invention.
[0044] As shown in Figure 3, the organic electroluminescent display device 100 may include R (red) subpixels SP_R, G (green) subpixels SP_G, and B (blue) subpixels SP_B. In Figure 3, the R, G, and B subpixels SP_R, SP_G, and SP_B are formed in a specific shape and arranged in a specific shape. However, the R, G, and B subpixels SP_R, SP_G, and SP_B of the organic electroluminescent display device 100 according to the present invention are not limited to these, and can be formed in various shapes and arranged in various shapes.
[0045] A spacer 154 with an inversely tapered cross-section is formed around the R subpixel SP_R, while a spacer 154 with an inversely tapered cross-section is not formed around the G subpixel SP_G and the B subpixel SP_B.
[0046] The spacers 154 are formed in a bar shape in a plan view and are arranged on the four sides (top, bottom, left, and right) around the R subpixel SP_R, surrounding the R subpixel SP_R. In this case, multiple spacers 154 surrounding the R subpixel SP_R are arranged at predetermined distances apart. In Figure 3, four spacers 154 are arranged in a square shape with the R subpixel SP_R placed inside, but five or more spacers 154 may be formed and arranged in a polygonal or circular shape with the R subpixel SP_R placed inside.
[0047] Each spacer 154 can be composed of two spacers, a first spacer 154a and a second spacer 154b, spaced a predetermined distance apart from each other, but is not limited to this; it may be composed of one spacer or three or more spacers. Therefore, multiple first spacers 154a and second spacers 154b can be placed above, below, to the left, and to the right of the R subpixel SP_R.
[0048] Figure 4 is a cross-sectional view along the line IV-IV in Figure 3, and Figure 5 is a cross-sectional view along the line VV in Figure 3. However, Figure 4 is a cross-sectional view of adjacent R subpixel SP_R and G subpixel SP_G, and Figure 5 is a cross-sectional view of adjacent B subpixel SP_B and G subpixel SP_G.
[0049] As shown in Figures 4 and 5, a thin-film transistor T is placed in each sub-pixel SP_R, SP_G, and SP_B. In reality, various thin-film transistors such as switching thin-film transistors, driving thin-film transistors, sensing thin-film transistors, and auxiliary thin-film transistors are placed in each sub-pixel SP_R, SP_G, and SP_B, but for the sake of explanation, only one thin-film transistor T is shown. Therefore, the thin-film transistor T can be a switching thin-film transistor, a driving thin-film transistor, a sensing thin-film transistor, and an auxiliary thin-film transistor.
[0050] Since switching thin-film transistors, driving thin-film transistors, sensing thin-film transistors, and auxiliary thin-film transistors can all have the same structure, the structure of all thin-film transistors can be represented by a single thin-film transistor T.
[0051] The thin-film transistor T includes a semiconductor layer 114 formed on a buffer layer 142 provided on a first substrate 110, a gate insulating layer 143 stacked on the buffer layer 142 and covering the semiconductor layer 114, a gate electrode 116 disposed on the gate insulating layer 143, an interlayer insulating layer 144 stacked on the gate insulating layer 143 and covering the gate electrode 116, and a source electrode 122 and a drain electrode 124 disposed on the interlayer insulating layer 144.
[0052] The first substrate 110 can be made of a foldable plastic material. For example, the first substrate 110 can be made of PI (polyimide), PET (polyethylene terephthalate), PEN (polyethylene naphthalate), PC (polycarbonate), PES (polyethersulfone), PAR (polyarylate), PSF (polysulfone), or COC (cyclic olefin copolymer). However, the first substrate 110 of the present invention is not limited to such foldable materials and can also be made of a rigid glass.
[0053] The buffer layer 142 protects the thin-film transistor formed in a subsequent process from impurities such as alkali ions from the first substrate 110, and also blocks moisture from penetrating from the outside. The buffer layer 142 is made of silicon oxide (SiO2). x ), or silicon nitride (SiN x ) consists of a single layer or multiple layers.
[0054] The semiconductor layer 114 can be composed of an amorphous semiconductor such as amorphous silicon (a-Si), a crystalline semiconductor such as polycrystalline silicon (p-Si), and an oxide semiconductor such as IGZO (indium gallium zinc oxide). The semiconductor layer 114 consists of a channel region 114a in the central region and doped layers on both sides, namely the source region 114b and the drain region 114c.
[0055] The gate electrode 116 is composed of a metal such as Cr, Mo, Ta, Cu, Ti, Al, or an Al alloy, and may be a single layer or a multilayer, but is not limited to these.
[0056] The interlayer insulating layer 144 is made of an organic material such as photoacrylic, or SiN x , or SiO x It is composed of inorganic materials such as the above, and may be a single layer or a multilayer. Furthermore, the interlayer insulating layer 144 can be a multilayer of organic and inorganic layers.
[0057] The source electrode 122 and drain electrode 124 are composed of metals such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy, and may be single-layer or multi-layer, but are not limited thereto.
[0058] The source electrode 122 and the drain electrode 124 make ohmic contact with the source region 114b and drain region 114c of the semiconductor layer 114, respectively, via the first contact hole 149a and the second contact hole 149b formed in the gate insulating layer 143 and the interlayer insulating layer 144.
[0059] Although not shown in the figure, a bottom shield metal layer can be placed on the first substrate 110 below the semiconductor layer 114. The bottom shield metal layer is intended to minimize the back channel phenomenon caused by trapped charges on the first substrate 110 and prevent afterimages or degradation of transistor performance. It is composed of Ti, Mo, or an alloy of Ti and Mo, and may be a single layer or a multilayer, but is not limited to these.
[0060] A protective layer 146 is formed on the first substrate 110 on which the thin-film transistor T is arranged. The protective layer 146 can be formed from an organic layer such as photoacrylic, but is not limited to this, and can also be a multilayer consisting of an inorganic layer and an organic layer. In addition, a third contact hole 149c is formed in the protective layer 146.
[0061] Each sub-pixel SP_R, SP_G, and SP_B on the protective layer 146 has an anode electrode 132 that is electrically connected to the drain electrode 124 of the thin-film transistor T via a third contact hole 149c. The anode electrode 132 has a single-layer or multi-layer structure composed of a metal such as Ca, Ba, Mg, Al, Ag, or an alloy thereof, and is connected to the drain electrode 124 of the thin-film transistor T, to which an image signal is applied from the outside.
[0062] A bank layer 152 is formed at the boundary between each subpixel SP_R, SP_G, and SP_B on the protective layer 146. The bank layer 152 is a kind of partition that defines the subpixels SP_R, SP_G, and SP_B, partitioning each subpixel and preventing the mixing and output of light of a specific color from adjacent subpixels.
[0063] An inversely tapered spacer 154 is formed in the bank layer 152 around the R subpixel SP_R. In Figure 4, the spacer 154 consists of a first spacer 154a and a second spacer 154b that are spaced a predetermined distance apart from each other, but only one spacer 154 may be formed, or three or more may be formed. However, as shown in Figure 5, no spacer 154 is formed at all in regions that are not adjacent to the R subpixel SP_R, for example, between the G subpixel SP_G and the B subpixel SP_B.
[0064] The bank layer 152 can be made of polyimide, photoresist, or the like, but is not limited to these materials. The spacer 154 may be formed from the same material as the bank layer 152, or from a different material. If the spacer 154 is formed from the same material as the bank layer 152, for example, the spacer 154 and the bank layer 152 can be formed in a single masking process.
[0065] A hole transport layer 134 is integrally formed on the upper part of the anode electrode 132 between the bank layers 152, the upper surface of the bank layer 152, the reverse tapered side surface and upper surface of the spacer 154, and a light-emitting layer 135 is formed on the upper part of the hole transport layer 134 between the bank layers 152. The light-emitting layer 135 may be an R-light-emitting layer formed in the R pixel to emit red light, a G-light-emitting layer formed in the G pixel to emit green light, or a B-light-emitting layer formed in the B pixel to emit blue light. The light-emitting layer 135 may also be a W-organic light-emitting layer that emits white light.
[0066] An electron transport layer 136 is integrally formed on the upper part of the light-emitting layer 135 between the bank layers 152, on the upper part of the hole transport layer 134 in the bank layer 152, and on the upper part of the hole transport layer 134 on the reverse tapered side and top surface of the spacer 154.
[0067] Furthermore, cathode electrodes 138 are formed on the upper part of the electron transport layer 136 between the bank layers 152, on the upper part of the electron transport layer 136 on the upper surface of the bank layer 152, and on the upper part of the electron transport layer 136 on the upper surface of the spacer 154. However, cathode electrodes 138 are not formed on the upper part of the electron transport layer 136 on the side surface of the spacer 154. In other words, cathode electrodes 138 are formed on the upper part of the bank layer 152 and on the upper part of the spacer 154, but not on the reverse tapered side surface of the spacer 154. As a result, the cathode electrode 138 on the upper part of the bank layer 152 and the cathode electrode 138 on the upper part of the spacer 154 are disconnected by the reverse tapered side surface of the spacer 154.
[0068] Although not shown in the diagram, a hole injection layer can be formed between the anode electrode 132 and the hole transport layer 134, and an electron injection layer can be formed on top of the electron transport layer 136.
[0069] The anode electrode 132, hole transport layer 134, light-emitting layer 135, electron transport layer 136, and cathode electrode 138 constitute an organic light-emitting element E, which emits light of a specific wavelength in response to an externally applied signal.
[0070] Thus, in the organic electroluminescent display device 100 according to the present invention, the hole transport layer 134 and the electron transport layer 136 are also formed on the side and top surfaces of the spacer 154. As a result, the hole transport layer 134 and the electron transport layer 136 are formed over the entire surface of the organic electroluminescent display device 100, while the cathode electrode 138 is disconnected by the spacer 154.
[0071] Therefore, the path length of the hole transport layer 134 is increased by the spacer 154, and the reason for increasing the path length of the hole transport layer 134 in this way is as follows.
[0072] Generally, in an organic electroluminescent display device 100, when a specific subpixel is turned on and driven, a lateral leakage current is generated, and this current is applied to adjacent subpixels. This lateral leakage current causes errors in the current applied to adjacent subpixels, resulting in variations in brightness between subpixels. Furthermore, the lateral leakage current can cause off-state subpixels to turn on and emit light. In particular, in the case of high-resolution display devices, the spacing between subpixels becomes narrower, making the effects of this lateral leakage current even greater.
[0073] Side leakage current is known to leak to adjacent subpixels along common layers such as the hole transport layer 134, electron transport layer 136, hole injection layer, and electron injection layer. In this invention, the leakage current applied to adjacent subpixels is minimized by adjusting the path of such side leakage current.
[0074] In other words, in the present invention, by forming a spacer 154 and forming a hole transport layer 134 and an electron transport layer 136 on its side and top surfaces, the length of the path through which the side leakage current flows can be increased, and as a result, the side leakage current flowing to adjacent subpixels can be minimized.
[0075] On the other hand, since the cathode electrode 138 is made of a transparent conductive material such as ITO (indium tin oxide) or IZO (indium zinc oxide), or a thin metal that can transmit visible light, the transparent conductive material or metal is not formed on the side surface of the reverse tapered spacer 154 during the cathode electrode 138 formation process, such as the sputtering process.
[0076] Therefore, the cathode electrode 138 is formed throughout the organic electroluminescent display device 100, but is disconnected in the region where the spacer 154 is formed. The reason for disconnecting the cathode electrode 138 with the spacer 154 is to prevent an increase in the path length of the Vss current. The Vss current is applied along the cathode electrode 138, and an increase in the path length of the Vss current causes an increase in the low potential voltage, which not only increases the drive voltage and power consumption but also causes uneven brightness.
[0077] If the cathode electrode 138 is not disconnected by the spacer 154, the cathode electrode 138 extends to the side and top surfaces of the spacer 154, which increases the flow length of the Vss current, and as a result the low potential voltage rises.
[0078] In this invention, in order to prevent such a rise in low potential voltage, the spacer 154 is formed in an inverse tapered shape, and the cathode electrode 138 extending along the spacer 154 is disconnected, thereby preventing the Vss current path from being formed along the upper surface and both sides of the first spacer 154a and the upper surface and both sides of the second spacer 154b. As a result, the increase in the path length of the Vss current due to the spacer 154 can be minimized.
[0079] In other words, the organic electroluminescent display device 100 according to the first embodiment of the present invention increases the length of the path through which the lateral leakage current flows by forming an inversely tapered spacer 154, thereby minimizing the current leaking to adjacent subpixels, while simultaneously minimizing the increase in the path length of the Vss current and minimizing the rise in low potential voltage.
[0080] On the other hand, in the first embodiment of the present invention, spacers 154 are formed only around the R subpixel SP_R, and not around the G subpixel SP_G and B subpixel SP_B, for the following reasons.
[0081] When a reverse-tapered spacer 154 is formed, the cathode electrode 138 is disconnected, but the path length of the Vss current increases compared to when no spacer is formed.
[0082] In other words, as shown in Figure 6, the Vss path 1 passing through the spacer 154 is broken due to its reverse taper structure, so the Vss current does not flow into the R subpixel SP_R through the Vss path 1, but instead flows into the R subpixel SP_R through the Vss path 2 that bypasses the spacer 154. Therefore, compared to the case where the spacer 154 is not formed (in which case the Vss current flows in through the Vss path 1), the path length of the Vss current increases when the spacer 154 is formed, resulting in defects due to an increase in low potential voltage.
[0083] Therefore, forming an inverted tapered spacer 154 has the advantage of reducing lateral leakage current, but also the disadvantage of increasing low potential voltage.
[0084] The present invention provides an efficient organic electroluminescent display device 100 by maximizing the advantages while minimizing the disadvantages.
[0085] Generally, among the R, G, and B subpixels SP_R, SP_G, and SP_B, the smallest current is applied to the R subpixel SP_R, while a relatively large current is applied to the G subpixel SP_G and B subpixel SP_B. The threshold voltage of the thin-film transistor T located in the R subpixel SP_R is the lowest, and the threshold voltage of the thin-film transistor T located in the G subpixel SP_G and B subpixel SP_B is the highest.
[0086] Therefore, in the R subpixel SP_R, even when a small lateral leakage current is applied, the relative current fluctuation becomes large, causing a change in brightness. Furthermore, even with a small lateral current, the problem of emission occurring in the off state arises. On the other hand, in the G subpixel SP_G and B subpixel SP_B, even when the same lateral current as the R subpixel SP_R is applied, the relative current fluctuation is small, resulting in a small change in brightness. Also, even when a small leakage current is applied, the G subpixel SP_G and B subpixel SP_B do not emit light in the off state. In other words, the R subpixel SP_R is greatly affected by lateral leakage current, while the G subpixel SP_G and B subpixel SP_B are less affected by lateral leakage current.
[0087] Therefore, the G subpixel SP_G and B subpixel SP_B are less likely to experience defects due to lateral leakage current even without forming a spacer 154 around them.
[0088] Thus, in this invention, by forming the spacer 154 only around the R subpixel SP_R, which is most affected by lateral leakage current, and not forming the spacer 154 around the G subpixel SP_G and B subpixel SP_B, which are minimally (or almost completely) affected by lateral leakage current, it is possible to prevent defects caused by lateral leakage current.
[0089] Furthermore, in this invention, since the spacer 154 is formed only in the smallest possible area (the peripheral area of the R subpixel SP_R), the disadvantage of the spacer 154 causing an increase in low potential voltage can be minimized.
[0090] Returning to Figures 4 and 5, a sealing layer 160 is formed on the cathode electrode 138. The sealing layer 160 can consist of a first sealing layer 162 made of an inorganic material, a second sealing layer 164 made of an organic material, and a third sealing layer 166 made of an inorganic material. In this case, the inorganic material is SiN x and SiO xThe organic substances may include, but are not limited to, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, or mixtures thereof.
[0091] A second substrate 170 is placed on the third sealing layer 166 and bonded to it by an adhesive layer (not shown). Any material can be used for the adhesive layer as long as it has good adhesion, heat resistance and water resistance, but in this invention, thermosetting resins such as epoxy compounds, acrylate compounds, or acrylic rubber can be used. Alternatively, a photocurable resin can be used as the adhesive layer, in which case the adhesive layer is cured by irradiating it with light such as ultraviolet light.
[0092] The second substrate 170 is an encapsulation cap for sealing the electroluminescent display device, and may be a protective film such as PS (polystyrene) film, PE (polyethylene) film, PEN (polyethylene naphthalate) film, or PI (polyimide) film, or a thin glass several tens of micrometers thick.
[0093] As described above, in the first embodiment of the present invention, the organic electroluminescent display device 100 is formed only around the R subpixel SP_R, which increases the path length of the lateral leakage current, and not around the G subpixel SP_G and B subpixel SP_B. As a result, the lateral leakage current can be minimized, and consequently, variations in brightness can be prevented, and defects due to increases in low potential voltage can be prevented.
[0094] On the other hand, the figure shows a spacer 154 composed of a first spacer 154a and a second spacer 154b, but this embodiment is not limited to this. The spacer 154 may consist of one or three or more.
[0095] Figure 7 is a schematic plan view of an organic electroluminescent display device 200 according to a second embodiment of the present invention, Figure 8 is a cross-sectional view along line VIII-VIII in Figure 7, and Figure 9 is a cross-sectional view along line IX-IX in Figure 7. The same structure as in the first embodiment will be omitted or simplified in its description, and only the differences will be described in detail.
[0096] As shown in Figure 7, the organic electroluminescent display device 200 of this embodiment includes a red (R) subpixel SP_R, a green (G) subpixel SP_G, and a blue (B) subpixel SP_B. An inverted tapered spacer 254 is formed around the R subpixel SP_R, while no inverted tapered spacer 254 is formed around the G subpixel SP_G and the B subpixel SP_B.
[0097] Furthermore, an opening 256 with a predetermined width is formed around the R subpixel SP_R in a closed curve shape along the edge of the R subpixel SP_R. When the spacer 254 consists of a first spacer 254a and a second spacer 254b, the opening 256 can be formed between the first spacer 254a and the second spacer 254b. Alternatively, the opening 256 can be formed inside the first spacer 254a or outside the second spacer 254b, surrounding the R subpixel SP_R.
[0098] As shown in Figures 8 and 9, a thin-film transistor T is formed on the first substrate 210, and a bank layer 252 is formed on top of it.
[0099] A reverse-tapered spacer 254 is placed on the bank layer 252 between the R subpixel SP_R and the G subpixel SP_G, or more precisely, around the R subpixel SP_R. The figure shows a spacer 254 composed of two spacers, a first spacer 254a and a second spacer 254b, but this embodiment is not limited to this. The spacer may consist of one or three or more.
[0100] Furthermore, an opening 256 is formed in the bank layer 252 around the R subpixel SP_R. The opening 256 is formed at a predetermined distance from the first spacer 254a and the second spacer 254b, and with a set width. In this case, the side walls of the opening 256 can be formed in a tapered shape with an inclination angle of 90 degrees or less.
[0101] The opening 256 can be formed between the first spacer 254a and the second spacer 254b, but it can also be formed outside the first spacer 254a and the second spacer 254b. Although the figure shows one opening 256, two or more can be formed, in which case multiple openings 256 can be formed between the first spacer 254a and the second spacer 254b, and outside the first spacer 254a and the second spacer 254b.
[0102] The spacer 254 may be formed from the same material as the bank layer 252, or from a different material. If the spacer 254 is formed from the same material as the bank layer 252, for example, the spacer 254 and the bank layer 252 can be formed in a single masking process. Alternatively, the spacer 254, the bank layer 252, and the opening 256 can also be formed in a single masking process.
[0103] An anode electrode 232 is formed on the protective layer 246 between the bank layers 252, and is electrically connected to the drain electrode 224 of the thin-film transistor T via a third contact hole 249c formed in the protective layer 246.
[0104] Hole transport layers 234 are integrally formed on the upper part of the anode electrode 232 between the bank layers 252, on the upper part of the bank layers 252, on the reverse tapered side and top surface of the spacer 254, and on the tapered side and bottom surface of the opening 256. Furthermore, an emissive layer 235 is formed on the upper part of the hole transport layer 234 between the bank layers 252. The emissive layer 235 may be an R-emissive layer formed in the R pixel to emit red light, a G-emissive layer formed in the G pixel to emit green light, or a B-emissive layer formed in the B pixel to emit blue light. Alternatively, the emissive layer 235 may be a W-organic emissive layer that emits white light.
[0105] An electron transport layer 236 is integrally formed on the upper part of the light-emitting layer 235 between the bank layers 252, on the upper part of the hole transport layer 234 formed on the bank layer 252, on the upper part of the hole transport layer 234 on the reverse tapered side and top surface of the spacer 254, and on the upper part of the hole transport layer 234 on the tapered side and bottom surface of the opening 256.
[0106] Furthermore, cathode electrodes 238 are formed on the upper part of the electron transport layer 236 between the bank layers 252, on the upper part of the electron transport layer 236 on the upper surface of the bank layer 252, on the upper part of the electron transport layer 236 on the upper surface of the spacer 254, and on the tapered side and bottom surface of the opening 256. However, cathode electrodes 238 are not formed on the upper part of the electron transport layer 236 on the side surface of the spacer 254. In other words, cathode electrodes 238 are formed on the upper part of the bank layer 252, on the upper part of the spacer 254 and inside the opening 256, but not on the reverse tapered side surface of the spacer 254. Therefore, the cathode electrode 238 on the upper part of the bank layer 252 and the cathode electrode 238 on the upper part of the spacer 254 are disconnected by the reverse tapered side surface of the spacer 254.
[0107] Although not shown in the diagram, a hole injection layer can be formed between the anode electrode 232 and the hole transport layer 234, and an electron injection layer can be formed on top of the electron transport layer 236.
[0108] Thus, in the organic electroluminescent display device 200 of this embodiment, the hole transport layer 234 and the electron transport layer 236 are also formed on the side and top surfaces of the spacer 254 and on the side and bottom surfaces of the opening 256. As a result, the hole transport layer 234 and the electron transport layer 236 are formed over the entire surface of the organic electroluminescent display device 200, while the cathode electrode 238 is disconnected by the spacer 254.
[0109] Therefore, in the organic electroluminescent display device 200 according to this embodiment, since the path through which the lateral leakage current flows is formed on the side and top surfaces of the spacer 254, the path length through which the lateral leakage current flows can be increased, and as a result, the lateral leakage current leaking to adjacent subpixels can be minimized. Furthermore, in this embodiment, by forming an opening 256, the path length through which the lateral leakage current flows can be further increased, and the current leaking to adjacent subpixels can be reduced even further.
[0110] Figures 10 and 11 are cross-sectional views of an organic electroluminescent display device 300 according to a third embodiment of the present invention, where Figure 10 is a cross-sectional view along the line VIII-VIII in Figure 7, and Figure 11 is a cross-sectional view along the line XI-XI in Figure 7. The same structures as in the first and second embodiments will be omitted or simplified in their description, and only the differences will be described in detail.
[0111] As shown in Figures 10 and 11, a thin-film transistor T is formed on the first substrate 310, and a bank layer 352 is formed on top of it.
[0112] A reverse-tapered spacer 354 is placed on the bank layer 352 between the R subpixel SP_R and the G subpixel SP_G, or more precisely, around the R subpixel SP_R. The figure shows a spacer 354 composed of two spacers, a first spacer 354a and a second spacer 354b, but this embodiment is not limited to this. The spacer may consist of one or three or more.
[0113] Furthermore, in the bank layer 352 surrounding the R subpixel SP_R, a closed curve-shaped opening 356 with a predetermined width is formed along the periphery of the R subpixel SP_R. The opening 356 is formed at a predetermined distance from the first spacer 354a and the second spacer 354b and with a predetermined width. At this time, the side walls of the opening 356 are formed to have an inclination angle of 90 degrees or more and are in the shape of an inverse taper.
[0114] The opening 356 can be formed between the first spacer 354a and the second spacer 354b, but it can also be formed outside the first spacer 354a and the second spacer 354. Furthermore, although the figure shows one opening 356, two or more openings can be formed. In this case, multiple openings 356 can be formed between the first spacer 354a and the second spacer 354b, and outside the first spacer 354a and the second spacer 354b. Also, the spacer 354 may be formed from the same material as the bank layer 352, or from a different material.
[0115] An anode electrode 332 is formed on the protective layer 346 between the bank layers 352, and is electrically connected to the drain electrode 324 of the thin-film transistor T via a third contact hole 349c formed in the protective layer 346.
[0116] Hole transport layers 334 are integrally formed on the upper part of the anode electrode 332 between the bank layers 352, on the upper part of the bank layers 352, on the reverse tapered side and top surface of the spacer 354, and on the reverse tapered side and bottom surface of the opening 356. Furthermore, an emissive layer 335 is formed on the upper part of the hole transport layer 334 between the bank layers 352. The emissive layer 335 may be an R-emissive layer formed in the R pixel to emit red light, a G-emissive layer formed in the G pixel to emit green light, or a B-emissive layer formed in the B pixel to emit blue light. Alternatively, the emissive layer 335 may be a W-organic emissive layer that emits white light.
[0117] An electron transport layer 336 is integrally formed on the upper part of the light-emitting layer 335 between the bank layers 352, on the upper part of the hole transport layer 334 formed on the bank layer 352, on the upper part of the hole transport layer 334 on the reverse tapered side and top surface of the spacer 354, and on the upper part of the hole transport layer 334 on the reverse tapered side and bottom surface of the opening 356.
[0118] Furthermore, cathode electrodes 338 are formed on the upper part of the electron transport layer 336 between the bank layers 352, on the upper part of the electron transport layer 336 on the upper surface of the bank layer 352, on the upper part of the electron transport layer 336 on the upper surface of the spacer 354, and on the upper part of the electron transport layer 336 on the bottom surface of the opening 356. However, cathode electrodes 338 are not formed on the reverse tapered side surface of the spacer 354 or the reverse tapered side wall of the opening 356. In other words, the cathode electrode 338 is formed on the upper part of the bank layer 352, the upper surface of the spacer 354, and the bottom surface of the opening 356, but not on the reverse tapered side surface of the spacer 354 or the reverse tapered side wall of the opening 356. Therefore, the cathode electrode 338 on the upper part of the bank layer 352 and the cathode electrode 338 on the upper part of the spacer 354 are disconnected by the reverse tapered side surface of the spacer 354, and the cathode electrode 338 on the upper part of the bank layer 352 and the cathode electrode 338 on the upper part of the opening 356 are disconnected by the reverse tapered side surface of the opening 356.
[0119] Therefore, in the organic electroluminescent display device 300 according to this embodiment, the hole transport layer 334 and electron transport layer 336 are formed not only on the side and top surfaces of the spacer 354 and across the entire surface of the organic electroluminescent display device 300, but also throughout the entire interior of the opening 356. As a result, the path length through which the side leakage current flows can be greatly increased, and consequently, the current leaking to adjacent subpixels can be greatly reduced.
[0120] Furthermore, in this embodiment, the cathode electrode 338 is disconnected not only by the side surface of the spacer 354, but also by the reverse tapered side wall of the opening 356. This minimizes the path length through which the Vss current flows, thus preventing malfunctions caused by an increase in low potential voltage.
[0121] In the first to third embodiments, the organic light-emitting element E has a single-stack structure, but in other embodiments, the organic light-emitting element E may have a double-stack structure.
[0122] Figure 12 is a schematic diagram showing an organic electroluminescent display device according to the fourth embodiment of the present invention. The same structures as those in the first to third embodiments will be omitted or simplified in their explanation, and only the differences will be explained in detail.
[0123] As shown in Figure 12, the organic electroluminescent display device 400 according to the fourth embodiment of the present invention includes a red (R) subpixel SP_R, a green (G) subpixel SP_G, and a blue (B) subpixel SP_B.
[0124] The anode electrode 430 is positioned on each of the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B on the upper part of the substrate 410. The hole injection layer 440 is positioned over the entire R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B on the upper part of the anode electrode 430, and the first hole transport layer 442 is positioned over the entire R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B on the upper part of the hole injection layer 440.
[0125] In other embodiments, instead of the hole injection layer 440, a P-type hole transport layer P-HTL may be placed between the anode electrode 430 and the first hole transport layer 442.
[0126] The first R-emitting material layer 444R is selectively positioned in the R subpixel SP_R above the first hole transport layer 442, the first G-emitting material layer 444G is selectively positioned in the G subpixel SP_G above the first hole transport layer 442, and the first B-emitting material layer 444B is selectively positioned in the B subpixel SP_B above the first hole transport layer 442.
[0127] The first R-emitting material layer 444R, the first G-emitting material layer 444G, and the first B-emitting material layer 444B can realize microcavities by adjusting the light path length in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B. For example, the thickness of the first G-emitting material layer 444G may be greater than or equal to the thickness of the first B-emitting material layer 444B, and less than or equal to the thickness of the first R-emitting material layer 444R.
[0128] The first electron transport layer 446 is located on top of the entire first R emissive material layer 444R in the R subpixel SP_R, the first G emissive material layer 444G in the G subpixel SP_G, and the first B emissive material layer 444B in the B subpixel SP_B.
[0129] The hole injection layer 440, the first hole transport layer 442, the first R-luminescent material layer 444R, the first G-luminescent material layer 444G, the first B-luminescent material layer 444B, and the first electron transport layer 446 constitute the first stack ST1.
[0130] An N-type charge generation layer 448 is located above the first electron transport layer 446 in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B, and a P-type charge generation layer 450 is located above the N-type charge generation layer 448 in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B.
[0131] The N-type charge generation layer 448 and the P-type charge generation layer 450 can generate and supply electrons and holes. For example, the N-type charge generation layer 448 can supply electrons to the first stack ST1, and the P-type charge generation layer 450 can supply holes to the second stack ST2.
[0132] The second hole transport layer 452 is located above the P-type charge generation layer 450 in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B.
[0133] The second R-emitting material layer 454R can be selectively placed in the R subpixel SP_R above the second hole transport layer 452, the second G-emitting material layer 454G can be selectively placed in the G subpixel SP_G above the second hole transport layer 452, and the second B-emitting material layer 454B can be selectively placed in the B subpixel SP_B above the second hole transport layer 452.
[0134] The second R-emitting material layer 454R, the second G-emitting material layer 454G, and the second B-emitting material layer 454B can realize microcavities by adjusting the light path length in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B. For example, the thickness of the second G-emitting material layer 454G may be greater than or equal to the thickness of the second B-emitting material layer 454B, and less than or equal to the thickness of the second R-emitting material layer 454R.
[0135] The second electron transport layer 456 is located on top of the second R emissive material layer 454R in the R subpixel SP_R, the second G emissive material layer 454G in the G subpixel SP_G, and the second B emissive material layer 454B in the B subpixel SP_B.
[0136] The electron injection layer 458 is located above the second electron transport layer 456 in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B.
[0137] The second hole transport layer 452, the second R luminescent material layer 454R, the second G luminescent material layer 454G, the second B luminescent material layer 454B, the second electron transport layer 456, and the electron injection layer 458 constitute the second stack ST2.
[0138] The cathode electrode 470 is positioned on top of the electron injection layer 458 in the R subpixel SP_R, G subpixel SP_G, and B subpixel SP_B.
[0139] The anode electrode 430, the first stack ST1, the N-type charge generation layer 448, the P-type charge generation layer 450, the second stack ST2, and the cathode electrode 470 can constitute an organic light-emitting element.
[0140] In other embodiments, the organic light-emitting element E may have a triple-stack structure.
[0141] The features, structures, and effects described in the above-mentioned examples of the present invention are included in, but are not necessarily limited to, at least one example of the present invention. Furthermore, the features, structures, and effects listed in at least one example of the present invention can be combined or modified and implemented in other examples by a person with ordinary skill in the art to which the present invention belongs. Therefore, the content related to such combinations and modifications should be interpreted as being included in the scope of the present invention.
[0142] The present invention described above is not limited to the embodiments and drawings described herein. A person with ordinary skill in the art to which the present invention pertains may substitute, modify, or alter the present invention without departing from its technical aspects. Therefore, the scope of the present invention is defined by the claims. Furthermore, the meaning and scope of the claims, and any modifications or alterations derived from equivalent concepts thereto, should be interpreted as being included within the scope of the present invention. [Explanation of symbols]
[0143] 110, 170 boards 114 Semiconductor layer 116 Gate Insulation Layer 122 Source Electrode 124 Drain electrode 132 Anode electrode 134 Hole transport layer 135 Emitting layer 136 Electron transport layer 138 Cathode Electrode 152 Bank Layer 154 Spacer 156 Opening
Claims
1. A substrate comprising a plurality of pixels, each of which comprises a first subpixel, a second subpixel, and a third subpixel, A first electrode is disposed in each of the first subpixel, the second subpixel, and the third subpixel, A bank layer is disposed on the first electrode and demarcates the first subpixel, the second subpixel, and the third subpixel, At least one spacer is arranged on the bank layer and between the first subpixel and the second subpixel, An organic stack comprising the first electrode and the at least one spacer, and including at least two stacks and a charge generation layer disposed between the stacks, The organic stack comprises a second electrode placed on the organic stack, The length of the current path between the first subpixel and the second subpixel is different from the distance between the first subpixel and the second subpixel. An opening is formed in the bank layer between the first subpixel and the second subpixel. The display device is characterized in that the organic stack is arranged on the side and bottom surfaces of the opening.
2. The display device according to claim 1, characterized in that the at least one spacer is in the shape of an inverse taper.
3. The display device according to claim 1, characterized in that the first subpixel is a red subpixel and the second subpixel is a green subpixel.
4. The display device according to claim 1, characterized in that the second electrode is disconnected at the side surface of the spacer.
5. The display device according to claim 1, characterized in that the second electrode is disconnected at the side surface of the opening.
6. The display device according to claim 1, characterized in that the organic stack comprises a first stack, a second stack, and the charge generation layer disposed between the light-emitting material layer of the first stack and the light-emitting material layer of the second stack.
7. The display device according to claim 1, characterized in that the charge generation layer comprises an N-type charge generation layer and a P-type charge generation layer stacked on top of each other.
8. The first subpixel, the second subpixel, and the third subpixel are a red subpixel, a green subpixel, and a blue subpixel, respectively. The first stack comprises a first red light-emitting material layer, a first green light-emitting material layer, and a first blue light-emitting material layer, each of which is disposed in the red subpixel, the green subpixel, and the blue subpixel, respectively. The display device according to claim 6, characterized in that the second stack comprises a second red light-emitting material layer, a second green light-emitting material layer, and a second blue light-emitting material layer, each disposed in the red subpixel, the green subpixel, and the blue subpixel, respectively.
9. The first stack and the second stack each include a hole transport layer and an electron transport layer, The hole transport layer and the electron transport layer extend through the side and top surfaces of the at least one spacer to the first subpixel and the second subpixel, The display device according to claim 6, characterized in that the second electrode is not disposed on the side surface of the at least one spacer.
10. The display device according to claim 3, wherein the at least one spacer comprises a plurality of spacers spaced apart from each other around the red subpixel, and surrounds the red subpixel.
11. The display device according to claim 1, characterized in that each of the at least one spacers includes a plurality of subspacers that are separated from each other.
12. The display device according to claim 1, characterized in that the at least one spacer contains a material different from the bank layer.
13. The display device according to claim 1, characterized in that the at least one spacer contains the same material as the bank layer.
14. A substrate comprising a plurality of pixels, each of which comprises a first subpixel, a second subpixel, and a third subpixel, A first electrode is disposed in each of the first subpixel, the second subpixel, and the third subpixel, A bank layer is disposed on the first electrode and demarcates the first subpixel, the second subpixel, and the third subpixel, At least one spacer is arranged on the bank layer and between the first subpixel and the second subpixel, An organic stack comprising the first electrode and the at least one spacer, and including at least two stacks and a charge generation layer disposed between the stacks, The organic stack comprises a second electrode placed on the organic stack, The length of the current path between the first subpixel and the second subpixel is different from the distance between the first subpixel and the second subpixel. An opening is formed in the bank layer between the first subpixel and the second subpixel. The display device is characterized in that the opening has a closed curve shape surrounding the first subpixel.
15. The display device according to claim 9, characterized in that the hole transport layer, the electron transport layer, and the second electrode are arranged in an opening between the first subpixel and the second subpixel.
16. The display device according to claim 1, characterized in that the side wall of the opening is in the shape of an inverse taper.
17. The display device according to claim 15, characterized in that the hole transport layer and the electron transport layer are arranged on the side and bottom surfaces of the opening, and the second electrode is not arranged on the side wall of the opening.
18. The first stack comprises a hole injection layer, and the second stack comprises an electron injection layer. The display device according to claim 9, characterized in that the hole injection layer is disposed between the first electrode and the hole transport layer of the first stack, and the electron injection layer is disposed between the electron transport layer of the second stack and the second electrode.
19. The display device according to claim 9, characterized in that the second electrode is placed on the electron transport layer disposed between adjacent bank layers, the electron transport layer covers the upper surface of the bank layers, and the electron transport layer covers the upper surface of the spacer.
20. The display device according to claim 1, characterized in that the opening is spaced apart from each of the subspacers of the at least one spacer.
21. The display device according to claim 1, characterized in that the length of the current path between the first subpixel and the second subpixel is greater than the distance between the first subpixel and the second subpixel.
22. The display device according to claim 1, characterized in that the organic stack on the side surface of the at least one spacer is exposed through the second electrode on the upper surface of the at least one spacer and the second electrode on the bank layer.
23. The at least one spacer is positioned between the first subpixel and the second subpixel, or between the first subpixel and the third subpixel. The display device according to claim 1, characterized in that the at least one spacer is not disposed between the second subpixel and the third subpixel.
24. The display device according to claim 1, characterized in that the opening is spaced apart from at least one spacer.
Citation Information
Patent Citations
OLED (organic light-emitting diode) display device and manufacture method thereof
CN106449726A
Organic electroluminescent display panel, and manufacturing method of the same
JP2002208489A
Organic el device, manufacturing method of organic el device, and electronic apparatus
JP2005310535A
Organic electroluminescence element and manufacturing method thereof
JP2010055795A
Light emitting device and method for manufacturing the same
JP2012238587A
