Ceramic electronic component, and method for manufacturing a ceramic electronic component.

Abstract

To provide a ceramic electronic component capable of securing sufficient mechanical hardness even at low firing temperatures.SOLUTION: A ceramic electronic component includes alternately laminated dielectric layers 11 and inner electrode layers 12. The dielectric layer 11 contains yttria stabilized zirconia and the main component (Cax1Bax2Sr1-x1-x2)(TiyZr1-y)O3(0.6≤x1≤0.9, 0≤x2≤0.1, 0≤y≤0.1). The concentration of the yttria stabilized zirconia is between 0.5 and 5.0 mol% when the total amount of Ti and Zr is 100 mol%.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This invention relates to ceramic electronic components, dielectric materials, and methods for manufacturing ceramic electronic components. [Background technology]

[0002] Ceramic electronic components such as multilayer ceramic capacitors, in which internal electrode layers and dielectric layers are alternately stacked, are known. These ceramic electronic components are manufactured by stacking a metal conductive paste for forming the internal electrode layer and a dielectric green sheet for the dielectric layer, and then firing these stacks. During firing, the internal electrode layer, which is mainly composed of metal, shrinks faster than the dielectric layer, which may cause cracks to occur in these layers. Lowering the firing temperature is effective in preventing this. For example, Patent Document 1 discloses a dielectric material that can be fired at 1300°C or below. Furthermore, Patent Document 2 achieves lower firing temperatures by using a glass component with a low softening point temperature as the dielectric material. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 10-335169 [Patent Document 2] Japanese Patent Publication No. 2005-179105 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] However, to effectively suppress cracking in the dielectric layer, it is preferable to lower the firing temperature even further than the 1300°C disclosed in Patent Document 1. Furthermore, if a glass component is used as in Patent Document 2, the ceramic particles may aggregate during firing, potentially reducing the smoothness of the dielectric layer and decreasing its mechanical strength. Moreover, attempting to achieve both a lower firing temperature and improved mechanical strength may lead to a deterioration in the quality of the dielectric layer.

[0005] The present invention aims to provide a ceramic electronic component, a dielectric material, and a method for manufacturing a ceramic electronic component that can maintain the quality of the dielectric layer even at a low firing temperature for the dielectric layer. [Means for solving the problem]

[0006] The ceramic electronic component according to the present invention comprises alternatingly stacked dielectric layers and an internal electrode layer, wherein the dielectric layer comprises yttria-stabilized zirconia and the main component (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y It contains O3 (0.6 ≤ x1 ≤ 0.9, 0 ≤ x2 ≤ 0.1, 0 ≤ y ≤ 0.1) and is characterized in that the concentration of yttria-stabilized zirconia is 0.5 mol% or more and 5.0 mol% or less when the total amount of Ti and Zr is 100 mol%.

[0007] In the above-described ceramic electronic component, the dielectric layer further contains a manganese compound, and when the total amount of Ti and Zr is 100 mol%, the concentration of the manganese compound may be 0.2 mol% to 5.0 mol% when converted to MnO.

[0008] In the above-described ceramic electronic component, the dielectric layer further contains a silicon compound, and when the total amount of Ti and Zr is 100 mol%, the concentration of the silicon compound may be 0.5 mol% or more and 5.0 mol% or less when converted to SiO2.

[0009] In the above-described ceramic electronic component, the dielectric layer further contains a boron compound, and when the total amount of Ti and Zr is 100 mol%, the concentration of the boron compound may be 0.2 mol% or more and 1.0 mol% or less when converted to (B2O3) / 2.

[0010] In the above-described ceramic electronic component, the area ratio occupied by the yttria-stabilized zirconia particles in the cross-section of the dielectric layer may be 1% or more and 15% or less.

[0011] In the above ceramic electronic component, a plurality of voids are formed in the dielectric layer, and a total area occupied by the voids in the cross-section may be smaller than a total area occupied by the yttria-stabilized zirconia particles in the cross-section.

[0012] In the above ceramic electronic component, a major diameter of the voids may be not less than 0.15 μm and not more than 0.6 μm.

[0013] In the above ceramic electronic component, the voids may be in contact with the particles.

[0014] In the above ceramic electronic component, a thickness of the dielectric layer may be 2 μm or less.

[0015] In the above ceramic electronic component, a temperature coefficient based on a difference between a capacitance of the dielectric layer at 25°C and a capacitance thereof at 125°C may be not less than -300 ppm / °C and not more than 300 ppm / °C.

[0016] The dielectric material according to the present invention comprises yttria-stabilized zirconia and a main component of (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3 (where 0.6≦x1≦0.9, 0≦x2≦0.1, 0≦y≦0.1), and a concentration of the yttria-stabilized zirconia is not less than 0.5 mol% and not more than 5.0 mol% when a total amount of Ti and Zr is taken as 100 mol%.

[0017] The above dielectric material may further contain a manganese compound, and when the total amount of Ti and Zr is 100 mol%, a concentration of the manganese compound in terms of MnO may be not less than 0.2 mol% and not more than 5.0 mol%.

[0018] The above dielectric material may further contain a silicon compound, and when the total amount of Ti and Zr is 100 mol%, a concentration of the silicon compound in terms of SiO2 may be not less than 0.5 mol% and not more than 5.0 mol%.

[0019] The dielectric material may further contain a boron compound, and when the total amount of Ti and Zr is 100 mol%, the concentration of the boron compound may be between 0.2 mol% and 1.0 mol% when converted to (B2O3) / 2.

[0020] The present invention relates to a method for manufacturing ceramic electronic components, comprising the steps of: preparing a laminate in which a dielectric green sheet containing ceramic powder and a metal conductive paste for forming internal electrodes are alternately stacked; and firing the laminate, wherein the ceramic powder comprises yttria-stabilized zirconia and the main component (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y It contains O3 (0.6 ≤ x1 ≤ 0.9, 0 ≤ x2 ≤ 0.1, 0 ≤ y ≤ 0.1) and is characterized in that the concentration of yttria-stabilized zirconia is 0.5 mol% or more and 5.0 mol% or less when the total amount of Ti and Zr is 100 mol%.

[0021] In the above method for manufacturing ceramic electronic components, the ceramic powder has a concentration of 0.2 mol% or more and 1.0 mol% or less when the total amount of Ti and Zr is 100 mol%, and a specific surface area of ​​100 m². 2 / g or more 300m 2 It may contain boron nitride in amounts less than / g. [Effects of the Invention]

[0022] According to the present invention, the quality of the dielectric layer can be maintained even at a low firing temperature for the dielectric layer. [Brief explanation of the drawing]

[0023] [Figure 1] This is a partial cross-sectional perspective view of a multilayer ceramic capacitor according to the present invention. [Figure 2] This is a cross-sectional view along line AA in Figure 1. [Figure 3] This is a cross-sectional view along line BB in Figure 1. [Figure 4]This diagram illustrates a flow chart of the manufacturing process for multilayer ceramic capacitors. [Figure 5] (a) and (b) are diagrams illustrating the lamination process. [Figure 6] This diagram illustrates the lamination process. [Figure 7] This diagram illustrates the lamination process. [Figure 8] This image was obtained by observing the polished surface of a cross-section perpendicular to the stacking direction between the dielectric layer and the internal electrode layer of the multilayer ceramic capacitor according to Example 1 using SEM-EDS. [Modes for carrying out the invention]

[0024] The embodiments will be described below with reference to the drawings. (Embodiment) First, an overview of the multilayer ceramic capacitor will be described. Figure 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. Figure 2 is a cross-sectional view taken along line AA in Figure 1. Figure 3 is a cross-sectional view taken along line BB in Figure 1. As illustrated in Figures 1 to 3, the multilayer ceramic capacitor 100 comprises a multilayer chip 10 having a rectangular parallelepiped shape and external electrodes 20a and 20b provided on two opposing end faces of either of the multilayer chip 10. Of the four faces of the multilayer chip 10 other than the two end faces, the two faces other than the top and bottom faces in the stacking direction are referred to as side faces. The external electrodes 20a and 20b extend to the top, bottom, and two side faces of the multilayer chip 10 in the stacking direction. However, the external electrodes 20a and 20b are spaced apart from each other.

[0025] The multilayer chip 10 has a structure in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 containing a base metal material are alternately stacked. The edges of each internal electrode layer 12 are alternately exposed to the end face of the multilayer chip 10 where the external electrode 20a is provided and the end face where the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately conductive to the external electrode 20a and the external electrode 20b. Consequently, the multilayer ceramic capacitor 100 has a structure in which multiple dielectric layers 11 are stacked via internal electrode layers 12. Furthermore, in the laminate of dielectric layers 11 and internal electrode layers 12, the outermost layer in the stacking direction is an internal electrode layer 12, and the top and bottom surfaces of the laminate are covered by a cover layer 13. The cover layer 13 is mainly composed of a ceramic material. For example, the main components of the cover layer 13 are the same as those of the dielectric layer 11 and the ceramic material.

[0026] The thickness of the dielectric layer 11 is preferably 2 μm or less from the viewpoint of increasing the capacitance of the multilayer ceramic capacitor 100. Furthermore, the thickness of the internal electrode layer 12 is preferably 0.3 μm or more and 1.5 μm or less, and more preferably 0.5 μm or more and 1.0 μm or less. This suppresses the increase in cost caused by thickening the internal electrode layer 12, suppresses the occurrence of discontinuous regions in the internal electrode layer 12, and further enables stable firing of the internal electrode layer 12. The dimensions of the multilayer ceramic capacitor 100 are, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but are not limited to these dimensions.

[0027] As illustrated in Figure 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region in the multilayer ceramic capacitor 100 that generates capacitance. Therefore, this region is referred to as the capacitance region 14. In other words, the capacitance region 14 is the region where two adjacent internal electrode layers 12 connected to different external electrodes face each other.

[0028] The region where internal electrode layers 12 connected to external electrode 20a face each other without being connected to an internal electrode layer 12 connected to external electrode 20b is called the end margin 15. Similarly, the region where internal electrode layers 12 connected to external electrode 20b face each other without being connected to an internal electrode layer 12 connected to external electrode 20a is also called the end margin 15. In other words, the end margin 15 is the region where internal electrode layers 12 connected to the same external electrode face each other without being connected to an internal electrode layer 12 connected to a different external electrode. The end margin 15 is a region where no capacitance is generated.

[0029] As illustrated in Figure 3, in the stacked chip 10, the region extending from the two sides of the stacked chip 10 to the internal electrode layer 12 is referred to as the side margin 16. That is, the side margin 16 is a region provided in the stacked structure that covers the ends of the multiple internal electrode layers 12 that extend to the two sides.

[0030] The cover layer 13 and side margin 16 protect the outer periphery of the capacitance region 14. Therefore, in the following description, the cover layer 13 and side margin 16 will be collectively referred to as the ceramic protective portion 50.

[0031] The internal electrode layer 12 mainly consists of base metals such as Ni (nickel) and Cu (copper). Alternatively, an alloy containing Pt (platinum), Pd (palladium), Ag (silver), Au (gold), Sn (tin), etc., may be used as the internal electrode layer 12.

[0032] The dielectric layer 11 mainly consists of a perovskite compound and contains Y-stabilized zirconia (ZrO2). Note that the Y-stabilized zirconia is yttria-stabilized zirconia, sometimes referred to as "YSZ". In this embodiment, the perovskite compound is (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3 is used. Y-stabilized zirconia has very high strength on its own. Therefore, even if the dielectric layer 11 and the internal electrode layer 12 are fired at a low temperature, the mechanical strength of the dielectric layer 11 can be increased. Note that this perovskite structure is an ABO that deviates from the stoichiometric composition. 3-α Includes.

[0033] Also, (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y If the concentration of Y-stabilized zirconia exceeds 5.0 mol% when O3 is set to 100 mol%, the densification of the dielectric layer 11 during firing will be hindered by the Y-stabilized zirconia. Therefore, it is preferable that the concentration of Y-stabilized zirconia in the dielectric layer 11 be 5.0 mol% or less when the total amount of Ti and Zr is set to 100 mol%.

[0034] On the other hand, if the concentration of Y-stabilized zirconia is less than 0.5 mol%, the mechanical strength of the dielectric layer 11 cannot be sufficiently increased. Therefore, it is preferable to set the concentration of Y-stabilized zirconia to 0.5 mol% or higher.

[0035] In this embodiment, the main component is (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-yThe compositional ratios of O3 are set to 0.6 ≤ x1 ≤ 0.9, 0 ≤ x2 ≤ 0.1, and 0 ≤ y ≤ 0.1, and the concentration of Y-stabilized zirconia is set to 0.5 mol% or more and 5.0 mol% or less when the total amount of Ti and Zr in the dielectric layer 11 is 100 mol%. This makes it possible to maintain the quality of the dielectric layer 11, such as its mechanical strength, even when the dielectric layer 11 is fired at a low temperature.

[0036] The dielectric layer of a multilayer ceramic capacitor is called Class 1 if its material is a paraelectric, and Class 2 if it is a ferroelectric. The dielectric layer 11 according to this embodiment is a dielectric layer belonging to Class 1.

[0037] The Class 1 dielectric layer 11 may exhibit changes in temperature characteristics as its film thickness decreases. This is thought to be due to the difference in thermal expansion coefficients between the internal electrode layer 12 and the dielectric layer 11. Y-stabilized zirconia also helps to suppress changes in temperature characteristics caused by distortion of the dielectric layer 11 resulting from such differences in thermal expansion coefficients. When Y-stabilized zirconia is not added to the dielectric layer 11, the main component is (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y ) In O3, it is necessary to adjust the composition ratios x1, x2, and y to suppress changes in temperature characteristics, but in this embodiment, changes in the temperature characteristics of the dielectric layer 11 can be suppressed simply by adjusting the amount of Y-stabilized zirconium added.

[0038] Furthermore, the dielectric layer 11 may further contain manganese compounds, silicon compounds, and boron compounds. These compounds work together to lower the sintering temperature of the dielectric layer 11. Examples of manganese compounds include MnO and MnCO3, and examples of silicon compounds include SiO2. Examples of boron compounds include boron oxide (B2O3), boron nitride (BN), and boric acid (H3BO3 or B(OH)3).

[0039] In particular, it is preferable that the dielectric layer 11 contains manganese compounds at concentrations of 0.2 mol% to 5.0 mol% when converted to MnO, silicon compounds at concentrations of 0.5 mol% to 5.0 mol% when converted to SiO2, and boron compounds at concentrations of 0.2 mol% to 1.0 mol% when converted to (B2O3) / 2. Note that all concentrations are based on the total amount of Ti and Zr in the dielectric layer 11 being 100 mol%. By adopting this concentration range, it becomes easy to fire the dielectric layer 11 at low temperatures of 1220°C or below.

[0040] Next, the manufacturing method of the multilayer ceramic capacitor 100 will be described. Figure 4 is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor 100.

[0041] (Process for preparing raw material powder) First, the starting materials for forming the dielectric layer 11 are prepared. Here, powders of SrCO3, CaCO3, TiO2, BaCO3, and ZrO2 are prepared as starting materials. Next, these powders are weighed and dispersed in ion-exchanged water and a dispersant using a ball mill to obtain the dielectric material.

[0042] Next, the dielectric material is dried and then dry-ground, and further calcined at 1100°C to obtain (Ca) perovskite powder, which is the main component of the dielectric layer 11. x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3 powder is obtained. In this embodiment, 0.6≦x1≦0.9, 0≦x2≦0.1, and 0≦y≦0.1 are assumed.

[0043] Next, an inverse pattern material is prepared to form the end margin 15 and side margin 16. The inverse pattern material contains the main component ceramic of the end margin 15 and side margin 16. As the main component ceramic, (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y Prepare O3 powder.

[0044] Next, a cover material is prepared to form the cover layer 13. The cover material contains the main component ceramic of the cover layer 13. As the main component ceramic, (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y Prepare O3 powder.

[0045] (Lamination process) Next, a ceramic powder is prepared by adding manganese compounds, silicon compounds, boron compounds, and Y-stabilized zirconia to the perovskite powder obtained in the raw material powder preparation process. This powder is then subjected to a ball mill treatment with an organic solvent, binder, and dispersant to obtain a slurry.

[0046] The concentration of yttria (Y2O3) in Y-stabilized zirconia is set to 3 mol% to 8 mol%. Furthermore, when the total amount of ZrO2 and Y2O3 is 100 mol%, a solid solution of ZrO2 and Y2O3 containing 97 mol% ZrO2 and 3 mol% Y2O3 will be referred to as 3Y-stabilized zirconia below.

[0047] Similarly, when the total amount of ZrO2 and Y2O3 is 100 mol%, a solid solution of ZrO2 and Y2O3 in which ZrO2 is 95 mol% and Y2O3 is 5 mol% will be referred to as 5Y-stabilized zirconia below.

[0048] Furthermore, when the total amount of ZrO2 and Y2O3 is assumed to be 100 mol%, a solid solution of ZrO2 and Y2O3 in which ZrO2 is 92 mol% and Y2O3 is 8 mol% will be referred to as 8Y-stabilized zirconia below. In addition, although 3Y-stabilized zirconia, 5Y-stabilized zirconia, and 8Y-stabilized zirconia are used below, stabilized zirconia within the range of 3Y to 8Y may also be used.

[0049] Furthermore, the manganese compound is, for example, MnCO3, and is added to the ceramic powder at a concentration of 0.2 mol% to 5.0 mol% when converted to MnO. On the other hand, the silicon compound is, for example, SiO2, and is added to the ceramic powder at a concentration of 0.5 mol% to 5.0 mol%. In addition, the boron compound is, for example, boron nitride, and is added to the ceramic powder at a concentration of 0.2 mol% to 1.0 mol% when converted to (B2O3) / 2.

[0050] Furthermore, since boron nitride does not easily dissolve in organic solvents, it can suppress gelation of the slurry. In particular, when the specific surface area is 100 m² 2 / g or more 300m 2 Boron nitride at concentrations of less than / g can effectively suppress gelation of the slurry. Alternatively, B2O3 or boric acid may be used instead of boron nitride.

[0051] Subsequently, a dielectric green sheet with a thickness of approximately 3 μm is obtained by tape-casting the slurry onto a substrate such as PET (polyethylene terephthalate) film.

[0052] Next, a metal conductive paste for the internal electrode layer containing an organic binder is printed onto the surface of the dielectric green sheet by screen printing, gravure printing, or the like. In addition to nickel, ceramic particles are added to the metal conductive paste as a co-material. The main component of the ceramic particles added as a co-material is not particularly limited, but it is preferable that it is the same as the main ceramic component of the dielectric layer 11.

[0053] Next, as illustrated in Figure 5(a), a first pattern 52 for the internal electrode layer is arranged on the surface of the dielectric green sheet 51 by screen printing, gravure printing, or the like, by printing a metal conductive paste containing an organic binder for forming internal electrodes. In addition to nickel, ceramic particles are added to the metal conductive paste as a co-material. The main component of the ceramic particles added as a co-material is not particularly limited, but it is preferable that it is the same as the main ceramic component of the dielectric layer 11.

[0054] Next, an ethylcellulose-based binder and an organic solvent such as terpineol-based solvent are added to the inverse pattern material obtained in the raw material powder preparation process, and the mixture is kneaded in a roll mill to obtain an inverse pattern paste for the inverse pattern layer. As illustrated in Figure 5(a), the second pattern 53 is placed on the dielectric green sheet 51 by printing the inverse pattern paste in the peripheral area where the first pattern 52 is not printed, thereby filling the step between it and the first pattern 52.

[0055] Subsequently, as illustrated in Figure 5(b), dielectric green sheets 51, the first pattern 52, and the second pattern 53 are stacked so that the internal electrode layer 12 and the dielectric layer 11 are staggered, and the edges of the internal electrode layer 12 are alternately exposed on both ends of the dielectric layer 11 in the longitudinal direction, alternately leading to a pair of external electrodes 20a and 20b with different polarities. For example, the number of stacked dielectric green sheets 51 is 100 to 500.

[0056] Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the cover material obtained in the raw material powder preparation process and wet-mixed. Using the resulting slurry, a strip-shaped cover sheet 54, for example, with a thickness of 10 μm or less, is coated onto the substrate using a die coater or doctor blade method and dried. As illustrated in Figure 6, a predetermined number of cover sheets 54 (for example, 2 to 10 layers) are laminated above and below the laminated dielectric green sheet 51 and heat-pressed, then cut to a predetermined chip size (for example, 1.0 mm × 0.5 mm), and then a metal conductive paste, which will become the external electrodes 20a and 20b, is applied to both sides of the cut laminate using a dip method or the like and dried. This yields a ceramic laminate. Alternatively, the predetermined number of cover sheets 54 may be laminated and pressed together before being attached to the above and below the laminated dielectric green sheet 51.

[0057] In the methods shown in Figures 5(a) to 6, the region where the dielectric green sheet 51 corresponds to the first pattern 52 and the first pattern 52 are stacked is (Ca x1 Ba x2 Sr 1-x1-x2 )(Tiy Zr 1-y This corresponds to a laminated portion in which sheets with O3 particles as the main component ceramic and patterns of metal conductive paste are alternately stacked. The region in which the portion of the dielectric green sheet 51 that extends beyond the first pattern 52 and the second pattern 53 are stacked corresponds to a side margin region located on the side of the laminated portion.

[0058] The side margin region may be attached to or applied to the side surface of the laminated portion. Specifically, as illustrated in Figure 7, a laminated portion is obtained by alternately laminating a dielectric green sheet 51 and a first pattern 52 having the same width as the dielectric green sheet 51. Next, the side margin region may be formed on the side surface of the laminated portion with a second pattern 53 obtained by attaching a sheet formed with reverse pattern paste or by applying reverse pattern paste.

[0059] (Firing process) The ceramic laminate thus obtained is debindered in an N2 atmosphere, and then Ni paste, which will serve as the base for the external electrodes 20a and 20b, is applied by the dip method, and the oxygen partial pressure is 10 -5 ~10 -8 The capacitor is fired in an ATM reducing atmosphere at a temperature of 1220°C or lower for 10 minutes to 2 hours. In this way, a multilayer ceramic capacitor 100 is obtained.

[0060] (Re-oxidation process) Subsequently, a re-oxidation treatment may be performed in an N2 gas atmosphere at 600°C to 1000°C.

[0061] (Plating process) Subsequently, the external electrodes 20a and 20b may be coated with metals such as Cu, Ni, or Sn by plating.

[0062] According to the above-described embodiment, the dielectric layer 11 is composed of Y-stabilized zirconia and the main component (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-yThe material contains O3 (0.6 ≤ x1 ≤ 0.9, 0 ≤ x2 ≤ 0.1, 0 ≤ y ≤ 0.1), and the concentration of Y-stabilized zirconia is 0.5 mol% or more and 5.0 mol% or less when the total amount of Ti and Zr in the dielectric layer 11 is 100 mol%.

[0063] As a result, even at low temperatures of 1220°C or below during the firing process, the mechanical strength of the dielectric layer 11 can be increased by the mechanically robust Y-stabilized zirconia.

[0064] In the embodiments described above, multilayer ceramic capacitors were explained as an example of ceramic electronic components, but the invention is not limited to them. For example, other electronic components such as varistors and thermistors may be used. [Examples]

[0065] Next, we will describe the examples and comparative examples. Table 1 shows the conditions for each of the examples and comparative examples.

[0066] [Table 1] (Example 1) SrCO3, CaCO3, TiO2, and ZrO2 powders were weighed and dispersed in deionized water and a dispersant using a ball mill to obtain a dielectric material. Next, the dielectric material was dried and then dry-ground, and further calcined at 1100°C to obtain (Ca) perovskite powder, which is the main component of the dielectric layer 11. 0.7 Sr 0.3 )(Ti 0.03 Zr 0.97 )O3 powder was obtained.

[0067] To the perovskite powder, 1 mol% of MnCO3 (calculated as MnO), 1 mol% of SiO2 (calculated as a silicon compound), and 0.3 mol% of boron nitride (calculated as (B2O3) / 2) were added. Furthermore, 2 mol% of 3Y-stabilized zirconia was added to the perovskite powder. These concentrations are based on a total amount of Ti and Zr in the dielectric layer 11 of the finished product being 100 mol%. The same applies to each example and comparative example described later.

[0068] Furthermore, the thickness of the dielectric layer 11 was set to 2 μm, and the number of layers of the internal electrode layer 12 and the dielectric layer 11 was set to 100.

[0069] (Example 2) Perovskite powder was treated with 0.2 mol% of MnCO3 (calculated as MnO) as a manganese compound, 2 mol% of SiO2 (calculated as a silicon compound), and 0.2 mol% of boron nitride (calculated as (B2O3) / 2) as a boron compound. All other treatments were the same as in Example 1.

[0070] (Example 3) Perovskite powder was treated with 1.5 mol% of MnCO3 (calculated as MnO) as a manganese compound, 1 mol% of SiO2 (calculated as a silicon compound), and 0.3 mol% of boron nitride (calculated as (B2O3) / 2) as a boron compound. All other treatments were the same as in Example 1.

[0071] (Example 4) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x1 in O3 was set to 0.6.

[0072] Furthermore, to this perovskite powder, MnCO3 was added at a concentration of 1 mol% (converted to MnO) as a manganese compound, SiO2 at a concentration of 3 mol% (converted to MnO) as a silicon compound, and boron nitride at a concentration of 0.3 mol% (converted to (B2O3) / 2) as a boron compound. All other aspects were the same as in Example 1.

[0073] (Example 5) As a material for the perovskite powder, (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3, the value of x1 was set to 0.9.

[0074] To this perovskite powder, MnCO3 as a manganese compound was added at a concentration of 2 mol% in terms of MnO, SiO2 as a silicon compound was added at a concentration of 0.5 mol%, and boron nitride as a boron compound was added at a concentration of 0.5 mol% in terms of (B2O3) / 2. Further, 3Y-stabilized zirconia was added to the perovskite powder at a concentration of 2.5 mol%. Except for the above, this example is the same as Example 1.

[0075] (Example 6) As a material for the perovskite powder, (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3, the value of y was set to 0.

[0076] To this perovskite powder, MnCO3 as a manganese compound was added at a concentration of 3 mol% in terms of MnO, SiO2 as a silicon compound was added at a concentration of 5 mol%, and boron nitride as a boron compound was added at a concentration of 1 mol% in terms of (B2O3) / 2. Further, 3Y-stabilized zirconia was added to the perovskite powder at a concentration of 1.5 mol%. Except for the above, this example is the same as Example 1.

[0077] (Example 7) As a material for the perovskite powder, (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3, the value of y was set to 0.05.

[0078] To this perovskite powder, MnCO3 as a manganese compound was added at a concentration of 5 mol% in terms of MnO, SiO2 as a silicon compound was added at a concentration of 1 mol%, and boron nitride as a boron compound was added at a concentration of 0.2 mol% in terms of (B2O3) / 2. Except for the above, this example is the same as Example 1.

[0079] (Example 8) (Ca which is a material of the perovskite powder x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3, the value of x1 was set to 0.8, and the value of y was set to 0.07.

[0080] To this perovskite powder, MnCO3 as a manganese compound was added at a concentration of 0.2 mol% in terms of MnO, SiO2 as a silicon compound was added at a concentration of 1 mol%, and boron nitride as a boron compound was added at a concentration of 0.7 mol% in terms of (B2O3) / 2. Further, 3Y stabilized zirconia was added to the perovskite powder at a concentration of 1.5 mol%. Except for the above, this example is the same as Example 1.

[0081] (Example 9) (Ca which is a material of the perovskite powder x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y )O3, the value of x1 was set to 0.8, and the value of y was set to 0.1.

[0082] To this perovskite powder, MnCO3 as a manganese compound was added at a concentration of 2 mol% in terms of MnO, SiO2 as a silicon compound was added at a concentration of 1 mol%, and boron nitride as a boron compound was added at a concentration of 0.4 mol% in terms of (B2O3) / 2. Further, 3Y stabilized zirconia was added to the perovskite powder at a concentration of 0.4 mol%. Except for the above, this example is the same as Example 1.

[0083] (Example 10) Perovskite powder was mixed with 0.1 mol% of MnCO3 (calculated as MnO) as a manganese compound, 0.5 mol% of SiO2 (calculated as a silicon compound), and 0.4 mol% of boron nitride (calculated as (B2O3) / 2) as a boron compound. Additionally, 1 mol% of 3Y-stabilized zirconia was added to the perovskite powder. The procedure was otherwise the same as in Example 1.

[0084] (Example 11) To the perovskite powder, 7 mol% of MnCO3 (converted to MnO) was added as a manganese compound, and 2 mol% of SiO2 was added as a silicon compound. Furthermore, 3 mol% of 3Y-stabilized zirconia was added to the perovskite powder. The procedure was otherwise the same as in Example 1.

[0085] (Example 12) Perovskite powder was treated with SiO2 as a silicon compound at a concentration of 0.4 mol%. Otherwise, the procedure was the same as in Example 1.

[0086] (Example 13) Perovskite powder was to which 5.2 mol% of SiO2 was added as a silicon compound and 0.2 mol% of boron nitride was added as a boron compound (calculated as (B2O3) / 2). In addition, 3.5 mol% of 3Y-stabilized zirconia was added to the perovskite powder. The rest of the procedure was the same as in Example 1.

[0087] (Example 14) Boron nitride was added to the perovskite powder at a concentration of 0.1 mol% (calculated as (B2O3) / 2) as a boron compound. Additionally, 3Y-stabilized zirconia was added to the perovskite powder at a concentration of 1.5 mol%. The procedure was otherwise the same as in Example 1.

[0088] (Example 15) Perovskite powder was mixed with 1.5 mol% of MnCO3 (calculated as MnO) as a manganese compound, 1.5 mol% of SiO2 (calculated as a silicon compound), and 1.2 mol% of boron nitride (calculated as (B2O3) / 2) as a boron compound. Additionally, 1.5 mol% of 3Y-stabilized zirconia was added to the perovskite powder. The procedure was otherwise the same as in Example 1.

[0089] (Example 16) Perovskite powder was mixed with 3Y-stabilized zirconia at a concentration of 5 mol%. Otherwise, the procedure was the same as in Example 1.

[0090] (Example 17) Boron nitride was added to the perovskite powder at a concentration of 0.4 mol% (calculated as (B2O3) / 2) as a boron compound. In addition, 5Y-stabilized zirconia was added to the perovskite powder at a concentration of 1 mol%. The rest of the procedure was the same as in Example 1.

[0091] (Example 18) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of y at O3 was set to 0.04.

[0092] To this perovskite powder, MnCO3 was added as a manganese compound at a concentration of 1.5 mol% (calculated as MnO). Furthermore, 5Y-stabilized zirconia was added to the perovskite powder at a concentration of 3 mol%. The rest of the procedure was the same as in Example 1.

[0093] (Example 19) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of y at O3 was set to 0.04.

[0094] To this perovskite powder, MnCO3 was added as a manganese compound at a concentration of 2 mol% (calculated as MnO). Furthermore, 8Y-stabilized zirconia was added to the perovskite powder at a concentration of 3 mol%. The rest of the procedure was the same as in Example 1.

[0095] (Example 20) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of y at O3 was set to 0.04.

[0096] Perovskite powder was to which SiO2 was added as a silicon compound at a concentration of 2 mol%, and boron nitride was added as a boron compound at a concentration of 0.5 mol% (calculated as (B2O3) / 2). In addition, 8Y-stabilized zirconia was added to the perovskite powder at a concentration of 3 mol%. The rest of the procedure was the same as in Example 1.

[0097] (Example 21) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x2 in O3 was set to 0.01. Otherwise, it is the same as in Example 1.

[0098] (Example 22) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x1 in O3 was set to 0.65, and the value of x2 was set to 0.1. All other aspects were the same as in Example 1.

[0099] (Example 23) The thickness of the dielectric layer 11 was set to 0.7 μm. Other than this, the procedure was the same as in Example 1.

[0100] (Example 24) (Cax1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x1 in O3 was set to 0.65. The thickness of the dielectric layer 11 was set to 0.7 μm. Other than this, the procedure was the same as in Example 1.

[0101] (Comparative Example 1) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x1 in O3 was set to 0.5. In addition, boron nitride was added to this perovskite powder as a boron compound at a concentration of 0.2 mol% when converted to (B2O3) / 2. The rest of the procedure was the same as in Example 1.

[0102] (Comparative Example 2) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x1 in O3 was set to 0.95. Furthermore, 3Y-stabilized zirconia was added to the perovskite powder at a concentration of 3 mol%. The rest of the procedure was the same as in Example 1.

[0103] (Comparative Example 3) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y The value of x1 in O3 was set to 0.8 and the value of y to 0.12. Furthermore, 1.5 mol% of MnCO3 (converted to MnO) was added to this perovskite powder as a manganese compound, and 0.4 mol% of boron nitride (converted to (B2O3) / 2) was added as a boron compound. In addition, 1.5 mol% of 3Y-stabilized zirconia was added to the perovskite powder. The rest of the procedure was the same as in Example 1.

[0104] (Comparative Example 4) Perovskite powder was mixed with 3Y-stabilized zirconia at a concentration of 0.3 mol%. Otherwise, the procedure was the same as in Example 1.

[0105] (Comparative Example 5) Perovskite powder was mixed with 1.5 mol% of MnCO3 (calculated as MnO) as a manganese compound, 2 mol% of SiO2 (calculated as a silicon compound), and 0.5 mol% of boron nitride (calculated as (B2O3) / 2) as a boron compound. Additionally, 7 mol% of 3Y-stabilized zirconia was added to the perovskite powder. The procedure was otherwise the same as in Example 1.

[0106] (Comparative Example 6) (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y In O3, the value of x1 was set to 0.45, the value of x2 to 0.15, and the value of y to 0.05. All other aspects were the same as in Example 1.

[0107] Table 2 shows the results of the quality investigation of the dielectric layer 11 for each of Examples 1 to 19 and Comparative Examples 1 to 11. In this example, the relative permittivity (ε) is used as the quality of the dielectric layer 11. r The following parameters were used: ), Q-value, temperature coefficient (τC), accelerated lifetime, and three-point bending strength. Furthermore, Table 2 also shows the firing temperature of the dielectric layer 11 and the proportion of the stabilized zirconia phase contained in the dielectric layer 11.

[0108] [Table 2] Here, capacitance and Q value were measured using an LCR meter under the setting conditions of 1kHz-1Vrms. Relative permittivity ε r This was calculated from the capacitance C based on the following formula.

[0109] ·ε r = (C × thickness of dielectric layer 11) / (number of dielectric layers 11 × ε0 × effective crossing area) However, ε0 is the permittivity of vacuum. The temperature coefficient (τC) is the change in capacitance (ppm) when the temperature changes by 1°C. Here, the temperature coefficient was determined from the difference in capacitance at 25°C and 125°C. The capacitance was measured in a constant temperature bath.

[0110] Accelerated life is the average time it takes for the insulation resistance of a multilayer ceramic capacitor 100 to decrease by two orders of magnitude from its initial value after being heated to 200°C in a 50V / μm electric field.

[0111] The three-point bending strength is the average value obtained when three-point bending tests were performed on multiple multilayer ceramic capacitors 100.

[0112] Here, based on market requirements, a dielectric constant of 29 or higher, a Q value of 2000 or higher, a temperature coefficient within ±300 ppm / °C, an accelerated life of 500 hours or higher, and a three-point bending test of 250 MPa or higher were considered acceptable. Furthermore, for firing temperatures, materials that could be densified and fired at 1220°C or lower were considered acceptable.

[0113] As shown in Table 2, in Examples 1 to 24, the quality of the dielectric layer 11 is within the acceptable range in all cases.

[0114] On the other hand, Comparative Example 1 has a temperature coefficient of -347 ppm / °C, which is outside the acceptable range (±300 ppm / °C). This is because in Comparative Example 1, the material of the perovskite powder is (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y This is because the value of the composition ratio x1 in O3 is less than 0.6.

[0115] Furthermore, Comparative Example 2 has a relative permittivity of 28, which falls outside the acceptable range (29 or higher). This is because in Comparative Example 2, the perovskite powder material (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-yThis is because the value of the composition ratio x1 in O3 exceeds 0.9.

[0116] Comparative Example 3 has a temperature coefficient of -375 ppm / °C, which is outside the acceptable range (±300 ppm / °C). This is because in Comparative Example 3, the material of the perovskite powder is (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y This is because the value of the composition ratio y in O3 exceeds 0.1.

[0117] Comparative Example 4 has a three-point bending strength of 210 MPa, which falls outside the acceptable range (250 MPa or higher). This is because, in Comparative Example 4, the amount of 3Y-stabilized zirconia added to the perovskite powder was less than 0.5 mol%, and therefore the strength improvement due to the stabilizing zirconia was not achieved.

[0118] Comparative Example 5 did not densify at firing temperatures below 1220°C. This is because, in Comparative Example 10, the amount of 3Y-stabilized zirconia added to the perovskite powder exceeded 5.0 mol%.

[0119] Comparative Example 6 has a three-point bending strength of 180 MPa, which is outside the acceptable range (250 MPa or higher). This is because, in Comparative Example 11, the material of the perovskite powder is (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr 1-y This is because, in O3, the value of composition ratio x1 is less than 0.6, and furthermore, the value of composition ratio x2 is greater than 0.1.

[0120] From the above results, in order to maintain the quality of the dielectric layer 11 even when firing the dielectric layer 11 at a temperature of 1220°C or lower, the concentration of Y-stabilized zirconia should be in the range of 0.5 mol% to 5.0 mol%, and (Ca x1 Ba x2 Sr 1-x1-x2 )(Ti y Zr1-y It was confirmed that the compositional ratios of x1, x2, and y in O3 are preferably 0.6 ≤ x1 ≤ 0.9, 0 ≤ x2 ≤ 0.1, and 0 ≤ y ≤ 0.1.

[0121] Furthermore, the thickness of the dielectric layer 11 in Examples 1 to 24 is 0.7 μm to 2 μm in all cases, which is 2 μm or less, advantageous for increasing the capacitance of the multilayer ceramic capacitor 100. In Examples 1 to 24, such a thin dielectric layer 11 can be fired at a temperature of 1220°C or less. Moreover, no structural defects such as delamination or cracks occur in the dielectric layer 11, and a high-quality, high-strength multilayer ceramic capacitor 100 can be provided that satisfies the EIA (Electronic Industries Alliance) standards of C0K, C0J, C0H, and C0G with a temperature characteristic of ±250 ppm / °C, and the EIA standards of R2H and S2K with a temperature characteristic of ±300 ppm / °C.

[0122] Figure 8 shows an image obtained by observing the polished surface of a cross-section perpendicular to the stacking direction between the dielectric layer 11 and the internal electrode layer 12 of the multilayer ceramic capacitor 100 according to Example 1 using SEM-BSE (Scanning Electron Microscope-Backscattered Electron). The SEM magnification was 5000x. In Figure 8, 11p represents Y-stabilized zirconia particles and 11s represents voids. As shown in Figure 8, the presence of Y-stabilized zirconia 11p in contact with the voids 11s can suppress the propagation of cracks originating from the voids.

[0123] The composition of the dielectric layer 11 can be identified and quantified not only by chemical analysis using ICP (Inductively Coupled Plasma) emission spectroscopy, but also by analyzing a cross-section of the dielectric layer 11, as shown in Figure 8, using SEM-EDS (Scanning Electron Microscope-Energy Dispersive X-ray Spectroscopy). When performing the analysis, it is preferable to ensure a sufficiently large area is available to avoid the influence of segregated compositions, and to improve the reliability of the quantitative analysis values ​​by simultaneously analyzing and comparing standard samples that serve as calibration curves, if necessary.

[0124] Furthermore, as mentioned above, when the total amount of Ti and Zr in the dielectric layer 11 is set to 100 mol%, and the concentration of Y-stabilized zirconia is set to 0.5 mol% or more and 5.0 mol% or less, it was found that the area ratio occupied by Y-stabilized zirconia particles 11p in the cross-section of the dielectric layer 11 is 1% or more and 15% or less. Note that the area ratio is calculated from an area of ​​10 μm from any position in the SEM cross-section of the dielectric layer 11. 2 A region is cut out, and the ratio of the total area of ​​all particles 11p contained in that region to the area of ​​that region is defined.

[0125] Furthermore, multiple voids 11s are formed in the dielectric layer 11, and these voids 11s improve the toughness of the dielectric layer 11. However, if the total area of ​​the voids 11s is too large, the mechanical strength of the dielectric layer 11, such as the three-point bending strength, will decrease. Therefore, it is preferable to prevent a decrease in the mechanical strength of the dielectric layer 11 caused by the voids 11s by making the total area occupied by the voids 11s in the cross-section of the dielectric layer 11 smaller than the total area occupied by the particles 11p in the cross-section of the dielectric layer 11.

[0126] The total area of ​​the void 11s is calculated from an area of ​​10 μm² at any point in the SEM cross-section of the dielectric layer 11. 2 The region is cut out and defined as the sum of the areas of all voids 11s contained within that region. Similarly, the total area of ​​particles 11p is defined as the sum of the areas of all particles 11p contained within the same region used to calculate the total area of ​​voids 11s.

[0127] Furthermore, if a single void 11s is too large, the mechanical strength of the dielectric layer 11 will decrease. Therefore, it is preferable to set the major axis of the void 11s in cross-section to 0.1 μm or more and 0.6 μm or less. The reason for setting the lower limit of the major axis to 0.1 μm is that it is difficult to improve the toughness of the dielectric layer 11 with voids 11s smaller than this. The reason for setting the upper limit of the major axis to 0.6 μm is that if it is larger than this, the mechanical strength of the dielectric layer 11 will decrease due to the voids 11s.

[0128] More preferably, the major axis of the void 11s in cross-sectional view is 0.15 μm or more and 0.3 μm or less. This makes it possible to maintain a high level of mechanical quality of the dielectric layer 11.

[0129] Furthermore, it is preferable that the Y-stabilized zirconia particles 11p are in contact with the voids 11s in the cross-section of the dielectric layer 11. This allows the mechanically strong particles 11p to suppress the occurrence of cracks in the dielectric layer 11 that originate from the voids 11s.

[0130] Although embodiments of the present invention have been described in detail above, the present invention is not limited to these specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims. [Explanation of Symbols]

[0131] 10 stacked chips 11 Dielectric layer 12 Internal electrode layer 13. Cover layer 14 Capacity area 15 End margin 16 Side margins 20a,20b external electrode 50 Ceramic protective section 100 Multilayer Ceramic Capacitors

Claims

1. A laminate comprising multiple layers of internal electrode layers and dielectric layers stacked alternately, At least one of the dielectric layers located inside the stacking direction of the laminate, relative to the two outermost layers of the internal electrode layers, comprises yttria-stabilized zirconia and a main component (Ca ｘ１ Ba ｘ２ Sr １－ｘ１－ｘ２ ) (Ti ｙ Zr １－ｙ ) O ３ (0.6 ≤ x) １ ≤ 0.9, 0 ≤ x ２ A ceramic electronic component characterized by containing (≤0.1, 0 ≤ y ≤ 0.1) and having a concentration of yttria-stabilized zirconia of 0.5 mol% or more and 5.0 mol% or less when the total amount of Ti and Zr is 100 mol%.

2. At least one of the dielectric layers located inside the stacking direction of the two outermost layers of the internal electrode layers further comprises a manganese compound, The ceramic electronic component according to claim 1, characterized in that, when the total amount of Ti and Zr is 100 mol%, the concentration of the manganese compound is 0.2 mol% or more and 5.0 mol% or less when converted to MnO.

3. At least one of the dielectric layers located inside the stacking direction of the two outermost layers of the internal electrode layers further comprises a silicon compound, When the total amount of Ti and Zr is 100 mol%, the concentration of the silicon compound is SiO ２ 2, which is in a range from 0.5 mol% to 5.0 mol% in terms of SiO2, the ceramic electronic component according to claim 1 or claim 2.

4. At least one of the dielectric layers located inside the stacking direction of the two outermost layers of the internal electrode layers further comprises a boron compound, When the total amount of Ti and Zr is 100 mol%, the concentration of the boron compound is (B ２ O ３ The ceramic electronic component according to claim 1 or 2, characterized in that the concentration is 0.2 mol% or more and 1.0 mol% or less when converted to ) / 2.

5. The ceramic electronic component according to claim 1 or 2, characterized in that the area ratio occupied by the yttria-stabilized zirconia particles in the cross-section of at least one of the dielectric layers located inward in the stacking direction from the two outermost layers of the internal electrode layers is 1% or more and 15% or less.

6. The ceramic electronic component according to claim 5, wherein a plurality of voids are formed in at least one of the dielectric layers that is inward in the stacking direction from the two outermost layers of the internal electrode layers, and the total area occupied by the voids in the cross-section is smaller than the total area occupied by the yttria-stabilized zirconia particles in the cross-section.

7. The ceramic electronic component according to claim 6, characterized in that the major axis of the void is 0.1 μm or more and 0.6 μm or less.

8. The ceramic electronic component according to claim 6, characterized in that the void and the particles are in contact.

9. The ceramic electronic component according to claim 1 or 2, characterized in that the thickness of at least one of the dielectric layers located inside the stacking direction of the two outermost layers of internal electrode layers is 2 μm or less.

10. The ceramic electronic component according to claim 1 or 2, wherein the temperature coefficient due to the difference between the capacitance at 25°C and the capacitance at 125°C of at least one of the dielectric layers located inside the two outermost layers of the internal electrode layers in the stacking direction is -300 ppm / °C or more and 300 ppm / °C or less.

11. A process for creating a laminate in which multiple dielectric green sheets containing ceramic powder and metal conductive paste for forming internal electrodes are alternately stacked, The process includes firing the laminated body, The ceramic powder of the dielectric green sheet located inside the stacking direction of the laminate, beyond the two outermost layers of the metal conductive paste in the stacking direction, comprises yttria-stabilized zirconia and the main component (Ca ｘ１ Ba ｘ２ Sr １－ｘ１－ｘ２ ) (Ti ｙ Zr １－ｙ ) O ３ (0.6 ≤ x) １ ≤ 0.9, 0 ≤ x ２ A method for manufacturing ceramic electronic components, characterized in that it contains (≤0.1, 0 ≤ y ≤ 0.1) and the concentration of yttria-stabilized zirconia is 0.5 mol% or more and 5.0 mol% or less when the total amount of Ti and Zr is 100 mol%.

12. The concentration of the aforementioned ceramic powder when the total amount of Ti and Zr is 100 mol% is (B ２ O ３ Converted to ) / 2, it is 0.2 mol% or more and 1.0 mol% or less, and the specific surface area is 100 m². ２ / g or more 300m ２ A method for manufacturing ceramic electronic components according to claim 11, characterized by containing boron nitride in a quantity of less than or equal to / g.

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