Apparatus and method for selectively forming a shielding layer on a semiconductor package

Abstract

An apparatus for selectively forming a shielding layer on a semiconductor package is provided. The apparatus comprises: a tray including a plurality of package sheets each configured to accommodate a semiconductor package, wherein the tray defines one or more sets of guide holes outside the package sheet for each of the plurality of package sheets; a deposition mask, wherein each deposition mask comprises: a set of pins removably inserted into one of the sets of one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins, wherein the cover is configured to cover at least a portion of the outer surface of the semiconductor package accommodated in the package sheet when the set of pins is inserted into the set of guide holes associated with the package sheet; and a deposition source configured to deposit a shielding material on the tray to form a shielding layer on each of the semiconductor packages when the semiconductor packages are accommodated in the plurality of package sheets.

Description

Technology Field

[0001] The present application relates generally to semiconductor packaging technology, and more specifically to an apparatus for selectively forming a shielding layer on a semiconductor package and a method for performing the same. Background Technology

[0002] The semiconductor industry continues to face complex integration challenges as consumers demand electronic devices that are lighter, smaller, and possess higher performance along with more features. For sensitive electronic components in electronic products, interference shielding must be performed to prevent interference caused by electromagnetic fields, electrostatic fields, and the like. Typically, semiconductor packages may be provided with a metal cover or a coating uniformly applied around the perimeter as a shielding layer. In cases where more electronic components are integrated into a single package, various components may need to be shielded differently. For example, Magnetic Random Access Memory (MRAM) devices may require local magnetic shielding because total shielding is neither cost-effective nor advantageous for heat dissipation. In other examples, shielding may not be desirable for antennas that need to transmit and / or receive electromagnetic signals from the external space.

[0003] Therefore, there is a need to selectively form a shielding layer on the semiconductor package. The problem to be solved

[0004] The object of the present application is to provide an apparatus for selectively forming a shielding layer on a semiconductor package. means of solving the problem

[0005] According to an embodiment of the present application, an apparatus for selectively forming a shielding layer on a semiconductor package is provided. The apparatus comprises: a tray including a plurality of package sheets each configured to accommodate a semiconductor package, wherein the tray defines one or more sets of guide holes outside the package sheet for each of the plurality of package sheets; a deposition mask, wherein each deposition mask comprises: a set of pins releasedly inserted into one of the sets of one or more sets of guide holes to place the deposition mask on the tray; a cover attached to the set of pins, wherein the cover is configured to cover at least a portion of the outer surface of the semiconductor package accommodated in the package sheet when the set of pins is inserted into the set of guide holes associated with the package sheet; and a deposition source configured to deposit a shielding material on the tray to form a shielding layer on each of the semiconductor packages when the semiconductor packages are accommodated in the plurality of package sheets.

[0006] According to another aspect of an embodiment of the present application, a method for selectively forming a shielding layer on a semiconductor package is provided. The method comprises: providing a tray comprising a plurality of package sheets, wherein the tray defines one or more sets of guide holes on the outside of the package sheet for each of the plurality of package sheets; providing a deposition mask, wherein each deposition mask comprises a set of pins that are releaseably inserted into one of the sets of one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins; placing a plurality of semiconductor packages within each of the package sheets of the tray; placing the deposition mask on the tray by inserting the set of pins of each deposition mask into one of the sets of one or more sets of guide holes of the package sheet to cover at least a portion of the outer surface of the semiconductor package accommodated within the package sheet; and depositing a shielding material on the tray through a deposition source to form a shielding layer on each of the plurality of semiconductor packages.

[0007] It should be understood that the foregoing general description and the following detailed description are merely illustrative and descriptive and do not limit the invention. Additionally, the accompanying drawings, incorporated herein and constituting a part thereof, serve to illustrate embodiments of the invention and, together with the description, explain the principles of the invention. Brief explanation of the drawing

[0008] The drawings referenced in this specification form part of the specification. Unless expressly otherwise indicated in the detailed description, the features illustrated in the drawings illustrate only some embodiments of the present application and do not illustrate all embodiments of the present application, and the reader of the specification should not imply otherwise. FIG. 1 is a cross-sectional view of a device for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application. FIGS. 2a to 2c are cross-sectional views of an apparatus for selectively forming a shielding layer on a semiconductor package having a plurality of alternative deposition mask covering configurations according to some embodiments of the present application. FIG. 2d illustrates a cross-sectional view of a device for selectively forming a shielding layer on a semiconductor package having a semi-open package sheet configuration according to an embodiment of the present application. FIG. 2e illustrates a cross-sectional view of a device having a fastener for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application. FIG. 3 is a plan view illustrating a tray having a plurality of semiconductor package sheets having a set of guide holes on the outside of the sheets according to an embodiment of the present application. FIGS. 4a to 4d are perspective views of a deposition mask having various shapes of pins according to some embodiments of the present application. FIGS. 4e and FIGS. 4f are plan views of two types of deposition masks connected to each other by an exemplary connecting frame according to some embodiments of the present application. FIG. 5 is a plan view illustrating a semiconductor package sheet according to an embodiment of the present application and several sets of guide holes of various shapes in the vicinity thereof. FIG. 6 is a flowchart illustrating a method for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application. FIGS. 7a to 7d are cross-sectional views illustrating various steps of a method for selectively forming a shielding layer on a semiconductor package illustrated in FIG. 6 according to an embodiment of the present application. FIGS. 8a to 8c are plan views illustrating the step of selectively forming a rounded shielding layer on a semiconductor package according to an embodiment of the present application. The same reference number will be used throughout the drawing to refer to identical or similar parts. Specific details for implementing the invention

[0009] The following detailed description of exemplary embodiments of the present application refers to the accompanying drawings, which form part of the description. The drawings illustrate specific exemplary embodiments in which the present application may be practiced. The detailed description including the drawings is sufficiently detailed to enable a person skilled in the art to practice the present application. A person skilled in the art may further utilize other embodiments of the present application and may make logical, mechanical, and other modifications without departing from the spirit or scope of the present application. Accordingly, the reader of the following detailed description should not interpret the description in a limiting sense, and only the appended claims define the scope of the embodiments of the present application.

[0010] In this application, the use of the singular includes the plural unless specifically stated otherwise. In this application, the use of "or" means "and / or" unless otherwise stated. Furthermore, the use of the term "comprising" is not limited to other forms such as "comprising" and "comprising." Additionally, terms such as "element" or "component" include both elements and components comprising one unit and elements and components comprising more than one subunit, unless specifically stated otherwise. Furthermore, the section headings used in this specification are for organizational purposes only and should not be interpreted as limiting the subject matter described.

[0011] As used herein, spatially relative terms such as “bottom,” “below,” “top,” “upper,” “on,” “top,” “lower,” “left,” “right,” “vertical,” “horizontal,” “side,” etc. may be used herein for ease of description to explain the relationship of one element or feature to other element(s) or feature(s) as illustrated in the drawings. Spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientations illustrated in the drawings. The device may be oriented differently (rotated 90 degrees or in other orientations), and spatially relative terms used herein may likewise be interpreted accordingly. When an element is referred to as being “connected” or “coupled” to another element, it should be understood that it may be directly connected or coupled to the other element, or that an interposed element may be present.

[0012] FIG. 1 illustrates a cross-sectional view of an apparatus (100) for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application. In some embodiments, the apparatus (100) may be a physical vapor deposition apparatus, such as a sputtering apparatus, which may include a deposition chamber that accommodates various components of the apparatus. For example, a target (i.e., a deposition source) may be placed within the deposition chamber and, upon ion or atomic impact during the deposition process, emit sputtered atoms onto a substrate within the deposition chamber to form a thin film on the substrate. A conductive casing or housing may be formed on the semiconductor package by the deposition apparatus (100) and may function as a shield to reduce electromagnetic interference to a semiconductor device within the semiconductor package. Furthermore, as described in more detail below, a selective shielding layer may be formed that does not cover the entire top surface and lateral surface of the semiconductor package.

[0013] As illustrated in FIG. 1, the device (100) includes a tray (110). The tray (110) serves as a substrate for accommodating a semiconductor device or package on which a thin film is to be formed. In some embodiments, the package may be a semiconductor package singulated from a wafer-level package, which may all have the same or similar physical structure and may need to have the same thin film formed on top. Accordingly, the tray (110) may have one or more package sheets having the same structure as the package sheet (120) illustrated in FIG. 1. In some embodiments, the tray (110) may be a flat plate or a curved plate facing a target.

[0014] Each package sheet (120) can accommodate a semiconductor package (130). The package sheet (120) may take the form of a cavity with a rectangular cross-sectional shape, but the embodiments of the present application are not limited thereto. For example, the package sheet (120) may have an irregular shape suitable for accommodating the semiconductor package. In some alternative examples, the package sheet may be a flat support surface instead of a cavity. A set of guide holes (140) may be formed on the outside of the package sheet (120) on the tray (110). In some embodiments, the guide holes (140) may be through holes. In some other embodiments, the guide holes (140) may not penetrate the tray (110).

[0015] In order to selectively form a shielding layer for a semiconductor package (130) housed inside a package sheet (120), a deposition mask (150) may be attached close to the package sheet (120). In particular, the deposition mask (150) includes a set of pin(s) (151) and a cover (152). The set of pins (151) may be releasedly inserted into a set of guide holes (140) to place the deposition mask (150) on the tray (110). In particular, as illustrated in the device (100), the deposition mask (150) is attached to the tray (110) after the semiconductor package (130) is placed inside the package sheet (120), but as described in detail in some other embodiments, the order of placing the deposition mask (150) and placing the semiconductor package (130) is not limited thereto. A cover (152) is attached to a set of pins (151), and the cover (152) can cover at least a portion (132) of the outer surface (131) of the semiconductor package (130) when the semiconductor package (130) is received within the package sheet (120). Specifically, as illustrated in the device (100), the cover (152) of the deposition mask (150) may include an upper portion (153) that can cover at least a portion of the upper surface of the semiconductor package (130). The cover (152) may further include a lower portion (154) extending between the upper portion (153) and the pins (151). The lower portion (154) can cover at least a portion of the lateral surface of the semiconductor package (130). The height of the lower portion (154) may be equal to the thickness of the semiconductor package (130). The aspects of the present application are not limited thereto. Preferably, the inner surface of the deposition mask (150) is completely adhered to the outer surface (131) of the semiconductor package (130) without any gap, so that the inner surface of the deposition mask (150) can be adhered to the covered portion (132) of the outer surface (131) of the semiconductor package (130) by the deposition mask (150).In the device (100), the cover (152) is in close contact with the upper surface and a portion of the lateral surface of the semiconductor package (130), but the shape and position of the covered portion (132) of the outer surface (131) of the semiconductor package (130) may not be limited thereto, as described in detail below with reference to some other embodiments of the present application.

[0016] As described above, to protect the semiconductor package from interference such as thermal shock, chemical erosion, physical attack, and fluid intrusion, shielding material(s), such as metal, conductive plastic, and conductive polymer, may be deposited on the semiconductor package (130). A number of electronic components may be integrated into the semiconductor package, and different shielding configurations may be required for each different electronic component. As shielding material is deposited on the tray (110) to form a shielding layer (160) on the semiconductor package (130), the shielding layer is formed on the exposed portion (133) of the outer surface (131) of the semiconductor package (130), whereas the portion (132) covered by the deposition mask (150) remains without a shielding layer formed when the deposition mask (150) is removed from the tray (110).

[0017] FIGS. 2a to 2c are cross-sectional views of an apparatus (200) for selectively forming a shielding layer on a semiconductor package having a plurality of alternative deposition mask covering configurations according to some embodiments of the present application.

[0018] As illustrated in FIGS. 2a through 2c, various configurations for covering each semiconductor package different from the configuration illustrated in FIG. 1 are illustrated. Deposition masks (250a, 250b, 250c) may cover parts (232a, 232b, 232c) of each semiconductor package at different locations and in different shapes. In this way, a shielding layer may be formed on the uncovered parts (233a, 233b, 233c) of the outer surface of each semiconductor package. As illustrated in FIG. 2a, the deposition mask (250a) may partially cover only the lateral surface (232a) of the outer surface (231a) of the semiconductor package (230a), and the top surface of the semiconductor package (230a) may remain uncovered so that a shielding layer can be formed. In the embodiment illustrated in FIG. 2a, the semiconductor package (230a) can be inserted into the package sheet (220a) from above regardless of the attachment of the deposition mask (250a) to the tray (210a). Thus, the deposition mask (250a) can be attached to the tray (210a) before, after, or simultaneously with the insertion of the semiconductor package (230a) into the package sheet (220a). In FIG. 2b, the deposition mask (250b) may include one or more holes, thereby exposing a plurality of portions (233b) of the outer surface (231b) of the semiconductor package. The exposed portions (233b) may include a plurality of portions of the outer surface (231b) that are not connected to each other. FIG. 2c illustrates an embodiment in which the deposition mask (250c) is not completely adhered to the outer surface (231c) of the semiconductor package, thereby leaving a space between the inner surface of the deposition mask (250c) and the covered portion (232c) of the outer surface (231c). In this case, the surface (232c) covered by the deposition mask (250c) but not in contact with the cover may not have a shielding layer formed or may have a thinner shielding layer formed, depending on the type of deposition process (e.g., anisotropic deposition or isotropic deposition).

[0019] FIG. 2d illustrates a cross-sectional view of an apparatus for selectively forming a shielding layer on a semiconductor package having a semi-open package sheet configuration according to another embodiment of the present application.

[0020] In the embodiment illustrated in FIG. 2d, even if the deposition mask (250d) is already attached to the tray (210d) by inserting a set of pin(s) (251d) into the guide hole (240d), the package sheet (220d) may be partially opened to allow the semiconductor package (230d) to be inserted into the package sheet (220d). In the embodiment, the fastener may additionally hold the semiconductor package in place after it is horizontally inserted into the package sheet (220d) by blocking, for example, the opening of the partially opened package sheet (220d) (the right side of the package sheet illustrated in FIG. 2d). Thus, in the case illustrated in FIG. 2d, the deposition mask (250d) may be attached to the tray (210d) before, after, or simultaneously with the semiconductor package (230d) being received by the package sheet (220d). It can be understood that a specific order of attaching the semiconductor package and the deposition mask onto the tray can be controlled based on the configuration of the deposition mask and the package sheet.

[0021] FIG. 2e illustrates a cross-sectional view of a device having a fastener for selectively forming a shielding layer on a semiconductor package according to another embodiment of the present application.

[0022] As illustrated in FIG. 2e, the deposition mask (250e) can be secured to the tray (210e) by a fastener (270e). The fastener (270e) is mechanically coupled to one of a set of pin(s) (251e) of the deposition mask (250e), so that the fastener (270e) can apply force to the deposition mask (250e) against movement of the deposition mask (250e) after the pin (251e) of the deposition mask (250e) is inserted into each guide hole (240e). In some embodiments, the fastener (270e) may be a nut or ring having a width greater than the diameter of the guide hole (240e). The fastener (270e) may be coupled with a bolt structure at the bottom of the pin (251e) extending through the tray (210e) out of the guide hole (240e). It can be understood that the fastener (270e) may be omitted in some embodiments.

[0023] FIG. 3 illustrates a plan view of a tray having a plurality of semiconductor package sheets having a set of guide holes on the outside of the sheets according to an embodiment of the present application. The tray may be any of the trays shown in FIG. 1 and FIG. 2a through 2e.

[0024] Referring to FIG. 3, the tray (310) may include a plurality of package sheets (320), and each package sheet (320) may accommodate a semiconductor package. The material of the tray (310) may have conductivity, antistatic properties, rigidity, and heat resistance for safe handling, transport, and storage of the semiconductor package. The tray material may be modified polyphenylene oxide (MPPO), polyphenylene ether (PPE), polysulfone (PSU), modified polysulfone (MPSU), polyethersulfone (PES), etc. The tray (310) may be made of metal to improve the thermal conductivity of the device. One or more sets of guide holes (340) may be formed on the outside of each package sheet (320). In the example, for each package sheet (320), guide holes (340) may be placed around the corners of the package sheet (320), but the embodiments of the present application are not limited thereto. The location, number, and shape of one or more sets of guide holes (340) may be configured differently. For example, as shown in FIG. 3, a set of two guide holes is formed at the upper left corner of the package sheet (320), and another set of three guide holes is formed at the lower right corner of the package sheet (320). It is preferable to include two or more guide holes in the set of guide holes to prevent any lateral movement of the deposition mask relative to the package sheet.

[0025] FIGS. 4a to 4d are perspective views of a deposition mask having various shapes of pins according to some embodiments of the present application.

[0026] Referring to FIGS. 4a through 4d, the set of pin(s) of the deposition mask can take various shapes. For example, as shown in FIG. 4a, each pin (451) of the deposition mask (450) may have a cross-section shaped like a square. As shown in FIGS. 4b through 4d, each pin of the deposition mask may also have a cross-section shaped like a triangle, a circle, an ellipse, or a rectangle. In this way, non-circular pins can prevent lateral movement of the deposition mask relative to the package sheet, even if only one pin is included in the set of guide pins. It can be understood that the deposition mask may have pins of various shapes.

[0027] FIGS. 4e and 4f are plan views of two types of deposition masks connected to each other by an exemplary connecting frame according to some embodiments of the present application. The deposition masks may be placed on a tray together with the connecting frame. For example, the deposition mask may be any of the deposition masks shown in FIGS. 4a through 4d, and the tray may be any of the trays shown in FIGS. 1 and FIGS. 2a through 2e.

[0028] Referring to FIG. 4e, the connecting frame (481e) can connect three deposition masks to each other. For example, as illustrated in FIG. 4e, one end of the connecting frame (481e) may be connected to the right corner of the cover of the left deposition mask, and the other end may be connected to the left lateral edge of the cover of the right deposition mask adjacent in the row. The connecting frame (481e) does not overlap with the semiconductor package on the tray (410e). In this way, the connecting frame (481e) and the connected deposition masks form a deposition mask assembly (480e) placed on a row of package sheets on the tray (410e). The embodiments of the present disclosure are not limited thereto. It may be understood that the connecting frame may be connected to other locations or parts of the deposition masks, provided that the connection formed with the connecting frame does not interfere with the desired shielding pattern. Additionally, it may be understood that the connecting frame may connect deposition masks corresponding to a row, column, section, or all of the package sheets on the tray.

[0029] Referring further to FIG. 4e, two rows of semiconductor packages placed on the tray (410e) may require different shielding configurations. For example, semiconductor packages contained within the first row of the package sheet may require a shielding pattern excluding the upper left triangular portion, while semiconductor packages in the second row may require a shielding pattern excluding the lower right triangular portion, and semiconductor packages placed in the third row may require a full shielding layer. As such, the connecting frame (481e) may be connected to a deposition mask forming the same shielding pattern, that is, in the same row. It may be understood that the connecting frame may also be connected to a deposition mask having a different shielding pattern. In another embodiment, all semiconductor packages contained within the package sheet of the tray may require a different shielding pattern and thereby require a different deposition mask. The different deposition masks may also be connected to a connecting frame for placing the connected deposition masks simultaneously on the tray. The connected deposition masks may correspond to rows, columns, sections, or even all of the package sheets.

[0030] Referring to FIG. 4f, all deposition masks placed on the tray (410) are connected together via a single connecting frame to form a grid-type deposition mask assembly (480f). In some embodiments, the connecting frame may be formed integrally with the deposition masks. In some other embodiments, the connecting frame may be a component formed separately from the deposition masks and may be assembled with the deposition masks before the shielding deposition process. In this way, all deposition masks of the deposition mask assembly (480f) can be placed on the tray (410f) and / or unloaded from the tray simultaneously.

[0031] FIG. 5 illustrates a plan view of a semiconductor package sheet and several sets of guide holes of various shapes in the vicinity thereof, according to an embodiment of the present application.

[0032] Referring to FIG. 5, one or more sets of guide holes (540) of different shapes and different positions may be formed on the exterior of the semiconductor package sheet (520). As illustrated, the cross-section of the guide holes (540) may take various shapes such as triangles, circles, ellipses, rectangles, and squares. The embodiments of the present application are not limited thereto. The positions of the guide holes may be configured according to specific circumstances of industrial production.

[0033] FIG. 6 illustrates a flowchart of a method (600) for selectively forming a shielding layer on a semiconductor package according to an embodiment of the present application.

[0034] As illustrated in FIG. 6, the method (600) begins with blocks 610 and 620, wherein a tray and a plurality of deposition masks are provided. As illustrated in blocks 630 and 640, semiconductor packages and deposition masks may be placed on the tray. In this example, the deposition masks may be provided first as in block 620 and then followed by the placement of a plurality of semiconductor packages as illustrated in block 630, and the deposition masks may be placed subsequently as illustrated in block 640, but the embodiments of the present application are not limited thereto. For example, the deposition masks may be placed on the tray beforehand, and the semiconductor packages may be placed on the tray later if the space formed by the deposition masks and the tray allows for the positioning of the semiconductor packages, for which, for example, the embodiments illustrated in FIG. 2a and 2d may be referenced. In other embodiments, the placement of a plurality of semiconductor packages may be preceded, and then a deposition mask may be provided, and the deposition mask may be placed subsequently. The present disclosure is not limited to the order of the method illustrated in the drawings. Afterward, as illustrated in Block 650, a deposition source deposits a shielding material onto a tray to form a shielding layer on a plurality of semiconductor packages and a deposition mask. Each deposition mask partially covers each semiconductor package to prevent the formation of a shielding layer on the covered surface of the semiconductor package. After deposition in Block 650, the deposition mask can be removed from the tray.

[0035] FIGS. 7a to 7d are cross-sectional views illustrating various steps of a method for selectively forming a shielding layer on a semiconductor package illustrated in FIG. 6 according to an embodiment of the present application.

[0036] As illustrated in FIG. 7a, a semiconductor package (730) is first placed on a package sheet (720) configured on a tray (710). As illustrated in FIG. 7b, a deposition mask (750) having a cover (752) and a set of pin(s) (751) is placed on the tray (710) by inserting the releaseable pin (751) into a guide hole (740) on the tray (710). The pin (751) can take various shapes, such as pillars having a cross-section of a rectangle, square, circle, ellipse, triangle, etc. The shape of the pin (751) can be configured, for example, as described in the examples of FIG. 4a through 4d. The deposition mask (750) may also be a single deposition mask connected to another deposition mask through a connecting frame, as described in the examples of FIG. 4e and 4f. The guide hole (740) is a through hole but can take various other shapes, such as a cavity. The sedimentation mask (750) may further include a fastener attachable to a pin (751) to secure the connection between the sedimentation mask (750) and the tray (710).

[0037] Referring further to FIG. 7b, the deposition mask (750) may be in close contact with one or more sides of the semiconductor package (730). The cover (752) of the deposition mask (750) may form a cavity having an inner surface, and the inner surface may correspond to at least a portion (732) of the outer surface (731) of the semiconductor package (730). At the same time, at least a portion (733) of the outer surface (731) remains exposed to the external environment. The deposition mask (750) may take various shapes, and there may or may not be a space between the deposition mask (750) and the semiconductor package (730).

[0038] Referring further to FIG. 7c, the shielding layer (760) is formed by depositing a shielding material onto a tray (710) from a deposition source. The covered portion (732) of the surface (731) of the semiconductor package (730) remains unshielded, while the exposed portion (733) of the surface (731) of the semiconductor package (730) is shielded by the shielding layer (760).

[0039] Referring further to FIG. 7d, after the removal of the deposition mask illustrated in FIG. 7c, the covered portion (732) of the surface (731) of the semiconductor package (730) is exposed to the external environment without a shielding layer thereon, while the exposed portion (733) of the surface (731) is shielded. In this way, the method can form an optional shielding layer (761) on the partial surface (733) of the semiconductor package (730). Since the deposition mask is detachably attached to the tray, the tray and the deposition mask can be reused after unloading the deposition mask and each semiconductor package from the tray, making it more cost-effective compared to traditional shielding processes that require disposable auxiliary materials such as polyimide tape and metal frames. Thus, the method according to the embodiment of the present application defines an optionally formed shielding solution that is flexible and cost-effective.

[0040] In some embodiments, it may be desirable to form a shielding layer of an irregular shape on a semiconductor package, and thus the cover of the deposition mask may be configured to have a shape similar to the desired shape. FIGS. 8a to 8c are plan views illustrating the step of selectively forming a shielding layer of a curved shape on a semiconductor package according to an embodiment of the present application.

[0041] Referring to FIG. 8a, a package sheet (820) having three sets of guide holes (840) may be provided on a tray (not shown). A semiconductor package (830) may be placed within the package sheet (820). As shown in FIG. 8b, three deposition masks, each having three covers (852), may be placed over the package sheet (820) to shield three corners of the surface of the semiconductor package (830). It may be seen that it is flexible to form a shielding layer of a more complex pattern, such as the curved pattern shown in FIG. 8b. The aspects of the present application are not limited thereto. The deposition masks may also be designed to cover a portion of the top surface and / or a portion of the lateral surface of the semiconductor package (830). Afterward, as shown in FIG. 8c, after removing the deposition mask, at least three unshielded regions (832) and a central shielding layer (833) are formed on the top surface of the semiconductor package (830).

[0042] The description in this application includes numerous exemplary drawings illustrating various devices and methods for selectively forming a shielding layer on a semiconductor package. For clarity of example, these drawings do not illustrate all aspects of each exemplary assembly. Any exemplary assembly and / or method provided herein may share any or all characteristics with any or all other assemblies and / or methods provided herein.

[0043] Various embodiments are described herein with reference to the accompanying drawings. However, it will be apparent that various modifications and changes may be made and additional embodiments implemented without departing from the broader scope of the invention as set forth in the following claims. Furthermore, other embodiments will be apparent to those skilled in the art by considering the specification and practicing one or more embodiments of the invention disclosed herein. Accordingly, the examples in this application and specification are to be considered merely illustrative, and the true scope and spirit of the invention are intended to be defined by the following list of illustrative claims.

Claims

Claim 1 A method for selectively forming a shielding layer on a semiconductor package, the method comprises: providing a tray including a plurality of package sheets - wherein, for each of the plurality of package sheets, the tray defines one or more sets of guide holes outside the plurality of package sheets -; and providing a deposition mask - wherein each of the deposition masks is: A set of pins releasedly inserted into one of one or more sets of guide holes to place the deposition mask on the tray; and A method comprising: a cover attached to the above pin set; a plurality of semiconductor packages placed within each package sheet of the tray; a pin set of each deposition mask placed on the tray by inserting the pin set of each deposition mask into one of the above one or more sets of guide holes of the package sheet to cover at least a portion of the outer surface of the semiconductor packages contained within the package sheet; and a step of forming a shielding layer on each of the plurality of semiconductor packages by depositing a shielding material on the tray through a deposition source. Claim 2 A method according to claim 1, wherein each cover of the deposition mask comprises: an upper portion configured to cover at least partially the upper surface of the semiconductor package; and a lower portion extending between the upper portion and a pin set, wherein the lower portion is configured to cover at least a portion of the lateral surface of the semiconductor package. Claim 3 A method according to paragraph 2, wherein the lower portion has a height equal to the thickness of the semiconductor package. Claim 4 A method according to claim 1, further comprising a connecting frame for connecting two or more of the deposition masks to each other. Claim 5 A method according to claim 4, wherein the connecting frame is additionally configured to connect all sediment masks to each other, and the connecting frame is formed integrally with the sediment mask. Claim 6 A method according to claim 4, wherein the connecting frame is further configured to connect two or more of the deposition masks to each other so that the connected deposition masks correspond to a row, column, section, or all of the plurality of package sheets. Claim 7 A method according to claim 1, wherein each set of the one or more sets of guide holes is placed around the corner of the corresponding package sheet. Claim 8 A method according to claim 1, wherein the cover defines a cavity having an inner surface, and the inner surface is in close contact with a covered portion of the outer surface of the semiconductor package accommodated within the package sheet. Claim 9 The method according to claim 1, wherein each of the deposition masks further comprises a set of fasteners each mechanically coupled to a set of pins to secure the deposition mask to the tray. Claim 10 In paragraph 1, the method wherein one or more sets of guide holes are through holes..

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