Coil board and manufacturing method thereof
Patent Information
- Application Number
- KR1020250170282
- Authority / Receiving Office
- KR · KR
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-02-25
- Filing Date
- 2025-11-12
- Publication Date
- 2026-09-01
Smart Images

Figure PAT00020_ABST
Abstract
Description
Technology Field
[0001] The present disclosure relates to the field of packaging technology, and more specifically to coil boards and manufacturing methods. Background Technology
[0002] Voice Coil Motors (VCMs) feature high-frequency response and high precision. Optical Image Stabilization (OIS) is a type of VCM and is widely applied in cameras. It enables autofocus and displays sharp images by adjusting the lens position. The coil board is applied to camera VCM-OIS systems, where the energized coil utilizes the force received from the magnetic field to move the lens or sensor, thereby achieving image stabilization.
[0003] As lens modules become more complex, their weight often increases, requiring an increase in the force required to move the lens or sensor. Based on the formula for the force exerted on a conductive wire by a magnetic field, F=BIL (where B is the magnetic field strength, I is the current, and L is the wire length), Ohm's law, I=U / R (where U is the voltage and R is the resistance), and the wire resistance formula, R=ρL / S (where ρ is the resistivity of the material constituting the resistance, L is the length of the wire wound with resistance, and S is the cross-sectional area of the wire wound with resistance), the force can be converted to F=BUS / ρ. When the magnetic field strength B, voltage U, and material resistivity ρ are constant values, an increase in thrust can be achieved by increasing the wire cross-sectional area S. However, conventional technology still significantly lacks technical solutions for increasing the cross-sectional area S.
[0004] In light of this, the object of the present disclosure is to provide a coil board and a method for manufacturing it.
[0005] In accordance with the above purpose, the present disclosure in a first aspect provides a coil board. It comprises a first coil; a first plating layer covering the first coil; a dielectric layer covering the first plating layer; a second coil on the dielectric layer; and a second plating layer covering the second coil. The first plating layer is located between the dielectric layer and the first coil. The dielectric layer includes a first blind hole. The second coil is conductively connected to the first coil through the first blind hole, and the coil board further includes a first conductive pad installed parallel to the first coil and a second conductive pad installed parallel to the second coil. The dielectric layer includes a second blind hole. The second conductive pad is conductively connected to the first conductive pad through the second blind hole.
[0006] In some embodiments, a solder resist layer is further included. The solder resist layer covers the second plating layer and the dielectric layer. The solder resist layer includes a solder resist opening for exposing at least a portion of the second plating layer.
[0007] In some embodiments, a first plating layer is covered on a first conductive pad. Also / or a second plating layer is covered on a second conductive pad.
[0008] In some embodiments, the first conductive pad and the second conductive pad are located in a non-product area of the coil board.
[0009] In a second aspect, the present disclosure further provides a method for manufacturing a coil board. This includes the following steps.
[0010] (a) Prepare a wit board.
[0011] (b) A first coil and a first conductive pad are formed on the above-mentioned substrate.
[0012] (c) Electroplating is performed on the entire surface to form a first plating layer covering the first coil and the first conductive pad.
[0013] (d) A dielectric layer is pressed onto the first plating layer and a first blind hole and a second blind hole are opened. The first blind hole exposes the first plating layer on the first coil. The second blind hole exposes the first plating layer on the first conductive pad.
[0014] (e) A second coil and a second conductive pad are formed on the dielectric layer. The second coil is electrically connected to the first coil through the first blind hole. The second conductive pad is electrically connected to the first conductive pad through the second blind hole.
[0015] (f) A second plating layer is plated on the second coil and the second conductive pad. Here, the first conductive pad and the second conductive pad are located in a non-product area.
[0016] (g) Remove the above replacement board.
[0017] In some embodiments, the following steps are further included.
[0018] (h) A solder resist layer is formed on the dielectric layer. The solder resist layer includes a solder resist opening for exposing at least a portion of the second plating layer.
[0019] In some embodiments, step (b) specifically includes the following steps.
[0020] (b1) The above-mentioned substrate includes a support layer and a first seed layer on the support layer. A first photoresist layer is formed and patterned on the first seed layer.
[0021] (b2) A first coil and a first conductive pad are formed by electroplating within the pattern of the first photoresist layer.
[0022] (b3) Remove the first photoresist layer.
[0023] In some embodiments, the material of the first seed layer is copper.
[0024] (b) Step further includes forming a first metal layer on the first seed layer and forming a first coil and a first conductive pad on the first metal layer. Herein, the first metal layer comprises a non-copper metal.
[0025] (c) Step further includes the step of etching the exposed first metal layer and then electroplating the entire surface to form a first plating layer covering the first coil and the first conductive pad.
[0026] In some embodiments, step (g) further includes the step of etching the first metal layer remaining on the first coil and the first conductive pad.
[0027] In some embodiments, the non-copper metal comprises at least one of titanium (Ti), chromium (Cr), tungsten (W), zirconium (Zr), aluminum (Al), silver (Ag), and gold (Au).
[0028] In some embodiments, (e) step includes the following steps.
[0029] (e1) Electroless copper plating is performed on the dielectric layer above.
[0030] (e2) A second photoresist layer is formed and patterned on the dielectric layer.
[0031] (e3) A second coil and a second conductive pad are formed by electroplating within the pattern of the second photoresist layer.
[0032] (e4) Remove the second photoresist layer.
[0033] In some embodiments, the support board further includes a copper foil layer. The copper foil layer is located between the support layer and the first seed layer. The copper foil layer and the first seed layer are physically bonded.
[0034] (g) Step (g) includes the step of separating the copper foil layer and the first seed layer to remove the substrate board.
[0035] As can be seen from the foregoing description, the coil board and manufacturing method provided in the present disclosure increase the cross-sectional area of the first coil by using the first plating layer by increasing the first plating layer and the second plating layer. By increasing the cross-sectional area of the second coil by using the second plating layer, a technical effect of increasing the coil board thrust is achieved. A technical effect of electroplating the second plating layer on the isolated second coil using the first and second conductive pads is realized. At the same time, the manufacturing process is reduced because the first and second conductive pads are formed in a non-working area and do not need to be removed. Since the bottom surface of the first coil is protected by forming a first metal layer using a non-copper metal, the first coil is not etched or corroded when the exposed first seed layer and first plating layer are removed by subsequent etching, thereby preventing the cross-section of the first coil from becoming thin. Brief explanation of the drawing
[0036] To further clarify the technical means of the present disclosure or related technology, the accompanying drawings that need to be used in the description of the embodiments or related technology are briefly introduced below. Clearly, the accompanying drawings used in the description below are merely embodiments of the present disclosure, and a person skilled in the art can obtain other drawings based on these drawings without creative effort. Figure 1 is an intermediate structural diagram of a coil board provided by the relevant technology. FIGS. 2(a) to 2(r) are cross-sectional or front views of intermediate structures of each step of the method for manufacturing a coil board according to an embodiment of the present disclosure. FIG. 3 is a structural diagram of a coil board according to an embodiment of the present disclosure. Specific details for implementing the invention
[0037] In order to more clearly explain the purpose, technical solution, and advantages of the present disclosure, the present disclosure will be described in more detail below with reference to specific embodiments and the accompanying drawings.
[0038] It should be noted that, unless otherwise defined, technical or scientific terms used in the embodiments of this disclosure shall have the ordinary meaning understood by a person with general skills in the field to which this disclosure pertains. The terms “first,” “second,” and similar terms used in the embodiments of this disclosure do not indicate any order, quantity, or significance. They are used merely to distinguish different components. Similar terms such as “include” or “include” mean that the element or object appearing before such term includes the element or object listed after such term and its equivalents. This does not exclude other elements or objects. Similar terms such as “connect” or “interconnect” are not limited to physical or mechanical connections and may include electrical connections, whether direct or indirect. When terms such as “top,” “top surface,” “bottom surface,” and “side” are used to describe the positional relationship between two members, one or more members may be located between the two members, unless these terms are used in conjunction with the terms “immediately adjacent” or “directly.” When one element or layer is installed "on" another element or layer, additional layers or elements may be inserted directly onto or between the other elements. In the attached drawings, the thickness and shape of some layers and regions may be exaggerated for better understanding and easier explanation. Unless explicitly stated, the members are interpreted to include a general margin of error.
[0039] Conventional related technologies have not explained how to increase the coil cross-sectional area to increase coil thrust. At the same time, regarding the coil electroplating problem, as shown in Fig. 1, the conventional technology fabricated temporary electroplating lead wires on the coil (within the dotted box in Fig. 1) and utilized these temporary electroplating lead wires as electrical conduction paths during electroplating. Subsequently, the temporary electroplating lead wires were removed to prevent short circuits. The solution of the conventional technology increases process complexity and design difficulty.
[0040] In light of this, the present disclosure provides a coil board and a method for manufacturing. FIGS. 2(a) to 2(r) are cross-sectional or front views of intermediate structures of each step of the method for manufacturing a coil board according to an embodiment of the present disclosure. As illustrated in FIGS. 2(a) to 2(r), the manufacturing method comprises the following steps.
[0041] First, a slate board (100) is provided. (a) This is a step as illustrated in FIG. 2(a).
[0042] In some embodiments, the support board (100) further comprises a support layer (101), a first seed layer (103), and a copper foil layer (102) located between the two. Here, the copper foil layer (102) and the first seed layer (103) are physically bonded and can be physically separated.
[0043] Optionally, the material of the support layer (101) includes, but is not limited to, resin, glass fiber, glass, silicon, and metal. A first seed layer (103) and a copper foil layer (102) are installed on one or both sides of the support layer (101). It should be noted that the support board (100) may include more peelable metal conductive layers, such as copper foil, and the present disclosure is not limited thereto.
[0044] Optionally, the thickness of the copper foil layer (102) is 16 to 20 μm, for example, 18 μm. Optionally, the first seed layer (103) may be a copper foil of 1.5 to 5 μm.
[0045] Next, as illustrated in FIG. 2(b), a first metal layer (201) is formed on the first seed layer (103). Here, the first metal layer (201) comprises a non-copper metal. Here, the non-copper metal comprises at least one of titanium (Ti), chromium (Cr), tungsten (W), zirconium (Zr), aluminum (Al), silver (Ag), and gold (Au).
[0046] Optionally, the first metal layer (201) may further include copper. It should be noted that the copper should be located on one side of the first metal layer (201) away from the mounting board (100).
[0047] Optionally, the first metal layer (201) may be formed by sputtering or electroplating. For example, titanium is first sputtered onto the first seed layer (103) and then copper is sputtered. Or, titanium is first electroplated onto the first seed layer (103) and then copper is electroplated.
[0048] It should be noted that the step of forming the first metal layer (201) can be omitted.
[0049] Next, a first coil (301) and a first conductive pad (302) are formed on the first metal layer (201). This is step (b), as illustrated in FIGS. 2(c) to FIGS. 2(g).
[0050] It should be noted that if the step of forming the first metal layer (201) is omitted, the first coil (301) and the first conductive pad (302) are formed on the first seed layer (103).
[0051] In some embodiments, step (b) specifically includes the following steps.
[0052] (b1) A first photoresist layer (202) is formed and patterned on a first metal layer (201), as shown in FIG. 2(c) and FIG. 2(d). Here, the position of the first circuit layer is exposed through exposure and development to achieve patterning.
[0053] It should be noted that if the step of forming the first metal layer (201) is omitted, the first photoresist layer (202) is formed and patterned on the first seed layer (103). The present disclosure does not describe this in detail.
[0054] (b2) A first circuit layer (203) is formed by electroplating on the pattern of the first photoresist layer (202). This is as illustrated in FIG. 2(e). Here, a portion of the first circuit layer (203) forms the first coil (301), and a portion forms the first conductive pad (302). The material of the first circuit layer (203) may be copper.
[0055] (b3) The first photoresist layer (202) is removed. This is as shown in FIG. 2(f).
[0056] (b4) The first metal layer (201) that is not covered by the first circuit layer (203) is etched. This is as illustrated in FIG. 2(g) and FIG. 2(h). It should be noted that since the first metal layer (201) can be etched using a chemical solution that corrodes a specific metal, the chemical solution must correspond to the material of the first metal layer (201). The present disclosure is not limited thereto. If the step of forming the first metal layer (201) is omitted, step (b4) may be omitted.
[0057] (b) After going through step (b), as can be clearly seen in FIG. 2(h), a first coil (301) and a first conductive pad (302) are formed on the first seed layer (103). It should be noted that the first conductive pad (302) is located in a non-product area, that is, a material waste area.
[0058] In this way, additional processing of the first conductive pad (302) is unnecessary after the final product is completed, which helps to reduce the manufacturing process.
[0059] Next, electroplating is performed on the entire surface to form a first plating layer (303) covering the first coil (301), the first conductive pad (302), and the first seed layer (103). This is step (c), as illustrated in FIG. 2(i). Here, the material of the first plating layer (303) may be copper.
[0060] Next, a dielectric layer (401) is pressed onto the first plating layer (303) and a first blind hole (402) and a second blind hole (403) are opened. Here, the first blind hole (402) exposes a portion of the first plating layer on the first coil (301), and the second blind hole (403) exposes a portion of the first plating layer on the first conductive pad (302). This is step (d), and refer to FIG. 2(j).
[0061] Optionally, the material of the dielectric layer (401) may be a resin material. For example, it may be one selected from the group consisting of liquid crystal polymer, BT (bismaleimide triazine) resin, semi-cured prepreg, ABF (Ajinomoto Build-up Film) film, epoxy resin, and polyimide resin, but the present disclosure is not limited thereto.
[0062] The first blind hole (402) and the second blind hole (403) may be opened by methods such as laser drilling or laser perforation, and the present disclosure is not limited thereto.
[0063] In some alternative embodiments, the step of producing the second seed layer by pressing the dielectric layer (401) and the second seed layer onto the first plating layer (303) can be reduced.
[0064] Next, a second coil (501) and a second conductive pad (502) are formed on the dielectric layer (401). This is step (e), as illustrated in FIG. 2(j) and FIG. 2(k). Here, the second coil (501) is conductively connected to the first coil (301) through the first blind hole (402). The second conductive pad (502) is conductively connected to the first conductive pad (302) through the second blind hole (403).
[0065] It should be noted that the second conductive pad (502) is located in a non-product area, that is, a material waste area. In this way, additional processing of the second conductive pad (502) is unnecessary after the final product is completed, which helps to reduce the manufacturing process.
[0066] In some embodiments, (e) step includes the following steps.
[0067] (e1) De-smear and electroless copper plating (PHT) are performed.
[0068] Here, the desmearing process can remove organic residue remaining on the first blind hole (402) and the second blind hole (403). This helps prevent misconnection by ensuring that the second coil (501) is electrically connected to the first coil (301) through the first blind hole (402) and that the second conductive pad (502) is electrically connected to the first conductive pad (302) through the second blind hole (403).
[0069] Electroless copper plating forms a copper layer on the side walls and bottom of the first blind hole (402) and the second blind hole (403), making subsequent electroplating easier.
[0070] (e2) A second photoresist layer is formed and patterned on the dielectric layer (401).
[0071] (e3) Electroplating is performed on the pattern hollow points of the second photoresist layer to form a second coil (501) and a second conductive pad (502).
[0072] (e4) Remove the second photoresist layer.
[0073] (e5) Flash etch the second seed layer.
[0074] Here, steps (e2) through (e4) are similar to steps (b1) through (b3) and are therefore not explained in detail.
[0075] Next, a second plating layer (503) is electroplated on the second coil (501) and the second conductive pad (502). This is step (f), as illustrated in FIG. 2(l). Here, since the first coil (301) and the first conductive pad (302) are both formed on the surface of the first seed layer (103), the electrical conductivity of the entire board is possible. The second coil (501) conducts the first coil (301), the first seed layer (103), and the first conductive pad (302) through the first blind hole. The second conductive pad (502) conducts the first conductive pad (302) through the second blind hole. The second conductive pad (502) is connected to an external electrode to form an electrical circuit.
[0076] When electroplating, the purpose of plating the isolated second coil (501) can be achieved by simply connecting the second conductive pad (502) to an external electrode to form an electrical circuit. This helps to improve the complex plating process by eliminating the need to install electroplating lead wires on the second coil (501).
[0077] Next, a third photoresist layer (601) is formed on the dielectric layer (401) and the second plating layer (503). This is as illustrated in FIG. 2(m). By adopting the third photoresist layer (601), the first coil (301) and the second coil (501) are protected to prevent scratches and to prevent etching corrosion of the first coil (301) and the second coil (501) during subsequent etching.
[0078] Next, the support layer (101) is removed. This is step (g), as illustrated in FIG. 2(n). Specifically, the support layer (101) can be easily removed by peeling off the copper foil layer (102) and the first seed layer (103).
[0079] Next, the first plating layer (303) on the surface on one side far from the second coil (501) and the second conductive pad (502) of the first seed layer (103) and the dielectric layer (401) is etched. This is as illustrated in FIG. 2(o).
[0080] Here, etching the first plating layer (303) on the surface of the dielectric layer (401) can ensure that the first coil (301) remains in a non-short circuit state.
[0081] Since the material on the surface of the first metal layer (201) is different from copper, it does not dissolve in the copper etching solution. Therefore, it is possible to protect the first coil (301) from being excessively etched, thereby ensuring that the cross-sectional area of the first coil (301) is not significantly reduced.
[0082] As illustrated in FIG. 2(p), the method further includes the step of etching the first metal layer (201) on the first coil (301) and the first conductive pad (302). The material of the first coil (301) and the first conductive pad (302) is copper. The etching solution used to etch the first metal layer (201) does not dissolve copper, thereby effectively preventing etching corrosion of the first coil (301).
[0083] It should be noted that if the step of forming the first metal layer (201) is omitted, it is difficult to ensure that the first coil (301) is not etched or corroded when the first seed layer (103) and the first plating layer (303) are etched, which is disadvantageous for maximizing the cross-sectional area of the first coil (301). Nevertheless, the manufacturing method provided in the embodiment of the present disclosure can still improve the cross-sectional area of the first coil (301) by using the first plating layer.
[0084] Next, the third photoresist layer is removed. This is as illustrated in FIG. 2(q).
[0085] Finally, a solder resist layer (701) is formed on the dielectric layer (401). The solder resist layer (701) includes a solder resist opening (702) for exposing at least a portion of the second plating layer (503). This is step (i), as illustrated in FIG. 2(r).
[0086] As shown in FIG. 3, an embodiment of the present disclosure further provides a coil board. As shown in FIG. 3, the coil board comprises a dielectric layer (401), a first coil (301), a second coil (501), a first plating layer (303), and a second plating layer (503). Here, the first coil (301) is installed within the dielectric layer (401), and the first plating layer (303) is located between the dielectric layer (401) and the first coil (301). The second coil (501) is installed on the dielectric layer (401). The dielectric layer (401) includes a first blind hole (402). The second coil (501) is electrically connected to the first coil (301) through the first blind hole (402). The second plating layer (503) is installed on the second coil (501). By installing a first plating layer (303) and a second plating layer (503) on the first coil (301) and the second coil (501), respectively, the effect of increasing the coil board thrust is achieved.
[0087] In some embodiments, a solder resist layer (701) is further included. The solder resist layer (701) is installed on the surface of the dielectric layer (401). The solder resist layer (701) includes a solder resist opening (702) for exposing at least a portion of the second plating layer (503).
[0088] In some embodiments, a first conductive pad (302) and a second conductive pad (502) are further included. Here, the first conductive pad (302) is installed within the dielectric layer (401) parallel to the first coil (301). The dielectric layer (401) includes a second blind hole (403). The second conductive pad (502) is installed on the dielectric layer (401) parallel to the second coil (501) and is conductively connected to the first conductive pad (302) through the second blind hole (403).
[0089] Plating on the second coil (501) can be easily implemented using the second conductive pad (502). This allows the cross-sectional area of the second coil (501) to be increased.
[0090] In some embodiments, a first plating layer (303) is installed between the dielectric layer (401) and the first conductive pad (302). Also / or a second plating layer (503) is installed on the second conductive pad (502).
[0091] In some embodiments, the first conductive pad (302) and the second conductive pad (502) are located in a non-product area of the coil board. Installing the first conductive pad (302) and the second conductive pad (502) in a non-product area eliminates the need for additional processing, which helps reduce the manufacturing process.
[0092] A person skilled in the art will understand that the discussion of any of the above embodiments is merely illustrative and that the scope of the present disclosure (including the claims) is not limited by such illustrative examples. Under the spirit of the present disclosure, combinations of technical features in the above embodiments or different embodiments are possible, and steps may be implemented in any order. It will also be understood that while many other variations of different aspects of the embodiments of the present disclosure exist as described above, they have not been provided in detail for the sake of simplicity.
[0093] The embodiments of the present disclosure are intended to encompass all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Accordingly, any omission, modification, equivalent substitution, improvement, etc., made within the spirit and principles of the embodiments of the present disclosure shall be included within the scope of protection of the present disclosure.
Claims
Claim 1 A coil board comprising: a first coil; a first plating layer covered on the first coil; a dielectric layer covered on the first plating layer; a second coil on the dielectric layer; and a second plating layer covered on the second coil, wherein the first plating layer is located between the dielectric layer and the first coil, the dielectric layer includes a first blind hole, and the second coil is electrically connected to the first coil through the first blind hole, and the coil board further comprises a first conductive pad installed parallel to the first coil and a second conductive pad installed parallel to the second coil, wherein the dielectric layer includes a second blind hole, and the second conductive pad is electrically connected to the first conductive pad through the second blind hole. Claim 2 A coil board according to claim 1, further comprising a solder resist layer, wherein the solder resist layer covers the second plating layer and the dielectric layer, and the solder resist layer comprises a solder resist opening for exposing at least a portion of the second plating layer. Claim 3 A coil board according to claim 1, characterized in that the first plating layer is covered on the first conductive pad and / or the second plating layer is covered on the second conductive pad. Claim 4 A coil board according to claim 1, characterized in that the first conductive pad and the second conductive pad are located in a non-product area of the coil board. Claim 5 A method for manufacturing a coil board, comprising: (a) preparing a substrate board; (b) forming a first coil and a first conductive pad on the substrate board; (c) electroplating the entire surface to form a first plating layer covering the first coil and the first conductive pad; (d) pressing a dielectric layer onto the first plating layer and opening a first blind hole and a second blind hole - the first blind hole exposes the first plating layer on the first coil, and the second blind hole exposes the first plating layer on the first conductive pad -; (e) forming a second coil and a second conductive pad on the dielectric layer - the second coil is electrically connected to the first coil through the first blind hole, and the second conductive pad is electrically connected to the first conductive pad through the second blind hole -; (f) plating a second plating layer on the second coil and the second conductive pad - the first conductive pad and the second conductive pad are located in a non-product area -; A method for manufacturing a coil board, characterized by including the step of removing the above-mentioned replacement board. Claim 6 A manufacturing method according to claim 5, further comprising the step of forming a solder resist layer on the dielectric layer, wherein the solder resist layer comprises a solder resist opening for exposing at least a portion of the second plating layer. Claim 7 In claim 5, the step (b) specifically comprises: (b1) a step of forming and patterning a first photoresist layer on the first seed layer, wherein the support board comprises a support layer and a first seed layer on the support layer; (b2) a step of forming a first coil and a first conductive pad by electroplating within the pattern of the first photoresist layer; and (b3) a step of removing the first photoresist layer, characterized in that the manufacturing method. Claim 8 A manufacturing method according to claim 7, wherein the material of the first seed layer is copper, (b) the step further comprises forming a first metal layer on the first seed layer and forming a first coil and a first conductive pad on the first metal layer, wherein the first metal layer comprises a non-copper metal, and (c) the step further comprises etching the exposed first metal layer and then electroplating the entire surface to form a first plating layer covering the first coil and the first conductive pad. Claim 9 A manufacturing method according to claim 8, wherein step (g) further comprises the step of etching a first metal layer remaining on the first coil and the first conductive pad. Claim 10 A method of manufacturing according to claim 8, characterized in that the above-mentioned non-copper metal comprises at least one of titanium, chromium, tungsten, zirconium, aluminum, silver, and gold. Claim 11 A manufacturing method according to claim 5, wherein step (e) comprises: (e1) performing electroless copper plating on the dielectric layer; (e2) forming and patterning a second photoresist layer on the dielectric layer; (e3) forming a second coil and a second conductive pad by electroplating within the pattern of the second photoresist layer; and (e4) removing the second photoresist layer. Claim 12 A manufacturing method according to claim 7, wherein the above-mentioned mounting board further comprises a copper foil layer, wherein the copper foil layer is located between the support layer and the first seed layer, and the copper foil layer and the first seed layer are physically bonded, and (g) step comprises the step of removing the mounting board by separating the copper foil layer and the first seed layer.