Light emitting display apparatus

Abstract

A light-emitting display device according to one or more embodiments of the present specification may include a substrate having a plurality of subpixels having a light-emitting region and a non-light-emitting region, a pixel circuit disposed in the non-light-emitting region of the substrate, at least one insulating layer disposed on the pixel circuit, a first overcoat layer disposed on the at least one insulating layer and having an inclined surface with a regular taper structure whose width increases toward the substrate, a reflective layer formed on the inclined surface of the first overcoat layer, a second overcoat layer in contact with the first overcoat layer to cover the reflective layer, and a light-emitting element disposed on the first overcoat layer and the second overcoat layer and overlapping with the light-emitting region.

Description

Technology Field

[0001] This specification relates to a light-emitting display device. Background Technology

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. Accordingly, light-emitting display devices such as Liquid Crystal Displays (LCDs), Organic Light Emitting Displays (OLEDs), Micro Light Emitting Diodes (Micro LEDs), and Quantum Dot Displays (QDs) are being utilized in recent years.

[0003] Among light-emitting display devices, organic light-emitting display devices are self-luminous, and holes and electrons are injected into the light-emitting layer from an anode electrode for hole injection and a cathode electrode for electron injection, respectively, and an exciton formed by the combination of the injected holes and electrons emits light when it falls from the excited state to the ground state, thereby displaying an image.

[0004] In such light-emitting display devices, some of the light emitted from the light-emitting element may not be emitted to the outside due to total internal reflection between interfaces or layers within the display panel. This results in a problem where the light extraction efficiency of the light-emitting display device is reduced. The problem to be solved

[0005] The problem to be solved according to one or more embodiments of the present specification is to provide a light-emitting display device capable of improving the light extraction efficiency of light emitted from a light-emitting element.

[0006] The problems solved according to one or more embodiments of this specification are not limited to those mentioned above, and other unmentioned problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0007] A light-emitting display device according to one or more embodiments of the present specification may include a substrate having a plurality of subpixels having a light-emitting region and a non-light-emitting region, a pixel circuit disposed in the non-light-emitting region of the substrate, at least one insulating layer disposed on the pixel circuit, a first overcoat layer disposed on the at least one insulating layer and having an inclined surface with a regular taper structure whose width increases toward the substrate, a reflective layer formed on the inclined surface of the first overcoat layer, a second overcoat layer in contact with the first overcoat layer to cover the reflective layer, and a light-emitting element disposed on the first overcoat layer and the second overcoat layer and overlapping with the light-emitting region.

[0008] Specific details according to various examples of this specification, other than the means for solving the problem mentioned above, are included in the description and drawings below. Effects of the invention

[0009] According to one or more embodiments of the present specification, a light-emitting display device capable of improving the light extraction efficiency of light emitted from a light-emitting element can be provided.

[0010] A light-emitting display device according to one or more embodiments of the present specification can improve light extraction efficiency, thereby reducing power consumption and enabling low-power operation, and can realize ESG (Environmental, Social, Governance) effects by reducing production energy.

[0011] The effects of this specification are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description below.

[0012] Since the content of the invention described above regarding the problem to be solved, the means for solving the problem, and the effect does not specify the essential features of the claim, the scope of the claim is not limited by the matters described in the content of the invention. Brief explanation of the drawing

[0013] FIG. 1 is a drawing showing a light-emitting display device according to an embodiment of the present specification. FIG. 2 is a circuit diagram of a subpixel of a light-emitting display device according to an embodiment of the present specification. FIG. 3 is a drawing showing a plurality of subpixels in a display panel according to one embodiment of the present specification. FIG. 4 is a cross-sectional view of line I-I' shown in FIG. 3 according to one embodiment of the present specification. FIG. 5 is a drawing showing an example of area A shown in FIG. 4 according to an embodiment of the present specification. FIG. 6 is a drawing showing another example of area A shown in FIG. 4 according to one embodiment of the present specification. FIG. 7 is a drawing showing a plurality of subpixels in a display panel according to another embodiment of the present specification. FIG. 8 is a drawing showing a plurality of subpixels in a display panel according to another embodiment of the present specification. FIGS. 9 to 16 are drawings illustrating a method for manufacturing a display panel according to one embodiment of the present specification. FIGS. 17 to 19 are drawings illustrating a method for manufacturing a display panel according to another embodiment of the present specification. Specific details for implementing the invention

[0014] The advantages and features of this specification and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below but may be implemented in various different forms; these embodiments are provided merely to ensure that the disclosure of this specification is complete and to fully inform those skilled in the art of the scope of the invention, and this specification is defined only by the scope of the claims.

[0015] Shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are exemplary and are not limited to the details depicted. Throughout the specification, the same reference numerals refer to the same components. Furthermore, in describing this specification, if it is determined that a detailed description of related prior art could unnecessarily obscure the essence of this specification, such detailed description is omitted.

[0016] Where terms such as "includes," "has," and "consists of" mentioned in this specification are used, other parts may be added unless "only" is used. Where a component is expressed in the singular, it includes cases where it includes the plural unless specifically stated otherwise.

[0017] In interpreting the components, even if there is no separate explicit description of the error range, it is interpreted as including the error range.

[0018] In the case of a description of a positional relationship, for example, when the positional relationship between two parts is described using terms such as "on," "upper," "lower," or "next to," for example, unless "immediately" or "directly" is used, one or more other parts may be located between the two parts.

[0019] In the case of an explanation of a temporal relationship, if the temporal sequence is explained using "after," "following," "next," or "before," it may include cases where the sequence is not continuous unless "immediately" or "directly" is used.

[0020] The terms first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used merely to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the technical scope of this specification.

[0021] In describing the components of this specification, terms such as first, second, A, B, (a), or (b) may be used. These terms are used only to distinguish the components from other components, and the nature, order, sequence, or number of the components are not limited by the terms.

[0022] Where it is stated that one component is "connected," "coupled," "joined," or "attached" to another component, it should be understood that while the component may be directly connected, coupled, joined, or attached to the other component, other components may also be interposed between each component that may be indirectly connected, coupled, joined, or attached unless specifically stated otherwise.

[0023] Where it is stated that a component or layer is in "contact" or "overlap" with another component or layer, it should be understood that while the component or layer may be in direct contact or overlap with the other component or layer, other components may also be interposed between each component that may be indirectly contacted or overlapped unless specifically stated otherwise.

[0024] "At least one" should be understood to include all combinations of one or more associated components. For example, the meaning of "at least one of the first, second, and third components" may be said to include not only the first, second, or third components, but also all combinations of two or more of the first, second, and third components.

[0025] The features of each of the various embodiments of this specification may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0026] The embodiments of this specification are described below through the attached drawings and examples. For the convenience of explanation, the scale of the components shown in the drawings may differ from the actual scale and is therefore not limited to the scale shown in the drawings.

[0027] FIG. 1 is a drawing showing a light-emitting display device according to an embodiment of the present specification.

[0028] In the following, the X-axis represents the direction parallel to the scan line (or gate line), the Y-axis represents the direction parallel to the data line, and the Z-axis represents the height direction of the light-emitting display device.

[0029] Although the light-emitting display device according to the embodiments of this specification has been described primarily as being implemented as an organic light-emitting display, it may also be implemented as a liquid crystal display, a quantum dot lighting-emitting diode, or an electrophoretic display.

[0030] Referring to FIG. 1, a light-emitting display device according to an embodiment of the present specification may include a display panel (110), a scan driver (120) (or gate driver) embedded in the display panel (110), a data driver (130) connected to the display panel (110), a timing control unit (160) that controls the scan driver (120) and the data driver (130), and a power circuit (170).

[0031] The display panel (110) may include a display area (DA) and a non-display area (NDA) positioned on the outer edge surrounding the display area (DA). The display panel (110) may display an image by providing pixels (P) in the display area (DA). Each pixel (P) may include a plurality of sub-pixels (SP). The structure of the sub-pixels (SP) may vary depending on the type of light-emitting display device. For example, the sub-pixels (SP) may be configured in a top emission method, a bottom emission method, or a dual emission method depending on the structure. Sub-pixels (SP) refer to units that can emit their own color without a specific type of color filter being formed or without a color filter being formed. The sub-pixels (SP) may have one or more different light-emitting areas depending on the light-emitting characteristics. For example, a plurality of subpixels (SP) may be arranged in a stripe type or a quad type, but the embodiments of this specification are not limited thereto, and the color type, arrangement type, arrangement order, etc. of the subpixels (SP) may be configured in various forms depending on the light emission characteristics, the lifespan of the device, the specifications of the device, etc.

[0032] Data lines (DL) and scan lines (SL) (or gate lines) connected to subpixels (SP) may be arranged on the display panel (110). The data lines (DL) may be arranged to intersect with the scan lines (SL). Each subpixel (SP) of the display panel (110) may be connected to either of the data lines (DL) and either of the scan lines (SL). The data lines (DL) may supply a data voltage supplied from the data driver (130) to each subpixel (SP). The scan lines (SL) may supply a scan signal supplied from the scan driver (120) to each subpixel (SP).

[0033] Each of the subpixels (SP) is turned on by a scan signal, and when the data voltage of the data line (DL) is supplied to the gate electrode of the driving transistor, the light-emitting element can emit light according to the drain-source current of the driving transistor. The scan driving unit (120) can receive a scan control signal (GCS) from the timing control unit (160). The scan driving unit (120) can supply scan signals or light-emitting control signals to the scan lines (SL) using the scan control signal (GCS).

[0034] The scan driver (120) may be configured in a non-display area (NDA) outside one or both sides of the display area (DA) using a GIP (gate driver in panel) method. Alternatively, the scan driver (120) may be manufactured as a driving chip, mounted on a flexible film, and attached to a non-display area (NDA) outside one or both sides of the display area (DA) using a TAB (tape automated bonding) method.

[0035] The data driver (130) can receive digital video data (DATA) and a data control signal (DCS) from the timing control unit (160). The data driver (130) can use the data control signal (DCS) to convert the digital video data (DATA) into an analog positive / negative data voltage and supply it to the data lines (DL).

[0036] The timing control unit (160) can receive digital video data (DATA) and timing signals from the host system. The timing signals may include a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, a dot clock, etc. The vertical synchronization signal is a signal that defines a frame period. The horizontal synchronization signal is a signal that defines a horizontal period required to supply data voltages to the pixels of a horizontal line of the display panel (110). The data enable signal is a signal that defines a period during which valid data is input. The dot clock is a signal that repeats at a predetermined short period.

[0037] The timing control unit (160) can generate a data control signal (DCS) for controlling the operation timing of the data driving unit (130) and a scan control signal (GCS) for controlling the operation timing of the scan driving unit (120) based on the timing signals. The timing control unit (160) can output the scan control signal (GCS) to the scan driving unit (120) and output digital video data (DATA) and the data control signal (DCS) to the data driving unit (130).

[0038] The power circuit (170) can generate and supply multiple driving voltages required for the operation of all circuit configurations of the light-emitting display device using an input voltage. The power circuit (170) can generate and supply a first power voltage (EVDD) (or pixel power voltage), a second power voltage (EVSS) (or common power voltage), and an initialization voltage (Vref) (or reference voltage) to the display panel (110). The power circuit (170) can generate and supply various driving voltages required for the operation of the scan driving unit (120), the data driving unit (130), and the timing control unit (160).

[0039] FIG. 2 is a circuit diagram of a subpixel of a light-emitting display device according to an embodiment of the present specification.

[0040] Referring to FIG. 2, each pixel (P) includes a plurality of subpixels (SP) constituting a unit pixel, and each of the plurality of subpixels (SP) may include a pixel circuit having a 3T (Transistor) 1C (Capacitor) structure including a driving transistor (DR), a first switching transistor (TR1), a second switching transistor (TR2), and a storage capacitor (Cst), and a light-emitting element (ED), but the embodiments of the present specification are not limited thereto. For example, each subpixel (SP) may further include a compensation circuit, and in this case, it may have various structures such as 3T2C, 4T1C, 4T2C, 5T1C, 5T2C, 6T1C, 6T2C, 7T1C, 7T2C, etc.

[0041] At least one thin-film transistor (DR, TR1, TR2) of each subpixel (SP) may include a gate electrode, a source electrode, and a drain electrode. Since the source electrode and the drain electrode are not fixed and can change depending on the direction of voltage and current applied to the gate electrode, either the source electrode or the drain electrode may be referred to as the first electrode and the other as the second electrode. At least one thin-film transistor (DR, TR1, TR2) may utilize at least one of a polysilicon semiconductor, an amorphous silicon semiconductor, or an oxide semiconductor. The transistors (DTR, TR1, TR2) may be P-type or N-type, or a combination of P-type and N-type may be used.

[0042] The driving transistor (DR) is a transistor for driving a light-emitting element (ED) and may include a first node (N1) to which a data voltage (Vdata) is applied, a second node (N2) connected to a pixel electrode (first electrode or anode electrode) of the light-emitting element (ED), and a third node (N3) connected to a first power supply voltage line (DVL) (or pixel power supply voltage line) to which a first power supply voltage (EVDD) (or pixel power supply voltage) is applied. For example, the driving transistor (DR) may generate a data current from the first power supply voltage (EVDD) supplied from the first power supply voltage line (DVL) and supply it to the first electrode of the light-emitting element (ED).

[0043] The first switching transistor (TR1) may serve to supply a data voltage (Vdata) supplied from a data line (DL) to the first node (N1) of a driving transistor (DT), and the second switching transistor (TR2) may serve to supply a reference voltage (Vref) supplied from a reference voltage line (RVL) to the second node (N2) of a driving transistor (DR) or to output the voltage of the second node (N2) of the driving transistor (DR). The storage capacitor (Cst) is connected between the first node (N1) and the second node (N2) of the driving transistor (DR) and may serve to maintain the data voltage (Vdata) supplied to the driving transistor (DR) for one frame, but the embodiments of the present specification are not limited thereto.

[0044] A light-emitting element (ED) may have a pixel electrode (first electrode or anode electrode) connected to a second node (N2) of a driving transistor (DR), and a common electrode (second electrode or cathode electrode) connected to a second power supply voltage line (CVL). The light-emitting layer (or organic light-emitting layer) between the first electrode and the second electrode of the light-emitting element (ED) may emit light in response to a driving current generated by the driving transistor (DR). The pixel electrode of the light-emitting element (ED) may be an independent electrode for each light-emitting element, and the common electrode and the light-emitting layer of the light-emitting element (ED) may be a common layer shared by all light-emitting elements, but the embodiments of this specification are not limited thereto. According to the embodiments of this specification, the light-emitting element (ED) may include two or more light-emitting layers and may be configured in a tandem structure in which two or more light-emitting layers are vertically stacked, but the embodiments of this specification are not limited thereto.

[0045] FIG. 3 is a drawing showing a plurality of subpixels in a display panel according to one embodiment of the present specification. FIG. 4 is a cross-sectional view of line I-I' shown in FIG. 3 according to one embodiment of the present specification. FIG. 5 is a drawing showing an example of area A shown in FIG. 4 according to one embodiment of the present specification. FIG. 6 is a drawing showing another example of area A shown in FIG. 4 according to another embodiment of the present specification.

[0046] Referring to FIGS. 3 through 6, a display panel (110) according to one embodiment of the present specification may be configured in a top emission method, a bottom emission method, or a dual emission method. For example, the display panel (110) may be implemented in a bottom emission method, but the embodiments of the present specification are not limited thereto.

[0047] A display panel (110) according to one embodiment of the present specification may include a plurality of subpixels (SP1, SP2, SP3, SP4), a plurality of data lines (DL1, DL2, DL3, DL4), at least one scan line (SL) (or gate line), a first power supply voltage line (DVL), a reference voltage line (RVL), a pixel circuit (CA1, CA2, CA3, CA4), at least one color filter (CF1, CF3, CF4), a first overcoat layer (OC1), a second overcoat layer (OC2), and a reflection layer (RP), etc.

[0048] Multiple subpixels (SP1, SP2, SP3, SP4) may be unit pixels expressing different colors. Multiple subpixels (SP1, SP2, SP3, SP4) may be arranged in a stripe pattern in a first direction (or X-axis direction) or a second direction (or Y-axis direction). For example, multiple subpixels (SP1, SP2, SP3, SP4) may be arranged in the first direction (or X-axis direction), but the embodiments of this specification are not limited thereto, and the arrangement order or arrangement form may be varied.

[0049] A plurality of subpixels (SP1, SP2, SP3, SP4) may include a light-emitting region (EA1, EA2, EA3, EA4) and a non-light-emitting region (NEA) in which a light-emitting element (ED), composed of a pixel electrode (AE), a light-emitting layer (EL), and a common electrode (CE), is disposed to emit light. For example, the non-light-emitting region (NEA) may include a first non-light-emitting region (NEA1) in which a pixel circuit (CA1, CA2, CA3, CA4) is disposed, and a second non-light-emitting region (NEA2) between adjacent subpixels (SP1, SP2, SP3, SP4). For example, the pixel circuit (CA1, CA2, CA3, CA4) of each subpixel (SP1, SP2, SP3, SP4) may include at least one thin-film transistor (DR, TR1, TR2) and a storage capacitor (Cst), but the embodiments of the present specification are not limited thereto.

[0050] A display panel (110) according to one embodiment of the present specification may be implemented in a bottom-emitting manner, and the light-emitting areas (EA1, EA2, EA3, EA4) of each sub-pixel (SP1, SP2, SP3, SP4) and the first non-light-emitting area (NEA1) in which the pixel circuit (CA1, CA2, CA3, CA4) is arranged may not overlap with each other, or at least partially overlap. For example, the light-emitting areas (EA1, EA2, EA3, EA4) may be arranged on the upper side of the second direction (or Y-axis direction), and the first non-light-emitting area (NEA1) may be arranged on the lower side of the second direction, but the embodiments of the present specification are not limited thereto.

[0051] At least one scan line (SL) extending in a first direction (or X-axis direction) may be disposed in a first non-luminous region (NEA1), and one or more voltage signal lines extending in a second direction (or Y-axis direction) may be disposed in a second non-luminous region (NEA2). For example, one or more voltage signal lines may include a plurality of data lines (DL1, DL2, DL3, DL4), at least one reference voltage line (RVL), and at least one first power supply voltage line (DVL) (or driving power supply voltage line).

[0052] At least one scan line (SL) (or gate line) may be placed so as to overlap with a first non-emissive region (NEA1) in which pixel circuits (CA1, CA2, CA3, CA4) are placed. At least one scan line (SL) may be extended in a first direction (or X-axis direction) to traverse the first non-emissive region (NEA1). At least one scan line (SL) may supply a scan signal to at least one thin-film transistor (TR1, TR2) included in the pixel circuits (CA1, CA2, CA3, CA4). For example, at least one scan line (SL) may be composed of the same material in the same layer as the gate electrode of at least one thin-film transistor (DR, TR1, TR2) placed in the pixel circuits (CA1, CA2, CA3, CA4). For example, at least one scan line (SL) may include a plurality of scan lines (SL) to apply individual scan signals to the first and second switching transistors (TR1, TR2) of the pixel circuit (CA1, CA2, CA3, CA4), but the embodiments of the present specification are not limited thereto.

[0053] Multiple data lines (DL1, DL2, DL3, DL4) may be arranged to correspond to each subpixel (SP1, SP2, SP3, SP4). Multiple data lines (DL1, DL2, DL3, DL4) may be arranged between multiple subpixels (SP1, SP2, SP3, SP4). For example, multiple data lines (DL1, DL2, DL3, DL4) may be arranged to overlap a second non-emissive region (NEA2) between adjacent subpixels (SP1, SP2, SP3, SP4). Multiple data lines (DL1, DL2, DL3, DL4) may extend in a second direction (or Y-axis direction) from the second non-emissive region (NEA2).

[0054] At least one first power supply voltage line (DVL) (or driving power supply voltage line) may be positioned to correspond to a plurality of subpixels (SP1, SP2, SP3, SP4). At least one first power supply voltage line (DVL) may be positioned to the left or right of the plurality of subpixels (SP1, SP2, SP3, SP4). For example, at least one first power supply voltage line (DVL) may be positioned to the left of the first subpixel (SP1) and may be positioned to overlap with the second non-luminous region (NEA2) between the first subpixel (SP1) and the fourth subpixel (SP4) of another pixel (P) adjacent to it. Additionally, at least one first power supply voltage line (DVL) may be positioned to the right of the fourth subpixel (SP4) and may be positioned to overlap with the second non-luminous region (NEA2) between the fourth subpixel (SP4) and the first subpixel (SP1) of another pixel (P) adjacent to it. At least one first power voltage line (DVL) can be extended in a second direction (or Y-axis direction) in a second non-luminous region (NEA2) between adjacent pixels (P).

[0055] A reference voltage line (RVL) may be positioned to correspond to a plurality of subpixels (SP1, SP2, SP3, SP4). A reference voltage line (RVL) may be positioned within a plurality of subpixels (SP1, SP2, SP3, SP4). A reference voltage line (RVL) may be positioned between a second subpixel (SP2) and a third subpixel (SP3). A reference voltage line (RVL) may extend in a second direction (or Y-axis direction) from a second non-luminous region (NEA2) between the second subpixel (SP2) and the third subpixel (SP3).

[0056] The first non-emissive region (NEA1) may further include a bank portion (BA) covering the edge of the pixel electrode (AE) of each subpixel (SP1, SP2, SP3, SP4). The bank portion (BA) may be positioned between the pixel electrode (AE) of each subpixel (SP1, SP2, SP3, SP4) and the light-emitting layer (EL). For example, the bank portion (BA) may be configured to cover a contact portion (CNT) where the pixel electrode (AE) of each subpixel (SP1, SP2, SP3, SP4) and the second node (N2) (or source electrode) of the driving transistor (DR) of each pixel circuit (CA1, CA2, CA3, CA4) are electrically connected. According to one embodiment of the present specification, the second overcoat layer (OC2) may be disposed in the second non-emissive region (NEA2) between each subpixel (SP1, SP2, SP3, SP4), excluding the first non-emissive region (NEA1) in which the bank portion (BA) is disposed. For example, the second overcoat layer (OC2) may include at least one second pattern portion (OC2_P) disposed in the emitting region (EA1, EA2, EA3, EA4) and a bank pattern portion (OC2_BA) disposed in the second non-emissive region (NEA2).

[0057] The light-emitting regions (EA1, EA2, EA3, EA4) may correspond to regions that emit light from each subpixel (SP1, SP2, SP3, SP4). For example, each subpixel (SP1, SP2, SP3, SP4) includes a light-emitting element (ED) composed of a pixel electrode (AE), a light-emitting layer (EL), and a common electrode (CE) superimposed, and the light-emitting regions (EA1, EA2, EA3, EA4) may correspond to the light-emitting element (EA) of each subpixel (SP1, SP2, SP3, SP4). For example, the light-emitting regions (EA1, EA2, EA3, EA4) may correspond to the area of ​​the pixel electrode (AE) patterned and arranged on the first overcoat layer (OC1) and the second overcoat layer (OC2).

[0058] The light-emitting regions (EA1, EA2, EA3, EA4) may include first to fourth light-emitting regions (EA1, EA2, EA3, EA4) that emit light of different colors. For example, the light-emitting regions (EA1, EA2, EA3, EA4) may overlap with at least one color filter (CF1, CF3, CF4) and emit light of different colors through this.

[0059] At least one color filter (CF1, CF3, CF4) can emit light of different colors. For example, at least one color filter (CF1, CF3, CF4) may be composed of an organic material that transmits light of different colors. At least one color filter (CF1, CF3, CF4) may include a first color filter (CF1) that transmits red light, a third color filter (CF3) that transmits blue light, and a fourth color filter (CF4) that transmits green light.

[0060] The first light-emitting region (EA1) of the first subpixel (SP1) may emit red light through the first color filter (CF1), the second light-emitting region (EA2) of the second subpixel (SP2) may not have a color filter or may emit white light through a color filter that transmits white light, the third light-emitting region (EA3) of the third subpixel (SP3) may emit blue light through the third color filter (CF3), and the fourth light-emitting region (EA4) of the fourth subpixel (SP4) may emit green light through the fourth color filter (CF4), but the embodiments of the present specification are not limited thereto.

[0061] According to one embodiment of the present specification, a plurality of subpixels (SP1, SP2, SP3, SP4) may include a first overcoat layer (OC1) and a second overcoat layer (OC2) disposed on a substrate (111). For example, the first overcoat layer (OC1) and the second overcoat layer (OC2) may be disposed to overlap with light-emitting regions (EA1, EA2, EA3, EA4). A light-emitting element (ED) may be disposed on the first overcoat layer (OC1) and the second overcoat layer (OC2).

[0062] Among the plurality of subpixels (SP1, SP2, SP3, SP4), the first, third, and fourth subpixels (SP1, SP3, SP4) in which color filters (CF1, CF3, CF4) are disposed may have a first overcoat layer (OC1) and a second overcoat layer (OC2) disposed on the corresponding color filters (CF1, CF3, CF4). Additionally, among the plurality of subpixels (SP1, SP2, SP3, SP4), the second subpixel (SP2) in which no color filters are disposed may have the first overcoat layer (OC1) and the second overcoat layer (OC2) disposed on at least one insulating layer (BF, PAS). For example, the light-emitting element (ED) corresponding to the first, third, and fourth subpixels (SP1, SP3, SP4) and the light-emitting element (ED) corresponding to the second subpixel (SP2) may have different heights. For example, the light-emitting element (ED) corresponding to the first, third, and fourth subpixels (SP1, SP3, SP4) may have a height greater than that of the light-emitting element (ED) corresponding to the second subpixel (SP2) by the height of the color filter (CF1, CF3, CF4), but the embodiments of the present specification are not limited thereto.

[0063] Referring to FIGS. 4 to 6, a display panel (110) according to one embodiment of the present specification may include a substrate (111), a plurality of data lines (DL1, DL2, DL3, DL4), at least one first power supply voltage line (DVL), a reference voltage line (RVL), at least one insulating layer (BF, PAS), at least one color filter (CF1, CF3, CF4), a first overcoat layer (OC1), a second overcoat layer (OC2), a reflective layer (RP), a pixel electrode (AE), a light-emitting layer (EL), and a common electrode (CE), etc.

[0064] At least one voltage signal line may be disposed on the substrate (111). For example, a plurality of data lines (DL1, DL2, DL3, DL4), at least one first power supply voltage line (DVL), and a reference voltage line (RVL) may be disposed on the substrate (111). For example, the plurality of data lines (DL1, DL2, DL3, DL4), at least one first power supply voltage line (DVL), and the reference voltage line (RVL) may be composed of the same material in the same layer as the light-blocking layer disposed in the pixel circuit (CA1, CA2, CA3, CA4), but the embodiments of the present specification are not limited thereto.

[0065] At least one insulating layer (BF, PAS) may be disposed on the substrate (111). At least one insulating layer (BF, PAS) is disposed on the pixel circuit (CA1, CA2, CA3, CA4), and at least one insulating layer (BF, PAS) may include a buffer layer (BF) and a passivation layer (PAS). For example, a buffer layer (BF) may be disposed on the substrate (111). The buffer layer (BF) may be configured to cover at least one voltage signal line and a light blocking layer on the substrate (111). At least one thin-film transistor and a passivation layer (PAS) may be disposed on the buffer layer (BF). For example, between the buffer layer (BF) and the passivation layer (PAS), a gate insulating layer and an interlayer insulating layer may be further included that are interposed between or cover the active layer, gate electrode, and source / drain electrode of at least one thin-film transistor, but the embodiments of this specification are not limited thereto. For example, at least one insulating layer (BF, PAS) is silicon oxide (SiO₂). X ), silicon nitride (SiN X It may be composed of a single layer or multiple layers including an inorganic insulating material such as aluminum oxide (Al2O3), but the embodiments of this specification are not limited thereto.

[0066] At least one color filter (CF1, CF3, CF4) may be disposed on at least one insulating layer (BF, PAS). For example, at least one color filter (CF1, CF3, CF4) may be disposed on a passivation layer (PAS). At least one color filter (CF1, CF3, CF4) may be disposed corresponding to the first subpixel (SP1), the third subpixel (SP3), and the fourth subpixel (SP4) among the first to fourth subpixels (SP1, SP2, SP3, SP4). A first overcoat layer (OC1) and a second overcoat layer (OC2) may be disposed on at least one color filter (CF1, CF3, CF4). Additionally, a color filter may not be disposed on the second subpixel (SP2) among the first to fourth subpixels (SP1, SP2, SP3, SP4). For example, a first overcoat layer (OC1) and a second overcoat layer (OC2) may be disposed on a passivation layer (PAS) corresponding to a second subpixel (SP2).

[0067] On at least one insulating layer (BF, PAS), a second non-emissive region (NEA2) between adjacent subpixels (SP1, SP2, SP3, SP4) may have a portion of at least one color filter (CF1, CF3, CF4) and a second overcoat layer (OC2) disposed therein. For example, a portion of a first color filter (CF1) and a second overcoat layer (OC2) covering the first color filter (CF1) may be disposed in the second non-emissive region (NEA2) between the first subpixel (SP1) and the second subpixel (SP2). Additionally, a portion of a third color filter (CF3) and a second overcoat layer (OC2) covering the third color filter (CF3) may be disposed in the second non-emissive region (NEA2) between the second subpixel (SP2) and the third subpixel (SP3). Additionally, in the second non-emissive region (NEA2) between the third subpixel (SP3) and the fourth subpixel (SP4), a portion of the third color filter (CF3) and the fourth color filter (CF4) may be arranged so as to overlap or be spaced apart from each other, and a second overcoat layer (OC2) covering the third and fourth color filters (CF3, CF4) may be arranged.

[0068] In the light-emitting regions (EA1, EA2, EA3, EA4) of each subpixel (SP1, SP2, SP3, SP4), a first overcoat layer (OC1), a second overcoat layer (OC2), and a reflective layer (RP) may be disposed on at least one insulating layer (BF, PAS) or at least one color filter (CF1, CF3, CF4). For example, a first overcoat layer (OC1), a second overcoat layer (OC2), and a reflective layer (RP) may be disposed on the corresponding color filters (CF1, CF3, CF4) of the first, third, and fourth subpixels (SP1, SP3, SP4). Additionally, a first overcoat layer (OC1), a second overcoat layer (OC2), and a reflective layer (RP) may be disposed on at least one insulating layer (BF, PAS) of the second subpixel (SP2).

[0069] According to one embodiment of the present specification, the first overcoat layer (OC1) is disposed on at least one insulating layer (BF, PAS) or at least one color filter (CF1, CF3, CF4) and may have an inclined surface (OC1_S3) of a regular tapered structure that increases in width toward the substrate (111). Additionally, a reflective layer (RP) may be formed on the inclined surface (OC1_S3) of the first overcoat layer (OC1). Additionally, the second overcoat layer (OC2) may be formed in contact with the first overcoat layer (OC1) to cover the reflective layer (RP). For example, the reflective layer (RP) may be disposed between the first overcoat layer (OC1) and the second overcoat layer (OC2). The first overcoat layer (OC1) and the second overcoat layer (OC2) may have different heights at the portion where they contact each other. For example, the height of the first overcoat layer (OC1) may be higher than the height of the second overcoat layer (OC2). In the light-emitting regions (EA1, EA2, EA3, EA4) of each subpixel (SP1, SP2, SP3, SP4), a light-emitting element (ED) may be disposed on the first overcoat layer (OC1) and the second overcoat layer (OC2).

[0070] The first overcoat layer (OC1) may include a first surface (OC1_S1) in contact with a light-emitting element (ED) and a second surface (OC1_S2) facing the first surface (OC1_S1). For example, the width (D1) of the first surface (OC1_S1) of the first overcoat layer (OC1) may be narrower than the width (D2) of the second surface (OC1_S2) of the first overcoat layer (OC1).

[0071] A first overcoat layer (OC1) according to one embodiment of the present specification may include a plurality of first pattern portions (OC1_P) having a trapezoidal shape having a first surface (OC1_S1), a second surface (OC1_S2), and an inclined surface (OC1_S3). For example, the inclined surface (OC1_S3) of the plurality of first pattern portions (OC1_P) may form an angle (a) of 45 to 70 degrees with respect to the second surface (OC1_S2). A reflective layer (RP) may be formed on the inclined surface (OC1_S3) of the plurality of first pattern portions (OC1_P).

[0072] The second overcoat layer (OC2) may include a first surface (OC2_S1) in contact with the light-emitting element (ED) and a second surface (OC2_S2) facing the first surface (OC2_S1). For example, the width (d1) of the first surface (OC2_S1) of the second overcoat layer (OC2) may be wider than the width (d2) of the second surface (OC2_S2) of the second overcoat layer (OC2). The second overcoat layer (OC2) may include at least one second pattern portion (OC2_P) formed between a plurality of adjacent first pattern portions (OC1_P). The at least one second pattern portion (OC2_P) may be formed to cover a reflective layer (RP) disposed on the inclined surface (OC1_S3) of the plurality of first pattern portions (OC1_P). The height (H2) of the first surface (OC2_S1) of the second overcoat layer (OC2) may be lower than the height (H1) of the first surface (OC1_S1) of the first overcoat layer (OC1). For example, the height (H2) of the first surface (OC2_S1) of at least one second pattern part (OC2_P) may be lower than the height (H1) of the first surface (OC1_S1) of a plurality of first pattern parts (OC1_P).

[0073] A reflective layer (RP) may be disposed on the inclined surface (OC1_S3) of a plurality of first pattern portions (OC1_P). The reflective layer (RP) may provide a plurality of reflective structures between the light-emitting element (ED) and the substrate (111). For example, the reflective layer (RP) may be formed from a metallic material with high reflectivity, such as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an Ag alloy, a stacked structure of Ag alloy and ITO (ITO / Ag alloy / ITO), a MoTi alloy, and a stacked structure of MoTi alloy and ITO (ITO / MoTi alloy / ITO). The Ag alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu). The MoTi alloy may be an alloy of molybdenum (Mo) and titanium (Ti). Additionally, the reflective layer (RP) may be composed of a semi-transmissive conductive material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag), but the embodiments of this specification are not limited thereto.

[0074] A light-emitting element (ED) may overlap with each light-emitting region (EA1, EA2, EA3, EA4) and may be disposed on a first overcoat layer (OC1) and a second overcoat layer (OC2). For example, the light-emitting element (ED) may be disposed on a plurality of first pattern portions (OC1_P) of the first overcoat layer (OC1) and at least one second pattern portion (OC2_P) of the second overcoat layer (OC2). The light-emitting element (ED) may have a groove shape formed by a step difference between a plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P). The light-emitting element (ED) may include a pixel electrode (AE) (first electrode or anode electrode), a light-emitting layer (EL) (or organic light-emitting layer), and a common electrode (CE) (second electrode or cathode electrode) corresponding to each light-emitting region (EA1, EA2, EA3, EA4).

[0075] A pixel electrode (AE) may be placed on the first and second overcoat layers (OC1, OC2). The pixel electrode (AE) may be patterned on the first and second overcoat layers (OC1, OC2) to define each light-emitting region (EA1, EA2, EA3, EA4). The area of ​​the patterned pixel electrode (AE) may correspond to each light-emitting region (EA1, EA2, EA3, EA4). The pixel electrode (AE) may be composed of a transparent metallic material or a semi-transparent metallic material. For example, the pixel electrode (AE) may be composed of a transparent conductive material (TCO), such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO), which can transmit light. The pixel electrode (AE) may be composed of a transmissive conductive material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). For example, the light extraction efficiency of the pixel electrode (AE) composed of a transmissive conductive material may be enhanced by microcavities. The pixel electrode (AE) may be the anode electrode of a light-emitting device (ED).

[0076] The light-emitting layer (EL) may be disposed on the pixel electrode (AE). Additionally, the light-emitting layer (EL) may be a common layer formed across a plurality of sub-pixels (SP1, SP2, SP3, SP4). The light-emitting layer (EL) may be disposed on the first overcoat layer (OC1) and the second overcoat layer (OC2). For example, the light-emitting layer (EL) may be disposed on a part of the first surface (OC1_S1) and the inclined surface (OC1_S3) of the first overcoat layer (OC1) and on the first surface (OC2_S1) of the second overcoat layer (OC2). The light-emitting layer (EL) may include a hole transporting layer, an emission material layer, and an electron transporting layer. For example, when voltage is applied to the pixel electrode (AE) and the common electrode (CE), holes and electrons move to the light-emitting layer (EL) through the hole transport layer and the electron transport layer, respectively, and can combine with each other in the light-emitting layer (EL) to emit light. For example, the light-emitting layer (EL) may be a white light-emitting layer that emits white light.

[0077] The light-emitting layer (EL) according to the embodiments of this specification may include two or more light-emitting layers to emit white light. For example, the light-emitting layer (EL) may be configured in a tandem structure including a first light-emitting layer and a second light-emitting layer that are vertically stacked to emit white light by mixing a first light and a second light. For example, the light-emitting layer (EL) may be configured such that three or four light-emitting layers are stacked vertically, but the embodiments of this specification are not limited thereto.

[0078] A common electrode (CE) may be disposed on a light-emitting layer (EL). Additionally, the common electrode (CE) may be a common layer formed across a plurality of sub-pixels (SP1, SP2, SP3, SP4). The common electrode (CE) may be disposed on a first overcoat layer (OC1) and a second overcoat layer (OC2). For example, the common electrode (CE) may be disposed on a part of the first surface (OC1_S1) and inclined surface (OC1_S3) of the first overcoat layer (OC1) and on the first surface (OC2_S1) of the second overcoat layer (OC2). The common electrode (CE) may be disposed on pixel electrodes (AE) and light-emitting layers (EL) that are in contact with each other to form light-emitting regions (EA1, EA2, EA3, EA4). For example, the common electrode (CE) can be formed from a highly reflective metallic material such as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an Ag alloy, a stacked structure of Ag alloy and ITO (ITO / Ag alloy / ITO), a MoTi alloy, and a stacked structure of MoTi alloy and ITO (ITO / MoTi alloy / ITO). The Ag alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu). The MoTi alloy may be an alloy of molybdenum (Mo) and titanium (Ti). The common electrode (CE) may be the cathode electrode of a light-emitting device (ED).

[0079] According to one example of the present specification, as illustrated in FIGS. 4 and 5, the second overcoat layer (OC2) may have a convex upper surface. For example, at least one second pattern portion (OC2_P) of the second overcoat layer (OC2) may have a convex surface in which the center (CL) of the first surface (OC2_S1) is higher than the periphery. For example, the height (h2) of the center (CL) of the first surface (OC2_S1) of at least one second pattern portion (OC2_P) may have a convex surface in which it is higher than the height (h1) of the periphery. Additionally, the upper surface of the first overcoat layer (OC1) may have a flat surface. For example, a plurality of first pattern portions (OC1_P) of a first overcoat layer (OC1) may have a first surface (OC1_S1) that is flat and may have a height greater than the first surface (OC2_S1) of at least one second pattern portion (OC2_P). Additionally, the area of ​​the first surface (OC1_S1) of the plurality of first pattern portions (OC1_P) may be larger than the area of ​​the first surface (OC2_S1) of at least one second pattern portion (OC2_P). Accordingly, a light-emitting element (ED) according to an example of the present specification may have a groove shape in the form of a convex lens due to the shape difference between the plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P). Accordingly, the second overcoat layer (OC2) is configured to have a convex lens shape, thereby forming a light extraction path in which light emitted from the light-emitting element (ED) is reflected by the common electrode (CE) arranged in a convex lens shape and concentrated in a downward direction.

[0080] According to another example of the present specification, as illustrated in FIG. 6, the second overcoat layer (OC2) may have a flat upper surface. For example, at least one second pattern portion (OC2_P) of the second overcoat layer (OC2) may have a first surface (OC2_S1) that is flat. Additionally, the upper surface of the first overcoat layer (OC1) may have a flat upper surface. For example, a plurality of first pattern portions (OC1_P) of the first overcoat layer (OC1) may have a first surface (OC1_S1) that is flat and may have a height greater than the first surface (OC2_S1) of at least one second pattern portion (OC2_P). Additionally, the area of ​​the first surface (OC1_S1) of the plurality of first pattern portions (OC1_P) may be larger than the area of ​​the first surface (OC2_S1) of at least one second pattern portion (OC2_P). Accordingly, a light-emitting element (ED) according to another example of the present specification may have a groove shape due to a step difference between a plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P). Accordingly, the second overcoat layer (OC2) is configured to have a flat surface, so that light emitted from the light-emitting element (ED) can be reflected by a common electrode (CE) arranged in a flat shape to form a light extraction path perpendicular to the downward direction.

[0081] Accordingly, the light extraction efficiency of the display panel (110) according to one embodiment of the present specification can be improved by allowing light in a wave guide mode trapped within a light-emitting element (ED) to be reflected by a common electrode (CE) disposed in a groove shape formed by a step difference between a plurality of first pattern parts (OC1_P) and at least one second pattern part (OC2_P), or in a groove shape formed by a block lens shape formed by a shape difference between a plurality of first pattern parts (OC1_P) and at least one second pattern part (OC2_P), thereby extracting it in a downward direction. In addition, the light extraction efficiency of the display panel (110) according to one embodiment of the present specification can be further improved by allowing light in a glass guide mode trapped within a substrate (111) to be reflected by a reflective layer (RP) disposed between the light-emitting element (ED) and the substrate (111), thereby extracting it in a downward direction.

[0082] FIG. 7 is a drawing showing a plurality of subpixels in a display panel according to another embodiment of the present specification. FIG. 8 is a drawing showing a plurality of subpixels in a display panel according to another embodiment of the present specification. FIG. 7 shows an embodiment in which the configuration of the second non-emissive region (NEA2) in the light-emitting display device described with reference to FIG. 1 to 6 is modified, and FIG. 8 shows an embodiment in which the configuration of the light-emitting regions (EA1, EA2, EA3, EA4) in the light-emitting display device described with reference to FIG. 1 to 6 is modified. In the following description with reference to FIG. 7 and FIG. 8, identical reference numerals are assigned to identical configurations excluding the modified configuration, and redundant descriptions are omitted or described briefly.

[0083] Referring to FIG. 7, a second overcoat layer (OC2) according to another embodiment of the present specification may be disposed in light-emitting regions (EA1, EA2, EA3, EA4). The second overcoat layer (OC2) may be disposed only within the light-emitting regions (EA1, EA2, EA3, EA4) and may not be disposed in the second non-light-emitting region (NEA2).

[0084] According to another embodiment of the present specification, the bank portion (BA) may include a first bank portion (BAa) and a second bank portion (BAb). For example, the first bank portion (BAa) may be placed in a first non-luminous region (NEA1). Additionally, the first bank portion (BAb) may be placed in a second non-luminous region (NEA2). For example, the first bank portion (BAa) and the second bank portion (BAb) may be composed of the same material or different materials. For example, the first bank portion (BAa) and the second bank portion (BAb) may be composed of organic layers such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. For example, the first bank portion (BAa) and the second bank portion (BAb) may be composed of the same material and may be formed by the same process.

[0085] According to another embodiment of the present specification, the first bank portion (BAa) and the second bank portion (BAb) may be black banks comprising at least one of a light-absorbing material or a black material. For example, the first bank portion (BAa) and the second bank portion (BAb) may comprise an insulating light-absorbing material such as black resin or graphite.

[0086] According to another embodiment of the present specification, the first bank portion (BAa) and the second bank portion (BAb) may be composed of different materials. For example, the first bank portion (BAa) may be a transparent bank composed of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, and the second bank portion (BAb) may be a black bank comprising an insulating light-absorbing material such as black resin or graphite, but the embodiments of the present specification are not limited thereto.

[0087] Referring to FIG. 8, a first overcoat layer (OC1) according to another embodiment of the present specification may include a plurality of groove pattern portions (OC1_H). For example, the plurality of groove pattern portions (OC1_H) of the first overcoat layer (OC1) may be formed in an inverted trapezoidal shape having an inclined surface (OC1_S3) that penetrates the first surface (OC1_S1) and the second surface (OC1_S2) of the first overcoat layer (OC1). A reflective layer (RP) may be formed on the inclined surface (OC1_S3) of the plurality of groove pattern portions (OC1_H).

[0088] The second overcoat layer (OC2) may include a plurality of second pattern portions (OC2_P) formed in a plurality of groove pattern portions (OC1_H). For example, the plurality of second pattern portions (OC2_P) of the second overcoat layer (OC2) may be formed in a manner that fills within the plurality of groove pattern portions (OC1_H).

[0089] According to another embodiment of the present specification, a plurality of groove pattern portions (OC1_H) and a plurality of second pattern portions (OC2_P) are arranged at regular intervals in a plane and may be arranged in a grid pattern or a chess pattern, but the embodiments of the present specification are not limited thereto.

[0090] FIGS. 9 to 16 are drawings illustrating a method for manufacturing a display panel according to an embodiment of the present specification. FIGS. 9 to 16 illustrate a method for manufacturing a light-emitting display device described with reference to FIGS. 1 to 8. FIGS. 9 to 16 describe a method for manufacturing a second subpixel (SP2) portion. In the following description, the same reference numerals as in FIGS. 1 to 8 are used, and redundant descriptions thereof are omitted or described briefly.

[0091] Referring to FIG. 9, at least one voltage signal line is patterned on a substrate (111), and a buffer layer (BF) may be formed on the front surface of the substrate (111). The at least one voltage signal line may include a data line (DL), a first power supply voltage line (DVL), and a reference voltage line (RVL). For example, the at least one voltage signal line may be a first and second data line (DL1, DL2) and a reference voltage line (RVL). A passivation layer (PAS) may be formed on the buffer layer (BF).

[0092] Referring to FIG. 10, at least one color filter (CF1, CF3) may be patterned on the passivation layer (PAS). For example, a first color filter (CF1) may be placed on the passivation layer (PAS) corresponding to the first subpixel (SP1), and a third color filter (CF3) may be placed on the passivation layer (PAS) corresponding to the third subpixel (SP3). A first overcoat layer (OC1) may be coated and patterned on at least one color filter (CF1, CF3) and the passivation layer (PAS). For example, the first overcoat layer (OC1) may be patterned to form a plurality of first pattern portions (OC1_P). For example, each first pattern portion (OC1_P) may have an inclined surface with a regular taper structure whose width increases toward the substrate (111).

[0093] Referring to FIG. 11, a reflective layer (RP') may be formed on a plurality of first pattern portions (OC1_P). For example, the reflective layer (RP') may be arranged along the inclined surface of the plurality of first pattern portions (OC1_P).

[0094] Referring to Fig. 12, a photoresist (PR) can be placed on the reflective layer (RP').

[0095] Referring to FIG. 13, the reflection layer (RP') can be removed by a first etching process using a photoresist (PR) as a mask, leaving only the reflection layer (RP) on the upper surface and inclined surface of the plurality of first pattern portions (OC1_P), and removing the reflection layer (RP') between the plurality of first pattern portions (OC1_P).

[0096] A photoresist (PR) according to one embodiment of the present specification may be a negative photoresist (NPR). After undergoing an etching process, the photoresist (PR) may remain only on the upper surface of a plurality of first pattern portions (OC1_P), and by leaving only the reflective layer (RP) on the inclined surface of a plurality of first pattern portions (OC1_P) through a second exposure process, a reflective layer (RP) can be patterned on the inclined surface of a plurality of first pattern portions (OC1_P).

[0097] Referring to FIG. 14, a second overcoat layer (OC2) can be coated and patterned between a plurality of first pattern portions (OC1_P). For example, the second overcoat layer (OC2) can be patterned to form at least one second pattern portion (OC2_P). For example, at least one second pattern portion (OC2_P) can be formed to be in contact with a plurality of first pattern portions (OC1_P) of the first overcoat layer (OC1) and to cover the reflective layer (RP) on the inclined surface of the plurality of first pattern portions (OC1_P). The upper surface of at least one second pattern portion (OC2_P) can be formed as a flat surface or as a convex surface where the center is higher than the periphery. For example, at least one second pattern portion (OC2_P) can be formed into a convex shape by a heat treatment process or formed into a convex shape using a half tone mask.

[0098] Referring to FIG. 15, a pixel electrode (AE) may be patterned on the first and second overcoat layers (OC1, OC2). The pixel electrode (AE) may be patterned to define a second light-emitting region (EA2). For example, the second light-emitting region (EA2) may correspond to the area of ​​the pixel electrode (AE) patterned and arranged on the first and second overcoat layers (OC1, OC2). The pixel electrode (AE) may have a groove shape formed by a step difference between a plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P), or a block lens-shaped groove shape formed by a shape difference between a plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P).

[0099] Referring to FIG. 16, a light-emitting layer (EL) and a common electrode (CE) may be formed sequentially on the front surface. The light-emitting element (ED), composed of a pixel electrode (AE), a light-emitting layer (EL), and a common electrode (CE), may have a groove shape in the form of a convex lens due to the step and shape difference between a plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P).

[0100] A method for manufacturing a light-emitting display device according to one embodiment of the present specification can pattern a reflective layer (RP) on an inclined surface of a first overcoat layer (OC1) by performing a first etching process and a second exposure process with a single patterned photoresist pattern, and can form a convex lens shape on the upper surface of a second overcoat layer (OC2) by a heat treatment process. Accordingly, a light-emitting display device capable of improving light extraction efficiency can be manufactured without increasing manufacturing processes and costs.

[0101] FIGS. 17 to 19 are drawings illustrating a method for manufacturing a display panel according to another embodiment of the present specification. They illustrate a method for manufacturing a light-emitting display device according to another embodiment in which the configuration of the second non-light-emitting region (NEA2) is changed in the method for manufacturing a light-emitting display device described with reference to FIGS. 9 to 16. FIGS. 17 to 19 describe a manufacturing method following FIGS. 9 to 14.

[0102] Referring to FIG. 17, the second overcoat layer (OC2) placed in the second non-emissive region (NEA2) between adjacent subpixels can be etched and removed. The second overcoat layer (OC2) can leave a residue pattern (OC2') so as to cover the reflective layer (RP) placed on the inclined surface of the first overcoat layer (OC1) in the second non-emissive region (NEA2).

[0103] Referring to FIG. 18, a bank portion (BA) may be formed in the second non-emissive region (NEA2). For example, the bank portion (BA) may be composed of the same material as the bank portion placed in the first non-emissive region (NEA1) or may be composed of a different material. For example, the bank portion (BA) may be formed as a black bank comprising an insulating light-absorbing material such as black resin or graphite to prevent color mixing of adjacent subpixels, but the embodiments of the present specification are not limited thereto.

[0104] Referring to FIG. 19, a light-emitting layer (EL) and a common electrode (CE) may be formed sequentially on the front surface. The light-emitting element (ED), composed of a pixel electrode (AE), a light-emitting layer (EL), and a common electrode (CE), may have a groove shape in the form of a convex lens due to the step and shape difference between a plurality of first pattern portions (OC1_P) and at least one second pattern portion (OC2_P).

[0105] A method for manufacturing a light-emitting display device according to another embodiment of the present specification can pattern a reflective layer (RP) on an inclined surface of a first overcoat layer (OC1) by performing a first etching process and a second exposure process with a single patterned photoresist pattern, can form a convex lens shape on the upper surface of a second overcoat layer (OC2) by a heat treatment process, and can form a bank portion (BA) in the first and second non-emissive regions (NEA1, NEA2) by the same process. Accordingly, a light-emitting display device capable of improving light extraction efficiency can be manufactured without increasing manufacturing processes and costs.

[0106] A light-emitting display device according to one or more embodiments of the present specification may be described as follows.

[0107] A light-emitting display device according to one or more embodiments of the present specification may include a substrate having a plurality of subpixels having a light-emitting region and a non-light-emitting region, a pixel circuit disposed in the non-light-emitting region of the substrate, at least one insulating layer disposed on the pixel circuit, a first overcoat layer disposed on the at least one insulating layer and having an inclined surface with a regular taper structure whose width increases toward the substrate, a reflective layer formed on the inclined surface of the first overcoat layer, a second overcoat layer in contact with the first overcoat layer to cover the reflective layer, and a light-emitting element disposed on the first overcoat layer and the second overcoat layer and overlapping with the light-emitting region.

[0108] According to one or more embodiments of the present specification, a reflective layer may be disposed between a first overcoat layer and a second overcoat layer.

[0109] According to one or more embodiments of the present specification, the first overcoat layer and the second overcoat layer may have different heights at the portions where they come into contact with each other.

[0110] According to one or more embodiments of the present specification, the height of the first overcoat layer may be higher than the height of the second overcoat layer.

[0111] According to one or more embodiments of the present specification, the first overcoat layer includes a first surface in contact with a light-emitting element and a second surface opposite to the first surface, and the width of the first surface may be narrower than the width of the second surface.

[0112] According to one or more embodiments of the present specification, the first overcoat layer may include a plurality of first pattern portions having a trapezoidal shape having a first surface, a second surface and an inclined surface.

[0113] According to one or more embodiments of the present specification, the inclined surfaces of a plurality of first pattern parts may form an angle of 45 to 70 degrees with respect to the second surface.

[0114] According to one or more embodiments of the present specification, the second overcoat layer includes a first surface in contact with a light-emitting element and a second surface opposite to the first surface, and the width of the first surface may be wider than the width of the second surface.

[0115] According to one or more embodiments of the present specification, the width of the first surface of the second overcoat layer may be narrower than the width of the first surface of the first overcoat layer.

[0116] According to one or more embodiments of the present specification, the height of the first surface of the second overcoat layer may be lower than the height of the first surface of the first overcoat layer.

[0117] According to one or more embodiments of the present specification, the second overcoat layer may include at least one second pattern portion formed between a plurality of adjacent first pattern portions.

[0118] According to one or more embodiments of the present specification, at least one first surface of a second pattern portion may be a flat surface.

[0119] According to one or more embodiments of the present specification, the light-emitting element may have a groove shape formed by a step difference between a plurality of first pattern portions and at least one second pattern portion.

[0120] According to one or more embodiments of the present specification, the first surface of at least one second pattern portion may be formed as a convex surface in which the center is higher than the periphery.

[0121] According to one or more embodiments of the present specification, the light-emitting element may have a groove shape in the form of a convex lens formed by a shape difference between a plurality of first pattern parts and at least one second pattern part.

[0122] According to one or more embodiments of the present specification, the first overcoat layer includes a first surface in contact with a light-emitting element and a second surface in contact with at least one insulating layer, and the first overcoat layer may include a plurality of inverted trapezoidal groove pattern portions that penetrate the first surface and the second surface and have inclined surfaces.

[0123] According to one or more embodiments of the present specification, the second overcoat layer may include a plurality of second pattern portions formed in a plurality of groove pattern portions.

[0124] According to one or more embodiments of the present specification, a color filter is further included that corresponds to at least some of a plurality of subpixels and is disposed between at least one insulating layer and a light-emitting element, and the first overcoat layer and the second overcoat layer may be disposed on the color filter.

[0125] According to one or more embodiments of the present specification, a plurality of subpixels include a white subpixel in which a color filter is not disposed, and a first overcoat layer and a second overcoat layer may be in contact with at least one insulating layer in the region of the white subpixel.

[0126] According to one or more embodiments of the present specification, a non-luminous region includes a first non-luminous region in which a pixel circuit is disposed and a second non-luminous region between adjacent subpixels, and further includes a bank portion disposed in the first non-luminous region, and a second overcoat layer or bank portion may be disposed in the second non-luminous region.

[0127] Although the embodiments of this specification have been described in more detail with reference to the attached drawings, this specification is not necessarily limited to these embodiments and may be modified in various ways within the scope of the technical spirit of this specification. Accordingly, the embodiments disclosed in this invention are intended to explain, not limit, the technical spirit of this specification, and the scope of the technical spirit of this specification is not limited by these embodiments. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. The scope of protection of this specification shall be interpreted by the claims, and all technical spirits within the equivalent scope shall be interpreted as being included within the scope of rights of this specification. Explanation of the symbols

[0128] 110: Display panel 120: Scan drive unit 130: Data driver 160: Timing control unit 170: Power circuit

Claims

Claim 1 A light-emitting display device comprising: a substrate having a plurality of subpixels having a light-emitting region and a non-light-emitting region; a pixel circuit disposed in the non-light-emitting region of the substrate; at least one insulating layer disposed on the pixel circuit; a first overcoat layer disposed on the at least one insulating layer and having an inclined surface with a regular taper structure that increases in width toward the substrate; a reflective layer formed on the inclined surface of the first overcoat layer; a second overcoat layer in contact with the first overcoat layer to cover the reflective layer; and a light-emitting element disposed on the first overcoat layer and the second overcoat layer, which overlaps with the light-emitting region. Claim 2 A light-emitting display device according to claim 1, wherein the reflective layer is disposed between the first overcoat layer and the second overcoat layer. Claim 3 A light-emitting display device according to claim 1, wherein the first overcoat layer and the second overcoat layer have different heights at the portion where they contact each other. Claim 4 In claim 3, the light-emitting display device, wherein the height of the first overcoat layer is higher than the height of the second overcoat layer. Claim 5 A light-emitting display device according to claim 1, wherein the first overcoat layer comprises a first surface in contact with the light-emitting element and a second surface opposite to the first surface, and the width of the first surface is narrower than the width of the second surface. Claim 6 A light-emitting display device according to claim 5, wherein the first overcoat layer comprises a plurality of first pattern portions in a trapezoidal shape having the first surface, the second surface and the inclined surface. Claim 7 A light-emitting display device according to claim 6, wherein the inclined surface of the plurality of first pattern portions forms an angle of 45 to 70 degrees with respect to the second surface. Claim 8 A light-emitting display device according to claim 6, wherein the second overcoat layer comprises a first surface in contact with the light-emitting element and a second surface opposite to the first surface, and the width of the first surface is wider than the width of the second surface. Claim 9 A light-emitting display device according to claim 8, wherein the width of the first surface of the second overcoat layer is narrower than the width of the first surface of the first overcoat layer. Claim 10 A light-emitting display device according to claim 8, wherein the height of the first surface of the second overcoat layer is lower than the height of the first surface of the first overcoat layer. Claim 11 A light-emitting display device according to claim 10, wherein the second overcoat layer comprises at least one second pattern portion formed between the adjacent plurality of first pattern portions. Claim 12 A light-emitting display device according to claim 11, wherein the first surface of the at least one second pattern portion is a flat surface. Claim 13 In claim 12, the light-emitting element has a groove shape formed by a step difference between the plurality of first pattern parts and the at least one second pattern part, in a light-emitting display device. Claim 14 A light-emitting display device according to claim 11, wherein the first surface of the at least one second pattern portion is formed as a convex surface in which the center is higher than the periphery. Claim 15 In claim 14, the light-emitting element has a convex lens-shaped groove formed by the shape difference between the plurality of first pattern parts and the at least one second pattern part, in a light-emitting display device. Claim 16 A light-emitting display device according to claim 1, wherein the first overcoat layer comprises a first surface in contact with the light-emitting element and a second surface in contact with the at least one insulating layer, and the first overcoat layer penetrates the first surface and the second surface and comprises a plurality of inverted trapezoidal groove pattern portions having the inclined surface. Claim 17 In claim 16, the light-emitting display device, wherein the second overcoat layer comprises a plurality of second pattern portions formed in the plurality of groove pattern portions. Claim 18 A light-emitting display device according to claim 1, further comprising a color filter disposed between the at least one insulating layer and the light-emitting element, corresponding to at least some of the plurality of subpixels, wherein the first overcoat layer and the second overcoat layer are disposed on the color filter. Claim 19 A light-emitting display device according to claim 18, wherein the plurality of subpixels includes a white subpixel in which the color filter is not disposed, and the first overcoat layer and the second overcoat layer are in contact with the at least one insulating layer in the region of the white subpixel. Claim 20 A light-emitting display device according to any one of claims 1 to 19, wherein the non-luminous region comprises a first non-luminous region in which the pixel circuit is disposed and a second non-luminous region between adjacent subpixels, and further comprises a bank portion disposed in the first non-luminous region, wherein the second overcoat layer or the bank portion is disposed in the second non-luminous region.

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