Hard mask removal method and hard mask removal device

Abstract

The reduction in throughput when removing the hard mask is suppressed. In a wafer in which the surface of a pattern formed on an insulating layer and the surface of a hard mask are covered by a CF-based deposit, and the hard mask is formed by at least one of tungsten silicide and tungsten nitride silicide, when removing the hard mask, first, oxygen ashing treatment is performed on the wafer, and then, after setting the temperature of the wafer (W) to 90°C or higher, etching treatment with ClF3 gas is performed on the wafer.

Description

Technology Field

[0001] The present disclosure relates to a hard mask removal method and a hard mask removal device. Background Technology

[0002] In recent years, tungsten silicide (WSi) films are sometimes used as hard masks in the manufacturing process of semiconductor devices. The WSi film is then removed by etching using plasma generated from chlorine (Cl2) gas, oxygen (O2) gas, or hydrogen bromide (HBr) gas (see, for example, Patent Document 1). Prior art literature

[0003] Patent Publication No. 6557588 The problem to be solved

[0004] The technology according to the present disclosure suppresses the reduction in throughput when removing a hard mask. means of solving the problem

[0005] One aspect of the technology according to the present disclosure is a hard mask removal method for removing a hard mask covering the upper surface of an insulating layer having a pattern formed on a substrate, wherein the surface of the pattern and the surface of the hard mask are covered by a fluorocarbon-based byproduct, and the hard mask is formed by at least one of tungsten silicide and tungsten nitride silicide, and the method comprises a first step of removing the byproduct by reacting it with an oxygen plasma, and a second step of removing the hard mask by reacting the hard mask with a chlorine-based gas after setting the temperature of the substrate to 90°C or higher to transform it into various gases. Effects of the invention

[0006] According to the technology of the present disclosure, a decrease in throughput when removing a hard mask can be suppressed. Brief explanation of the drawing

[0007] FIG. 1 is a flowchart illustrating an example of a hard mask removal method according to a first embodiment of the technology according to the present disclosure. FIG. 2a is a diagram showing an example of the process of the hard mask removal method of FIG. 1 in sequence. FIG. 2b is a diagram showing an example of the process of the hard mask removal method of FIG. 1 in sequence. FIG. 2c is a diagram showing an example of the process of the hard mask removal method of FIG. 1 in sequence. FIG. 2d is a diagram showing an example of the process of the hard mask removal method of FIG. 1 in sequence. FIG. 2e is a diagram showing an example of the process of the hard mask removal method of FIG. 1 in sequence. FIG. 3 is a flowchart showing a modified example of a hard mask removal method according to a first embodiment. FIG. 4a is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 4b is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 4c is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 4d is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 4e is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 4f is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 4g is a diagram showing an example of the process of the hard mask removal method of FIG. 3 in sequence. FIG. 5 is a schematic plan view showing an example of the configuration of a substrate processing device used when executing the hard mask removal method of FIG. 1 or a modified example of the hard mask removal method of FIG. 3. FIG. 6 is a flowchart illustrating an example of a hard mask removal method according to a second embodiment of the technology according to the present disclosure. FIG. 7a is a diagram showing an example of the process of the hard mask removal method of FIG. 6 in sequence. FIG. 7b is a diagram showing an example of the process of the hard mask removal method of FIG. 6 in sequence. FIG. 7c is a diagram showing an example of the process of the hard mask removal method of FIG. 6 in sequence. FIG. 7d is a diagram showing an example of the process of the hard mask removal method of FIG. 6 in sequence. FIG. 7e is a diagram showing an example of the process of the hard mask removal method of FIG. 6 in sequence. FIG. 7f is a diagram showing an example of the process of the hard mask removal method of FIG. 6 in sequence. FIG. 8 is a schematic plan view showing an example of the configuration of a substrate processing device used when executing the hard mask removal method of FIG. 6. Specific details for implementing the invention

[0008] However, in the manufacturing process of semiconductor devices, not only WSi films but also tungsten silicide (WSiN) films or mixed films of WSi and WSiN are being considered as hard masks. Furthermore, chemical treatment using gas is being considered for the removal of WSi films or WSiN films. Such chemical treatment using gas corresponds to non-plasma etching treatment using chlorine-based gases, such as chlorine trifluoride (ClF3) gas, and in this etching treatment, WSi films or WSiN films are removed by reacting ClF3 gas with WSi or WSiN to transform them into various gases.

[0009] However, in substrates where an insulating layer or a hard mask is formed on a base such as silicon (Si), multiple patterns such as trenches may be formed in the insulating layer. These patterns are formed by performing an etching treatment on the substrate using a fluorocarbon (CF)-based gas, but CF-based deposits generated when the insulating layer is etched may cover the surface of the hard mask or the surface of the patterns.

[0010] Since CF-based deposits are difficult to remove by etching with ClF3 gas, oxygen ashing is performed on the substrate to remove the CF-based deposits prior to removal by etching the hard mask with ClF3 gas. At this time, in order to not only remove the CF-based deposits but also oxidize the exposed surface of the hard mask, the surface of the hard mask is tungsten oxide (WO₂). x It is covered with a membrane. And, WO x It is difficult to remove the film by etching with ClF3 gas. Therefore, WO on the surface of the hard mask x To remove the film, it is necessary to perform hydrogen ashing treatment on the substrate, and as a result, throughput is reduced.

[0011] In contrast, the technology according to the present disclosure performs an etching treatment with ClF3 gas on a substrate at a high temperature, thereby etching not only the hard mask but also WO x It suppresses the decrease in throughput when removing the film and hard mask.

[0012] Hereinafter, an embodiment of the technology according to the present disclosure will be described with reference to the drawings. First, a first embodiment of the technology according to the present disclosure will be described.

[0013] FIG. 1 is a flowchart illustrating an example of a hard mask removal method according to a first embodiment. FIGS. 2a to 2e are drawings illustrating examples of the process of the hard mask removal method of FIG. 1 in sequence.

[0014] In the hard mask removal method according to the present embodiment, first, a wafer (W) having a pattern such as a trench or via hole formed in the insulating layer is received from another substrate processing device. As shown in FIG. 2a, this wafer (W) has a base (10) made of, for example, silicon (Si) or silicon germanium (SiGe).

[0015] On the base (10), an insulating layer (13) is formed, for example, consisting of three layers of SiCN films (11a to 11c) and two layers of silicon dioxide (SiO2) films (12a, 12b). In the insulating layer (13), for example, a SiCN film (11a), a SiO2 film (12a), a SiCN film (11b), a SiO2 film (12b), and a SiCN film (11c) are stacked in this order from the bottom.

[0016] Additionally, a hard mask (14) made of a mixture of WSi and WSiN is formed on top of the insulating layer (13) to cover the upper surface of the insulating layer (13). Additionally, the hard mask (14) may be composed of only WSi or only WSiN.

[0017] Additionally, a plurality of patterns (15), such as trenches that expose a base (10) at the bottom, are formed on the insulating layer (13) or the hard mask (14). These patterns (15) are formed by performing an etching treatment on the wafer (W) using a fluorocarbon (CF)-based gas in a different substrate processing apparatus. Then, a CF-based byproduct (deposit) (16) generated when the insulating layer (13) is etched covers the surface of the hard mask (14) or the surface of the patterns (15) (Fig. 2a).

[0018] However, the CF-based deposit (16) covering the surface of the hard mask (14) is difficult to remove by etching treatment with ClF3 gas. Therefore, in this embodiment, the CF-based deposit (16) is removed prior to the removal of the hard mask (14). Specifically, as shown in FIG. 1, an oxygen ashing treatment is performed on the wafer (W) using an oxygen-containing plasma generated from O2 gas (Step S11) (First Step). Since the oxygen-containing radicals contained in the oxygen-containing plasma are highly isotropic, they enter not only the CF-based deposit (16) covering the surface of the hard mask (14) but also the interior of the pattern (15) and come into contact with the CF-based deposit (16) covering the surface of the pattern (15). Then, the oxygen-containing radicals oxidize and remove the CF-based deposit (16). Subsequently, oxygen-containing radicals come into contact with the exposed SiCN films (11a to 11c) and SiO2 films (12a, 12b) inside the exposed hard mask (14) or pattern (15), and oxidize the surfaces of these films. As a result, the surface of the hard mask (14) is tungsten oxide (WO x It is covered with a film (17), and the surface of the pattern (15) is silicon oxide (SiO₂). x It is covered with a membrane (18) (Fig. 2b).

[0019] However, WO x film or SiO x There is a concern that oxide films, such as films, may also be difficult to remove by conventional etching treatment with ClF3 gas. However, the applicant, by etching treatment with high-temperature ClF3 gas at a higher temperature than conventional etching treatment with ClF3 gas, WO x It was discovered that the film can be removed. Meanwhile, the applicant found that even at high temperatures, in the etching treatment with ClF3 gas, SiO x It was also discovered that the film could not be removed. That is, WO by etching treatment with high-temperature ClF3 gas x It was discovered that the membrane can be selectively removed.

[0020] Accordingly, in the present embodiment, as illustrated in FIG. 1, an etching treatment with high-temperature ClF3 gas is performed on the wafer (W) (Step S12) (Second Step). Specifically, when performing the etching treatment with ClF3 gas on the wafer (W), the temperature of the wafer (W) is set to 90°C or higher, for example, 120°C. At this time, first, WO covering the upper surface of the hard mask (14) x The film (17) is removed so that the upper surface of the hard mask (14) is exposed (Fig. 2c).

[0021] After that, if the etching treatment with high-temperature ClF3 gas is continued, the ClF3 gas comes into contact with the upper surface of the exposed hard mask (14) and removes the hard mask (14). For example, the ClF3 gas reacts with WSi contained in the hard mask (14) as shown in the following formula (1), and generates tungsten fluoride (VI) (WF6) gas, silicon tetrafluoride (SiF4) gas, chlorine gas, and chlorine fluoride (ClF) gas.

[0022] WSi2+5ClF3→ WF6+2SiF4+2Cl2+ClF... (1)

[0023] In addition, ClF3 gas reacts with WSiN contained in the hard mask (14) as shown in the following formula (2) and generates WF6 gas, SiF4 gas, Cl2 gas, ClF gas and nitrogen (N2) gas.

[0024] 2WSiN+10ClF3→ 2WF6+4SiF4+4Cl2+2ClF+N2… (2)

[0025] In this way, in the etching treatment with ClF3 gas, the hard mask (14) is removed by changing the ClF3 gas and the hard mask (14) into various gases.

[0026] Meanwhile, SiO covering the surface of the SiCN film (11a to 11c) inside the pattern (15). xSince the film (18) is not removed by etching treatment with high-temperature ClF3 gas, the SiCN films (11a to 11c) are not etched by etching treatment with high-temperature ClF3 gas. Then, etching treatment with ClF3 gas is continued for a predetermined period of time, and the etching treatment with ClF3 gas is terminated at the timing when the SiCN film (11c) located directly below the hard mask (14) is exposed. This predetermined period is set as the time required to remove the hard mask (14) by etching treatment with ClF3 gas, which has been confirmed by prior experiments, etc. Also, at this time, the residue (19) generated when the hard mask (14) is removed is somewhat deposited in a step-like manner on top of the SiCN film (11c) (Fig. 2d).

[0027] Next, as illustrated in FIG. 1, a wet etching treatment using a chemical solution is performed on the wafer (W) (Step S13) (Third Step). By doing so, the internal SiO of the residue (19) or pattern (15) x The membrane (18) is removed (Fig. 2e). After that, the method is terminated.

[0028] FIG. 3 is a flowchart showing a modified example of a hard mask removal method according to a first embodiment. FIGS. 4a to 4g are drawings showing examples of the process of the hard mask removal method of FIG. 3 in sequence. The modified example of the hard mask removal method of FIG. 3 differs from the hard mask removal method of FIG. 1 in that the oxygen ashing treatment and the etching treatment using high-temperature ClF3 gas are repeated twice. Furthermore, in the following, the description of the same treatment content and configuration as the hard mask removal method of FIG. 1 is omitted, and only the treatment content and configuration different from the hard mask removal method of FIG. 1 are described.

[0029] In a modified example of the hard mask removal method according to the present embodiment, first, a wafer (W) having a pattern such as a trench or via hole formed in the insulating layer is received in another substrate processing device. In this wafer (W) as well, a CF-based deposit (16) covers the surface of the hard mask (14) or the surface of the pattern (15) (Fig. 4a).

[0030] Next, as illustrated in FIG. 3, a first oxygen ashing treatment is performed on the wafer (W) using oxygen-containing plasma generated from O2 gas (Step S31). At this time, the oxygen-containing radicals also remove the CF-based deposit (16) covering the surface of the hard mask (14) or the surface of the pattern (15). Additionally, the oxygen-containing radicals oxidize the surface of the exposed SiCN film (11a to 11c) and SiO2 film (12a, 12b) exposed on the surface of the hard mask (14) or inside the pattern (15). As a result, the surface of the hard mask (14) is WO x Covered with a film (17), and the surface of the pattern (15) is SiO x It is covered with a membrane (18) (Fig. 4b).

[0031] Next, as shown in FIG. 3, the temperature of the wafer (W) is set to 90°C or higher, for example, 120°C, and a first etching treatment with high-temperature ClF3 gas is performed on the wafer (W) (Step S32). At this time as well, first, WO covering the upper surface of the hard mask (14) x The film (17) is removed, and the upper surface of the hard mask (14) is exposed (Fig. 4c). Then, if etching treatment with high-temperature ClF3 gas is continued, the hard mask (14) with the upper surface exposed is removed by the reaction shown in the above-described formula (1) or formula (2).

[0032] Meanwhile, SiO covering the surface of the SiCN film (11a to 11c) inside the pattern (15). xSince the film (18) is not removed by the etching treatment with high-temperature ClF3 gas, the SiCN films (11a to 11c) are not etched by the etching treatment with high-temperature ClF3 gas. Then, the etching treatment with ClF3 gas is terminated in a shorter time than step S12. At this time, the hard mask (14) is almost removed and the upper surface of the SiCN film (11c) is partially exposed, but the residue (19) generated when the hard mask (14) is removed and the residue (14a) of the hard mask (14) remains on the SiCN film (11c) (Fig. 4d).

[0033] Next, as illustrated in FIG. 3, a second oxygen ashing treatment is performed on the wafer (W) (Step S33). At this time, oxygen-containing radicals oxidize the upper surface of the SiCN film (11c) that is partially exposed. As a result, not only the surface of the inner SiCN film (11c) of the pattern (15), but also the upper surface of the SiCN film (11c) is oxidized with SiO. x It is covered by a film (18) (Fig. 4e). That is, the SiCN film (11c) is not exposed. Also, since there is no need to remove the CF-based deposit (16) in the second oxygen ashing treatment, the execution time of the second oxygen ashing treatment may be set shorter than the execution time of the first oxygen ashing treatment.

[0034] Next, as illustrated in FIG. 3, the temperature of the wafer (W) is again set to 90°C or higher, for example, 120°C, and a second etching treatment with high-temperature ClF3 gas is performed on the wafer (W) (Step S34). At this time, the residue (14a) or residue (19) of the hard mask (14) is removed, but the SiO covering the surface of the SiCN film (11a to 11c) x The film (18) is not removed by etching treatment with high-temperature ClF3 gas. As a result, the SiCN films (11a to 11c) are not etched by etching treatment with high-temperature ClF3 gas (Fig. 4f).

[0035] However, the amount of residue (14a) or residue (19) removed by the second etching treatment with high temperature ClF3 gas is less than the amount of hard mask (14) removed by the first etching treatment with high temperature ClF3 gas. Therefore, in this embodiment, the execution time of the second etching treatment with high temperature ClF3 gas may be set shorter than the execution time of the first etching treatment with high temperature ClF3 gas.

[0036] Next, as shown in FIG. 3, a wet etching treatment using a chemical solution is performed on the wafer (W) (Step S35). By doing so, SiO x The membrane (18) is removed (Fig. 4g). After that, the method is terminated.

[0037] FIG. 5 is a schematic plan view showing an example of the configuration of a substrate processing device used when executing the hard mask removal method of FIG. 1 or a modified example of the hard mask removal method of FIG. 3.

[0038] In FIG. 5, the substrate processing device (20) (hard mask removal device) has a plurality of, for example, three gas etching chambers (21) (gas etching processing unit) that perform etching treatment with ClF3 gas, and a plurality of, for example, three ashing chambers (22) (ashing processing unit) that perform oxygen ashing treatment or hydrogen ashing treatment.

[0039] The gas etching chamber (21) and the ashing chamber (22) are connected to the transfer module (23). The transfer module (23) is connected to the loader module (25) through the load lock module (24). The loader module (25) is provided with a plurality of load ports (26), and each load port (26) is equipped with a container for accommodating a plurality of wafers (W), such as a FOUP (not shown).

[0040] In the substrate processing device (20), the loader module (25) or the transfer module (23) each incorporates a transport robot (not shown). Each transport robot transports a wafer (W) between the gas etching chamber (21), the ashing chamber (22), and each load port (26).

[0041] The loader module (25) is an atmospheric carrier system or a nitrogen carrier system, and its interior is maintained at atmospheric pressure. The transfer module (23) is a vacuum carrier system, and its interior is depressurized to near vacuum. The load lock module (24) is configured to switch its interior to atmospheric pressure or near vacuum. By switching the internal pressure, the load lock module (24) enables the transfer of the wafer (W) between the transfer module (23) and the loader module (25) without changing the internal pressure of the transfer module (23) or the loader module (25). Additionally, the gas etching chamber (21) or the ashing chamber (22) is connected to the transfer module (23) through the gate valve (27).

[0042] When executing the hard mask removal method of FIG. 5 or a modified example of the hard mask removal method of FIG. 3, in the substrate processing device (20), a wafer (W) transported from the load port (26) is first introduced into the ashing chamber (22). In the ashing chamber (22), the CF-based deposit (16) covering the surface of the hard mask (14) or the surface of the pattern (15) is removed by oxygen ashing treatment, and the surface of the hard mask (14) WO x Covered with a film (17), and the surface of the pattern (15) is SiO x It is covered with a membrane (18).

[0043] After that, the wafer (W) is removed from the ashing chamber (22) and introduced into the gas etching chamber (21). In the gas etching chamber (21), the wafer (W) is heated by a loading platform (not shown) that loads the wafer (W), and the temperature of the wafer (W) is set to 90°C or higher. In addition, in the gas etching chamber (21), by etching treatment with high-temperature ClF3 gas, the WO covering the upper surface of the hard mask (14) first x The film (17) is removed, and then the hard mask (14) is removed.

[0044] And, when executing the hard mask removal method of FIG. 1, the wafer (W) is removed from the substrate processing device (20) after being transported from the gas etching chamber (21) to the load port (26). In addition, the wafer (W) is transported to another substrate processing device, and a wet etching process is performed on the wafer (W) in the other substrate processing device.

[0045] Additionally, when executing the hard mask removal method of FIG. 3, the wafer (W) is brought back from the gas etching chamber (21) to the ashing chamber (22), and oxygen ashing treatment is performed on the wafer (W). After that, the wafer (W) is removed from the ashing chamber (22) and brought back to the gas etching chamber (21) to perform etching treatment with high-temperature ClF3 gas. Additionally, the wafer (W) is removed from the gas etching chamber (21) and returned to another substrate processing device to perform wet etching treatment.

[0046] According to the present embodiment, by etching treatment with high-temperature ClF3 gas, not only the hard mask (14) but also WO covering the upper surface of the hard mask (14) x The membrane (17) can also be removed. By doing so, WO x The need to perform hydrogen ashing treatment on the wafer (W) to remove the film (17) can be eliminated. As a result, the decrease in throughput when removing the hard mask (14) can be suppressed.

[0047] In addition, the SiCN film may react with ClF3 gas and be etched and damaged, but in this embodiment, the SiCN film (11a to 11c) is SiO x It is covered with a film (18). And, SiO x Since the film (18) is not removed by etching treatment with high-temperature ClF3 gas, the SiCN films (11a to 11c) do not come into contact with ClF3 gas. As a result, damage to the SiCN films (11a to 11c) can be suppressed.

[0048] Next, a second embodiment of the technology according to the present disclosure will be described. The second embodiment differs from the first embodiment in that a wiring layer (28) made of a metal, such as tungsten, is formed on a wafer (W) on which a hard mask (14) to be removed is formed. Furthermore, below, descriptions of processing details and configurations identical to those of the first embodiment will be omitted, and only processing details and configurations different from those of the first embodiment will be described.

[0049] FIG. 6 is a flowchart illustrating an example of a hard mask removal method according to a second embodiment. FIGS. 7a to 7f are drawings illustrating examples of the process of the hard mask removal method of FIG. 6 in sequence.

[0050] In the hard mask removal method according to the present embodiment, first, a wafer (W) having a pattern such as a trench or via hole formed in the insulating layer is received in advance from another substrate processing device. In this wafer (W), a wiring layer (28) made of tungsten is formed between the base (10) and the insulating layer (13). The wiring layer (28) is not covered by the insulating layer (13) or the hard mask (14) at the bottom of the pattern (15), but is covered by a CF-based deposit (16) (Fig. 7a).

[0051] In addition, in this embodiment as well, as shown in FIG. 6, prior to the removal of the hard mask (14), an oxygen ashing treatment is performed on the wafer (W) to remove the CF-based deposit (16) (Step S61) (First Step). The execution time of the oxygen ashing treatment in Step S61 is set to be shorter than the execution time of the oxygen ashing treatment in Step S11, and is set to the minimum necessary time for the removal of the CF-based deposit (16). Specifically, the oxygen ashing treatment in Step S61 is terminated at the timing when the SiCN film (11a to 11c) and SiO2 film (12a, 12b) are exposed inside the hard mask (14) or pattern (15).

[0052] However, the surface of the hard mask (14), the SiCN film (11a to 11c), and the SiO2 film (12a, 12b) is immediately oxidized upon contact with oxygen-containing radicals. Therefore, due to the small amount of oxygen-containing radicals remaining at the end of the oxygen ashing treatment, WO is formed on the surface of the hard mask (14). x A thin film (29) is formed, and on the surface of the pattern (15), SiO x A thin film (30) is formed (Fig. 7b). Then, WO covering the hard mask (14) x There is a concern that the thin film (29) of the ClF3 gas may be difficult to remove by etching treatment.

[0053] Therefore, in this embodiment as well, WO x An etching treatment using high-temperature ClF3 gas capable of removing the film is performed on the wafer (W). However, as a result of removing the CF-based deposit (16) by the oxygen ashing treatment described above, a wiring layer (28) is exposed at the bottom of the pattern (15). Since the wiring layer (28), which is made of tungsten, is damaged by the ClF3 gas used in the etching treatment using ClF3 gas, it is necessary to prevent the wiring layer (28) from coming into contact with the ClF3 gas while the etching treatment using high-temperature ClF3 gas is performed on the wafer (W).

[0054] In response to this, in the present embodiment, prior to the etching treatment with high-temperature ClF3 gas as shown in FIG. 6, an organic deposition (31) is deposited inside the pattern (15) to cover the wiring layer (28) with the organic deposition (31) (Step S62) (Step 4). Specifically, the entire surface of the wafer (W) is covered with the organic deposition (31), and not only the internal wiring layer (28) of the pattern (15) but also the hard mask (14) (WO x The thin film (29)) is also covered with an organic deposition (31) (Fig. 7c).

[0055] Next, as illustrated in FIG. 6, an ashing treatment is performed on the wafer (W) prior to the etching treatment with high-temperature ClF3 gas (Step S63) (Step 5). The ashing treatment at this time may be either an oxygen ashing treatment or a hydrogen ashing treatment using hydrogen plasma generated from hydrogen (H2) gas. However, the ashing treatment of Step S63 is performed on the WO that covers the hard mask (14) after the organic deposit (31) is removed. x The process ends at a timing when the thin film (29) is exposed, but an organic deposition (31) remains inside the pattern (15) (Fig. 7d).

[0056] Next, as shown in FIG. 6, the temperature of the wafer (W) is set to 90°C or higher, for example, 120°C, and an etching treatment is performed on the wafer (W) using high-temperature ClF3 gas (Step S64) (Second Step). At this time, first, WO covering the upper surface of the hard mask (14) x The thin film (29) is removed so that the upper surface of the hard mask (14) is exposed, and then, if etching treatment with high-temperature ClF3 gas is continued, the hard mask (14) with the exposed upper surface is removed by the reaction shown in the above-described formula (1) or formula (2).

[0057] Meanwhile, since the organic deposition material (31) inside the pattern (15) is not removed by etching treatment with high-temperature ClF3 gas, ClF3 gas does not enter the interior of the pattern (15), and the wiring layer (28) does not come into contact with ClF3 gas. In addition, SiO covering the surface of the SiCN film (11a to 11c) inside the pattern (15) x Since the thin film (30) is not removed by etching treatment with high-temperature ClF3 gas, the SiCN films (11a to 11c) are not etched by etching treatment with high-temperature ClF3 gas. Then, the etching treatment with ClF3 gas is terminated at the timing when the SiCN film (11c) located immediately below the hard mask (14) is exposed (Fig. 7e).

[0058] Next, as illustrated in FIG. 6, an ashing treatment similar to Step S63 is performed again on the wafer (W) (Step S65), and a wet etching treatment using a chemical solution is also performed (Step S66) (Step 6). By doing so, the organic deposition (31) remaining inside the pattern (15) or the internal SiO of the pattern (15) x The thin film (30) is removed (Fig. 7f). After that, the method is terminated. Additionally, the organic deposit (31) and SiO are removed by wet etching treatment. x If all of the thin film (30) can be removed, the ashing process of step S65 may be skipped.

[0059] FIG. 8 is a schematic plan view showing an example of the configuration of a substrate processing device used when executing the hard mask removal method of FIG. 6.

[0060] In FIG. 8, the substrate processing device (32) (hard mask removal device) has a configuration basically the same as that of the substrate processing device (20), but differs from the substrate processing device (20) in that it has one deposition chamber (33) instead of one gas etching chamber (21). In the deposition chamber (33), an organic deposition (31) is deposited on the wafer (W).

[0061] When executing the hard mask removal method of FIG. 8, in the substrate processing device (32), the wafer (W) being transported from the load port (26) is first introduced into the ashing chamber (22). In the ashing chamber (22), the CF-based deposit (16) covering the surface of the hard mask (14) or the surface of the pattern (15) is removed by oxygen ashing treatment, and the surface of the hard mask (14) is WO x It is covered with a thin film (29) of the pattern (15), and the surface of the pattern (15) is SiO x It is covered with a thin film (30).

[0062] After that, the wafer (W) is removed from the ashing chamber (22) and brought into the deposition chamber (33). In the deposition chamber (33), the entire surface of the wafer (W) is covered with an organic deposition (31), and the wiring layer (28) inside the pattern (15) is also covered with an organic deposition (31).

[0063] Subsequently, the wafer (W) is removed from the deposition chamber (33) and then brought back into the ashing chamber (22). In the ashing chamber (22), the organic deposition (31) is removed by an ashing process to cover the hard mask (14) WO x The thin film (29) is exposed. However, the ashing process is terminated so that an organic deposition (31) remains inside the pattern (15). Also, at this time, the ashing process performed in the ashing chamber (22) may be either an oxygen ashing process or a hydrogen ashing process.

[0064] After that, the wafer (W) is removed from the ashing chamber (22) and introduced into the gas etching chamber (21). In the gas etching chamber (21), the temperature of the wafer (W) is set to 90°C or higher. In addition, in the gas etching chamber (21), by etching treatment with high-temperature ClF3 gas, the WO covering the upper surface of the hard mask (14) is first... x The thin film (29) is removed, and then the hard mask (14) is removed.

[0065] Then, the wafer (W) is removed from the gas etching chamber (21) and brought back into the ashing chamber (22). In the ashing chamber (22), organic deposits (31) remaining inside the pattern (15) or SiO inside the pattern (15) are removed by the ashing process. x The thin film (30) is removed to some extent. Also, at this time, the ashing treatment performed in the ashing chamber (22) may be either an oxygen ashing treatment or a hydrogen ashing treatment.

[0066] After that, the wafer (W) is removed from the ashing chamber (22), returned to the load port (26), removed from the substrate processing device (32), and returned to another substrate processing device, where wet etching is performed on the wafer (W). At this time, the remaining organic deposit (31) or SiO x The thin film (30) of is completely removed.

[0067] According to the present embodiment, by etching treatment with high-temperature ClF3 gas, not only the hard mask (14) but also WO covering the upper surface of the hard mask (14) x The thin film (29) of WO can also be removed. By doing so, WO x The need to perform hydrogen ashing treatment on the wafer (W) to remove the thin film (29) can be eliminated. As a result, the decrease in throughput when removing the hard mask (14) can be suppressed.

[0068] In addition, in this embodiment, WO xAs described above, hydrogen ashing treatment for removing the thin film (29) is not performed, but hydrogen ashing treatment may be performed for removing the organic deposition (31).

[0069] In addition, in this embodiment, the wiring layer (28) exposed at the bottom of the pattern (15) is covered with an organic deposition material (31), and then an etching treatment is performed using high-temperature ClF3 gas. By doing so, the wiring layer (28) does not come into contact with the ClF3 gas during the etching treatment using high-temperature ClF3 gas, thereby preventing the wiring layer (28) from being damaged by the etching treatment using high-temperature ClF3 gas.

[0070] Although preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to the embodiments described above, and various modifications and changes are possible within the scope of the gist thereof.

[0071] For example, in the substrate processing device (20), ashing treatment and etching treatment using high-temperature ClF3 gas are performed in the ashing chamber (22) and the gas etching chamber (21), respectively. However, the ashing chamber (22) may be configured to supply ClF3 gas inside it. In this case, both ashing treatment and etching treatment using high-temperature ClF3 gas can be performed in the ashing chamber (22), thereby improving throughput.

[0072] In addition, in the above-described embodiment, ClF3 gas was used as the fluorine-based gas to remove the hard mask (14) made of a mixture of WSi and WSiN, but other fluorine-based gases may also be used.

[0073] The present application claims priority based on Japanese patent application No. 2024-002494 filed on January 11, 2024, and incorporates the entire contents of the application herein by reference. Explanation of the symbols

[0074] W: Wafer 13: Insulating layer 14: Hard Mask 15: Pattern 16: CF-based deposits 17: WO x membrane 18: SiO x membrane

Claims

Claim 1 A hard mask removal method for removing a hard mask covering the upper surface of an insulating layer having a pattern formed on a substrate, wherein the surface of the pattern and the surface of the hard mask are covered by a fluorocarbon-based byproduct, and the hard mask is formed by at least one of tungsten silicide and tungsten nitride silicide, and the hard mask removal method comprises a first step of removing the byproduct by reacting it with oxygen plasma, and a second step of removing the hard mask by reacting the hard mask with a chlorine-based gas after setting the temperature of the substrate to 90°C or higher to transform it into various gases. Claim 2 A hard mask removal method according to claim 1, wherein in the first step, a byproduct covering the surface of the hard mask is removed and a tungsten oxide film is formed on the surface of the hard mask, and in the second step, the tungsten oxide film is removed. Claim 3 A hard mask removal method according to claim 1, further comprising a third step of performing a wet etching treatment on the substrate after the second step. Claim 4 A hard mask removal method according to claim 1, wherein the first step and the second step are repeated twice. Claim 5 A hard mask removal method according to claim 4, wherein the execution time of the second step in the second instance is shorter than the execution time of the second step in the first instance. Claim 6 A hard mask removal method according to claim 1, further comprising a fourth step of covering the hard mask and the wiring layer exposed at the bottom of the pattern after the execution of the first step with an organic deposition, and a fifth step of removing the organic deposition covering the hard mask by performing an ashing treatment, wherein the fourth step and the fifth step are executed prior to the second step. Claim 7 A hard mask removal method according to claim 6, further comprising a sixth step of performing ashing treatment and wet etching treatment on the substrate after the second step. Claim 8 A hard mask removal device for removing a hard mask covering the upper surface of an insulating layer having a pattern formed on a substrate, wherein the surface of the pattern and the surface of the hard mask are covered by a fluorocarbon-based byproduct, and the hard mask is formed by at least one of tungsten silicide and tungsten nitride silicide, and the hard mask removal device comprises an ashing treatment unit for removing the byproduct by reacting it with oxygen plasma, and a gas etching treatment unit for removing the hard mask by reacting the hard mask with a chlorine-based gas to transform it into various gases after removing the byproduct by the oxygen plasma and setting the temperature of the substrate to 90°C or higher. Claim 9 A hard mask removal device according to claim 8, wherein in the ashing treatment unit, the by-product covering the surface of the hard mask is removed and a tungsten oxide film is formed on the surface of the hard mask, and in the gas etching treatment unit, the tungsten oxide film is removed.

Images