Light-emitting device

Abstract

The present invention aims to provide a light-emitting device in which the deviation in brightness between pixels caused by the deviation in the threshold voltage of a transistor is suppressed. The light-emitting device comprises at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitive element, and a light-emitting element. The first wiring and the first electrode of the capacitive element are electrically connected to each other through the first switch. The second electrode of the capacitive element is connected to the first terminal of the transistor. The second wiring and the gate of the transistor are electrically connected to each other through the second switch. The first electrode of the capacitive element and the gate of the transistor are electrically connected to each other through the third switch. The first terminal of the transistor and the anode of the light-emitting element are electrically connected to each other through the fourth switch.

Description

Technology Field

[0001] The present invention relates to a light-emitting device in which a transistor is provided in each pixel. Background Technology

[0002] Display devices utilizing light-emitting elements are attracting attention as alternatives to cathode ray tubes (CRTs) and liquid crystal displays because they offer high visibility, are suitable for thin designs, and have no limitations on viewing angles. Specifically, the proposed configurations of active matrix display devices utilizing light-emitting elements vary by manufacturer. Generally, a pixel includes at least a light-emitting element, a transistor that controls the input of a video signal to the pixel (switching transistor), and a transistor that controls the amount of current supplied to the light-emitting element (driving transistor).

[0003] When all the transistors in the pixel have the same polarity, some processes in the transistor fabrication process, such as the addition of impurity elements to impart a specific conductivity type to the semiconductor film, may be omitted. Patent Document 1 discloses a light-emitting element type display in which all the transistors included in the pixel are n-channel type transistors. Prior art literature

[0004] Japanese Public Notice No. 2003-195810 The problem to be solved

[0005] In a light-emitting device, the drain current of the driving transistor is supplied to the light-emitting element; therefore, when the threshold voltage of the driving transistor differs between pixels, the brightness of the light-emitting element also differs accordingly. Accordingly, to improve the image quality of the light-emitting device, it is important to propose a pixel configuration in which the current value of the driving transistor can be compensated by predicting the deviation in threshold voltage.

[0006] Generally, the surface of a conductive film used as the anode of a light-emitting device is less susceptible to oxidation in the atmosphere than the conductive film used as the cathode of a light-emitting device. Furthermore, since the conductive film used as the anode of a light-emitting device is typically formed using a sputtering method, when an anode is formed on an EL layer containing a light-emitting material, the EL layer tends to be damaged by sputtering. Therefore, a light-emitting device stacked in the order of an anode, an EL layer, and a cathode can be fabricated with a simple manufacturing process and can easily achieve high luminous efficiency. However, when an n-channel type driving transistor is used in combination with the above light-emitting device, the source of the driving transistor is connected to the anode of the light-emitting device. In this case, if the voltage between the anode and cathode of the light-emitting device increases due to the degradation of the light-emitting material, the potential of the source of the driving transistor rises, causing the voltage between the gate and source (gate voltage) to decrease. Consequently, the drain current of the driving transistor, that is, the current supplied to the light-emitting device, decreases, and the brightness of the light-emitting device is reduced.

[0007] Under the technical background described above, one embodiment of the present invention provides a light-emitting device in which a deviation in brightness between pixels caused by a deviation in the threshold voltage of a driving transistor is suppressed. Another embodiment of the present invention provides a light-emitting device in which a decrease in brightness of a light-emitting element due to the degradation of the EL layer is suppressed. means of solving the problem

[0008] A light-emitting device according to one embodiment of the present invention comprises at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitive element, and a light-emitting element. The first switch has the function of determining whether electrical continuity is established between the first wiring and one of a pair of electrodes of the capacitive element. The other of the pair of electrodes of the capacitive element is connected to one of the source and drain of the transistor. The second switch has the function of determining whether electrical continuity is established between the second wiring and the gate of the transistor. The third switch has the function of determining whether electrical continuity is established between one of the pair of electrodes of the capacitive element and the gate of the transistor. The fourth switch has the function of determining whether electrical continuity is established between one of the source and drain of the transistor and the anode of the light-emitting element.

[0009] A light-emitting device according to another aspect of the present invention comprises at least a transistor, a first wiring, a second wiring, a third wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitive element, and a light-emitting element. The first switch has the function of determining whether electrical continuity is established between the first wiring and one of a pair of electrodes of the capacitive element. The other of the pair of electrodes of the capacitive element is connected to one of the source and drain of the transistor and the anode of the light-emitting element. The second switch has the function of determining whether electrical continuity is established between the second wiring and the gate of the transistor. The third switch has the function of determining whether electrical continuity is established between one of the pair of electrodes of the capacitive element and the gate of the transistor. The fourth switch has the function of determining whether electrical continuity is established between one of the source and drain of the transistor and the third wiring.

[0010] The above switch is a device having the function of controlling the supply of current or potential, and may be, for example, an electrical switch or a mechanical switch. Specifically, the switch may be a transistor, a diode, or a logic circuit composed of transistors.

[0011] In a light-emitting device according to one embodiment of the present invention, by the above configuration, a potential higher than the threshold voltage of the driving transistor and lower than the voltage which is the sum of the threshold voltage and the voltage between the source and the drain of the driving transistor can be applied between the gate and the source of the driving transistor. While the above voltage is applied, when the source of the driving transistor becomes a floating state, the threshold voltage can be obtained between the gate and the source of the driving transistor. Then, while the source is floating, when the voltage of an image signal is applied to the gate, a voltage which is the sum of the voltage of the image signal and the threshold voltage is applied between the gate and the source of the driving transistor. A current corresponding to the gate voltage of the driving transistor is supplied to the light-emitting element to display a grayscale. Effects of the invention

[0012] In a light-emitting device according to one embodiment of the present invention, a potential that is the sum of the voltage of an image signal and the threshold voltage of a transistor can be applied to the gate electrode of a transistor; thus, compensation of the threshold voltage and compensation of the potential of the anode can improve the image quality of the light-emitting device. Brief explanation of the drawing

[0013] Figures 1(A) and 1(B) are circuit diagrams of a pixel. Figure 2 is a timing chart showing the operation of a pixel. FIGS. 3(A) to FIGS. 3(C) are drawings illustrating the operation of a pixel. Figure 4 is a timing chart showing the operation of a pixel. FIGS. 5(A) to FIGS. 5(C) are drawings illustrating the operation of a pixel. Figure 6 is a top view of a pixel. Figure 7 is a cross-sectional view of a pixel. Figure 8 is a top view of a pixel. Figure 9 is a cross-sectional view of a pixel. Figure 10 is a cross-sectional view of a pixel. FIGS. 11(A) to FIGS. 11(C) are cross-sectional views of a pixel. Fig. 12 is a perspective view of the panel. FIGS. 13(A) to FIGS. 13(E) are drawings of electronic devices. FIGS. 14(A) to 14(E) are drawings illustrating the structure of an oxide semiconductor. FIGS. 15(A) to FIGS. 15(C) are diagrams illustrating the structure of an oxide semiconductor. FIGS. 16(A) to 16(C) are diagrams illustrating the structure of an oxide semiconductor. Figure 17 is a diagram showing the results of the simulation. Figure 18 is a diagram showing the results of the simulation. Specific details for implementing the invention

[0014] Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, the present invention is not limited to the description below, and it will be readily understood by those skilled in the art that various changes to the form and details can be made without departing from the spirit and scope of the invention. Accordingly, the present invention is not to be interpreted as being limited to the description of the embodiments shown below.

[0015] In addition, the term "light-emitting device" in this specification includes within its category a panel in which light-emitting elements are formed in each pixel, and a module in which an IC including a controller is mounted on the panel.

[0016] (Embodiment 1)

[0017] FIG. 1(A) shows an example of the configuration of a pixel (100) included in a light-emitting device according to one embodiment of the present invention.

[0018] The pixel (100) includes transistors (11) to transistors (15), a capacitance element (16), and a light-emitting element (17). Additionally, FIG. 1 (A) shows the case where transistors (11) to transistors (15) are of the n-channel type.

[0019] The transistor (12) has the function of determining whether electrical continuity is established between the wiring SL and one of the pair of electrodes of the capacitance element (16). The other of the pair of electrodes of the capacitance element (16) is connected to one of the source and drain of the transistor (11). The transistor (13) has the function of determining whether electrical continuity is established between the wiring IL and the gate of the transistor (11). The transistor (14) has the function of determining whether electrical continuity is established between one of the pair of electrodes of the capacitance element (16) and the gate of the transistor (11). The transistor (15) has the function of determining whether electrical continuity is established between one of the source and drain of the transistor (11) and the anode of the light-emitting element (17).

[0020] In addition, in Fig. 1(A), the source and drain of the transistor (11) are connected to the wiring VL.

[0021] The on / off state of the transistor (12) is determined by the potential of the wire G1 connected to the gate of the transistor (12). The on / off state of the transistor (13) is determined by the potential of the wire G1 connected to the gate of the transistor (13). The on / off state of the transistor (14) is determined by the potential of the wire G2 connected to the gate of the transistor (14). The on / off state of the transistor (15) is determined by the potential of the wire G3 connected to the gate of the transistor (15).

[0022] Furthermore, in this specification, the term "connection" refers to an electrical connection and corresponds to a state in which current, voltage, or potential is available for supply or transmission. Accordingly, a connection state refers not only to a state of direct connection but also to a state in which current, voltage, or potential is indirectly connected through components such as wiring, conductive films, resistors, diodes, and transistors that are available for supply or transmission.

[0023] Even when different components are connected in the circuit diagram, in reality, a single conductive film may have the function of multiple components, such as when a part of the wiring functions as an electrode. In this specification, the term "connection" also includes cases where a single conductive film has the function of multiple components.

[0024] The light-emitting element (17) includes an anode, a cathode, and an EL layer provided between the anode and the cathode. The EL layer is formed using a single layer or multiple layers, and at least one of these layers is a light-emitting layer containing a light-emitting material. Electroluminescence from the EL layer is obtained by a current supplied when the potential difference between the cathode and the anode becomes greater than or equal to the threshold voltage Vthe of the light-emitting element (17), using the potential of the cathode as a reference potential. Electroluminescence includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission (phosphorescence) when returning from a triplet excited state to a ground state.

[0025] In addition, the terms "source" and "drain" of a transistor may be interchanged depending on the polarity of the transistor or the potential levels applied to the source and drain. Generally, in an n-channel transistor, the side to which a lower potential is applied is called the source, and the side to which a higher potential is applied is called the drain. Also, in a p-channel transistor, the side to which a lower potential is applied is called the drain, and the side to which a higher potential is applied is called the source. In this specification, for convenience, the connection relationships of transistors are often described assuming that the source and drain are fixed, but in reality, the names of the source and drain may be interchanged depending on the relationship of the potentials.

[0026] Next, FIG. 1(B) shows another example of a pixel (100) included in a light-emitting device according to one embodiment of the present invention.

[0027] The pixel (100) includes transistors (11) to transistors (15), a capacitance element (16), and a light-emitting element (17). Additionally, FIG. 1(B) illustrates a case where transistors (11) to transistors (15) are of the n-channel type.

[0028] The transistor (12) has the function of determining whether electrical continuity is established between wiring SL and one of the pair of electrodes of the capacitance element (16). The other of the pair of electrodes of the capacitance element (16) is connected to one of the source and drain of the transistor (11) and the anode of the light-emitting element (17). The transistor (13) has the function of determining whether electrical continuity is established between wiring IL and the gate of the transistor (11). The transistor (14) has the function of determining whether electrical continuity is established between one of the pair of electrodes of the capacitance element (16) and the gate of the transistor (11). The transistor (15) has the function of determining whether electrical continuity is established between one of the source and drain of the transistor (11), the anode of the light-emitting element (17), and wiring RL. The other of the source and drain of the transistor (11) is connected to wiring VL.

[0029] The on / off state of the transistor (12) is determined by the potential of the wire G1 connected to the gate of the transistor (12). The on / off state of the transistor (13) is determined by the potential of the wire G1 connected to the gate of the transistor (13). The on / off state of the transistor (14) is determined by the potential of the wire G2 connected to the gate of the transistor (14). The on / off state of the transistor (15) is determined by the potential of the wire G3 connected to the gate of the transistor (15).

[0030] In FIG. 1(A) and FIG. 1(B), transistors (11) to (15) each have a gate located on at least one side of the semiconductor film; however, instead, transistors (11) to (15) may have a pair of gates with the semiconductor film in between. If one side of each pair of gates is called the front gate and the other side of the pair of gates is called the back gate, the back gate may be in a floating state and may have a potential supplied from the outside. In the latter case, a potential of the same level may be applied to the front gate and the back gate, or a fixed potential, such as a ground potential, may be applied only to the back gate. By controlling the height of the potential applied to the back gate, the threshold voltage of the transistor can be controlled. Also, by providing a back gate, the channel formation region increases, and the drain current may increase. Additionally, providing a back gate forms a depletion layer in the semiconductor film, which results in a low subthreshold swing.

[0031] FIGS. 1(A) and FIGS. 1(B) illustrate a case where transistors (11) to (15) are n-channel type transistors. When transistors (11) to (15) have the same polarity, some processes, such as adding impurity elements to impart conductivity to the semiconductor film, may be omitted during the manufacturing process of the transistors. However, in a light-emitting device according to one embodiment of the present invention, transistors (11) to (15) do not necessarily all need to be n-channel type. When the anode of the light-emitting element (17) is connected to one side of the source and drain of the transistor (15), it is preferable that at least transistor (11) is n-channel type, whereas when the cathode of the light-emitting element (17) is connected to one side of the source and drain of the transistor (15), it is preferable that at least transistor (11) is p-channel type.

[0032] In addition, when operating the transistor (11) in the saturation region to flow current, it is preferable to make the channel length or channel width longer than that of the transistor (12) to the transistor (15). Increasing the channel length or channel width can reduce the kink effect by making the drain current constant in the saturation region. Alternatively, increasing the channel length or channel width can allow a large amount of current to flow through the transistor (11) even in the saturation region.

[0033] FIGS. 1(A) and FIGS. 1(B) each illustrate transistors (11) to (15) having a single-gate structure including a single gate and a single channel forming region; however, the transistors of the present invention are not limited to single-gate transistors. Any one or all of transistors (11) to (15) may have a multi-gate structure including a plurality of gates and a plurality of channel forming regions electrically connected.

[0034] Next, the operation of the pixel (100) shown in FIG. 1(A) will be explained.

[0035] FIG. 2 is an example of a timing chart showing the potential of wiring G1 to wiring G3 and the potential Vdata supplied to wiring SL; wiring G1 to wiring G3 and wiring SL are connected to the pixel (100) of FIG. 1(A). However, the timing chart shown in FIG. 2 represents the case where transistors (11) to transistors (15) are of the n-channel type. As shown in FIG. 2, the operation of the pixel (100) in FIG. 1(A) can be mainly divided into a first operation in a first period, a second operation in a second period, and a third operation in a third period.

[0036] First, the first operation of the first period is described. In the first period, a low-level potential is applied to wiring G1, a low-level potential is applied to wiring G2, and a high-level potential is applied to wiring G3. As a result, transistor (15) is turned on, and transistors (12) to (14) are turned off.

[0037] A potential Vano is applied to the wiring VL, and a potential Vcat is applied to the cathode of the light-emitting element (17). The potential Vano is higher than the potential which is the sum of the threshold voltage Vthe of the light-emitting element (17) and the potential Vcat. Additionally, below, it is assumed that the threshold voltage Vthe of the light-emitting element (17) is 0.

[0038] FIG. 3(A) shows the operation of a pixel (100) during the first period. Also, in FIG. 3(A), transistors (12) to (15) are labeled as switches. During the first period, due to the above operation, the potential of one side of the source and drain of transistor (11) (shown as node A) becomes a potential that is the sum of potential Vcat and the threshold voltage Vthe of the light-emitting element (17). Since FIG. 3(A) assumes that the threshold voltage Vthe is 0, the potential of node A becomes potential Vcat.

[0039] Next, the second operation of the second period is described. In the second period, a high-level potential is applied to wiring G1, a low-level potential is applied to wiring G2, and a low-level potential is applied to wiring G3. As a result, transistors (12) and (13) are turned on, and transistors (14) and (15) are turned off.

[0040] During the transition from the first period to the second period, it is desirable to switch the potential applied to wiring G1 from a low level to a high level, and then switch the potential applied to wiring G3 from a high level to a low level. With the above configuration, it is possible to prevent the potential at node A from fluctuating due to the switching of the potential applied to wiring G1.

[0041] A potential Vano is applied to wiring VL, and a potential Vcat is applied to the cathode of the light-emitting element (17). Then, a potential V0 is applied to wiring IL, and a potential Vdata of the image signal is applied to wiring SL. Additionally, it is preferable that the potential V0 is higher than the potential that is the sum of the potential Vcat, the threshold voltage Vth of the transistor (11), and the threshold voltage Vthe of the light-emitting element (17), and lower than the potential that is the sum of the potential Vano and the threshold voltage Vth of the transistor (11).

[0042] FIG. 3(B) illustrates the operation of the pixel (100) during the second period. In FIG. 3(B), transistors (12) to (15) are labeled as switches. During the second period, due to the above operation, potential V0 is applied to the gate of transistor (11) (shown as node B), so transistor (11) is turned on. Consequently, the charge of the capacitance element (16) is discharged through transistor (11), and the potential of node A, which is potential Vcat, begins to rise. Finally, when the potential of node A becomes potential V0-Vth, that is, when the gate voltage of transistor (11) decreases to the threshold voltage Vth, transistor (11) is turned off. Potential Vdata is applied to one electrode (shown as node C) of the capacitance element (16).

[0043] Next, the third operation of the third period is described. In the third period, a low-level potential is applied to wiring G1, a high-level potential is applied to wiring G2, and a high-level potential is applied to wiring G3. As a result, transistors (14) and (15) are turned on, and transistors (12) and (13) are turned off.

[0044] During the transition from the second period to the third period, it is desirable to switch the potential applied to wiring G1 from a high level to a low level, and then switch the potential applied to wiring G2 and wiring G3 from a low level to a high level. With the above configuration, it is possible to prevent the potential at node A from fluctuating due to the switching of the potential applied to wiring G1.

[0045] Also, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the cathode of the light-emitting element (17).

[0046] FIG. 3(C) illustrates the operation of the pixel (100) in the third period. Also, in FIG. 3(C), transistors (12) to (15) are shown as switches. In the third period, because potential Vdata is applied to node B by the above operation, the gate voltage of transistor (11) becomes Vdata - V0 + Vth. That is, the gate voltage of transistor (11) can be set to a value with the threshold voltage Vth added. Consequently, deviations in the threshold voltage Vth of transistor (11) can be prevented from negatively affecting the current value supplied to the light-emitting element (17). Instead, even if transistor (11) deteriorates and the threshold voltage Vth changes, the change in the threshold voltage Vth can be prevented from negatively affecting the current value supplied to the light-emitting element (17). Therefore, display deviations can be reduced, and high image quality can be displayed.

[0047] Next, the operation of the pixel (100) shown in FIG. 1(B) will be explained.

[0048] FIG. 4 is an example of a timing chart showing the potential of wiring G1 to wiring G3 and the potential Vdata supplied to wiring SL; wiring G1 to wiring G3 and wiring SL are connected to the pixel (100) of FIG. 1(B). However, the timing chart shown in FIG. 4 represents the case where transistors (11) to transistors (15) are n-channel type transistors. As shown in FIG. 4, the operation of the pixel (100) in FIG. 1(B) can be mainly divided into a first operation in a first period, a second operation in a second period, and a third operation in a third period.

[0049] First, the first operation of the first period is described. In the first period, a low-level potential is applied to wiring G1, a low-level potential is applied to wiring G2, and a high-level potential is applied to wiring G3. As a result, transistor (15) is turned on, and transistors (12) to (14) are turned off.

[0050] A potential Vano is applied to wiring VL, and a potential Vcat is applied to the cathode of the light-emitting element (17). As described above, the potential Vano is set to be higher than the potential that is the sum of the threshold voltage Vthe of the light-emitting element (17) and the potential Vcat. A potential V1 is applied to wiring RL. It is preferable that the potential V1 is lower than the potential that is the sum of the potential Vcat and the threshold voltage Vthe of the light-emitting element (17). By setting the potential V1 to the above range, current can be prevented from flowing through the light-emitting element (17) during the first period.

[0051] FIG. 5(A) illustrates the operation of a pixel (100) during the first period. Also, in FIG. 5(A), transistors (12) to (15) are shown as switches. During the first period, by the above operation, a potential V1 is applied to one side of the source and drain of transistor (11) (shown as node A).

[0052] Next, the second operation of the second period is described. In the second period, a high-level potential is applied to wiring G1, a low-level potential is applied to wiring G2, and a low-level potential is applied to wiring G3. As a result, transistors (12) and (13) are turned on, transistor (14) remains in an off state, and transistor (15) is turned off.

[0053] During the transition from the first period to the second period, it is desirable to switch the potential applied to wiring G1 from a low level to a high level, and then switch the potential applied to wiring G3 from a high level to a low level. With the above configuration, it is possible to prevent the potential at node A from fluctuating due to the switching of the potential applied to wiring G1.

[0054] A potential Vano is applied to wiring VL, and a potential Vcat is applied to the cathode of the light-emitting element (17). A potential V0 is applied to wiring IL, and a potential Vdata of the image signal is applied to wiring SL. As described above, it is preferable that the potential V0 is higher than the potential that is the sum of the potential Vcat, the threshold voltage Vth of the transistor (11), and the threshold voltage Vthe of the light-emitting element (17), and lower than the potential that is the sum of the potential Vano and the threshold voltage Vth of the transistor (11). However, unlike the pixel (100) shown in FIG. 1(A), in the pixel (100) shown in FIG. 1(B), the anode of the light-emitting element (17) is connected to one of the source and drain of the transistor (11). Therefore, in order not to increase the current value supplied to the light-emitting element (17) during the second period, it is preferable that the potential V0 of the pixel (100) shown in FIG. 1(B) be set to a lower value than the potential V0 of the pixel (100) shown in FIG. 1(A).

[0055] FIG. 5(B) illustrates the operation of the pixel (100) during the second period. Also, in FIG. 5(B), transistors (12) to (15) are shown as switches. During the second period, due to the above operation, a potential V0 is applied to the gate of transistor (11) (shown as node B), so transistor (11) is turned on. Consequently, the charge of the capacitance element (16) is discharged through transistor (11), and the potential of node A, which is potential V1, begins to rise. Then, when the potential of node A finally reaches potential V0-Vth, that is, when the gate voltage of transistor (11) decreases to the threshold voltage Vth, transistor (11) is turned off. A potential Vdata is applied to one electrode of the capacitance element (16) (shown as node C).

[0056] Next, the third operation of the third period is described. In the third period, a low-level potential is applied to wiring G1, a high-level potential is applied to wiring G2, and a low-level potential is applied to wiring G3. As a result, transistor (14) is turned on, transistors (12) and (13) are turned off, and transistor (15) remains in the off state.

[0057] During the transition from the second period to the third period, it is desirable to switch the potential applied to wiring G1 from a high level to a low level, and then switch the potential applied to wiring G2 from a low level to a high level. With the above configuration, it is possible to prevent the potential at node A from fluctuating due to the switching of the potential applied to wiring G1.

[0058] A potential Vano is applied to the wiring VL, and a potential Vcat is applied to the cathode of the light-emitting element (17).

[0059] FIG. 5(C) illustrates the operation of the pixel (100) in the third period. Also, in FIG. 5(C), transistors (12) to (15) are shown as switches. In the third period, because potential Vdata is applied to node B by the above operation, the gate voltage of transistor (11) becomes Vdata - V0 + Vth. That is, the gate voltage of transistor (11) can be set to a value with the threshold voltage Vth added. As a result, it is possible to prevent the deviation of the threshold voltage Vth of transistor (11) from negatively affecting the current value supplied to the light-emitting element (17). Instead, even if transistor (11) deteriorates and the threshold voltage Vth changes, it is possible to prevent the change of the threshold voltage Vth from negatively affecting the current value supplied to the light-emitting element (17). Therefore, the display deviation can be reduced, and high image quality can be displayed.

[0060] In the light-emitting element type display disclosed in Patent Document 1, the gate and drain of a transistor (Tr12) for supplying current to an organic EL element are electrically connected to each other to obtain a threshold voltage. Therefore, when the transistor (Tr12) is a normally-on transistor, the potential of the source of the transistor (Tr12) does not become higher than the potential of the gate. Therefore, when the transistor (Tr12) is a normally-on transistor, it is difficult to obtain a threshold voltage.

[0061] In contrast, in a light-emitting device according to one embodiment of the present invention including the pixel shown in FIG. 1(A) and FIG. 1(B), since the source and drain of the other end of the transistor (11) are electrically separated from the gate of the transistor (11), their potentials can be controlled individually. Accordingly, in the second operation, the potential of the source and drain of the other end of the transistor (11) can be set to a value higher than the sum of the potential of the gate of the transistor (11) and the threshold voltage Vth. Accordingly, when the transistor (11) is a normally-on transistor, that is, when the threshold voltage Vth is negative, charge can be accumulated in the capacitance element (16) until the potential of the source of the transistor (11) becomes higher than the potential V0 of the gate of the transistor. Accordingly, in a light-emitting device according to one embodiment of the present invention, even if the transistor (11) is a normally-on transistor, a threshold voltage can be obtained in the second operation, and in the third operation, the gate voltage of the transistor (11) can be set to a value that is added to the threshold voltage Vth.

[0062] Accordingly, in a light-emitting device according to one embodiment of the present invention, for example, even if a transistor (11) including a semiconductor film having an oxide semiconductor is normally turned on, the display deviation can be reduced and high image quality can be displayed.

[0063] (Embodiment 2)

[0064] FIG. 6 shows an example of a top view of a pixel shown in FIG. 1(A). In addition, in the top view of the pixel shown in FIG. 6, an insulating film is omitted to clearly show the layout of the pixel. Also, in the top view of the pixel shown in FIG. 6, an anode, an EL layer, and a cathode are omitted to clearly show the layout of the transistor and capacitive element included in the pixel.

[0065] FIG. 7 is a cross-sectional view along dashed lines A1-A2 and A3-A4 of the top view of FIG. 6.

[0066] A transistor (12) comprises a conductive film (801) functioning as a gate on a substrate (800) having an insulating surface, a gate insulating film (802) on the conductive film (801), a semiconductor film (803) located on the gate insulating film (802) overlapping with the conductive film (801), and a conductive film (804) and a conductive film (805) located on the semiconductor film (803) and functioning as a source or drain. The conductive film (801) also functions as wiring G1. The conductive film (804) also functions as wiring SL.

[0067] A transistor (13) comprises a conductive film (801) functioning as a gate on a substrate (800) having an insulating surface, a gate insulating film (802) on the conductive film (801), a semiconductor film (806) located on the gate insulating film (802) overlapping with the conductive film (801), and a conductive film (807) and a conductive film (808) located on the semiconductor film (806) and functioning as a source or drain. The conductive film (807) is connected to a conductive film (809) functioning as a wiring IL through a contact hole.

[0068] A transistor (14) comprises a conductive film (810) functioning as a gate on a substrate (800) having an insulating surface, a gate insulating film (802) on the conductive film (810), a semiconductor film (811) located on the gate insulating film (802) overlapping with the conductive film (810), and a conductive film (805) and a conductive film (808) located on the semiconductor film (811) and functioning as a source or drain. The conductive film (810) also functions as a wiring G2.

[0069] A transistor (11) comprises a conductive film (812) functioning as a gate on a substrate (800) having an insulating surface, a gate insulating film (802) on the conductive film (812), a semiconductor film (813) located on the gate insulating film (802) overlapping with the conductive film (812), and a conductive film (814) and a conductive film (815) located on the semiconductor film (813) and functioning as a source or drain. The conductive film (812) is connected to the conductive film (808). The conductive film (814) also functions as a wiring VL.

[0070] A transistor (15) comprises a conductive film (816) functioning as a gate on a substrate (800) having an insulating surface, a gate insulating film (802) on the conductive film (816), a semiconductor film (817) located on the gate insulating film (802) overlapping with the conductive film (816), a conductive film (815) and a conductive film (818) located on the semiconductor film (817) and functioning as a source or drain. The conductive film (816) also functions as a wiring G3.

[0071] A capacitive element (16) comprises a conductive film (819) on a substrate (800) having an insulating surface, a gate insulating film (802) on the conductive film (819), and a conductive film (815) located on the gate insulating film (802) that overlaps with the conductive film (819). The conductive film (819) is connected to the conductive film (805).

[0072] An insulating film (820) is formed on the conductive film (804), conductive film (805), conductive film (807), conductive film (808), conductive film (814), conductive film (815), and conductive film (818). Additionally, a conductive film (822) that functions as an anode is formed on the insulating film (821). The conductive film (822) is connected to the conductive film (818) through a contact hole (823) formed in the insulating film (820) and the insulating film (821).

[0073] An insulating film (824) having an opening through which a portion of the conductive film (822) is exposed is provided on the insulating film (821). An EL layer (825) and a conductive film (826) functioning as a cathode are laminated in this order on the portion of the conductive film (822) and the insulating film (824). The region where the conductive film (822), the EL layer (825), and the conductive film (826) overlap corresponds to the light-emitting element (17).

[0074] FIG. 8 shows another example of a top view of a pixel shown in FIG. 1(A). In addition, in the top view of the pixel in FIG. 8, the insulating film is omitted to clearly show the layout of the pixel. Also, in the top view of the pixel in FIG. 8, the anode, EL layer, and cathode are omitted to clearly show the layout of the transistor and capacitive element containing the pixel.

[0075] FIG. 9 is a cross-sectional view along dashed lines A1-A2 and A3-A4 of the top view shown in FIG. 8.

[0076] A transistor (12) comprises a semiconductor film (901) on a substrate (900) having an insulating surface, a gate insulating film (902) on the semiconductor film (901), a conductive film (903) located on the gate insulating film (902) overlapping the semiconductor film (901) and functioning as a gate, and a conductive film (904) and a conductive film (905) connected to a source and a drain included in the semiconductor film (901). The conductive film (903) also functions as wiring G1. The conductive film (904) also functions as wiring SL.

[0077] A transistor (13) comprises a semiconductor film (906) on a substrate (900) having an insulating surface, a gate insulating film (902) on the semiconductor film (906), a conductive film (903) positioned on the gate insulating film (902) overlapping the semiconductor film (906) and functioning as a gate, and conductive films (907) and conductive films (908) connected to a source and drain included in the semiconductor film (906). The conductive film (907) is connected to a conductive film (909) functioning as a wiring IL through a contact hole.

[0078] A transistor (14) comprises a semiconductor film (901) on a substrate (900) having an insulating surface, a gate insulating film (902) on the semiconductor film (901), a conductive film (911) located on the gate insulating film (902) overlapping the semiconductor film (901) and functioning as a gate, and a conductive film (905) and a conductive film (908) connected to a source and a drain included in the semiconductor film (901). The conductive film (911) also functions as a wiring G2. In FIG. 8, the transistor (12) and the transistor (14) share a single semiconductor film (901); however, the transistor (12) and the transistor (14) may instead include different semiconductor films.

[0079] A transistor (11) comprises a semiconductor film (912) on a substrate (900) having an insulating surface, a gate insulating film (902) on the semiconductor film (912), a conductive film (913) located on the gate insulating film (902) overlapping the semiconductor film (912) and functioning as a gate, and a conductive film (914) connected to a source or drain included in the semiconductor film (912). The conductive film (913) is connected to the conductive film (908). The conductive film (914) also functions as a wiring VL.

[0080] A transistor (15) comprises a semiconductor film (912) on a substrate (900) having an insulating surface, a gate insulating film (902) on the semiconductor film (912), a conductive film (915) positioned on the gate insulating film (902) overlapping the semiconductor film (912) and functioning as a gate, and a conductive film (916) connected to a source or drain included in the semiconductor film (912). The conductive film (915) also functions as a wiring G3.

[0081] A capacitive element (16) has a semiconductor film (912) on a substrate (900) having an insulating surface, a gate insulating film (902) on the semiconductor film (912), and a conductive film (917) located on the gate insulating film (902) that overlaps with the semiconductor film (912). The conductive film (917) is connected to the conductive film (905).

[0082] An insulating film (920) is formed on the conductive film (904), conductive film (905), conductive film (907), conductive film (908), conductive film (914), and conductive film (916). A conductive film (921) that functions as an anode is provided on the insulating film (920). The conductive film (921) is connected to the conductive film (916) through a contact hole (922) formed in the insulating film (920).

[0083] An insulating film (923) having an opening through which a portion of the conductive film (921) is exposed is provided on the insulating film (920). An EL layer (924) and a conductive film (925) functioning as a cathode are laminated in this order on the portion of the conductive film (921) and the insulating film (923). The region where the conductive film (921), the EL layer (924), and the conductive film (925) overlap corresponds to the light-emitting element (17).

[0084] In addition, in one embodiment of the present invention, transistors (11) to (15) may include a semiconductor film comprising an amorphous, microcrystalline, polycrystalline, or single-crystal (e.g., silicon or germanium) semiconductor film, or a semiconductor film comprising a wide-gap semiconductor (e.g., oxide semiconductor).

[0085] When the semiconductor film of the transistor (11) to transistor (15) is formed using an amorphous, microcrystalline, polycrystalline, or single-crystal material (e.g., silicon or germanium), an impurity region that functions as a source or drain is formed by adding an impurity element that imparts conductivity to the semiconductor film. For example, an impurity region having n-type conductivity can be formed by adding phosphorus or arsenic to the semiconductor film. Also, for example, an impurity region having p-type conductivity can be formed by adding boron to the semiconductor film.

[0086] When an oxide semiconductor is used in the semiconductor film of a transistor (11) to a transistor (15), a dopant may be added to the semiconductor film to form an impurity region that functions as a source or drain. The dopant may be added using an ion implantation method. Examples of dopants include noble gases such as helium, argon, and xenon, and Group 15 elements such as nitrogen, phosphorus, arsenic, and antimony. For example, when nitrogen is used as a dopant, the concentration of nitrogen atoms within the impurity region is 5 × 10⁻⁶ 19 / cm 3 From 1×10 22 / cm 3 It is desirable that it is.

[0087] In addition, as a silicon semiconductor, for example, amorphous silicon formed by a vapor phase growth method such as sputtering or plasma CVD, polycrystalline silicon obtained by crystallizing amorphous silicon by laser annealing, etc., or single-crystal silicon obtained by exfoliating the surface layer of a single-crystal silicon wafer by injecting hydrogen ions, etc. into a single-crystal silicon wafer can be used.

[0088] Examples of oxide semiconductors include indium oxide; tin oxide; zinc oxide; and oxides of binary metals such as In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn-Mg oxide, Sn-Mg oxide, In-Mg oxide, and In-Ga oxide; Oxides of ternary metals, such as In-Ga-Zn oxides (also denoted as IGZO), In-Al-Zn oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-La-Zn oxides, In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides, In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides, and In-Lu-Zn ​​oxides; There are oxides of quaternary metals, such as In-Sn-Ga-Zn oxides, In-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides, In-Sn-Al-Zn oxides, In-Sn-Hf-Zn oxides, and In-Hf-Al-Zn oxides.

[0089] For example, an In-Ga-Zn oxide refers to an oxide containing In, Ga, and Zn, and there is no restriction on the ratio of In, Ga, and Zn. In-Ga-Zn oxides may also contain metal elements other than In, Ga, and Zn.

[0090] InMO3(ZnO) m A material denoted by (m > 0, where m is not an integer) may be used as an oxide semiconductor. Additionally, M represents one or more metal elements selected from Ga, Fe, Mn, and Co. Instead, In2SnO5(ZnO) n A material represented by (n > 0, also, n is a natural number) may be used as an oxide semiconductor.

[0091] For example, an In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3) or In:Ga:Zn = 2:2:1 (= 2 / 5:2 / 5:1 / 5), or an oxide with an atomic ratio close to the above atomic ratio, may be used. Alternatively, an In-Sn-Zn oxide with an atomic ratio of In:Sn:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2), or In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8), or an oxide with an atomic ratio close to the above atomic ratio, may be used.

[0092] As a stabilizer for reducing deviations in the electrical characteristics of a transistor containing this oxide semiconductor, it is preferable to include tin (Sn), hafnium (Hf), aluminum (Al), zirconium (Zr), and titanium (Ti). As another stabilizer, one or more types of lanthanoids such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu) may be included.

[0093] A purified oxide semiconductor (purified OS) obtained by reducing impurities such as moisture or hydrogen acting as electron donors and by reducing oxygen vacancies is an i-type (intrinsic) semiconductor or substantially an i-type semiconductor. Therefore, a transistor containing a purified oxide semiconductor has a very low off-current. The band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using a purified oxide semiconductor film in which the concentration of impurities such as moisture and hydrogen is sufficiently reduced and oxygen vacancies are reduced, the off-current of the transistor can be lowered.

[0094] Specifically, various experiments can demonstrate the low off-current of transistors using high-purity oxide semiconductors in the semiconductor film. For example, with a channel width of 1×10 6 The off-state current of a transistor with a size of μm and a channel length of 10 μm is below the measurement limit of a semiconductor parameter analyzer, i.e., 1 × 10⁻⁶, when the voltage between the source and drain electrodes (drain voltage) is in the range of 1 V to 10 V. -13 A value of less than or equal to A can be obtained. In this case, the off-current corresponding to the value obtained by dividing the off-current by the channel width of the transistor is 100 zA / m or less. Additionally, the off-current was measured by using a circuit that connects a capacitive element and a transistor to control the charge flowing into or out of the capacitive element using this transistor. In this measurement, the above-mentioned transistor, in which the channel formation region is formed on a high-purity oxide semiconductor film, was used, and the off-current of this transistor was measured from the trend of the charge amount per unit time of the capacitive element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3 V, a lower off-current of tens of small amperes (yA / m) per micrometer is obtained. Therefore, the off-current of the above-mentioned transistor in which the channel formation region is formed on a high-purity oxide semiconductor film is much lower than the off-current of a transistor using crystalline silicon.

[0095] Additionally, unless specifically noted otherwise, for an n-channel transistor, the term "off-current" in this specification refers to the current flowing between the source and the drain when the potential of the drain is higher than the potentials of the source and the gate, and the potential of the gate is 0 or less with the potential of the source as the reference potential. Additionally, for a p-channel transistor, the term "off-current" in this specification refers to the current flowing between the source and the drain when the potential of the drain is lower than the potentials of the source and the gate, and the potential of the gate is 0 or greater with the potential of the source as the reference potential.

[0096] For example, an oxide semiconductor film can be formed by a sputtering method using a target comprising In (indium), Ga (gallium), and Zn (zinc). When forming an In-Ga-Zn oxide semiconductor film by sputtering, it is preferable to use an In-Ga-Zn oxide target having an atomic ratio of In:Ga:Zn = 1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or 3:1:4. When forming an oxide semiconductor film using an In-Ga-Zn oxide target having the above-described atomic ratio, polycrystalline or c-axis oriented crystals (CAAC) are more likely to be formed. In addition, the fill factor of the target comprising In, Ga, and Zn is 90% or more and 100% or less, preferably 95% or more and less than 100%. By using a target with a high fill factor, a dense oxide semiconductor film is formed.

[0097] When using an In-Zn-based oxide material as an oxide semiconductor, the atomic ratio of metal elements in the target used is In:Zn = 50:1 to 1:2 (converted to a mole ratio, In2O3:ZnO = 25:1 to 1:4), preferably In:Zn = 20:1 to 1:1 (converted to a mole ratio, In2O3:ZnO = 10:1 to 1:2), and more preferably In:Zn = 15:1 to 1.5:1 (converted to a mole ratio, In2O3:ZnO = 15:2 to 3:4). For example, in a target used for forming an oxide semiconductor film containing an In-Zn-based oxide having an atomic ratio of In:Zn:O = X:Y:Z, the relationship Z > 1.5X + Y is satisfied. By maintaining the ratio of Zn within the above range, mobility can be improved.

[0098] Specifically, an oxide semiconductor film can be formed as follows: a substrate is maintained in a processing chamber under reduced pressure, and while removing residual moisture in the processing chamber, a sputtering gas from which hydrogen and moisture have been removed is introduced, and the target is used. During film formation, the substrate temperature should be 100°C or higher and 600°C or lower, preferably 200°C or higher and 400°C or lower. By forming the oxide semiconductor film while the substrate is heated, the impurity concentration contained in the formed oxide semiconductor film can be reduced. In addition, damage caused by sputtering is mitigated. To remove residual moisture in the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. In addition, the exhaust means may be a turbo pump provided with a cold trap. In the film formation chamber, for example, compounds containing hydrogen atoms such as hydrogen atoms, water (H2O), and compounds containing carbon atoms (more preferably also) are removed by using a cryopump, so the concentration of impurities in the oxide semiconductor film formed in this chamber can be reduced.

[0099] However, oxide semiconductor films formed by sputtering or the like sometimes contain a large amount of moisture or hydrogen (including hydroxyl groups) as impurities. Since moisture and hydrogen are prone to forming donor levels, they act as impurities in oxide semiconductors. In one embodiment of the present invention, in order to reduce (dehydrate or dehydrogenate) impurities such as moisture or hydrogen in an oxide semiconductor film, the oxide semiconductor film is subjected to heat treatment under a reduced pressure atmosphere, under an inert gas atmosphere such as nitrogen or noble gas, under an oxygen gas atmosphere, or under an ultra-dry air atmosphere (where the amount of moisture measured using a dew point thermometer of the cavity ring-down laser spectroscopy (CRDS) method is 20 ppm (converted to -55°C in dew point) or less, preferably 1 ppm or less, preferably 10 ppb or less).

[0100] By performing a heat treatment on an oxide semiconductor film, moisture or hydrogen in the oxide semiconductor film can be removed. Specifically, the heat treatment is preferably performed at a temperature of 250°C or higher and 750°C or lower, preferably 400°C or higher and below the deformation point of the substrate. For example, the heat treatment is preferably performed at 500°C for about 3 minutes or more and 6 minutes or less. If the RTA method is used for the heat treatment, dehydration or dehydrogenation can be performed in a short time; therefore, the treatment can be performed even at a temperature higher than the deformation point of the glass substrate.

[0101] However, in some cases, the above heat treatment causes oxygen to escape from the oxide semiconductor film, and oxygen vacancies are formed within the oxide semiconductor film. In one embodiment of the present invention, an insulating film containing oxygen is used as an insulating film, such as a gate insulating film, in contact with the oxide semiconductor film to prevent oxygen vacancies. Then, after forming the insulating film containing oxygen, a heat treatment is performed so that oxygen is supplied from the insulating film to the oxide semiconductor film. By the above configuration, oxygen vacancies acting as donors in the semiconductor film can be reduced, and the stoichiometric composition ratio of the oxide semiconductor contained in the oxide semiconductor film can be satisfied. It is preferable that the proportion of oxygen in the oxide semiconductor film is higher than the proportion of oxygen in the stoichiometric composition ratio. As a result, the oxide semiconductor film can be substantially i-type, and deviations in the electrical characteristics of the transistor due to oxygen vacancies are reduced; thus, electrical characteristics can be improved.

[0102] The heat treatment for supplying oxygen to the oxide semiconductor film is performed under an atmosphere of nitrogen, ultra-dry air, or a noble gas (e.g., argon, helium, etc.), preferably at a temperature of 200°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower. The water content of the gas is preferably 20 ppm or less, preferably 1 ppm or less, and more preferably 10 ppb or less.

[0103] Furthermore, the oxide semiconductor may be amorphous or crystalline. In the latter case, the oxide semiconductor may be single-crystal or polycrystalline, or it may have a configuration in which a part of the oxide semiconductor is crystalline, or it may have an amorphous structure containing a crystalline part, or it may be non-morphous. As an example of a configuration in which a part is crystalline, an oxide semiconductor may be used that includes a crystal having a triangular or hexagonal atomic arrangement when viewed from the ab plane, surface, or interface direction and oriented along the c-axis (also called a c-axis oriented crystalline oxide semiconductor (CAAC-OS)). In the crystal, when viewed from a direction perpendicular to the c-axis, metal atoms are arranged in layers or metal atoms and oxygen atoms are arranged in layers along the c-axis, and the direction of the a-axis or b-axis varies in the ab plane (rotates around the c-axis).

[0104] In a broad sense, CAAC-OS refers to a non-silver crystal oxide having a triangular, hexagonal, equilateral, or regular hexagonal atomic arrangement when viewed from a direction perpendicular to the ab plane, and containing a phase in which metal atoms are arranged in layers or metal and oxygen atoms are arranged in layers when viewed from a direction perpendicular to the c-axis.

[0105] CAAC-OS is not a single crystal, but this does not mean that it is composed solely of amorphous material. Although CAAC contains crystallized portions, the boundary between one crystal portion and another may not be clearly defined.

[0106] Nitrogen may be substituted for a portion of the oxygen constituting the CAAC-OS. The c-axis of the crystal portion included in the CAAC-OS may be aligned in a specific direction (e.g., a direction perpendicular to the substrate surface on which the CAAC-OS is formed, or the surface of the CAAC-OS). Alternatively, the normals of the ab planes of individual crystal portions containing the CAAC-OS may be aligned in a specific direction (e.g., a direction perpendicular to the substrate surface on which the CAAC-OS is formed, or the surface of the CAAC-OS).

[0107] Depending on its composition, CAAC-OS is a conductor, semiconductor, or insulator. Also, depending on its composition, CAAC-OS transmits or does not transmit visible light.

[0108] Examples of such CAAC-OS are oxides that are formed as films, have a triangular or hexagonal atomic arrangement when observed from a direction perpendicular to the film surface or the substrate surface on which the film is formed, and have metal atoms arranged in layers or metal atoms and oxygen atoms (or nitrogen atoms) arranged in layers when the cross-section of the film is observed.

[0109] An example of the crystal structure of CAAC-OS is described in detail using FIGS. 14(A) to 14(E), FIGS. 15(A) to 15(C), and FIGS. 16(A) to 16(C). Unless otherwise noted, in FIGS. 14(A) to 14(E), FIGS. 15(A) to 15(C), and FIGS. 16(A) to 16(C), the vertical direction corresponds to the c-axis direction, and the plane orthogonal to the c-axis direction corresponds to the ab plane. Additionally, when the expressions "upper half" and "lower half" are simply used, the upper part of the ab plane is called the upper half, and the lower part of the ab plane is called the lower half (upper half and lower half relative to the ab plane). In FIGS. 14(A) to 14(E), O enclosed in a circle represents a tetracoordinate O, and O enclosed in a double circle represents a tricoordinate O.

[0110] FIG. 14(A) shows a structure containing one hexacoordinated In atom and six tetracoordinated oxygen atoms adjacent to the In atom (hereinafter referred to as tetracoordinated O). Here, a structure containing one metal atom and oxygen atoms adjacent to it is called a subgroup. Although the structure of FIG. 14(A) is actually an octahedral structure, it is shown as a planar structure for simplicity. However, there are three tetracoordinated O atoms in each of the upper and lower halves of FIG. 14(A). In the subgroup shown in FIG. 14(A), the charge is zero.

[0111] FIG. 14(B) shows a structure comprising one pentose-coordinated Ga atom, three triose-coordinated oxygen atoms (hereinafter referred to as triose-coordinated O) adjacent to the Ga atom, and two tetraose-coordinated O atoms adjacent to the Ga atom. All triose-coordinated O atoms are located in the ab plane. There is one tetraose-coordinated O atom in each of the upper and lower halves of FIG. 14(B). Since the In atom also has a pentose coordination, it can also have the structure shown in FIG. 14(B). In the subgroup shown in FIG. 14(B), the charge is zero.

[0112] FIG. 14(C) shows a structure containing one tetracoordinated Zn atom and four tetracoordinated O atoms adjacent to the Zn atom. In FIG. 14(C), there is one tetracoordinated O atom in the upper half and three tetracoordinated O atoms in the lower half. Alternatively, there may be three tetracoordinated O atoms in the upper half of FIG. 14(C) and one tetracoordinated O atom in the lower half. In the subgroup shown in FIG. 14(C), the charge is zero.

[0113] FIG. 14(D) shows a structure containing one hexacoordinate Sn atom and six tetracoordinate O atoms adjacent to the Sn atom. There are three tetracoordinate O atoms in each of the upper and lower halves of FIG. 14(D). The charge in the subgroup shown in FIG. 14(D) is +1.

[0114] FIG. 14(E) shows a subgroup containing two Zn atoms. In FIG. 14(E), there is one tetracoordinated O atom in each of the upper and lower halves. In the subgroup shown in FIG. 14(E), the charge is -1.

[0115] Here, multiple small groups form a medium group, and multiple medium groups form a large group (also called a unit cell).

[0116] The bonding rules between subgroups are explained. For the 6-coordinate In atom shown in Fig. 14(A), the three O atoms in the upper half each have three adjacent In atoms in the downward direction, and the three O atoms in the lower half each have three adjacent In atoms in the upward direction. For the 5-coordinate Ga atom shown in Fig. 14(B), the one O atom in the upper half has one adjacent Ga atom in the downward direction, and the one O atom in the lower half has one adjacent Ga atom in the upward direction. For the 4-coordinate Zn atom shown in Fig. 14(C), the one O atom in the upper half has one adjacent Zn atom in the downward direction, and the three O atoms in the lower half each have three adjacent Zn atoms in the upward direction. Likewise, the number of 4-coordinate O atoms in the upper direction of the metal atom and the number of adjacent metal atoms in the lower direction of the 4-coordinate O atom are the same. Likewise, the number of tetracoordinated O atoms down from a metal atom and the number of adjacent metal atoms up from that tetracoordinated O atom are the same. Since the O atom is tetracoordinated, the sum of the number of adjacent metal atoms down and the number of adjacent metal atoms up is 4. Therefore, when the sum of the number of tetracoordinated O atoms up from a metal atom and the number of tetracoordinated O atoms down from another metal atom is 4, two types of subgroups containing metal atoms can be bonded to each other. For example, when a hexacoordinated metal atom (In or Sn) is bonded through three tetracoordinated O atoms in the lower half, it is bonded to a pentocordinated metal atom (Ga or In) or a tetracoordinated metal atom (Zn).

[0117] Metal atoms with coordination numbers of 4, 5, or 6 are bonded to other metal atoms in the c-axis direction through the 4-coordinate O. In addition, multiple subgroups can be combined to form a middle group so that the total charge of the layer structure becomes zero.

[0118] Figure 15(A) illustrates a model diagram of a medium group included in the layer structure of an In-Sn-Zn oxide. Figure 15(B) shows a large group containing three medium groups. Figure 15(C) shows the atomic arrangement when the layer structure of Figure 15(B) is observed from the c-axis direction.

[0119] In FIG. 15(A), for simplicity, tricoordinate O atoms are omitted, and tetracoordinate O atoms are indicated by circles; the number of circles indicates the number of tetracoordinate O atoms. For example, for the Sn atom, three tetracoordinate O atoms are indicated by circle 3 in each of the upper and lower halfs. Likewise, in FIG. 15(A), one tetracoordinate O atom is indicated by circle 1 in each of the upper and lower halfs for the In atom. Likewise, FIG. 15(A) shows a Zn atom adjacent to one tetracoordinate O atom in the lower half and three tetracoordinate O atoms in the upper half, and a Zn atom adjacent to one tetracoordinate O atom in the upper half and three tetracoordinate O atoms in the lower half.

[0120] In FIG. 15(A), in the middle group included in the layered structure of the In-Sn-Zn oxide, Sn atoms adjacent to three tetracoordinate O atoms in each of the upper and lower halves sequentially from the top are bonded to In atoms adjacent to one tetracoordinate O atom in each of the upper and lower halves, the In atoms are bonded to Zn atoms adjacent to three tetracoordinate O atoms in the upper halves, the Zn atoms are bonded to In atoms adjacent to three tetracoordinate O atoms in each of the upper and lower halves through one tetracoordinate O atom in the lower halves relative to the Zn atoms, the In atoms contain two Zn atoms and are bonded to a subgroup adjacent to one tetracoordinate O atom in the upper halves, and this subgroup is bonded to three tetracoordinate O atoms in each of the upper and lower halves through one tetracoordinate O atom in the lower halves relative to this subgroup It is a configuration bonded to adjacent Sn atoms. These multiple medium groups combine to form a large group.

[0121] Here, the charges per bond of the ternary O atom and the tetracoordinate O atom can be considered to be -0.667 and -0.5, respectively. For example, the charges of the In atom (hexacoordinate or quincoordinate), Zn atom (quadcoordinate), and Sn atom (quincoordinate or hexacoordinate) are +3, +2, and +4, respectively. Therefore, the charge of the subgroup containing the Sn atom is +1. Thus, to form a layer structure containing the Sn atom, a charge of -1 is required to offset the charge of +1. An example of a structure having a charge of -1 is a subgroup containing two Zn atoms, as shown in Fig. 14(E). For example, since the charge of one subgroup containing the Sn atom can be offset by one subgroup containing two Zn atoms, the total charge of the layer structure can become 0.

[0122] Specifically, by repeating the major group shown in FIG. 15(B), crystals of an In-Sn-Zn oxide (In2SnZn3O8) can be obtained. However, the layer structure of the obtained In-Sn-Zn oxide is In2SnZn2O7(ZnO) m It can be expressed as a compositional formula of (m is 0 or a natural number).

[0123] The above rule applies to the following oxides, namely, oxides of quaternary metals such as In-Sn-Ga-Zn oxides; oxides of ternary metals such as In-Ga-Zn oxides (also denoted as IGZO), In-Al-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides, Sn-Al-Zn oxides, or In-Hf-Zn oxides, In-La-Zn oxides, In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides, In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides, and In-Lu-Zn ​​oxides; It is also applicable to oxides of binary metals, such as In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg oxides, In-Mg oxides, and In-Ga oxides.

[0124] For example, Fig. 16(A) shows a model diagram of a middle group included in the layer structure of an In-Ga-Zn-based oxide.

[0125] In FIG. 16(A), in the middle group included in the layer structure of the In-Ga-Zn oxide, from the top, In atoms adjacent to three tetracoordinate O atoms in each of the upper and lower parts are bonded to Zn atoms adjacent to one tetracoordinate O atom in the upper part, and the Zn atoms are bonded to Ga atoms adjacent to one tetracoordinate O atom in each of the upper and lower parts through three tetracoordinate O atoms in the lower part relative to the Zn atoms, and the Ga atoms are bonded to In atoms adjacent to three tetracoordinate O atoms in each of the upper and lower parts through one tetracoordinate O atom in the lower part relative to the Ga atoms. These multiple middle groups are combined to form a large group.

[0126] Figure 16(B) shows a large group consisting of three medium groups. Figure 16(C) shows the atomic arrangement when the layer structure of Figure 16(B) is observed in the c-axis direction.

[0127] Here, since the charges of the In atom (6-coordinate or 5-coordinate), Zn atom (4-coordinate), and Ga atom (5-coordinate) are +3, +2, and +3, respectively, the charge of any subgroup containing the In atom, Zn atom, or Ga atom is 0. Therefore, the total charge of the middle group having a combination of these subgroups is always 0.

[0128] To form a layered structure of an In-Ga-Zn oxide, the large group can be formed using not only the medium group shown in FIG. 16(A), but also a medium group with an arrangement of In atoms, Ga atoms, and Zn atoms different from that shown in FIG. 16(A).

[0129] Specifically, an In-Ga-Zn-based oxide can be obtained by repeating the major group shown in FIG. 16(B). However, the layer structure of the obtained In-Ga-Zn-based oxide is InGaO3(ZnO) n It can be expressed as a compositional formula where (n is a natural number).

[0130] This embodiment can be implemented in combination with other embodiments.

[0131] (Embodiment 3)

[0132] In a light-emitting device according to one embodiment of the present invention, a color filter method can be adopted in which a full-color image is displayed by using a combination of a light-emitting element that emits a single color of light, such as white, and a color filter. Alternatively, a method in which a full-color image is displayed can be adopted by using a plurality of light-emitting elements that emit light of different colors. This method is called a separate coloring method because each EL layer provided between a pair of electrodes of the light-emitting element is divided and colored with a corresponding color.

[0133] In the case of the separate coloring method, the EL layer is typically applied by a deposition method using a mask such as a metal mask; therefore, the pixel size depends on the precision of the separate coloring of the EL layer by the deposition method. On the other hand, unlike the separate coloring method, in the color filter method, the EL layer does not need to be applied by a separate layer. Therefore, compared to the case of the separate coloring method, it is easier to reduce the pixel size; thus, a high-precision pixel portion can be provided.

[0134] The light-emitting device includes a bottom-emission light-emitting device in which light is emitted from a light-emitting element extracted from a device substrate side where a transistor is formed in that category; and a top-emission light-emitting device in which light emitted from a light-emitting element is extracted from a side opposite to the device substrate. In the case of a top-emission structure, since the light emitted from the light-emitting element is not blocked by various devices such as wiring, transistors, or storage capacitors, the efficiency of extracting light from the pixel can be increased compared to a bottom-emission structure. Therefore, since a high brightness can be obtained even when the amount of current supplied to the light-emitting element is reduced, the top-emission structure is advantageous for improving the lifespan of the light-emitting element.

[0135] In a light-emitting device according to one embodiment of the present invention, a microcavity (micro light resonator) structure may be provided to resonate light emitted from an EL layer within a light-emitting element. Because light having a specific wavelength can be emitted from the light-emitting element with high efficiency due to the microcavity structure, the brightness and color purity of the pixel portion can be improved.

[0136] Figure 10 shows a cross-sectional view of a pixel as an example. Figure 10 shows a part of the cross-section of a pixel corresponding to red, a part of the cross-section of a pixel corresponding to green, and a part of the cross-section of a pixel corresponding to blue.

[0137] Specifically, in FIG. 10, a pixel (140r) corresponding to red, a pixel (140g) corresponding to green, and a pixel (140b) corresponding to blue are shown. The pixels (140r), (140g), and (140b) each include an anode (715r), an anode (715g), and an anode (715b). The anodes (715r), (715g), and (715b) included in the pixels (140r), (140g), and (140b) are provided on an insulating film (750) formed on a substrate (740).

[0138] A partition (730) formed using an insulating film is provided over the anode (715r), anode (715g), and anode (715b). The partition (730) has an opening, and at the opening, the anode (715r), anode (715g), and anode (715b) are each partially exposed. Additionally, an EL layer (731) and a visible light-transmitting cathode (732) are sequentially laminated over the partition (730) to cover the exposed area.

[0139] The portion where the anode (715r), EL layer (731), and cathode (732) overlap corresponds to a light-emitting element (741r) corresponding to red. The portion where the anode (715g), EL layer (731), and cathode (732) overlap corresponds to a light-emitting element (741g) corresponding to green. The portion where the anode (715b), EL layer (731), and cathode (732) overlap corresponds to a light-emitting element (741b) corresponding to blue.

[0140] A substrate (742) is provided in place of a substrate (740) to accommodate a light-emitting element (741r), a light-emitting element (741g), and a light-emitting element (741b). On the substrate (742), a coloring layer (743r) corresponding to a pixel (140r), a coloring layer (743g) corresponding to a pixel (140g), and a coloring layer (743b) corresponding to a pixel (140b) are provided. The coloring layer (743r) is a layer in which the transmittance of light in a wavelength region corresponding to red is higher than the transmittance of light in other wavelength regions. The coloring layer (743g) is a layer in which the transmittance of light in a wavelength region corresponding to green is higher than the transmittance of light in other wavelength regions. The coloring layer (743b) is a layer in which the transmittance of light in a wavelength region corresponding to blue is higher than the transmittance of light in other wavelength regions.

[0141] An overcoat (744) is provided on the substrate (742) to cover the coloring layer (743r), coloring layer (743g), and coloring layer (743b). The overcoat (744) is preferably formed using a resin material that transmits visible light and has improved flatness, provided to protect the coloring layer (743r), coloring layer (743g), and coloring layer (743b). The coloring layer (743r), coloring layer (743g), coloring layer (743b), and the overcoat (744) together may be considered as a color filter, or each of the coloring layer (743r), coloring layer (743g), and coloring layer (743b) may be considered as a color filter.

[0142] In FIG. 10, a conductive film (745r) with a high reflectance of visible light and a conductive film (746r) with a higher transmittance of visible light than the conductive film (745r) are sequentially stacked to be used as an anode (715r). Additionally, a conductive film (745g) with a high reflectance of visible light and a conductive film (746g) with a higher transmittance of visible light than the conductive film (745g) are sequentially stacked to be used as an anode (715g). The thickness of the conductive film (746g) is smaller than the thickness of the conductive film (746r). A conductive film (745b) with a high reflectance of visible light is used as an anode (715b).

[0143] Accordingly, in the light-emitting device shown in FIG. 10, in the light-emitting element (741r), the light path length of the light emitted from the EL layer (731) can be controlled by the distance between the conductive film (745r) and the cathode (732). In the light-emitting element (741g), the light path length of the light emitted from the EL layer (731) can be controlled by the distance between the conductive film (745g) and the cathode (732). In the light-emitting element (741b), the light path length of the light emitted from the EL layer (731) can be controlled by the distance between the conductive film (745b) and the cathode (732).

[0144] In one embodiment of the present invention, a microcavity structure that adjusts the optical path length according to the wavelength of light emitted from the light-emitting element (741r), the light-emitting element (741g), and the light-emitting element (741b) may be used, and accordingly, the light emitted from the EL layer (731) is resonated within each of the light-emitting elements.

[0145] By applying the microcavity structure to a light-emitting device according to one embodiment of the present invention, light having a wavelength corresponding to red from the light emitted from the light-emitting element (741r) resonates in the microcavity structure to increase its intensity. As a result, the color purity and brightness of the red light obtained through the coloring layer (743r) are increased. In addition, light having a wavelength corresponding to green from the light emitted from the light-emitting element (741g) resonates in the microcavity structure to increase its intensity, and as a result, the color purity and brightness of the green light obtained through the coloring layer (743g) are increased. Light having a wavelength corresponding to blue from the light emitted from the light-emitting element (741b) resonates in the microcavity structure to increase its intensity; as a result, the color purity and brightness of the blue light obtained through the coloring layer (743b) are increased.

[0146] However, although pixels corresponding to three colors of red, green, and blue are shown in FIG. 10, the present invention is not limited to this configuration in one embodiment. In one embodiment of the present invention, a combination of four colors of red, green, blue, and yellow, or a combination of three colors of cyan, magenta, and yellow may be used. Alternatively, a combination of six colors of light red, green, and blue, and dark red, green, and blue may be used, or a combination of six colors of red, green, blue, cyan, magenta, and yellow may be used.

[0147] However, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors that appear inside the triangle formed by three points corresponding to the light emission color of each pixel on the chromaticity diagram. Accordingly, by additionally providing a light-emitting element of a color existing outside this triangle on the chromaticity diagram, such as when using red, green, blue, and yellow pixels, the range of colors that can be expressed in this light-emitting device can be expanded, and as a result, color reproduction can be improved.

[0148] In FIG. 10, among the light-emitting element (741r), light-emitting element (741g), and light-emitting element (741b), a conductive film (745b) with high reflectivity of visible light is used as an anode in the light-emitting element (741b) that emits light of the shortest wavelength λ, and in the other light-emitting element (741r) and light-emitting element (741g), conductive films (746r) and conductive films (746g) with different film thicknesses are used; thus, the optical path length is adjusted. In one embodiment of the present invention, even in the light-emitting element (741b) that emits light of the shortest wavelength λ, a conductive film with high transmittance of visible light, such as a conductive film (746r) and a conductive film (746g), may be provided on the conductive film (745b) with high reflectivity of visible light. However, since the fabrication process of the anode is simplified compared to using a conductive film with high visible light transmittance as the anode of all light-emitting elements (741r, 741g, 741b), as shown in FIG. 10, it is preferable to use a conductive film (745b) with high visible light reflectance as the anode of the light-emitting element (741b) that emits light of the shortest wavelength λ.

[0149] However, the work function of the conductive film (745b) with high reflectivity of visible light is usually smaller than that of the conductive film (746r) and conductive film (746g) with high transmittance of visible light. Therefore, in the light-emitting element (741b) that emits light of the shortest wavelength λ, compared to the light-emitting element (741r) and light-emitting element (741g), it is difficult to inject holes from the anode (715b) into the EL layer (731), so the light-emitting efficiency tends to be low. In this regard, in one embodiment of the present invention, in the light-emitting element (741b) that emits light of the shortest wavelength λ, it is preferable to use a composite material containing a material with high hole transportability and a material having acceptor properties (electron acceptance properties) for the material with high hole transportability as part of the EL layer (731) in contact with the conductive film (745b) with high reflectivity of visible light. When the above composite material is formed in contact with the anode (715b), it becomes easier to inject holes from the anode (715b) into the EL layer (731), thereby increasing the light emission efficiency of the light-emitting element (741b).

[0150] Examples of acceptor substances include 7,7,8,8-tetracyano-2,3,5,6-tetrafluoroquinodimethane (abbreviated: F4-TCNQ), chloranyl, transition metal oxides, and oxides of metals belonging to groups 4 to 8 of the periodic table. Specifically, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide, tungsten oxide, manganese oxide, and rhenium oxide are preferred because they have high acceptor properties. Among these, molybdenum oxide is particularly preferred because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle.

[0151] Various compounds can be used as materials with high hole transportability for composite materials, such as aromatic amine compounds, carbazole derivatives, aromatic hydrocarbons, and polymer compounds (e.g., oligomers, dendrimers, polymers, etc.). In addition, it is preferable that the organic compound used for the composite material be an organic compound with high hole transportability. Specifically, 10 -6 cm 2 Materials having a hole mobility of / Vs or higher are preferably used. However, materials other than these may be used as long as the transport of holes is higher than that of electrons.

[0152] A conductive film (745r), a conductive film (745g), and a conductive film (745b) with high reflectivity of visible light can be formed by, for example, by forming a single layer or stacking aluminum, silver, or an alloy containing such metal materials. Alternatively, the conductive film (745r), a conductive film (745g), and a conductive film (745b) may be formed by stacking a conductive film with high reflectivity of visible light and a conductive film with a thin thickness (preferably 20 nm or less, more preferably 10 nm or less). For example, by forming a conductive film (745b) by stacking a thin titanium film or a molybdenum film on a conductive film with high reflectivity of visible light, it is possible to prevent an oxide film from forming on the surface of the conductive film with high reflectivity of visible light (e.g., aluminum, an alloy containing aluminum, or silver, etc.).

[0153] A conductive film (746r) and a conductive film (746g) with high transmittance of visible light can be formed using, for example, indium oxide, tin oxide, zinc oxide, indium tin oxide, indium zinc oxide, etc.

[0154] The cathode (732) can be formed, for example, by laminating a conductive film (preferably 20 nm or less, more preferably 10 nm or less) that is thin enough to transmit light and a conductive film comprising a conductive metal oxide. The conductive film that is thin enough to transmit light can be formed by single-layering or laminating silver, magnesium, or alloys containing such metal materials. Examples of conductive metal oxides include metal oxide materials such as indium oxide, tin oxide, zinc oxide, indium tin oxide, indium zinc oxide, and silicon oxide.

[0155] This embodiment can be implemented in appropriate combination with other embodiments.

[0156] (Embodiment 4)

[0157] In this embodiment, a bottom emission structure, a top emission structure, and a dual emission structure are described. In the dual emission structure, light from the light-emitting element is emitted from the side of the element substrate and from the side opposite to the element substrate.

[0158] FIG. 11(A) shows a cross-sectional view of a pixel in which light emitted from a light-emitting element (6033) is extracted from the anode (6034) side. A transistor (6031) is covered with an insulating film (6037), and a partition (6038) having an opening is formed on the insulating film (6037). The anode (6034) is partially exposed at the opening of the partition (6038), and the anode (6034), EL layer (6035), and cathode (6036) are sequentially stacked at this opening.

[0159] The anode (6034) is formed using a material that transmits light easily or is formed with a film thickness of light that passes easily through the anode (6034). The cathode (6036) is formed using a material that transmits light difficult to or is formed with a film thickness of light that does not pass through the cathode (6036). Thus, by the above configuration, a bottom emission structure that extracts light from the anode (6034) side can be obtained, as indicated by the outline arrow.

[0160] FIG. 11(B) shows a cross-sectional view of a pixel in which light emitted from a light-emitting element (6043) is extracted from the cathode (6046) side. A transistor (6041) is covered with an insulating film (6047), and a partition (6048) having an opening is formed on the insulating film (6047). An anode (6044) is partially exposed at the opening of the partition (6048), and an anode (6044), an EL layer (6045), and a cathode (6046) are sequentially stacked at this opening.

[0161] The anode (6044) is formed using a material that is difficult to transmit light, or is formed with a film thickness of light that is difficult to pass through the anode (6044). The cathode (6046) is formed using a material that is easy to transmit light, or is formed with a film thickness of light that easily passes through the cathode (6046). Thus, by the above configuration, a top emission structure that extracts light from the cathode (6046) side can be obtained, as indicated by the outline arrow.

[0162] FIG. 11(C) shows a cross-sectional view of a pixel in which light emitted from a light element (6053) is extracted from the anode (6054) side and the cathode (6056) side. The transistor (6051) is covered with an insulating film (6057), and a partition (6058) having an opening is formed on the insulating film (6057). The anode (6054) is partially exposed at the opening of the partition (6058), and the anode (6054), EL layer (6055), and cathode (6056) are sequentially stacked at this opening.

[0163] The anode (6054) and cathode (6056) are formed using a material that transmits light easily, or are formed with a film thickness of light that easily passes through the anode (6054) and cathode (6056). Thus, by the above configuration, a dual emission structure that extracts light from the anode (6054) and cathode (6056) side can be obtained, as indicated by the outline arrow.

[0164] For electrodes serving as anode and cathode, for example, metals, alloys, electrically conductive compounds, and mixtures thereof may be used. Specifically, examples include indium tin oxide (ITO), indium tin oxide containing silicon or silicon oxide, indium zinc oxide, indium oxide containing tungsten oxide and zinc oxide, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), and titanium (Ti). Other examples include elements belonging to Group 1 or Group 2 of the periodic table, namely alkali metals such as lithium (Li) or cesium (Cs), alkaline earth metals such as calcium (Ca) and strontium (Sr), magnesium (Mg) and alloys containing these (e.g., MgAg, AlLi), rare earth metals such as europium (Eu) and ytterbium (Yb) and alloys containing these, and graphene. The electrodes are formed using materials appropriately selected from the above and formed to have an optimal thickness, thereby making it possible to create a bottom emission structure, a top emission structure, or a dual emission structure.

[0165] This embodiment may be implemented in appropriate combination with other embodiments.

[0166] (Embodiment 5)

[0167] FIG. 12 is an example of a perspective view of a light-emitting device according to one embodiment of the present invention.

[0168] The light-emitting device shown in FIG. 12 includes a panel (1601), a circuit board (1602), and a connection part (1603). The panel (1601) includes a pixel part (1604) including a plurality of pixels, a scan line driving circuit (1605) for selecting a plurality of pixels row by row, and a signal line driving circuit (1606) for controlling the input of an image signal to a pixel within a selected row. Specifically, the scan line driving circuit (1605) generates a signal that is input to wiring G1 to wiring G3.

[0169] Various signals and power potentials are input to the panel (1601) from the circuit board (1602) through the connection part (1603). For example, a flexible printed circuit board (FPC) can be used for the connection part (1603). When a COF tape is used for the connection part (1603), a part of the circuit within the circuit board (1602), or a part of the scan line driving circuit (1605) or signal line driving circuit (1606) included in the panel (1601), may be formed on a separately prepared chip, or the chip may be connected to the COF tape using the Chip On Film (COF) method.

[0170] This embodiment can be implemented in combination with other embodiments.

[0171] (Embodiment 6)

[0172] A light-emitting device according to one embodiment of the present invention may be used in a display device, a personal computer, or an image playback device provided with a recording medium (typically, a device having a display for playing the contents of a recording medium such as a DVD: Digital Versatile Disc and displaying the played image). Other examples of electronic devices that may include a light-emitting device according to one embodiment of the present invention include mobile phones, game consoles including portable types, portable information terminals, electronic books, cameras such as video cameras and digital still cameras, goggle-type displays (head-mounted displays), navigation systems, sound playback devices (e.g., car audio, digital audio players, etc.), photocopiers, fax machines, printers, multifunction printers, automated teller machines (ATMs), vending machines, etc. Specific examples of such electronic devices are shown in FIGS. 13(A) to 13(E).

[0173] FIG. 13(A) shows a portable game console including a housing (5001), a housing (5002), a display unit (5003), a display unit (5004), a microphone (5005), a speaker (5006), an operation key (5007), a stylus (5008), etc. A light-emitting device according to one embodiment of the present invention may be used as a display unit (5003) or a display unit (5004). By using a light-emitting device according to one embodiment of the present invention as a display unit (5003) or a display unit (5004), a high-definition portable game console may be provided. However, the portable game console shown in FIG. 13(A) includes two display units (5003) and two display units (5004), but the number of display units included in the portable game console is not limited to two.

[0174] FIG. 13(B) shows a display device including a housing (5201), a display unit (5202), a support (5203), etc. A light-emitting device according to one embodiment of the present invention may be used as a display unit (5202). By using a light-emitting device according to one embodiment of the present invention as a display unit (5202), a high-definition display device may be provided. However, the display device includes all information display devices in its category, such as those for personal computers, TV broadcast reception, and advertising display.

[0175] FIG. 13(C) shows a notebook-type personal computer including a housing (5401), a display unit (5402), a keyboard (5403), a pointing device (5404), etc. A light-emitting device according to one embodiment of the present invention may be used as a display unit (5402). By using a light-emitting device according to one embodiment of the present invention as a display unit (5402), a notebook-type personal computer with high image quality can be provided.

[0176] FIG. 13(D) shows a portable information terminal including a housing (5601), a display unit (5602), an operation key (5603), etc. In the portable information terminal shown in FIG. 13(D), a modem may be built into the housing (5601). A light-emitting device according to one embodiment of the present invention may be used as a display unit (5602). By using a light-emitting device according to one embodiment of the present invention as a display unit (5602), a high-definition portable information terminal can be provided.

[0177] FIG. 13(E) shows a mobile phone comprising a housing (5801), a display unit (5802), a voice input unit (5803), a voice output unit (5804), an operation key (5805), a light receiving unit (5806), etc. By converting light received from the light receiving unit (5806) into an electrical signal, an external image can be loaded. A light-emitting device according to one embodiment of the present invention can be used as a display unit (5802). By using a light-emitting device according to one embodiment of the present invention as a display unit (5802), a high-definition mobile phone can be provided.

[0178] This embodiment may be implemented in appropriate combination with other embodiments.

[0179] (Embodiment 7)

[0180] In this embodiment, the value of the gate voltage Vgs of the transistor (11) during the third period of operation of the pixel (100) shown in Fig. 1(A) described in Embodiment 1 was obtained by calculation.

[0181] The calculation was performed under condition A or condition B, where the value of potential V0 in wiring IL was different. The specific potential values ​​of each wiring under conditions A and B are shown in Table 1 below. Potential GVDD corresponds to the high-level potential applied to wirings G1, G2, and G3, respectively. Potential GVSS corresponds to the low-level potential applied to wirings G1, G2, and G3, respectively. However, in Table 1, potential Vcat is set to 0 V, and the values ​​of potential Vdata, potential Vano, potential V0, potential GVDD, and potential GVSS are expressed as potential differences relative to potential Vcat.

[0182]

[0183] Regarding the ratio of channel length L and channel width W of each transistor in the calculation, the W / L of transistor (11) was 3μm / 9μm, and the W / L of transistors (12) to (15) was 3μm / 3μm. Also, in all transistors included in the pixel (100) shown in FIG. 1(A), if the region where the conductive film and the semiconductor film functioning as a source or drain are in contact is called region A, the length in the channel length direction (Lov) in the region where the region A and the region where the gate electrode is formed overlap was 1.5μm.

[0184] In the third period, the gate voltage Vgs of the transistor (11) was Vdata-V0+Vth, as shown in FIG. 3(C). Therefore, in the pixel (100) shown in FIG. 1(A), since the equation Vgs-Vth = Vdata-V0 is maintained, Vgs-Vth is ideally constant regardless of the value of the threshold voltage Vth.

[0185] Figure 17 shows the value of Vgs-Vth obtained by calculation under condition A. In Figure 17, the horizontal axis represents the threshold voltage Vth (V), and the vertical axis represents the value of Vgs-Vth (V). In Figure 17, it can be seen that even when the value of the threshold voltage Vth is changed, the value of Vgs-Vth is almost uniform, and the deviation is limited to about 25% to 30% or less.

[0186] Figure 18 shows the value of Vgs-Vth obtained by calculation under condition B. In Figure 18, the horizontal axis represents the threshold voltage Vth (V), and the vertical axis represents the value of Vgs-Vth (V). In Figure 18, when the value of the threshold voltage Vth is positive, the value of Vgs-Vth is nearly uniform. However, when the value of the threshold voltage Vth is negative, as the value of the threshold voltage Vth increases in the negative direction, the value of Vgs-Vth increases, which means that the value of Vgs-Vth depends on the value of the threshold voltage Vth.

[0187] The result of the above calculation demonstrates that in a light-emitting device according to one embodiment of the present invention, even if the transistor (11) is normally on, that is, even if the threshold voltage Vth has a negative value, the gate voltage Vgs of the transistor (11) can be set such that the threshold voltage Vth of the transistor (11) becomes an added value.

[0188] This embodiment can be implemented in combination with other embodiments. Explanation of the symbols

[0189] 11: Transistor 12: Transistor 13: Transistor 14: Transistor 15: Transistor 16: Capacitive element 17: Light-emitting element 100: Pixels 140b: Pixel 140g: Pixels 140r: pixels 715b: Anode 715g: Anode 715r: Anode 730: Bulkhead 731: EL layer 732: Cathode 740: Substrate 741b: light-emitting element 741g: Light-emitting element 741r: light-emitting element 742: Substrate 743b: Color layer 743g: Color layer 743r: Color layer 744: Overcoat 745b: Challenge Screen 745g: Conductor film 745r: Challenge Screen 746g: Challenge film 746r: Challenge Screen 750: Insulating film 800: Substrate 801: Challenge 802: Gate insulating film 803: Semiconductor film 804: Challenge 805: Challenge 806: Semiconductor film 807: Challenge 808: Challenge 809: Challenge 810: Challenge 811: Semiconductor film 812: Challenge 813: Semiconductor film 814: Challenge 815: Challenge 816: Challenge 817: Semiconductor film 818: Challenge 819: Challenge 820: Insulating film 821: Insulating film 822: Challenge 823: Contact hole 824: Insulating film 825: EL layer 826: Challenge 900: Substrate 901: Semiconductor film 902: Gate insulating film 903: Challenge 904: Challenge 905: Challenge 906: Semiconductor film 907: Challenge 908: Challenge 909: Challenge 911: Challenge 912: Semiconductor film 913: Challenge 914: Challenge 915: Challenge 916: Challenge 917: Challenge 920: Insulating film 921: Challenge 922: Contact Hole 923: Insulating film 924: EL layer 925: Challenge 1601: Panel 1602: Circuit board 1603: Connection part 1604: Pixel section 1605: Scan line driving circuit 1606: Signal line driving circuit 5001: Housing 5002: Housing 5003: Display unit 5004: Display unit 5005: Microphone 5006: Speaker 5007: Control Keys 5008: Stylus 5201: Housing 5202: Display unit 5203: Support 5401: Housing 5402: Display unit 5403: Keyboard 5404: Pointing device 5601: Housing 5602: Display unit 5603: Control Keys 5801: Housing 5802: Display unit 5803: Voice Input Section 5804: Audio output section 5805: Control Keys 5806: Light receiving unit 6031: Transistor 6033: Light-emitting element 6034: Anode 6035: EL layer 6036: Cathode 6037: Insulating film 6038: Bulkhead 6041: Transistor 6043: Light-emitting element 6044: Anode 6045: EL layer 6046: Cathode 6047: Insulating film 6048: Bulkhead 6051: Transistor 6053: Optical device 6054: Anode 6055: EL layer 6056: Cathode 6057: Insulating film 6058: Bulkhead This application is based on Japanese patent applications numbered 2011-161103 and 2011-259828, filed with the Japan Patent Office on July 22, 2011 and November 29, 2011, respectively, the full text of which is incorporated by reference into this specification.

Claims

Claim 1 A plurality of pixels are included in a pixel portion, and at least one of the plurality of pixels includes a first to fifth transistor and a light-emitting element, wherein the first transistor has a function of controlling the input of an image signal to the one pixel, one of the source and drain of the second transistor is always conductive with one of the source and drain of the fifth transistor, one of the source and drain of the third transistor is always conductive with the gate of the second transistor, the third transistor has a function of inputting a potential corresponding to the image signal to the gate of the second transistor through the channel forming region of the third transistor, one of the source and drain of the fourth transistor is always conductive with the gate of the second transistor, the other of the source and drain of the fourth transistor is always conductive with a first wiring, the other of the source and drain of the fifth transistor is always conductive with the pixel electrode of the light-emitting element, and the second wiring is through at least the channel forming region of the second transistor and the channel forming region of the fifth transistor When conductive with the pixel electrode of the light-emitting element, each of the second transistor and the fifth transistor is on, and the second transistor is a light-emitting device having a function of controlling the current supplied to the light-emitting element according to the potential, comprising a first semiconductor film including a channel forming region of the second transistor and a channel forming region of the fifth transistor, a second semiconductor film including a channel forming region of the third transistor, a first conductive film including a region disposed above the first semiconductor film and also functioning as a gate of the second transistor, a second conductive film including a region disposed above the first semiconductor film and also functioning as a gate of the fifth transistor, and a region disposed above the second semiconductor film.A light-emitting device comprising a third conductive film having a function as a gate of the third transistor, wherein the first semiconductor film has a curved shape in the channel forming region of the second transistor.

Images