Display device and electronic device

Abstract

A display device according to one embodiment comprises: a substrate; a pixel defining film disposed on the substrate and defining a plurality of light-emitting regions including a first light-emitting region, a second light-emitting region, and a third light-emitting region adjacent to each other; and a plurality of light-emitting elements disposed on the substrate, including a first light-emitting element disposed in the first light-emitting region, a second light-emitting element disposed in the second light-emitting region, and a third light-emitting element disposed in the third light-emitting region. During the light-emitting period in which the first light-emitting element, the second light-emitting element, and the third light-emitting element emit light to express standard white, a third voltage greater than a first voltage applied to the first electrode of the first light-emitting element and a second voltage applied to the first electrode of the second light-emitting element may be applied to the first electrode of the third light-emitting element, and the gap between the second light-emitting region and the third light-emitting region may be greater than the gap between the first light-emitting region and the second light-emitting region.

Description

Technology Field

[0001] Embodiments of the present invention relate to a display device and an electronic device capable of displaying an image. Background Technology

[0002] As the information society develops, the demand for display devices and electronic devices capable of displaying images is increasing in various forms. Accordingly, various types of display devices and electronic devices containing pixels are being developed. Display devices may be provided independently or integrated into electronic devices to be used as the display screen of the electronic device.

[0003] Display devices and electronic devices can be used in various environments. Furthermore, due to heat generated by components such as processors and thermal insulation provided by windows or cases, these devices may be operated at temperatures higher than room temperature. Therefore, high temperature stability may be required to maintain uniform brightness and color even with temperature fluctuations. The problem to be solved

[0004] The problem that the present invention aims to solve is to provide a display device and an electronic device capable of reducing leakage current between subpixels and improving temperature stability.

[0005] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0006] A display device according to one embodiment comprises: a substrate; a pixel defining film disposed on the substrate and defining a plurality of light-emitting regions including a first light-emitting region, a second light-emitting region, and a third light-emitting region adjacent to each other; and a plurality of light-emitting elements disposed on the substrate, including a first light-emitting element disposed in the first light-emitting region, a second light-emitting element disposed in the second light-emitting region, and a third light-emitting element disposed in the third light-emitting region. During the light-emitting period in which the first light-emitting element, the second light-emitting element, and the third light-emitting element emit light to express standard white, a third voltage greater than a first voltage applied to the first electrode of the first light-emitting element and a second voltage applied to the first electrode of the second light-emitting element may be applied to the first electrode of the third light-emitting element, and the gap between the second light-emitting region and the third light-emitting region may be greater than the gap between the first light-emitting region and the second light-emitting region.

[0007] In one embodiment, the difference between the third voltage and the second voltage may be greater than the difference between the first voltage and the second voltage.

[0008] In one embodiment, the first light-emitting element may be a red light-emitting element that emits red light, the second light-emitting element may be a green light-emitting element that emits green light, and the third light-emitting element may be a blue light-emitting element that emits blue light.

[0009] In one embodiment, the first light-emitting element, the second light-emitting element, and the third light-emitting element may each include an organic light-emitting layer individually disposed in the first light-emitting region, the second light-emitting region, and the third light-emitting region.

[0010] In one embodiment, during the light emission period, the third light-emitting element may emit light with a lower brightness than the first light-emitting element and the second light-emitting element.

[0011] In one embodiment, during the light emission period, a first driving current, a second driving current, and a third driving current flow through the first light-emitting element, the second light-emitting element, and the third light-emitting element, respectively, and the third driving current may be greater than the first driving current and the second driving current.

[0012] In one embodiment, the second light-emitting region may have a shape that extends in a direction toward the first light-emitting region.

[0013] In one embodiment, the display device may further include a separation structure disposed between the second light-emitting region and the third light-emitting region.

[0014] In one embodiment, the second light-emitting region has a shape that extends in one direction and includes a long side facing the third light-emitting region, and the separating structure extends in the direction in which the second light-emitting region extends and can be arranged parallel to the long side of the second light-emitting region.

[0015] In one embodiment, the separation structure may be positioned on both sides of the second light-emitting region.

[0016] In one embodiment, the display device further comprises a backplane layer disposed between a light-emitting element layer including the light-emitting elements and the substrate, and the backplane layer may include transistors electrically connected to the plurality of light-emitting elements and an insulating layer disposed on the transistors.

[0017] In one embodiment, the display device further includes connection holes for electrically connecting the plurality of light-emitting elements to each transistor by penetrating the insulating layer, and the connection holes may be disposed in a different part of the non-light-emitting region, not between the first light-emitting region and the second light-emitting region among the non-light-emitting regions surrounding the plurality of light-emitting regions.

[0018] In one embodiment, the plurality of light-emitting regions include a plurality of first light-emitting regions including the first light-emitting region, a plurality of second light-emitting regions including the second light-emitting region, and a plurality of third light-emitting regions including the third light-emitting region, and each of the connecting holes may be disposed between adjacent first light-emitting regions and third light-emitting regions or between adjacent second light-emitting regions and third light-emitting regions among the plurality of light-emitting regions.

[0019] An electronic device according to one embodiment may include a display module including a display panel; and a processor that transmits an image data signal to the display module. The display panel includes a substrate; a pixel defining film disposed on the substrate and defining a plurality of light-emitting regions including a first light-emitting region, a second light-emitting region, and a third light-emitting region adjacent to each other; and a plurality of light-emitting elements disposed on the substrate, including a first light-emitting element disposed in the first light-emitting region, a second light-emitting element disposed in the second light-emitting region, and a third light-emitting element disposed in the third light-emitting region. During the light-emitting period in which the first light-emitting element, the second light-emitting element, and the third light-emitting element emit light to express standard white, a third voltage greater than a first voltage applied to the first electrode of the first light-emitting element and a second voltage applied to the first electrode of the second light-emitting element may be applied to the first electrode of the third light-emitting element, and the gap between the second light-emitting region and the third light-emitting region may be greater than the gap between the first light-emitting region and the second light-emitting region.

[0020] In one embodiment, the difference between the third voltage and the second voltage may be greater than the difference between the first voltage and the second voltage.

[0021] In one embodiment, the first light-emitting element may be a red light-emitting element that emits red light, the second light-emitting element may be a green light-emitting element that emits green light, and the third light-emitting element may be a blue light-emitting element that emits blue light.

[0022] In one embodiment, the second light-emitting region may have a shape that extends in a direction toward the first light-emitting region.

[0023] In one embodiment, the display panel may further include a separating structure disposed between the second light-emitting region and the third light-emitting region.

[0024] In one embodiment, the display panel further comprises a backplane layer disposed between a light-emitting element layer including the light-emitting elements and the substrate, and the backplane layer may include transistors electrically connected to the plurality of light-emitting elements and an insulating layer disposed on the transistors.

[0025] In one embodiment, the display panel further includes connection holes for electrically connecting the plurality of light-emitting elements to each transistor by penetrating the insulating layer, and the connection holes may be disposed in a different part of the non-light-emitting region, not between the first light-emitting region and the second light-emitting region among the non-light-emitting regions surrounding the plurality of light-emitting regions.

[0026] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0027] The display device and the electronic device according to the embodiments may each include a first light-emitting element, a second light-emitting element, and a third light-emitting element disposed in a first light-emitting region, a second light-emitting region, and a third light-emitting region. In the embodiments, a voltage relatively larger than the voltage applied to the first light-emitting element and the second light-emitting element may be applied to the third light-emitting element, and the gap between the second light-emitting region and the third light-emitting region may be larger than the gap between the first light-emitting region and the second light-emitting region. According to the embodiments, the aperture ratio of the display device and the electronic device can be secured, and at the same time, leakage current between subpixels can be reduced.

[0028] In some embodiments, the first light-emitting element, the second light-emitting element, and the third light-emitting element may each be a red light-emitting element, a green light-emitting element, and a blue light-emitting element. According to the embodiments, the temperature sensitivity of the second subpixel including the second light-emitting element can be lowered to improve the temperature stability of the display device and the electronic device.

[0029] In some embodiments, the display device and the electronic device may further include a separation structure disposed between a second light-emitting region and a third light-emitting region. Accordingly, leakage current between subpixels can be further reduced.

[0030] In some embodiments, the display device and the electronic device include connection holes for connecting the light-emitting element and the circuit element of each of the subpixels, and the connection holes may be disposed in a different part of the non-light-emitting region rather than between the first light-emitting region and the second light-emitting region. According to the embodiments, the design structure of the display device and the electronic device can be improved, and the connection holes of the subpixels can be stably formed.

[0031] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0032] FIG. 1 is a perspective view showing a display device according to one embodiment. FIG. 2 is a perspective view showing a display module according to one embodiment. FIG. 3 is a plan view showing a display panel according to one embodiment. FIG. 4 is a cross-sectional view showing a display module according to one embodiment. FIG. 5 is an equivalent circuit diagram showing a subpixel according to one embodiment. FIG. 6 is an equivalent circuit diagram showing a subpixel according to one embodiment. FIG. 7 is a plan view showing the display area of ​​a display panel according to one embodiment. FIG. 8 is a plan view showing the display area of ​​a display panel according to one embodiment. FIG. 9 is a cross-sectional view showing the display area of ​​a display panel according to one embodiment. FIG. 10 is an equivalent circuit diagram showing the operation of a pixel during the light emission period according to one embodiment. FIG. 11 is a graph showing the voltage-current characteristics of light-emitting elements included in subpixels according to one embodiment. FIG. 12 is a plan view showing the display area of ​​a display panel according to one embodiment. FIG. 13 is a plan view showing the location of the connection holes between the light-emitting area and the non-light-emitting area of ​​a display panel according to one embodiment. FIG. 14 is a plan view showing the location of the connection hole between the light-emitting area and the non-light-emitting area of ​​a display panel according to one embodiment. Figure 15 is a graph showing the color change of sample display devices according to temperature change. FIG. 16 is a block diagram of an electronic device according to one embodiment. FIG. 17 is a schematic diagram of an electronic device according to various embodiments. Specific details for implementing the invention

[0033] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0034] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0035] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0036] Specific embodiments will be described below with reference to the attached drawings.

[0037] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0038] Referring to FIG. 1, the display device (1) may be a device capable of providing images such as video or still images. For example, the display device (1) may be an electronic device capable of displaying images by including a display module for implementing a display screen. Alternatively, the display device (1) may be included in an electronic device that provides a display screen and may form the display screen of said electronic device. As an example, the display device (1) may refer to any electronic device (or part of an electronic device) that provides a display screen capable of displaying images or includes a display module for displaying images.

[0039] In one embodiment, the display device (1) may be a light-emitting display device including a light-emitting element such as an inorganic light-emitting diode or an organic light-emitting diode, but is not limited thereto. For example, the present specification discloses a light-emitting display device including an organic light-emitting diode as a display device (1) to which the embodiments can be applied, but the type or form of the display device (1) to which the embodiments can be applied is not limited thereto.

[0040] In one embodiment, the display device (1) may include additional elements in addition to the display module. For example, the display device (1) may further include a housing (15) (or case) for housing and / or protecting the display module. In FIG. 1, a part of the display device (1) enclosed by the housing (15) (for example, a part including a display area (DA) and a non-display area (NDA)) may include a display module including a display panel, and may optionally further include a cover window placed on the display panel.

[0041] The display device (1) may have a rectangular, square, circular, or various other shapes. The display device (1) may include corner portions that are angular or rounded. In FIG. 1, a display device (1) having a roughly rectangular shape and rounded corner portions on a plane defined by a first direction (DR1) and a second direction (DR2) is illustrated. The display device (1) may have thickness in a third direction (DR3) that intersects the first direction (DR1) and the second direction (DR2).

[0042] A display device (1) may include a display area (DA) and a non-display area (NDA). The display area (DA) is an area where an image can be displayed, and the non-display area (NDA) is an area where an image is not displayed. The display area (DA) may also be referred to as an active area, and the non-display area (NDA) may also be referred to as an inactive area. The display area (DA) may generally occupy the center of the display device (1). The non-display area (NDA) may be placed around the display area (DA). For example, the non-display area (NDA) may be placed at the edge of the display device (1) and may surround the display area (DA).

[0043] FIG. 2 is a perspective view showing a display module according to one embodiment. For example, FIG. 2 shows one embodiment of a display module (11) that may be included in the display device (1) of FIG. 1.

[0044] FIG. 3 is a plan view showing a display panel according to one embodiment. For example, FIG. 3 shows one embodiment of a display panel (100) that may be included in the display module (11) of FIG. 2.

[0045] FIGS. 2 and FIGS. 3 show a display panel (100) including a sub-region (SBA), and the sub-region (SBA) of the display panel (100) is shown in an unfolded state without being bent. The display panel (100) can be bent so that at least a part of the sub-region (SBA) overlaps with the main region (MA) and can be housed inside the housing (15) of FIG. 1.

[0046] Referring to FIGS. 1 to 3, the display device (1) may include a display module (11). The display module (11) may include a display panel (100) for implementing a display screen, and a display driving unit (200) and a circuit board (300) for driving the display panel (100). In one embodiment, the display device (1) may provide a touch input function, and the display module (11) may further include a touch driving unit (400).

[0047] The display panel (100) may include a main area (MA) including a display area (DA). The main area (MA) may further include a non-display area (NDA) placed around the display area (DA).

[0048] Subpixels emitting light of a specific color may be arranged in the display area (DA). Multiple subpixels arranged adjacent to each other may form a single pixel. For example, a subpixel may be a minimum unit for expressing an individual color, and a pixel may include multiple subpixels emitting light of different colors as a minimum unit group of subpixels capable of expressing standard white (e.g., achromatic colors including white with maximum luminance and gray with luminance lower than maximum luminance). For example, red subpixels emitting red light, green subpixels emitting green light, and blue subpixels emitting blue light may be arranged in the display area (DA), and at least one red subpixel, at least one green subpixel, and at least one blue subpixel adjacent to each other may form a single pixel. The pixel may express various colors in addition to standard white. The type, number, and / or ratio of subpixels constituting each pixel may vary according to the embodiments.

[0049] In the non-display area (NDA), wiring that is electrically connected to subpixels of the display area (DA) may be disposed. For example, in the non-display area (NDA), wiring that is electrically connected between subpixels and a display driver (200), and / or wiring that is electrically connected between subpixels and at least one pad (PD) may be disposed.

[0050] In one embodiment, at least one driving circuit for driving subpixels may be further disposed in the non-display area (NDA). For example, at least one gate driver (GDR) may be disposed in the non-display area (NDA). Although FIG. 3 illustrates an embodiment in which two gate drivers (GDRs) are disposed in the non-display area (NDA) on both sides of the display area (DA), the number and / or location of the gate drivers (GDRs) are not limited thereto. The gate drivers (GDRs) may supply gate signals to each subpixel through gate lines electrically connected to the subpixels.

[0051] In one embodiment, the gate driver (GDR) may be a panel-embedded driving circuit formed inside the display panel (100) together with subpixels. For example, the gate driver (GDR) may include circuit elements formed within the backplane layer of the display panel (100) together with circuit elements of the subpixels (for example, transistors and capacitors included in the pixel circuits of the subpixels). For example, the gate driver (GDR) may include circuit elements (for example, transistors and capacitors included in stage circuits that generate gate signals for controlling the operation of the subpixels).

[0052] In one embodiment, the display panel (100) may further include a sub-region (SBA) extending from the main area (MA). In one embodiment, the sub-region (SBA) may have flexible characteristics to enable bending, folding, rolling, etc. When the sub-region (SBA) is bent (or folded), at least a portion of the sub-region (SBA) and the main area (MA) may overlap each other in the thickness direction (for example, a third direction (DR3)). For example, when the display panel (100) is bent in the sub-region (SBA), at least a portion of the sub-region (SBA) may be positioned below the main area (MA).

[0053] The sub-region (SBA) may include a display driver (200) and a pad portion. The pad portion may be an area where pads (PDs) electrically connected to the circuit board (300) are placed. Additionally, sub-pixels, wiring electrically connected to the display driver (200) and / or pads (PDs) may be further placed in the sub-region (SBA).

[0054] In another embodiment, the sub-region (SBA) may be omitted, and the pad portion may be placed in the non-display area (NDA) of the main area (MA). In this case, the display driving portion (200) may be placed in the non-display area (NDA) of the main area (MA) or on a circuit board (300) connected to the display panel (100).

[0055] The display driving unit (200) can output driving signals for driving the display panel (100). The display driving unit (200) may include a data driving unit. The data driving unit of the display driving unit (200) can supply data voltages to each subpixel through data lines electrically connected to the subpixels.

[0056] In one embodiment, the display driving unit (200) may be formed as an integrated circuit (IC) and mounted on the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic method. However, the embodiments are not limited thereto. For example, the display driving unit (200) may be placed on a circuit board (300) using a COF (chip on film) method and electrically connected to the display panel (100) through a pad portion.

[0057] In one embodiment, the display driver (200) may further include a power supply unit (also referred to as a “power supply circuit”) that generates driving voltages necessary for driving pixels (PX) and can supply driving voltages to power lines electrically connected to the pixels (PX). In another embodiment, the power supply unit may be provided separately from the display driver (200) and may be electrically connected to the display panel (100) through pads (PD). For example, the power supply unit may be placed on a circuit board (300) or on another circuit board electrically connected to the circuit board (300).

[0058] In one embodiment, the display driver (200) may further include a timing control unit that outputs driving signals necessary for driving the gate driver (GDR) and the data driver. The timing control unit may supply driving signals (e.g., gate control signals and data control signals) for driving the gate driver (GDR) and the data driver to the gate driver (GDR) and the data driver. In another embodiment, the timing control unit may be provided separately from the display driver (200) and may be electrically connected to the display panel (100) through pads (PD). For example, the timing control unit may be placed on the circuit board (300) or on another circuit board electrically connected to the circuit board (300).

[0059] A circuit board (300) is placed on a pad portion of a display panel (100) and can be electrically connected to the display panel (100) through a conductive material (e.g., an anisotropic conductive film (ACF)). For example, the circuit board (300) can be attached to the pads (PD) of the display panel (100) using an anisotropic conductive film (ACF). In one embodiment, the circuit board (300) may be a flexible film such as a flexible printed circuit board, a printed circuit board, or a chip-on-film.

[0060] The touch driver (400) may be mounted on the circuit board (300). The touch driver (400) may be electrically connected to the touch sensing layer of the display panel (100). In one embodiment, the touch sensing layer of the display panel (100) may include touch electrodes constituting a capacitive touch sensor. In this case, the touch driver (400) may supply a touch driving signal to each of the touch electrodes of the touch sensing layer and detect a touch input by sensing the amount of change in capacitance formed between the touch electrodes. In one embodiment, the touch driver (400) may be formed as an integrated circuit (IC).

[0061] FIG. 4 is a cross-sectional view showing a display module according to one embodiment. For example, FIG. 4 schematically shows an example of a cross-section of a display module (11) in a state where the display panel (100) of FIG. 2 and FIG. 3 is bent in a sub-region (SBA).

[0062] Referring to FIGS. 2 to 4, the display panel (100) may include a substrate (110), a backplane layer (120), a light-emitting element layer (130), and an encapsulation layer (140) (or a protective layer). In one embodiment, the display panel (100) may further include at least one of a touch sensing layer (150) and an optical layer (160).

[0063] The substrate (110) serves as a basic structure of the display panel (100) and can support a backplane layer (120) and a light-emitting element layer (130), etc. The substrate (110) may be a flexible substrate capable of bending, folding, rolling, etc., but is not limited thereto. In one embodiment, the substrate (110) may include a polymer resin such as polyimide (PI). In another embodiment, the substrate (110) may include a glass material or a metal material.

[0064] The backplane layer (120) may be disposed on the substrate (110). The backplane layer (120) may be disposed in the display area (DA) and the non-display area (NDA). If the display panel (100) further includes a sub-area (SBA), the backplane layer (120) may also be disposed in the sub-area (SBA).

[0065] The backplane layer (120) may include circuit elements of subpixels and wiring electrically connected to the subpixels. For example, the backplane layer (120) may include transistors and capacitors included in the pixel circuits of the subpixels, and signal lines (e.g., gate lines and data lines) and power lines electrically connected to the subpixels (e.g., a plurality of power lines including a first power line and a second power line each delivering a first driving voltage of high potential and a second driving voltage of low potential, respectively). In one embodiment, if the display panel (100) includes a gate driver (GDR) disposed in a non-display area (NDA), the backplane layer (120) may further include circuit elements included in the gate driver (GDR) and wiring electrically connected to the gate driver (GDR).

[0066] A light-emitting element layer (130) may be disposed on a backplane layer (120). The light-emitting element layer (130) may be disposed in at least a display area (DA). The light-emitting element layer (130) may include a structure (e.g., a pixel defining film or bank) that defines or partitions light-emitting regions of subpixels, and light-emitting elements disposed in the light-emitting regions of subpixels.

[0067] The encapsulation layer (140) may be disposed on the light-emitting element layer (130). For example, the encapsulation layer (140) may cover the upper surface and side of the light-emitting element layer (130) to protect the light-emitting element layer (130). The encapsulation layer (140) may be disposed in at least a display area (DA). An end of the encapsulation layer (140) may be disposed in a non-display area (NDA). In one embodiment, the encapsulation layer (140) may include a plurality of inorganic encapsulation layers and an organic encapsulation layer interposed between the inorganic encapsulation layers.

[0068] The touch sensing layer (150) may be disposed on the encapsulation layer (140). For example, the touch sensing layer (150) may be disposed or formed on the encapsulation layer (140), or may be disposed on a separate substrate disposed on the encapsulation layer (140). The location of the touch sensing layer (150) is not limited thereto and may vary depending on the embodiments. If the display module (11) (or display device (1)) does not provide a touch input function, the display module (11) may not include the touch sensing layer (150). Alternatively, the touch sensing layer (150) may be provided separately from the display panel (100) and disposed on the display panel (100).

[0069] The touch sensing layer (150) may include elements for generating an electrical signal in response to a user's touch input. For example, the touch sensing layer (150) may include touch electrodes disposed in an area providing a touch input function, and touch wiring that electrically connects the touch electrodes to the touch driving unit (400). When the display module (11) provides a touch input function in a display area (DA), the touch electrodes may be disposed in the display area (DA). The touch wiring may be connected to the touch electrodes in a main area (MA) (e.g., the display area (DA)) where the touch electrodes are disposed. In one embodiment, the touch wiring may be electrically connected to a plurality of pads (PD) disposed in a pad portion extending to a sub-area (SBA), and electrically connected to the touch driving unit (400) through the plurality of pads (PD).

[0070] The optical layer (160) may include elements for adjusting and / or improving the optical characteristics of the display panel (100). For example, the optical layer (160) may include at least one of a color filter layer (for example, a color filter layer including color filters that selectively transmit light corresponding to the emission wavelength of each subpixel), a polarizing layer, and an anti-reflection layer. The optical layer (160) may be provided integrally with the display panel (100), but is not limited thereto. The optical layer (160) may be omitted.

[0071] FIG. 5 is an equivalent circuit diagram showing a subpixel according to one embodiment. FIG. 6 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0072] FIGS. 5 and FIGS. 6 show different embodiments of a subpixel (SPX) that may be included in the display panel (100) of FIGS. 2 to 4. For example, FIG. 5 shows an example of a subpixel (SPX) including homogeneous transistors (e.g., P-type transistors), and FIG. 6 shows an example of a subpixel (SPX) including heterogeneous transistors (e.g., P-type and N-type transistors). In addition to the embodiments of FIGS. 5 to 6, the structure or operation method of the subpixel (SPX) may be varied in many ways.

[0073] In one embodiment, the circuit configurations of subpixels (SPX) emitting light of different colors may be substantially identical. For example, the equivalent circuit diagrams of a red subpixel, a green subpixel, and a blue subpixel forming a single pixel may be identical to each other.

[0074] Referring to FIGS. 5 and 6 in addition to FIGS. 1 to 4, a subpixel (SPX) may be electrically connected to a plurality of signal lines, including at least one gate line (GL) and a data line (DL). For example, the subpixel (SPX) may be electrically connected to a plurality of gate lines (GL), including a first gate line (GWL) (e.g., a write scan line), a second gate line (GCL) (e.g., a control scan line), a third gate line (GIL1) (e.g., a first initialization scan line), a fourth gate line (GIL2) (e.g., a second initialization scan line), and a fifth gate line (ECL) (e.g., a light emission control line), and a data line (DL). The subpixel (SPX) may be electrically connected to a gate driver (GDR) through the gate lines (GL). The type and number of signal lines electrically connected to the subpixel (SPX) may vary depending on the circuit configuration and operation method of the subpixel (SPX).

[0075] The gate driver (GDR) can output a write scan signal (GW), a control scan signal (GC), a first initialization scan signal (GI1), a second initialization scan signal (GI2), and a light emission control signal (EC) to the first gate line (GWL), the second gate line (GCL), the third gate line (GIL1), the fourth gate line (GIL2), and the fifth gate line (ECL), respectively. The display driver (200) can output a data voltage (Vdata) (for example, a data voltage (Vdata) corresponding to the image data of each frame) to the data line (DL).

[0076] Additionally, the subpixel (SPX) may be electrically connected to a plurality of power lines (PL). For example, the subpixel (SPX) may be electrically connected to a first power line (VDL) (e.g., a first pixel power line), a second power line (VSL) (e.g., a second pixel power line), a third power line (VIL1) (e.g., a first initialization power line), and a fourth power line (VIL2) (e.g., a second initialization power line). The subpixel (SPX) may be electrically connected to a power supply circuit (e.g., a power supply circuit included in the display driver (200), or a power supply circuit placed on the circuit board (300) or included in a separate power module) through the first power line (VDL), the second power line (VSL), the third power line (VIL1), and the fourth power line (VIL2). The types and number of power lines (PL) electrically connected to the subpixel (SPX) can vary depending on the circuit configuration and operation method of the subpixel (SPX).

[0077] The power supply circuit can supply a first driving voltage (ELVDD), a second driving voltage (ELVSS), a third driving voltage (VINT), and a fourth driving voltage (VAINT) to a first power line (VDL), a second power line (VSL), a third power line (VIL1), and a fourth power line (VIL2), respectively. In one embodiment, the first driving voltage (ELVDD), the second driving voltage (ELVSS), the third driving voltage (VINT), and the fourth driving voltage (VAINT) may each be a high-potential pixel voltage (e.g., anode voltage), a low-potential pixel voltage (e.g., cathode voltage or common voltage), a first initialization voltage (e.g., gate initialization voltage), and a second initialization voltage (e.g., anode initialization voltage).

[0078] A subpixel (SPX) may include a pixel circuit (PXC) and a light-emitting element (EL). The pixel circuit (PXC) and the light-emitting element (EL) may be electrically connected between a first power line (VDL) and a second power line (VSL).

[0079] The pixel circuit (PXC) can control the driving current (Ids) supplied to the light-emitting element (EL) in response to the gate signals supplied to the subpixel (SPX) (e.g., write scan signal (GW), control scan signal (GC), first initialization scan signal (GI1), second initialization scan signal (GI2) and light emission control signal (EC)) and the data voltage (Vdata). The light emission of the light-emitting element (EL) can be controlled by the pixel circuit (PXC).

[0080] A pixel circuit (PXC) may include a plurality of transistors and at least one capacitor. For example, the pixel circuit (PXC) may include a driving transistor (DT), at least one switching transistor (ST), and a storage capacitor (Cst). In one embodiment, the pixel circuit (PXC) may include first to sixth switching transistors (ST1 to ST6). However, the structure of the pixel circuit (PXC) is not limited to the embodiments of FIGS. 5 and FIGS. 6, and the types and / or number of circuit elements included in the pixel circuit (PXC) may be varied according to the embodiments. For example, the pixel circuit (PXC) may further include at least one transistor to compensate for the hysteresis characteristics of the driving transistor (DT).

[0081] The driving transistor (DT) can be electrically connected between the first power line (VDL) and the light-emitting element (EL). For example, the driving transistor (DT) can be electrically connected to the first power line (VDL) via the fourth switching transistor (ST4) and electrically connected to the light-emitting element (EL) via the fifth switching transistor (ST5). The gate electrode of the driving transistor (DT) can be electrically connected to the first node (N1). The driving transistor (DT) can control the driving current (Ids) flowing through the subpixel (SPX) according to the voltage of the first node (N1) (for example, a voltage corresponding to the data voltage (Vdata)).

[0082] The first switching transistor (ST1) may be electrically connected between the data line (DL) and the first electrode of the driving transistor (DT) (for example, the source electrode or source region of the driving transistor (DT)). The gate electrode of the first switching transistor (ST1) may be electrically connected to the first gate line (GWL). The first switching transistor (ST1) may be turned on by a write scan signal (GW) of a gate-on voltage supplied from the first gate line (GWL) (for example, a low-level voltage at which the first switching transistor (ST1) can be turned on). When the first switching transistor (ST1) is turned on, a data voltage (Vdata) supplied from the data line (DL) may be delivered to the first electrode of the driving transistor (DT).

[0083] The second switching transistor (ST2) can be electrically connected between the second electrode of the driving transistor (DT) (for example, the drain electrode or drain region of the driving transistor (DT)) and the first node (N1). The gate electrode of the second switching transistor (ST2) can be electrically connected to the second gate line (GCL). The second switching transistor (ST2) can be turned on by a control scan signal (GC) of a gate-on voltage supplied from the second gate line (GCL) (for example, a low-level or high-level voltage at which the second switching transistor (ST2) can be turned on) to connect the gate electrode of the driving transistor (DT) and the second electrode. When the second switching transistor (ST2) is turned on, the driving transistor (DT) can be driven by a diode, and a voltage corresponding to the data voltage (Vdata) can be applied to the first node (N1).

[0084] The third switching transistor (ST3) can be electrically connected between the first node (N1) and the third power line (VIL1). The gate electrode of the third switching transistor (ST3) can be electrically connected to the third gate line (GIL1). The third switching transistor (ST3) can be turned on by an initialization scan signal (GI) of a gate-on voltage supplied from the third gate line (GIL1) (for example, a low-level or high-level voltage at which the third switching transistor (ST3) can be turned on) to electrically connect the first node (N1) to the third power line (VIL1). When the third switching transistor (ST3) is turned on, the voltage of the first node (N1) can be initialized to the third driving voltage (VINT) of the third power line (VIL1).

[0085] The fourth switching transistor (ST4) can be electrically connected between the first power line (VDL) and the first electrode of the driving transistor (DT). The gate electrode of the fourth switching transistor (ST4) can be electrically connected to the fifth gate line (ECL). The fourth switching transistor (ST4) can be turned on by a light emission control signal (EC) of a gate-on voltage supplied from the fifth gate line (ECL) (for example, a low-level voltage at which the fourth switching transistor (ST4) can be turned on) to electrically connect the first electrode of the driving transistor (DT) to the first power line (VDL).

[0086] The fifth switching transistor (ST5) can be electrically connected between the second electrode of the driving transistor (DT) and the light-emitting element (EL). The gate electrode of the fifth switching transistor (ST5) can be electrically connected to the fifth gate line (ECL). The fifth switching transistor (ST5) can be turned on by a light-emitting control signal (EC) of a gate-on voltage supplied from the fifth gate line (ECL) (for example, a low-level voltage at which the fifth switching transistor (ST5) can be turned on) to electrically connect the second electrode of the driving transistor (DT) to the light-emitting element (EL).

[0087] The period during which the fourth switching transistor (ST4) and the fifth switching transistor (ST5) are turned on may include the light emission period of the subpixel (SPX). During the light emission period of the subpixel (SPX), a driving current (Ids) controlled by the driving transistor (DT) may flow to the light-emitting element (EL).

[0088] The sixth switching transistor (ST6) can be electrically connected between the first electrode (e.g., anode electrode) of the light-emitting element (EL) and the fourth power line (VIL2). The gate electrode of the third switching transistor (ST3) can be electrically connected to the fourth gate line (GIL2). The sixth switching transistor (ST6) can be turned on by a second initialization scan signal (GI2) of a gate-on voltage supplied from the fourth gate line (GIL2) (e.g., a low-level voltage at which the sixth switching transistor (ST6) can be turned on) to electrically connect the first electrode of the light-emitting element (EL) to the fourth power line (VIL2). When the sixth switching transistor (ST6) is turned on, the voltage of the first electrode of the light-emitting element (EL) can be initialized to the fourth driving voltage (VAINT) of the fourth power line (VIL2).

[0089] Each of the transistors of the subpixel (SPX) can be formed as a P-type or N-type transistor, taking into account the operating characteristics required of the transistor, the design structure of the display panel (100), and / or manufacturing efficiency.

[0090] In one embodiment, the subpixel (SPX) may include transistors of the same type. For example, as shown in FIG. 5, the driving transistor (DT) and the switching transistors (ST) included in the pixel circuit (PXC) of the subpixel (SPX) may all be P-type transistors (for example, P-type transistors including low-temperature polycrystalline silicon).

[0091] In another embodiment, the subpixel (SPX) may include heterogeneous transistors. For example, as shown in FIG. 6, the driving transistor (DT) and the first, fourth, fifth, and sixth switching transistors (ST1, ST4, ST5, ST6) may be P-type transistors (for example, P-type transistors including low-temperature polycrystalline silicon), and the second and third switching transistors (ST2, ST3) may be N-type transistors (for example, N-type transistors including oxide semiconductor).

[0092] A storage capacitor (Cst) can be connected between a first node (N1) and a first power line (VDL). The storage capacitor (Cst) can be charged to a voltage corresponding to a data voltage (Vdata) applied to the first node (N1).

[0093] The light-emitting element (EL) can be electrically connected between the pixel circuit (PXC) and the second power line (VSL). For example, the first electrode of the light-emitting element (EL) (e.g., an anode electrode or pixel electrode) can be electrically connected to a node between the fifth switching transistor (ST5) and the sixth switching transistor (ST6), and the second electrode of the light-emitting element (EL) (e.g., a cathode electrode or common electrode) can be electrically connected to the second power line (VSL). The light-emitting element (EL) can emit light with a brightness corresponding to the driving current (Ids) during the light emission period of the subpixel (SPX).

[0094] In one embodiment, the light-emitting element (EL) may be an organic light-emitting diode (OLED) including an organic light-emitting layer. However, the embodiments are not limited thereto. For example, the light-emitting element (EL) may be other types of light-emitting elements, such as a quantum dot light-emitting diode (Quantum dot LED) including a quantum dot light-emitting layer, an inorganic light-emitting diode (Inorganic LED) including an inorganic semiconductor, a micro light-emitting diode (Micro LED), or a nano light-emitting diode (Nano LED).

[0095] FIG. 7 is a plan view showing a display area of ​​a display panel according to one embodiment. FIG. 8 is a plan view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 7 and FIG. 8 show different embodiments of a portion of a display area (DA) corresponding to area A1 of FIG. 3.

[0096] Referring to FIGS. 7 and FIGS. 8 in addition to FIGS. 1 to 6, subpixels (SPX) may be arranged in a display area (DA). Each subpixel (SPX) includes a light-emitting area (EA) in which a light-emitting element (EL) is arranged, and the light-emitting area (EA) may emit light of a specific color.

[0097] A display panel (100) according to one embodiment may include first subpixels (SPX1) that emit light of a first color in each first light-emitting region (EA1), second subpixels (SPX2) that emit light of a second color in each second light-emitting region (EA2), and third subpixels (SPX3) that emit light of a third color in each third light-emitting region (EA3). The first light-emitting region (EA1) may refer to the light-emitting region (EA) of the first subpixel (SPX1), the second light-emitting region (EA2) may refer to the light-emitting region (EA) of the second subpixel (SPX2), and the third light-emitting region (EA3) may refer to the light-emitting region (EA) of the third subpixel (SPX3). A plurality of light-emitting regions (EA), including first light-emitting regions (EA1) of first subpixels (SPX1), second light-emitting regions (EA2) of second subpixels (SPX2), and third light-emitting regions (EA3) of third subpixels (SPX3), may be arranged in the display area (DA).

[0098] In one embodiment, the first color light, the second color light, and the third color light may each be red light, green light, and blue light. For example, the first color light may be light in the red wavelength band with a main peak wavelength in the range of approximately 600 nm to 750 nm, the second color light may be light in the green wavelength band with a main peak wavelength in the range of approximately 480 nm to 560 nm, and the third color light may be light in the blue wavelength band with a main peak wavelength in the range of approximately 370 nm to 460 nm. In this case, the first subpixels (SPX1) may be red subpixels emitting red light, the second subpixels (SPX2) may be green subpixels emitting green light, and the third subpixels (SPX3) may be blue subpixels emitting blue light.

[0099] At least one first subpixel (SPX1), at least one second subpixel (SPX2), and at least one third subpixel (SPX3) arranged adjacently in a display area (DA) may form a single pixel. In one embodiment, the display panel (100) may include different numbers of first subpixels (SPX1), second subpixels (SPX2), and / or third subpixels (SPX3). For example, as shown in FIG. 7, the display panel (100) may include twice the number of second subpixels (SPX2) compared to the number of first subpixels (SPX1) and third subpixels (SPX3) respectively, and one first subpixel (SPX1), two second subpixels (SPX2), and one third subpixel (SPX3) adjacent to each other may form a single pixel. In another embodiment, the display panel (100) includes an equal number of first subpixels (SPX1), second subpixels (SPX2), and third subpixels (SPX3) as shown in FIG. 8, and one first subpixel (SPX1), one second subpixel (SPX2), and one third subpixel (SPX3) adjacent to each other may form one pixel.

[0100] The number, ratio, and / or arrangement structure of the first subpixels (SPX1), second subpixels (SPX2), and third subpixels (SPX3) placed in the display area (DA) are not limited to the embodiments of FIGS. 7 and 8, and may be varied according to the embodiments. In addition, the type, number, and / or ratio of the subpixels (SPX) forming each pixel may also be varied according to the embodiments.

[0101] In one embodiment, each light-emitting region (EA) may have a planar shape that is approximately rectangular. For example, each light-emitting region (EA) may have a planar shape such as a rectangle, a square, or a rhombus. However, the embodiments are not limited thereto, and each light-emitting region (EA) may have a non-rectangular planar shape such as a circle, an ellipse, or other polygons.

[0102] In one embodiment, the first light-emitting region (EA1), the second light-emitting region (EA2), and the third light-emitting region (EA3) may have different sizes (e.g., area). For example, the sizes of the light-emitting regions (EA) of the subpixels (SPX) may be differentiated according to the light-emitting efficiency or luminance ratio of the subpixels (SPX). For example, as shown in FIG. 7, the size of one first light-emitting region (EA1) may be larger than the size of one second light-emitting region (EA2) and smaller than the size of one third light-emitting region (EA3). Alternatively, as shown in FIG. 8, the size of one second light-emitting region (EA2) may be larger than the size of one first light-emitting region (EA1) and smaller than the size of one third light-emitting region (EA3).

[0103] In the embodiment of FIG. 7, the first light-emitting region (EA1) and the third light-emitting region (EA3) each have the shape of a rhombus with chamfered vertices, and the second light-emitting region (EA2) extends in the fourth direction (DR4) or the fifth direction (DR5) and may have the shape of a rectangle or ellipse with chamfered vertices. In the embodiment of FIG. 8, the third light-emitting region (EA3) has the shape of a rhombus with chamfered vertices, and the first light-emitting region (EA1) and the second light-emitting region (EA2) each extends in the fourth direction (DR4) or the fifth direction (DR5) and may have the shape of a rectangle or ellipse with chamfered vertices.

[0104] The fourth direction (DR4) may be a diagonal direction facing between the first direction (DR1) and the second direction (DR2). For example, the fourth direction (DR4) may form an angle of 45° with each of the first direction (DR1) and the second direction (DR2), but is not limited thereto. The fifth direction (DR5) may be a diagonal direction facing between the opposite direction of the first direction (DR1) and the second direction (DR2). For example, the fifth direction (DR5) may form an angle of 90° with the fourth direction (DR4), but is not limited thereto.

[0105] In the embodiment of FIG. 7, the first light-emitting regions (EA1) and the third light-emitting regions (EA3) may be arranged alternately in the first direction (DR1) and the second direction (DR2), respectively. The second light-emitting regions (EA2) may be arranged sequentially or continuously in the first direction (DR1) and the second direction (DR2). The second light-emitting regions (EA2) may be arranged between adjacent first light-emitting regions (EA1) and between adjacent third light-emitting regions (EA3) in the fourth direction (DR4) and the fifth direction (DR5). For example, some of the second light-emitting regions (EA2) may have a shape that extends into the fourth direction (DR4), be arranged alternately with the first light-emitting regions (EA1) in the fourth direction (DR4), and be arranged alternately with the third light-emitting regions (EA3) in the fifth direction (DR5). Additionally, other parts of the second light-emitting regions (EA2) may have a shape extending toward the fifth direction (DR5), and may be alternately arranged with the third light-emitting regions (EA3) in the fourth direction (DR4) and alternately arranged with the first light-emitting regions (EA1) in the fifth direction (DR5). The second light-emitting regions (EA2) may have a shape extending toward the first light-emitting regions (EA1). For example, the short side of the second light-emitting regions (EA2) may face the first light-emitting regions (EA1), and the long side of the second light-emitting regions (EA2) may face the third light-emitting regions (EA3).

[0106] In the embodiment of FIG. 8, a pair of first light-emitting regions (EA1) and second light-emitting regions (EA2) extending in the same direction may be adjacent in the fourth direction (DR4) or the fifth direction (DR5). Third light-emitting regions (EA3) may be arranged sequentially or continuously in the first direction (DR1) and the second direction (DR2). In each of the fourth direction (DR4) and the fifth direction (DR5), a pair of first light-emitting regions (EA1) and second light-emitting regions (EA2) may be arranged between each of the third light-emitting regions (EA3). Additionally, in each of the fourth direction (DR4) and the fifth direction (DR5), the first light-emitting region (EA1) and second light-emitting region (EA2) extending in the fourth direction (DR4) and the first light-emitting region (EA1) and second light-emitting region (EA2) extending in the fifth direction (DR5) may be arranged alternately.

[0107] FIGS. 7 and 8 illustrate some embodiments regarding the shape or arrangement of light-emitting regions (EA), but the embodiments are not limited thereto. For example, the shape, size, number, and / or arrangement structure of each light-emitting region (EA) placed in the display area (DA) may be varied.

[0108] The display area (DA) may further include non-luminous areas (NEA) surrounding the luminous areas (EA). The non-luminous areas (NEA) may surround each of the luminous areas (EA) and may be placed between the luminous areas (EA). Adjacent luminous areas (EA) may be spaced apart from each other with a portion of the non-luminous areas (NEA) in between.

[0109] In the embodiments, the first light-emitting regions (EA1) and the second light-emitting regions (EA2) may be placed relatively close together, and the second light-emitting regions (EA2) and the third light-emitting regions (EA3) may be placed relatively far apart. For example, in the embodiment of FIG. 7, one second light-emitting region (EA2) may be spaced apart from the adjacent first light-emitting region (EA1) by a first gap (SP1) (or first distance) and from the adjacent third light-emitting region (EA3) by a second gap (SP2) (or second distance) greater than the first gap (SP1). In the embodiment of FIG. 8, one second light-emitting region (EA2) may be spaced apart from the adjacent first light-emitting region (EA1) by a third gap (SP3) (or third distance) and from the adjacent third light-emitting region (EA3) by a fourth gap (SP4) (or fourth distance) greater than the third gap (SP3). Additionally, in the embodiment of FIG. 8, adjacent first light-emitting regions (EA1) and third light-emitting regions (EA3) may be spaced apart by a fifth distance (SP5) (or fifth distance) which is greater than the third distance (SP3). The fourth distance (SP4) and the fifth distance (SP5) may be substantially the same or similar.

[0110] In the embodiments, the spacing between the light-emitting regions (EA) may be adjusted and / or differentiated according to the voltage difference applied to the light-emitting elements (EL) placed in each light-emitting region (EA). For example, in the embodiments, the spacing between the light-emitting regions (EA) of the subpixels (SPX) may be expanded when the difference in driving voltage applied to the light-emitting elements (EL) of the subpixels (SPX) during the light-emitting period of the subpixels (SPX) (e.g., the voltage difference applied to the first electrode of each of the light-emitting elements (EL) of the first subpixel (SPX1), second subpixel (SPX2), and third subpixel (SPX3)) is relatively large, and the spacing between the light-emitting regions (EA) of the subpixels (SPX) may be reduced when the difference in voltage applied to each light-emitting element (EL) is relatively small. Accordingly, leakage current between the subpixels (SPX) can be effectively reduced or prevented without reducing the area (or aperture ratio) of the light-emitting regions (EA).

[0111] For example, the light-emitting element (EL) of the second subpixel (SPX2) placed in the second light-emitting region (EA2) may be a high-efficiency green light-emitting element (e.g., a green organic light-emitting diode) driven by a relatively low driving current (Ids) compared to the light-emitting element (EL) of the first subpixel (SPX1) placed in the first light-emitting region (EA1) and the light-emitting element (EL) of the third subpixel (SPX3) placed in the third light-emitting region (EA3). On the other hand, the light-emitting element (EL) of the third subpixel (SPX3) may be a low-efficiency blue light-emitting element (e.g., a blue organic light-emitting diode) driven by a relatively high driving current (Ids) compared to the light-emitting element (EL) of the first subpixel (SPX1) and the light-emitting element (EL) of the second subpixel (SPX2). The light-emitting element (EL) of the first subpixel (SPX1) may be a medium-efficiency red light-emitting element (e.g., a red organic light-emitting diode) that is driven with a relatively high driving current (Ids) compared to the light-emitting element (EL) of the second subpixel (SPX2) and driven with a relatively low driving current (Ids) compared to the light-emitting element (EL) of the third subpixel (SPX3).

[0112] In this case, the difference between the voltage applied to the light-emitting element (EL) of the third subpixel (SPX3) and the voltage applied to the light-emitting element (EL) of the second subpixel (SPX2) is large, so leakage current between the second subpixel (SPX2) and the third subpixel (SPX3) (for example, lateral leakage current flowing from the third subpixel (SPX3) to the second subpixel (SPX2)) is likely to occur. In particular, during the period when the subpixels (SPX) are driven with a small driving current (Ids) in response to low-gradation image data, a relatively large leakage current occurs, which can cause changes in brightness or color of the subpixels (SPX) and the pixels including them. On the other hand, if the gap between the second light-emitting region (EA2) and the third light-emitting region (EA3) is increased as in the embodiments (for example, the second gap (SP2) in FIG. 7 or the fourth gap (SP4) in FIG. 8), the leakage current between the second subpixel (SPX2) and the third subpixel (SPX3) can be effectively reduced. Accordingly, changes in brightness or color of the subpixels (SPX) and the pixels including them can be reduced or prevented, and the image quality and reliability of the display device (1) can be improved.

[0113] In one embodiment, the spacing between light-emitting regions (EA) can be adjusted and / or optimized by taking into account the manufacturing process capability and aperture ratio of the display device (1). For example, the spacing between adjacent first light-emitting regions (EA1) and second light-emitting regions (EA2) (e.g., the first spacing (SP1) in FIG. 7 or the third spacing (SP3) in FIG. 8) can be reduced or minimized within the range where the manufacturing process capability of the display device (1) is secured. For example, if the minimum spacing between light-emitting regions (EA) that can be reduced according to the process capability of the display device (1) is approximately 15 μm, the spacing between adjacent first light-emitting regions (EA1) and second light-emitting regions (EA2) can be set to a value between approximately 15 μm and 17 μm. The gap between adjacent second light-emitting regions (EA2) and third light-emitting regions (EA3) (for example, the second gap (SP2) in FIG. 7 or the fourth gap (SP4) in FIG. 8) can be increased or maximized within a range that does not reduce the aperture ratio of the display device (1). For example, the gap between the second light-emitting region (EA2) and the third light-emitting region (EA3) can be increased by increasing the length in the long side direction of the second light-emitting region (EA2) within a range where the minimum gap between the first light-emitting region (EA1) and the second light-emitting region (EA2) is secured, and reducing the width in the short side direction of the second light-emitting region (EA2) to compensate for the area loss of the second light-emitting region (EA2). For example, the distance between the first light-emitting region (EA1) and the second light-emitting region (EA2) can be reduced to a value between approximately 15 μm and 17 μm, and the distance between the second light-emitting region (EA2) and the third light-emitting region (EA3) can be increased to a value between approximately 21 μm and 23 μm. Accordingly, the distance between the second light-emitting region (EA2) and the third light-emitting region (EA3) can be increased while maintaining the area of ​​the second light-emitting region (EA2) (for example, substantially the same or similar).

[0114] FIG. 9 is a cross-sectional view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 9 shows one embodiment of a cross-section of a display panel (100) for a part of a display area (DA) corresponding to lines X1 to X1' of FIG. 7.

[0115] Referring to FIGS. 1 through 9, the display panel (100) may include a substrate (110), a backplane layer (120), a light-emitting element layer (130), and an encapsulation layer (140) disposed on the substrate (110). In one embodiment, the display panel (100) may further include at least one of the touch sensing layer (150) and the optical layer (160) of FIG. 4.

[0116] The substrate (110) is a base member for forming a display panel (100) and may be composed of a single layer or multiple layers. In one embodiment, the substrate (110) may be a flexible substrate capable of deformation such as bending, folding, and rolling, including a flexible material such as a polymer resin, but is not limited thereto. The substrate (110) may be a rigid substrate including a hard material such as glass.

[0117] The substrate (110) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include light-emitting areas (EA) where light-emitting elements (EL) of subpixels (SPX) are placed, and a non-light-emitting area (NEA) around the light-emitting areas (EA).

[0118] A backplane layer (120) may be disposed on a substrate (110). The backplane layer (120) may include circuit elements included in pixel circuits (PXC) of subpixels (SPX) and wiring electrically connected to the subpixels (SPX). For example, the backplane layer (120) may include a driving transistor (DT), switching transistors (ST), a storage capacitor (Cst), gate lines (GL), data lines (DL), and power lines (PL) as shown in FIG. 5 or FIG. 6. The backplane layer (120) may further include pads (PD) electrically connected to the wiring (for example, pads (PD) disposed in the sub-region (SBA) of FIG. 3).

[0119] FIG. 9 shows, as an example of circuit elements that may be included in the backplane layer (120), a transistor (TFT1) (e.g., the fifth switching transistor (ST5) of FIG. 5 or FIG. 6) electrically connected to the light-emitting element (EL) of each subpixel (SPX) among the circuit elements included in each subpixel (SPX). In one embodiment, the transistors (TFT1) of the backplane layer (120) may be thin-film transistors formed by a thin-film deposition process.

[0120] In one embodiment, the backplane layer (120) may include a barrier layer (BR) disposed on a substrate (110). Circuit elements and wiring of the backplane layer (120) may be disposed on the barrier layer (BR).

[0121] The barrier layer (BR) may include a material suitable for protecting the transistors (TFT1) and light-emitting elements (EL) from moisture penetrating through the substrate (110), for example, an inorganic insulating material. In one embodiment, the barrier layer (BR) may be composed of a plurality of inorganic insulating layers that are alternately stacked.

[0122] Transistors (TFT1) may be disposed on the barrier layer (BR). Each transistor (TFT1) may include an active layer (ACT1) and a gate electrode (G1).

[0123] The active layer (ACT1) may be disposed on the barrier layer (BR). The active layer (ACT1) may include a semiconductor material. For example, the active layer (ACT1) may include polycrystalline silicon (e.g., low-temperature polycrystalline silicon), amorphous silicon, or an oxide semiconductor (e.g., indium-gallium-zinc oxide (IGZO), indium-gallium-zinc-tin oxide (IGZTO), or indium-gallium-tin oxide (IGTO)).

[0124] The active layer (ACT1) may include a channel region (CHA1), a source region (S1), and a drain region (D1). The channel region (CHA1) may overlap with the gate electrode (G1) in the third direction (DR3). The source region (S1) may be positioned on one side of the channel region (CHA1), and the drain region (D1) may be positioned on the other side of the channel region (CHA1). At least a portion of the source region (S1) and the drain region (D1) may not overlap with the gate electrode (G1) in the third direction (DR3). The conductivity (e.g., carrier concentration) of the source region (S1) and the drain region (D1) may be higher than the conductivity of the channel region (CHA1).

[0125] A first insulating layer (INS1) may be disposed on the active layer (ACT1).

[0126] A first conductive layer may be disposed on the first insulating layer (INS1). The first conductive layer may include the gate electrode (G1) of each transistor (TFT1) and the first capacitor electrode (CAE1) of each subpixel (SPX). The gate electrode (G1) of each transistor (TFT1) and the active layer (ACT1) may overlap each other in a third direction (DR3). For example, the gate electrode (G1) of each transistor (TFT1) may be disposed on the channel region (CHA1) of the active layer (ACT1). In one embodiment, when the gate electrode (G1) of at least one transistor (TFT1) is electrically connected to the first capacitor electrode (CAE1) of the corresponding subpixel (SPX), the gate electrode (G1) and the first capacitor electrode (CAE1) may be formed integrally.

[0127] A second insulating layer (INS2) may be disposed on the first conductive layer.

[0128] A second conductive layer may be disposed on the second insulating layer (INS2). The second conductive layer may include a second capacitor electrode (CAE2) of each subpixel (SPX). The first capacitor electrode (CAE1) and the second capacitor electrode (CAE2) of each subpixel (SPX) may overlap each other in a third direction (DR3). A capacitor of each subpixel (SPX) (for example, a storage capacitor (Cst) of FIG. 5 or FIG. 6) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second insulating layer (INS2).

[0129] A third insulating layer (INS3) may be disposed on the second conductive layer.

[0130] A third conductive layer may be disposed on the third insulating layer (INS3). The third conductive layer may include a first connecting electrode (PCE1) of each subpixel (SPX). The first connecting electrode (PCE1) may be electrically connected to a part of the active layer (ACT1) (e.g., a drain region (D1)) through a first contact hole (PCT1) penetrating the first insulating layer (INS1), the second insulating layer (INS2), and the third insulating layer (INS3).

[0131] A fourth insulating layer (INS4) may be disposed on the first connecting electrode (PCE1).

[0132] A fourth conductive layer may be disposed on the fourth insulating layer (INS4). The fourth conductive layer may include a second connecting electrode (PCE2) of each subpixel (SPX). The second connecting electrode (PCE2) may be electrically connected to a first connecting electrode (PCE1) through a second contact hole (PCT2) penetrating the fourth insulating layer (INS4).

[0133] A fifth insulating layer (INS5) may be disposed on the second connecting electrode (PCE2). The fifth insulating layer (INS5) may cover circuit elements (e.g., transistors (TFT1)) and wiring included in the backplane layer (120). The fifth insulating layer (INS5) may flatten the step caused by the circuit elements and wiring of the backplane layer (120).

[0134] In one embodiment, the barrier layer (BR), the first insulating layer (INS1), the second insulating layer (INS2), and the third insulating layer (INS3) are each made of an inorganic insulating material (for example, silicon nitride (SiN2)). x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO xIt may include at least one inorganic insulating layer including ) etc. Each of the barrier layer (BR), the first insulating layer (INS1), the second insulating layer (INS2), and the third insulating layer (INS3) may be formed as a single layer or a multilayer structure.

[0135] In one embodiment, the fourth insulating layer (INS4) and the fifth insulating layer (INS5) may each include at least one organic insulating layer comprising an organic insulating material (e.g., acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin). The fourth insulating layer (INS4) and the fifth insulating layer (INS5) may each be formed as a single layer or a multilayer structure.

[0136] Each of the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer may comprise a conductive material (for example, any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof). Each of the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer may be formed as a single layer or a multilayer structure.

[0137] A light-emitting element layer (130) may be disposed on the fifth insulating layer (INS5). The light-emitting element layer (130) may include light-emitting elements (EL) of subpixels (SPX) and a pixel defining film (PDL). In one embodiment, the light-emitting element layer (130) may further include a spacer disposed on a portion of the pixel defining film (PDL). In one embodiment, the light-emitting element layer (130) may further include a capping layer (CPL) covering the light-emitting elements (EL).

[0138] A pixel defining film (PDL) may be disposed on a fifth insulating layer (INS5) to define or partition light-emitting regions (EA). For example, the pixel defining film (PDL) may include openings corresponding to light-emitting regions (EA) and may be disposed in a non-light-emitting region (NEA) to surround the light-emitting regions (EA). In one embodiment, the pixel defining film (PDL) may cover the edge portions of the first electrodes (AE) of the light-emitting elements (EL) and may be open to expose other portions, including the central portion of the first electrodes (AE). The area where the first electrode (AE) of each light-emitting element (EL) is exposed may correspond to the light-emitting region (EA) of each pixel (PX), and the light-emitting layer (EML) of each light-emitting element (EL) may be disposed on a portion of the first electrode (AE) that is not covered by the pixel defining film (PDL). The pixel defining film (PDL) may also be referred to as a "bank."

[0139] In one embodiment, the pixel defining film (PDL) may include an organic insulating material. For example, the pixel defining film (PDL) may be composed of at least one organic insulating layer including an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0140] The light-emitting elements (EL) may include a first light-emitting element (EL1) included in each first subpixel (SPX1), a second light-emitting element (EL2) included in each second subpixel (SPX), and a third light-emitting element (EL3) included in each third subpixel (SPX3). The first light-emitting element (EL1) may be placed in a first light-emitting region (EA1) as a light-emitting element (EL) of the first subpixel (SPX1). The second light-emitting element (EL2) may be placed in a second light-emitting region (EA2) as a light-emitting element (EL) of the second subpixel (SPX2). The third light-emitting element (EL3) may be placed in a third light-emitting region (EA3) as a light-emitting element (EL) of the third subpixel (SPX3).

[0141] Each light-emitting element (EL) may include a first electrode (AE) located in each light-emitting region (EA), a light-emitting layer (EML), and a second electrode (CE) sequentially disposed on the first electrode (AE). In one embodiment, each light-emitting element (EL) may include at least one intermediate layer (IML). For example, each light-emitting element (EL) may include an intermediate layer (IML) disposed between the first electrode (AE) and the light-emitting layer (EML), and an intermediate layer (IML) disposed between the light-emitting layer (EML) and the second electrode (CE). Although an embodiment in which each light-emitting element (EL) comprises a single light-emitting layer (EML) is disclosed in FIG. 9, the embodiments are not limited thereto. For example, the light-emitting element (EL) may have a tandem structure comprising a plurality of light-emitting layers (EML) that overlap each other.

[0142] The first electrode (AE) of the light-emitting element (EL) may be placed on the fifth insulating layer (INS5). The first electrode (AE) of the light-emitting element (EL) may be electrically connected to a transistor (TFT1) included in the corresponding subpixel (SPX). For example, the first electrode (AE) of the first light-emitting element (EL1) may be electrically connected to a transistor (TFT1) included in the first subpixel (SPX1) through a first connection hole (CT1), the first electrode (AE) of the second light-emitting element (EL2) may be electrically connected to a transistor (TFT1) included in the second subpixel (SPX2) through a second connection hole (CT2), and the first electrode (AE) of the third light-emitting element (EL3) may be electrically connected to a transistor (TFT1) included in the third subpixel (SPX3) through a third connection hole (CT3). For example, the first electrode (AE) of the first light-emitting element (EL1) may be electrically connected to the transistor (TFT1) of the first subpixel (SPX1) through the first and second connecting electrodes (PCE1, PCE2) of the first subpixel (SPX1) and the first connecting hole (CT1), the first electrode (AE) of the second light-emitting element (EL2) may be electrically connected to the transistor (TFT1) of the second subpixel (SPX2) through the first and second connecting electrodes (PCE1, PCE2) of the second subpixel (SPX2) and the second connecting hole (CT2), and the first electrode (AE) of the third light-emitting element (EL3) may be electrically connected to the transistor (TFT1) of the third subpixel (SPX3) through the first and second connecting electrodes (PCE1, PCE2) of the third subpixel (SPX3) and the third connecting hole (CT3).

[0143] Each connection hole (CT) is intended to electrically connect the light-emitting element (EL) of each subpixel (SPX) and the pixel circuit (PXC), and may be formed to penetrate an insulating layer disposed between the circuit elements of the pixel circuit (PXC), including the transistor (TFT), and the light-emitting element (EL). For example, the connection holes (CT) may be contact holes or via holes that penetrate a fifth insulating layer (INS5) disposed below the light-emitting elements (EL) and placed on the transistors (TFT) of the backplane layer (120).

[0144] A first electrode (AE) included in the light-emitting element (EL) of each subpixel (SPX) fills a connection hole (CT) of each subpixel (SPX) and can be electrically connected to a transistor (TFT1) of each subpixel (SPX) through said connection hole (CT). A portion of the connection holes (CT) and the first electrodes (AE) filling said connection holes (CT) may be placed in a non-emissive region (NEA) and covered with a pixel defining film (PDL). Accordingly, no curvature or step difference caused by the connection holes (CT) may occur in the light-emitting regions (EA). For example, another portion of the first electrodes (AE) located in each light-emitting region (EA) may be substantially flat.

[0145] In FIG. 9, the connecting holes (CT) are shown as being placed at arbitrary locations within the non-emissive region (NEA), but the locations of the connecting holes (CT) can be adjusted or optimized according to the arrangement structure of the emissive regions (EA). Embodiments regarding the arrangement structure of the connecting holes (CT) will be described later with reference to FIG. 13 and FIG. 14.

[0146] The first electrode (AE) of the light-emitting element (EL) has a size and shape corresponding to each light-emitting region (EA), and most of the first electrode (AE) can be placed in the light-emitting region (EA). The edge portion of the first electrode (AE) of the light-emitting element (EL) is placed in the non-light-emitting region (NEA) surrounding the light-emitting region (EA) and can be covered by a pixel defining film (PDL).

[0147] The first electrode (AE) of the light-emitting element (EL) may be a single-layer or multi-layer electrode comprising at least one conductive material. In one embodiment, the display panel (100) may be a front-emitting display panel, and the first electrode (AE) may include a reflective electrode layer comprising a material with high reflectivity (e.g., metal).

[0148] The light-emitting layer (EML) of the light-emitting element (EL) may include a polymer or low-molecular-weight material that emits light of a specific color (e.g., red, green, or blue). In one embodiment, the light-emitting elements (EL) of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3) each include a light-emitting layer (EML) individually disposed in each light-emitting region (EA) and may emit light of different colors. For example, the light-emitting layer (EML) of the first light-emitting element (EL1), the light-emitting layer (EML) of the second light-emitting element (EL2), and the light-emitting layer (EML) of the third light-emitting element (EL3) may each be individually disposed in the first light-emitting region (EA), the second light-emitting region (EA2), and the third light-emitting region (EA3), and may each emit light of a first color (e.g., red light), a second color (e.g., green light), and a third color (e.g., blue light). In one embodiment, the light-emitting layer (EML) of each of the light-emitting elements (EL) may be an organic light-emitting layer containing an organic material.

[0149] Intermediate layers (IML) may be disposed between the first electrode (AE) and the second electrode (CE) of each light-emitting element (EL) and may overlap with the light-emitting layer (EML) of each light-emitting element (EL). Each intermediate layer (IML) may include at least one of a hole injection layer, a hole transport layer, a charge generation layer, an electron transport layer, and an electron injection layer. Additionally, each intermediate layer (IML) may be composed of a single layer or multiple layers.

[0150] For example, an intermediate layer (IML) disposed between the first electrode (AE) and the light-emitting layer (EML) of each of the light-emitting elements (EL) may include a hole injection layer and a hole transport layer sequentially stacked on the first electrode (AE). An intermediate layer (IML) disposed between the light-emitting layer (EML) and the second electrode (CE) of each of the light-emitting elements (EL) may include an electron transport layer.

[0151] In one embodiment, the intermediate layers (IML) may be formed as a common layer that is fully disposed over the display area (DA). In each light-emitting area (EA), the intermediate layers (IML) may be disposed between the first electrode (AE) and the second electrode (CE) of each light-emitting element (EL). In the non-light-emitting area (NEA), the intermediate layers (IML) may be sequentially stacked on the pixel defining film (PDL) (or the pixel defining film (PDL) and a spacer) and covered by the second electrode (CE) and the capping layer (CPL) of the light-emitting elements (EL).

[0152] The second electrode (CE) of the light-emitting element (EL) may include a conductive material. In one embodiment, the second electrode (CE) may be formed as a common layer that is placed over the entire display area (DA). For example, the second electrode (CE) may be placed over the entire display area (DA) including light-emitting areas (EA) and non-light-emitting areas (NEA). In one embodiment, the display panel (100) may be a full-illuminating display panel, and the second electrode (CE) may include a transparent or translucent electrode layer.

[0153] In one embodiment, a capping layer (CPL) may be disposed on the light-emitting elements (EL). The capping layer (CPL) may be disposed over the entire display area (DA) to completely cover the light-emitting elements (EL). The capping layer (CPL) may include a material suitable for protecting the light-emitting elements (EL), for example, an inorganic insulating material, and may be optically transparent so that light generated from the light-emitting elements (EL) can pass through. In one embodiment, the capping layer (CPL) may be composed of a plurality of inorganic insulating layers that are alternately stacked. In one embodiment, the refractive index of the inorganic insulating layers included in the capping layer (CPL) may be adjusted so that light generated from the light-emitting elements (EL) can be emitted more effectively. The capping layer (CPL) may be omitted.

[0154] An encapsulation layer (140) may be disposed on the light-emitting element layer (130). The encapsulation layer (140) may cover the light-emitting element layer (130) in a display area (DA) and extend to a non-display area (NDA) to come into contact with the backplane layer (120). For example, the encapsulation layer (140) may be disposed in the display area (DA) to cover the light-emitting element layer (130), and the end of the encapsulation layer (140) may be disposed in a part of the non-display area (NDA) adjacent to the display area (DA). The encapsulation layer (140) may block the penetration of oxygen or moisture into the light-emitting element layer (130) and mitigate electrical and / or physical shock to the backplane layer (120) and the light-emitting element layer (130).

[0155] In one embodiment, the encapsulation layer (140) may be composed of a multilayer including an inorganic encapsulation layer and an organic encapsulation layer. For example, the encapsulation layer (140) may include a first inorganic encapsulation layer (ENL1), an organic encapsulation layer (ENL2), and a second inorganic encapsulation layer (ENL3) sequentially disposed on the light-emitting element layer (130). The encapsulation layer (140) may be replaced with an encapsulation member of a different type, structure, and / or material. For example, the light-emitting element layer (130) may be encapsulated using an upper substrate including an insulating material such as glass, or a protective layer including a single or multilayer capping layer.

[0156] FIG. 10 is an equivalent circuit diagram showing the operation during the light-emitting period of a pixel according to one embodiment. For example, FIG. 10 schematically shows an equivalent circuit diagram during the light-emitting period of one first subpixel (SPX1), one second subpixel (SPX2), and one third subpixel (SPX3) that may be included in a pixel (PX) according to one embodiment. The pixel (PX) may consist only of the three subpixels (SPX) shown in FIG. 10, or may include one or more additional subpixels (SPX).

[0157] FIG. 11 is a graph showing the voltage-current characteristics of light-emitting elements included in subpixels according to one embodiment. For example, FIG. 11 shows the voltage-current characteristics of the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) shown in FIG. 9 and FIG. 10. In FIG. 11, the dotted line corresponding to the first driving current (Ids1) shows the voltage-current characteristics of the first light-emitting element (EL1), another dotted line corresponding to the second driving current (Ids2) shows the voltage-current characteristics of the second light-emitting element (EL2), and the solid line corresponding to the third driving current (Ids3) shows the voltage-current characteristics of the third light-emitting element (EL3).

[0158] Referring to FIGS. 10 and FIGS. 11 in addition to FIGS. 1 through 9, each subpixel (SPX) may include a pixel circuit (PXC) and a light-emitting element (EL). For example, a first subpixel (SPX1) may include a first pixel circuit (PXC1) including a first driving transistor (DT1) and a first light-emitting element (EL1) electrically connected to the first pixel circuit (PXC1). A second subpixel (SPX2) may include a second pixel circuit (PXC2) including a second driving transistor (DT2) and a second light-emitting element (EL2) electrically connected to the second pixel circuit (PXC2). A third subpixel (SPX3) may include a third pixel circuit (PXC3) including a third driving transistor (DT3) and a third light-emitting element (EL3) electrically connected to the third pixel circuit (PXC3). Each of the first pixel circuit (PXC1), the second pixel circuit (PXC2), and the third pixel circuit (PXC3) may further include additional circuit elements (for example, switching transistors (ST) and storage capacitor (Cst) of FIG. 5 or FIG. 6) in addition to their respective driving transistors (DT).

[0159] During the light emission period of the pixel (PX), a driving current (Ids) of a size controlled by each driving transistor (DT) may flow through each subpixel (SPX). For example, during the light emission period of the pixel (PX), the first driving transistor (DT1) may supply a first driving current (Ids1) corresponding to a gate voltage applied to the gate electrode of the first driving transistor (DT1) (e.g., the voltage of the first node (N1) in FIG. 5 or FIG. 6) to the first light-emitting element (EL1), the second driving transistor (DT2) may supply a second driving current (Ids2) corresponding to a gate voltage applied to the gate electrode of the second driving transistor (DT2) to the second light-emitting element (EL2), and the third driving transistor (DT3) may supply a third driving current (Ids3) corresponding to a gate voltage applied to the gate electrode of the third driving transistor (DT3) to the third light-emitting element (EL3). Accordingly, the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) can each emit light with a brightness corresponding to the first driving current (Ids1), the second driving current (Ids2), and the third driving current (Ids3). Additionally, the first electrode (AE) of the first light-emitting element (EL1), the first electrode (AE) of the second light-emitting element (EL2), and the first electrode (AE) of the third light-emitting element (EL3) can each be subjected to a first voltage (Va1), a second voltage (Va2), and a third voltage (Va3).

[0160] In the embodiments, the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) emit light of different colors, and the luminous efficiencies of the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) may differ. For example, the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) may be a red organic light-emitting diode, a green organic light-emitting diode, and a blue organic light-emitting diode, respectively. Additionally, among the luminous efficiencies of the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3), the luminous efficiency of the second light-emitting element (EL2) may be the highest, and the luminous efficiency of the third light-emitting element (EL3) may be the lowest. For example, when a pixel (PX) represents a standard white of 11 gradations (for example, a gray corresponding to a brightness of 11 gradations), the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) may each exhibit light-emitting efficiencies of 85.8 cd / A, 173.1 cd / A, and 7.7 cd / A, respectively.

[0161] Accordingly, the slope of the voltage-current curve of the second light-emitting element (EL2) may be greater than the slope of the voltage-current curve of the first light-emitting element (EL1) and the slope of the voltage-current curve of the third light-emitting element (EL3). In the graph of FIG. 11, the horizontal axis represents the voltage (V) applied to each light-emitting element (EL). EL )(for example, the anode voltage applied to the first electrode (AE) of each light-emitting element (EL), and the vertical axis represents the current (I) flowing through each light-emitting element (EL). EL It represents the current (I) flowing through each light-emitting element (EL). EL ) can correspond to the driving current (Ids) supplied to each light-emitting element (EL) by each driving transistor (DT).

[0162] For example, when a pixel (PX) expresses a standard white of 11 gradations, a first driving current (Ids1) of approximately 21.4 pA may flow through the first light-emitting element (EL1), a second driving current (Ids2) of approximately 15.7 pA may flow through the second light-emitting element (EL2), and a third driving current (Ids3) of approximately 76.8 pA may flow through the third light-emitting element (EL3). Even when a pixel (PX) expresses a standard white of a different gradation, a driving current (Ids) greater than the driving current (Ids) flowing through the first light-emitting element (EL1) and the second light-emitting element (EL2), respectively, may flow through the third light-emitting element (EL3), and a driving current (Ids) smaller than the driving current (Ids) flowing through the first light-emitting element (EL1) and the third light-emitting element (EL3), respectively, may flow through the second light-emitting element (EL2).

[0163] During the light emission period in which the pixel (PX) expresses a standard white of 11 gradations, a first voltage (Va1) is applied to the first electrode (AE) of the first light-emitting element (EL1), a second voltage (Va2) smaller than the first voltage (Va1) is applied to the first electrode (AE) of the second light-emitting element (EL2), and a third voltage (Va3) larger than the first voltage (Va1) can be applied to the first electrode (AE) of the third light-emitting element (EL3). Even when the pixel (PX) expresses a standard white of a different gradation, a voltage greater than the voltage applied to each of the first electrodes (AE) of the first light-emitting element (EL1) and the second light-emitting element (EL2) may be applied to the first electrode (AE) of the third light-emitting element (EL3), and a voltage smaller than the voltage applied to each of the first electrodes (AE) of the first light-emitting element (EL1) and the third light-emitting element (EL3) may be applied to the first electrode (AE) of the second light-emitting element (EL2).

[0164] However, since the second light-emitting element (EL2) has high light-emitting efficiency, it can emit light with high brightness even with a low second driving current (Ids2). On the other hand, since the third light-emitting element (EL3) has low light-emitting efficiency, it can emit light with low brightness even with a high third driving current (Ids3). For example, during the light-emitting period when the pixel (PX) expresses a standard white of 11 gradations, the second light-emitting element (EL2) emits light with high brightness compared to the first light-emitting element (EL1) and the third light-emitting element (EL3), and the third light-emitting element (EL3) emits light with low brightness compared to the first light-emitting element (EL1) and the second light-emitting element (EL2). Even when the pixel (PX) expresses a standard white of a different gradation, the second light-emitting element (EL2) emits light with a higher brightness than the first light-emitting element (EL1) and the third light-emitting element (EL3), and the third light-emitting element (EL3) emits light with a lower brightness than the first light-emitting element (EL1) and the second light-emitting element (EL2).

[0165] When a pixel (PX) expresses a standard white corresponding to a specific gradation (e.g., a grayscale of a specific luminance), the relative brightness of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3) may be adjusted and / or differentiated in consideration of human perception characteristics. For example, when the pixel (PX) expresses a standard white, the driving current (Ids) flowing through each of the subpixels (SPX) may be controlled such that the luminance proportion of the second subpixel (SPX2) emitting green light is the largest, and the luminance proportion of the third subpixel (SPX3) emitting blue light is the smallest. Accordingly, during the light emission period in which the pixel (PX), comprising the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3), expresses a standard white, the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) of the pixel (PX) may emit light with different luminances. For example, during the light emission period in which a pixel (PX) expresses a standard white of a specific gradation, among the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) of the pixel (PX), the second light-emitting element (EL2) may emit light with the highest brightness, and the third light-emitting element (EL3) may emit light with the lowest brightness. As an example, during the light emission period in which the pixel (PX) expresses a white of the highest gradation, the brightness ratio of the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3) may be controlled to be approximately 22:71:7 or 21:72:7.

[0166] Subpixels (SPX) are supplied with a data voltage (Vdata) that is adjusted and / or differentiated according to the characteristics of each light-emitting element (EL), and accordingly, can be driven by a driving current (Ids) corresponding to each data voltage (Vdata). For example, the display driving unit (200) of FIGS. 2 to 4 can output each data voltage (Vdata) adjusted according to the characteristics of each subpixel (SPX) so that an optimal driving current (Ids) can flow to each subpixel (SPX).

[0167] As described above, light-emitting elements (EL) of subpixels (SPX) that emit light of different colors can be driven with different driving currents (Ids). For example, during the light-emitting period in which the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) of a pixel (PX) all emit light to express standard white, driving currents (Ids) of different magnitudes can flow through the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) of the pixel (PX). Accordingly, different voltages can be applied to the first electrodes (AE) of the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) of the pixel (PX). For example, during the light emission period in which the pixel (PX) expresses standard white, a voltage greater than the voltage applied to each of the first electrodes (AE) of the first light-emitting element (EL1) and the second light-emitting element (EL2) of the pixel (PX) may be applied to the first electrode (AE). Additionally, during the light emission period in which the pixel (PX) expresses standard white, the voltage difference applied to the first electrodes (AE) of the second light-emitting element (EL2) and the third light-emitting element (EL3) of the pixel (PX) may be the greatest. For example, during the light emission period in which a pixel (PX) expresses standard white, the difference between the voltage applied to the first electrode (AE) of the second light-emitting element (EL2) of the pixel (PX) and the voltage applied to the first electrode (AE) of the third light-emitting element (EL3) of the pixel (PX) may be greater than the difference between the voltage applied to the first electrode (AE) of the first light-emitting element (EL1) of the pixel (PX) and the voltage applied to the first electrode (AE) of the second light-emitting element (EL2) of the pixel (PX).

[0168] The light-emitting elements (EL) of the subpixels (SPX) may not be completely separated physically and / or electrically. For example, the light-emitting elements (EL) share a common layer (IML) and a second electrode (CE), and there may be a resistive component between the first electrodes (AE) of the subpixels (SPX).

[0169] The greater the voltage difference applied to the light-emitting elements (EL) of adjacent subpixels (SPX), the higher the risk of leakage current occurring between the subpixels (SPX). For example, between the adjacent second subpixel (SPX2) and the third subpixel (SPX3), lateral leakage current may flow from the third light-emitting element (EL3) to the second light-emitting element (EL2).

[0170] However, as previously explained, in the embodiments, by increasing the spacing between the adjacent second light-emitting region (EA2) and the third light-emitting region (EA3), leakage current flowing from the third light-emitting element (EL3) to the second light-emitting element (EL2) can be effectively reduced or prevented. Accordingly, even when a small driving current (Ids) flows through the subpixels (SPX) of the pixel (PX) in response to low-gradation image data, lateral leakage current between the subpixels (SPX) can be effectively reduced or prevented.

[0171] Additionally, in the embodiments, the gap between the first light-emitting region (EA1) and the second light-emitting region (EA2) may be smaller than the gap between the second light-emitting region (EA2) and the third light-emitting region (EA3). However, since the difference in driving voltage between the first light-emitting element (EL1) and the second light-emitting element (EL2) is small, there may be no leakage current between the first subpixel (SPX1) and the second subpixel (SPX2). For example, the difference between the first voltage (Va1) applied to the first electrode (AE) of the first light-emitting element (EL1) and the second voltage (Va2) applied to the first electrode (AE) of the second light-emitting element (EL2) is negligible, so there may be no lateral leakage current between the first subpixel (SPX1) and the second subpixel (SPX2), or only a very small amount of lateral leakage current may occur.

[0172] Accordingly, according to the embodiments, by adjusting and / or differentiating the spacing between the light-emitting regions (EA) of the subpixels (SPX) according to the difference between the driving current (Ids) of the subpixels (SPX) (e.g., a first driving current (Ids1), a second driving current (Ids2) and a third driving current (Ids3)) and the driving voltage of the subpixels (SPX) (e.g., a first voltage (Va1), a second voltage (Va2) and a third voltage (Va3)), the aperture ratio of the display device (1) can be secured while simultaneously effectively reducing the lateral leakage current between the subpixels (SPX).

[0173] FIG. 12 is a plan view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 12 shows one embodiment of a part of a display area (DA) corresponding to area A1 of FIG. 3. In describing the following embodiments, redundant descriptions of parts substantially identical or similar to at least one embodiment described above (e.g., the embodiment of FIG. 7) are omitted.

[0174] Referring to FIG. 12 in addition to FIG. 1 to 11, a display panel (100) according to one embodiment may further include separation structures (SPT) disposed in a non-luminous region (NEA).

[0175] The isolation structures (SPT) have a shape suitable for reducing or blocking leakage current through the common layer (IML), etc., and can be placed in a part of the non-emissive region (NEA). For example, the isolation structures (SPT) can be placed on the surface of a part of the pixel defining film (PDL) or on top of a part of the pixel defining film (PDL) and formed in a shape that can cause bending or disconnection of the common layer (IML), etc.

[0176] In one embodiment, each of the separation structures (SPT) may be formed as a groove on the surface of the pixel defining film (PDL). When each of the separation structures (SPT) is formed as a groove in the pixel defining film (PDL), at least one groove may be formed in the pixel defining film (PDL) at the location where each separation structure (SPT) is placed. Accordingly, a curvature may be formed on the surface of the pixel defining film (PDL) at the location where each separation structure (SPT) is placed.

[0177] In another embodiment, each of the separation structures (SPT) may be formed as an island-shaped pattern disposed on the pixel defining film (PDL). When each of the separation structures (SPT) is formed as an island-shaped pattern, a single separation structure (SPT) or a separation structure (SPT) comprising at least two divided patterns may be disposed on the pixel defining film (PDL) at the location where each separation structure (SPT) is disposed. Each separation structure (SPT) may be formed as a column spacer, such as one containing an insulating material (e.g., an organic insulating material), but is not limited thereto. Accordingly, a curve may be formed on the upper surface of the pixel defining film (PDL) at the location where each separation structure (SPT) is disposed.

[0178] In another embodiment, the display panel (100) may include heterogeneous separation structures (SPT). For example, some of the separation structures (SPT) may be formed as grooves indented on the surface of the pixel defining film (PDL), and other parts of the separation structures (SPT) may be formed as island-shaped patterns.

[0179] In one embodiment, each separation structure (SPT) may be positioned between adjacent second light-emitting regions (EA2) and third light-emitting regions (EA3). For example, each separation structure (SPT) may be positioned in a portion of a non-light-emitting region (NEA) having a relatively wide width as the distance between the second light-emitting region (EA2) and the third light-emitting region (EA3) increases.

[0180] Accordingly, leakage current that may flow between the second subpixel (SPX2) and the third subpixel (SPX3) can be more effectively reduced or minimized. In addition, by securing a sufficient area for each separation structure (SPT) to be formed, each separation structure (SPT) can be formed more easily and / or stably.

[0181] In one embodiment, the separation structures (SPT) may extend in the direction in which each of the second light-emitting regions (EA2) extends and may be arranged parallel to the second light-emitting regions (EA2). For example, the separation structures (SPT) may be located on both sides of each of the second light-emitting regions (EA2) and may be arranged parallel to the long side of each of the second light-emitting regions (EA2). Accordingly, leakage current flowing into the second light-emitting regions (EA2) can be more effectively reduced or prevented.

[0182] FIG. 13 is a plan view showing the location of the connection hole between the light-emitting region and the non-light-emitting region of a display panel according to one embodiment. FIG. 14 is a plan view showing the location of the connection hole between the light-emitting region and the non-light-emitting region of a display panel according to one embodiment. For example, FIG. 13 and FIG. 14 show different embodiments for a portion of the display area (DA) corresponding to the A1 region of FIG. 3. Compared to FIG. 7, FIG. 13 and FIG. 14 further show a first electrode (AE) included in the light-emitting element (EL) of each subpixel (SPX), and a connection hole (CT) for electrically connecting the light-emitting element (EL) of each subpixel (SPX) and a circuit element (e.g., the transistor (TFT1) of FIG. 9).

[0183] Referring to FIGS. 13 and FIGS. 14 in addition to FIGS. 1 to 12, the connecting holes (CT) of the subpixels (SPX) are located in a part of the non-emissive region (NEA) adjacent to the emitting region (EA) of each subpixel (SPX) and may be covered by a pixel defining film (PDL). In the embodiments, the first emitting region (EA1) and the second emitting region (EA2) are located relatively close to each other, and accordingly, the non-emissive region (NEA) between the first emitting region (EA1) and the second emitting region (EA2) may have a narrow width.

[0184] The connecting holes (CT) of the subpixels (SPX) according to the embodiments may be placed in other surrounding areas, avoiding the narrow area between the first light-emitting region (EA1) and the second light-emitting region (EA2). For example, each of the connecting holes (CT) of the subpixels (SPX) may be placed between adjacent first light-emitting regions (EA1) and third light-emitting regions (EA3), or between adjacent second light-emitting regions (EA2) and third light-emitting regions (EA3). In some embodiments, the display panel (100) includes separation structures (SPT) as in the embodiment of FIG. 12, and at least some of the connecting holes (CT) of the subpixels (SPX) may overlap with the separation structures (SPT).

[0185] In one embodiment, as illustrated in FIG. 13, the first connecting holes (CT1) of the first subpixels (SPX1) and the second connecting holes (CT2) of the second subpixels (SPX2) may be positioned in a direction toward the third light-emitting regions (EA3). For example, each of the first connecting holes (CT1) of the first subpixels (SPX1) may be positioned between a pair of adjacent first light-emitting regions (EA1) and third light-emitting regions (EA3), and each of the second connecting holes (CT2) of the second subpixels (SPX2) may be positioned between a pair of adjacent second light-emitting regions (EA2) and third light-emitting regions (EA3). Each of the third connecting holes (CT3) of the third subpixels (SPX3) may be positioned between a pair of adjacent first light-emitting regions (EA1) and third light-emitting regions (EA3), but is not limited thereto.

[0186] In another embodiment, as illustrated in FIG. 14, the connecting holes (CT) of the subpixels (SPX) may be positioned between the second light-emitting regions (EA2) and the third light-emitting regions (EA3). For example, the first connecting holes (CT1) of the first subpixels (SPX1), the second connecting holes (CT2) of the second subpixels (SPX2), and the third connecting holes (CT3) of the third subpixels (SPX3) may each be positioned between a pair of adjacent second light-emitting regions (EA2) and third light-emitting regions (EA3). In one embodiment, only one connecting hole (CT) may be positioned between a pair of adjacent second light-emitting regions (EA2) and third light-emitting regions (EA3) in the fourth direction (DR4) or the fifth direction (DR5).

[0187] According to the embodiments described above, the connection holes (CT) of the subpixels (SPX) can be appropriately distributed and arranged in a part of a non-emissive region (NEA) having a relatively large width, avoiding the narrow area between the first light-emitting region (EA1) and the second light-emitting region (EA2). Accordingly, the design structure of the display device (1) can be improved or optimized, and the connection holes (CT) of the subpixels (SPX) can be formed more easily and / or stably.

[0188] Additionally, as the connection holes (CT) of the subpixels (SPX) are mainly positioned around the third light-emitting regions (EA3), the leakage current between the subpixels (SPX) can be reduced more effectively. For example, as in the embodiment of FIG. 14, when the connection holes (CT) of the subpixels (SPX) are positioned between the second light-emitting regions (EA2) and the third light-emitting regions (EA3), a bend occurs in the pixel defining film (PDL) in the portion covering the connection holes (CT) of the subpixels (SPX), thereby further reducing the lateral leakage current between the second subpixels (SPX2) and the third subpixels (SPX3).

[0189] Figure 15 is a graph showing the color change according to the temperature change of sample display devices. For example, Figure 15 is a TCS (Temperature Color Shift) chromaticity diagram showing the measured values ​​of the change in color coordinates (du', dv') of subpixels (SPX) according to the temperature change from 25°C to 40°C in four types of sample display devices (P1, P2, P3, P4), and shows the color shift according to the temperature change of the sample display devices (P1, P2, P3, P4) as a du' vs. dv' graph.

[0190] Referring to FIG. 15 in addition to FIG. 1 to 14, when the temperature of the sample display devices (P1, P2, P3, P4) changes, the amount of change in brightness of the subpixels (SPX) forming the pixel (PX) may differ. Accordingly, the temperature change of the sample display devices (P1, P2, P3, P4) may cause a change in the color of the image displayed on the sample display devices (P1, P2, P3, P4).

[0191] FIG. 15 shows the results of measuring the color coordinate change (du', dv') of sample display devices (P1, P2, P3, P4) under specific luminance conditions. For example, FIG. 15 shows the color coordinate change (du', dv') according to temperature change of sample display devices (P1, P2, P3, P4) when the sample display devices (P1, P2, P3, P4) display a low-gradation standard white corresponding to a low luminance of 0.3 nit (for example, the color coordinate change (du', dv') of the same grade corresponding to a high temperature of 40°C, compared to the color coordinate of 0.3 nit standard white corresponding to 10 nit 51g at room temperature of 25°C).

[0192] In FIG. 15, the trajectory of each dotted line corresponding to dE5, dE8, dE12, and dE15 is a trajectory connecting points with color difference (ΔE, delta E) values ​​of 5, 8, 12, and 15, respectively, and can be used as an indicator to determine the color change of sample display devices (P1, P2, P3, P4). A smaller color difference value means that the change in color coordinates (du', dv') according to temperature is smaller, and can be seen as having excellent temperature characteristics (for example, TCS characteristics).

[0193] In addition, the color tone may change depending on the direction of movement of the color coordinates (u', v'). For example, in the graph of Fig. 15, if the color coordinates (u', v') move to the first quadrant, the color tone may become red or yellow, and if the color coordinates (u', v') move to the second quadrant, the color tone may become yellow or green. Also, if the color coordinates (u', v') move to the third quadrant, the color tone may become green or blue, and if the color coordinates (u', v') move to the fourth quadrant, the color tone may become blue or purple. For example, when the color coordinates (u', v') move in the direction of the first color shift vector (VT1) shown by the dotted arrow in FIG. 15, the color color becomes green, and when the color coordinates (u', v') move in the direction of the second color shift vector (VT2) shown by the solid arrow in FIG. 15, the color color becomes blue.

[0194] The sample display devices (P1, P2, P3, P4) are devices with different spacing between subpixels (SPX) and / or aperture ratios, and the degree or direction of color change of the sample display devices (P1, P2, P3, P4) according to temperature change was measured to be different. For example, the first sample display device (P1) showed a color difference that was significantly outside the dE15 range according to a temperature change from 25°C to 40°C, whereas the second sample display device (P2), the third sample display device (P3), and the fourth sample display device (P4) were measured to show a relatively small color difference that was within the dE12 range even with a temperature change from 25°C to 40°C.

[0195] As a result of checking the spacing between the light-emitting regions (EA) of the sample display devices (P1, P2, P3, P4), it was confirmed that the spacing between the light-emitting regions (EA) in each of the sample display devices (P1, P2, P3, P4) is uniform, but the spacing between the light-emitting regions (EA) of the first sample display device (P1), which has the largest color difference according to temperature (for example, the spacing between the light-emitting regions (EA) of subpixels (SPX) partitioned by a pixel defining film (PDL)), is the smallest, and the spacing between the light-emitting regions (EA) of the fourth sample display device (P4), which has the smallest color difference according to temperature, is the largest. Accordingly, it can be estimated that the spacing between the light-emitting regions (EA) may act as a factor affecting the temperature characteristics of the sample display devices (P1, P2, P3, P4).

[0196] The direction of movement of color coordinates (u', v') can also affect visibility. For example, even if the amount of movement of color coordinates (u', v') is the same, the color difference and luminance changes may vary depending on the direction of movement of color coordinates (u', v').

[0197] To explain using the first color shift vector (VT1) and the second color shift vector (VT2), even if the magnitudes of the first color shift vector (VT1) and the second color shift vector (VT2) are the same, the color difference according to the first color shift vector (VT1) may be greater than the color difference according to the second color shift vector (VT2). For example, the color difference resulting from the color coordinates (u', v') shifting by approximately 0.02 in the direction of becoming green, as in the first color shift vector (VT1), corresponds to dE 15, whereas the color difference resulting from the color coordinates (u', v') shifting by approximately 0.02 in the direction of becoming blue, as in the second color shift vector (VT2), may correspond to dE 10. If the direction of movement of the color coordinates (u', v') due to temperature change is in the direction of black pigment, visibility may be reduced.

[0198] In addition, since the luminance ratio of the third subpixel (SPX3) is the lowest when the pixel (PX) represents standard white, a change in color coordinates (u', v') in the direction of bluening can cause a relatively low change in luminance. Accordingly, a change in color coordinates (u', v') in the direction of bluening can be relatively advantageous for improving Temperature Luminance Stability (TLS) characteristics.

[0199] According to the embodiments described above, as the distance between the second light-emitting region (EA2) and the third light-emitting region (EA3) increases, the lateral leakage current from the third subpixel (SPX3) to the second subpixel (SPX2) can be reduced or prevented. Accordingly, the third driving current (Ids3) for emitting the third light-emitting element (EL3) at a target brightness can be adjusted to decrease, and the second driving current (Ids2) for emitting the second light-emitting element (EL2) at a target brightness can be adjusted to increase. When a pixel (PX) displays standard white, the second driving current (Ids2) flowing through the second subpixel (SPX2) may be smaller than the first driving current (Ids1) flowing through the first subpixel (SPX1) and the third driving current (Ids3) flowing through the third subpixel (SPX3), and accordingly, the second driving transistor (DT2) may be more sensitive to temperature than the first driving transistor (DT1) and the third driving transistor (DT3). For example, the second driving transistor (DT2) may exhibit a greater change in characteristics depending on the temperature compared to the first driving transistor (DT1) and the third driving transistor (DT3). However, as in the embodiments, if the gap between the second light-emitting region (EA2) and the third light-emitting region (EA3) is increased to reduce the leakage current flowing into the second subpixel (SPX2), the second subpixel (SPX) can be driven so that a larger second driving current (Ids2) flows through the second driving transistor (DT2). Accordingly, the characteristic dispersion or change of the second driving transistor (DT2) according to temperature can be reduced, thereby suppressing the shift of the color coordinates (u', v') in the direction of becoming green.

[0200] Since a relatively large third driving current (Ids3) flows through the third driving transistor (DT3), the third driving transistor (DT3) exhibits characteristics that are insensitive to temperature and can maintain relatively uniform characteristics even when the temperature changes. In addition, even if a change in the characteristics of the third driving transistor (DT3) and / or the third light-emitting element (EL3) occurs due to temperature, a change in the color coordinates (u', v') in the blue direction may not significantly degrade the temperature characteristics (e.g., TLS characteristics) of the display device (1). For example, when a pixel (PX) expresses standard white, the luminance ratio of the third sub-pixel (SPX3) is very low, so shifting the color coordinates (u', v') in the blue direction rather than shifting them in the green direction may be advantageous for securing the TLS characteristics of the display device (1). In addition, the color difference due to the change in the color coordinates (u', v') in the blue direction may be relatively small.

[0201] Accordingly, according to the embodiments, leakage current between subpixels (SPX) (e.g., lateral leakage current between a second subpixel (SPX2) and a third subpixel (SPX3)) can be effectively reduced or prevented, and the temperature characteristics of the display device (1) (e.g., brightness and color stability of the display device (1) according to temperature changes) can be improved.

[0202] A display device (1) (or display module (11)) according to at least one of the embodiments described above may be applied to various electronic devices. An electronic device according to one embodiment includes the display device (1) or display module (11) described above, and may further include a module or device having additional functions other than the display device (1) or display module (11).

[0203] FIG. 16 is a block diagram of an electronic device according to one embodiment.

[0204] Referring to FIGS. 1 to 16, an electronic device (10) according to one embodiment may include a display module (11), a processor (12), a memory (13), and a power module (14).

[0205] The electronic device (10) can output various information in the form of an image through the display module (11). For example, when the processor (12) executes an application stored in memory (13), the image information provided by the application can be provided to the user through the display module (11).

[0206] The display module (11) may include a display panel (100) for displaying an image. For example, the display module (11) may include a display panel (100) according to at least one of the embodiments described above.

[0207] The processor (12) may include at least one of a central processing unit (CPU), an application processor (AP), a graphic processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0208] The memory (13) may store data information necessary for the operation of the processor (12) or the display module (11). For example, the memory (13) may store image data signals and / or input control signals.

[0209] The processor (12) can control the display module (11) using information stored in the memory (13). The processor (12) can transmit video data signals and / or input control signals stored in the memory (13) to the display module (11). For example, when the processor (12) executes an application stored in the memory (13), video data signals and / or input control signals are transmitted to the display module (11), and the display module (11) can process the received signals and output video information through a display screen.

[0210] The power module (14) may include a power supply module, such as a power adapter or battery device, and a power conversion module that converts the power supplied by the power supply module to generate power necessary for the operation of the electronic device (10).

[0211] At least one of each component of the electronic device (10) described above may be included in the display device (1) according to the embodiments described above. Additionally, some of the individual modules functionally included in one module may be included in the display device (1), while others may be provided separately from the display device (1). For example, the display device (1) may include a display module (11), and the processor (12), memory (13), and power module (14) may be provided in the form of other devices within the electronic device (10) other than the display device (1).

[0212] FIG. 17 is a schematic diagram of an electronic device according to various embodiments.

[0213] Referring to FIG. 17, various electronic devices to which the display device (1) according to the embodiments is applied may include not only image display electronic devices such as a smartphone (10_1a), tablet PC (10_1b), laptop (10_1c), TV (10_1d), and desk monitor (10_1e), but also wearable electronic devices including display modules such as smart glasses (10_2a), head-mounted display (10_2b), and smart watch (10_2c), and automotive electronic devices (10_3) including display modules such as a CID (Center Information Display) and room mirror display placed on the instrument panel, center fascia, and dashboard of a car.

[0214] As described above, the display device (1) and the electronic device (10) according to the embodiments may each include a first light-emitting region (EA1), a second light-emitting region (EA2), and a third light-emitting region (EA3) in which a first light-emitting element (EL1), a second light-emitting element (EL2), and a third light-emitting element (EL3) are disposed. In the embodiments, during the light-emitting period of a pixel (PX) including the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3), a relatively large voltage may be applied to the third light-emitting element (EL3). For example, during the light-emitting period of a pixel (PX) that expresses standard white (an achromatic color including gray and white, for example), a relatively large voltage may be applied to the first electrode (AE) of the third light-emitting element (EL3) compared to the voltage applied to the first electrode (AE) of the first light-emitting element (EL1) and the first electrode (AE) of the second light-emitting element (EL2), respectively. Additionally, in the embodiments, the second light-emitting region (EA2) may be positioned closer to the first light-emitting region (EA1) than to the third light-emitting region (EA3). For example, the distance between the second light-emitting region (EA2) and the third light-emitting region (EA3) may be greater than the distance between the first light-emitting region (EA1) and the second light-emitting region (EA2). According to the embodiments, the aperture ratio of the display device (1) and the electronic device (10) can be secured, while the leakage current of the display device (1) and the electronic device (10) can be reduced.

[0215] In some embodiments, the first light-emitting element (EL1), the second light-emitting element (EL2), and the third light-emitting element (EL3) may each be a red light-emitting element (e.g., a red organic light-emitting diode), a green light-emitting element (e.g., a green organic light-emitting diode), and a blue light-emitting element (e.g., a blue organic light-emitting diode). According to the embodiments, by reducing the leakage current that can flow from the third subpixel (SPX3) to the second subpixel (SPX2), the driving current (Ids) of the second subpixel (SPX2) can be increased and the temperature sensitivity of the second subpixel (SPX2) can be lowered. Accordingly, the temperature stability (e.g., temperature brightness stability and temperature color stability) of the display device (1) and the electronic device (10) can be improved.

[0216] In some embodiments, the display device (1) and the electronic device (10) may further include a separation structure (SPT) disposed between a second light-emitting region (EA2) and a third light-emitting region (EA3) to reduce leakage current between subpixels (SPX). For example, the display device and the electronic device may include a groove formed on the surface of a pixel defining film (PDL) between the second light-emitting region (EA2) and the third light-emitting region (EA3), and / or a spacer disposed on the pixel defining film (PDL). According to the embodiments, leakage current of the display device (1) and the electronic device (10) can be reduced more effectively.

[0217] In some embodiments, the display device (1) and the electronic device (10) further include connection holes (CT) for electrically connecting each light-emitting element (EL) of the subpixels (SPX) to a circuit element or connection electrode (e.g., a transistor (TFT1) or a second connection electrode (PCE2) of FIG. 9), wherein the connection holes (CT) are not placed in the region between the first light-emitting region (EA1) and the second light-emitting region (EA2), but may be placed in other parts of the non-light-emitting region (NEA). According to the embodiments, the design structure of the display device (1) and the electronic device (10) can be improved or optimized, and the connection holes (CT) of the subpixels (SPX) can be formed stably.

[0218] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0219] 1: Display device 10: Electronic devices 11: Display Module 12: Processor 100: Display panel 110: Substrate 120: Backplane layer 130: Light-emitting element layer CT: Connection hole EA: Luminous area EL: Light-emitting diode EML: Emissive layer NEA: Non-luminescent region PDL: Pixel Definition Layer SPT: Separation structure

Claims

Claim 1 A display device comprising: a substrate; a pixel defining film disposed on the substrate and defining a plurality of light-emitting regions including a first light-emitting region, a second light-emitting region, and a third light-emitting region adjacent to each other; and a plurality of light-emitting elements disposed on the substrate, including a first light-emitting element disposed in the first light-emitting region, a second light-emitting element disposed in the second light-emitting region, and a third light-emitting element disposed in the third light-emitting region, wherein during a light-emitting period in which the first light-emitting element, the second light-emitting element, and the third light-emitting element emit light to express standard white, a third voltage greater than a first voltage applied to the first electrode of the first light-emitting element and a second voltage applied to the first electrode of the second light-emitting element is applied to the first electrode of the third light-emitting element, and the gap between the second light-emitting region and the third light-emitting region is greater than the gap between the first light-emitting region and the second light-emitting region. Claim 2 A display device according to claim 1, wherein the difference between the third voltage and the second voltage is greater than the difference between the first voltage and the second voltage. Claim 3 A display device according to claim 1, wherein the first light-emitting element is a red light-emitting element that emits red light, the second light-emitting element is a green light-emitting element that emits green light, and the third light-emitting element is a blue light-emitting element that emits blue light. Claim 4 A display device according to paragraph 3, wherein the first light-emitting element, the second light-emitting element, and the third light-emitting element each comprise an organic light-emitting layer individually disposed in the first light-emitting region, the second light-emitting region, and the third light-emitting region. Claim 5 A display device according to claim 1, wherein during the light emission period, the third light-emitting element emits light with a lower brightness than the first light-emitting element and the second light-emitting element. Claim 6 A display device according to claim 1, wherein during the light emission period, a first driving current, a second driving current, and a third driving current flow through the first light-emitting element, the second light-emitting element, and the third light-emitting element, respectively, and the third driving current is greater than the first driving current and the second driving current. Claim 7 A display device according to claim 1, wherein the second light-emitting region has a shape that extends in a direction toward the first light-emitting region. Claim 8 A display device according to claim 1, further comprising a separating structure disposed between the second light-emitting region and the third light-emitting region. Claim 9 A display device according to claim 8, wherein the second light-emitting region has a shape extended in one direction and includes a long side facing the third light-emitting region, and the separating structure extends in the direction in which the second light-emitting region extends and is arranged parallel to the long side of the second light-emitting region. Claim 10 In claim 8, the separation structure is a display device disposed on both sides of the second light-emitting region. Claim 11 A display device according to claim 1, further comprising a backplane layer disposed between a light-emitting element layer including the light-emitting elements and the substrate, wherein the backplane layer comprises transistors electrically connected to the plurality of light-emitting elements and an insulating layer disposed on the transistors. Claim 12 A display device according to claim 11, further comprising connection holes for electrically connecting the plurality of light-emitting elements to each transistor by penetrating the insulating layer, wherein the connection holes are not disposed between the first light-emitting region and the second light-emitting region among the non-light-emitting regions surrounding the plurality of light-emitting regions, but are disposed in other parts of the non-light-emitting region. Claim 13 A display device according to claim 12, wherein the plurality of light-emitting regions include a plurality of first light-emitting regions including a first light-emitting region, a plurality of second light-emitting regions including a second light-emitting region, and a plurality of third light-emitting regions including a third light-emitting region, and each of the connecting holes is disposed between adjacent first light-emitting regions and third light-emitting regions or between adjacent second light-emitting regions and third light-emitting regions among the plurality of light-emitting regions. Claim 14 An electronic device comprising: a display module including a display panel; and a processor that transmits an image data signal to the display module, wherein the display panel includes: a substrate; a pixel defining film disposed on the substrate and defining a plurality of light-emitting regions including a first light-emitting region, a second light-emitting region, and a third light-emitting region adjacent to each other; and a plurality of light-emitting elements disposed on the substrate, including a first light-emitting element disposed in the first light-emitting region, a second light-emitting element disposed in the second light-emitting region, and a third light-emitting element disposed in the third light-emitting region, wherein during a light-emitting period in which the first light-emitting element, the second light-emitting element, and the third light-emitting element emit light to express standard white, a third voltage greater than a first voltage applied to the first electrode of the first light-emitting element and a second voltage applied to the first electrode of the second light-emitting element is applied to the first electrode of the third light-emitting element, and the gap between the second light-emitting region and the third light-emitting region is greater than the gap between the first light-emitting region and the second light-emitting region. Claim 15 An electronic device according to claim 14, wherein the difference between the third voltage and the second voltage is greater than the difference between the first voltage and the second voltage. Claim 16 An electronic device according to claim 14, wherein the first light-emitting element is a red light-emitting element that emits red light, the second light-emitting element is a green light-emitting element that emits green light, and the third light-emitting element is a blue light-emitting element that emits blue light. Claim 17 An electronic device according to claim 14, wherein the second light-emitting region has a shape that extends in a direction toward the first light-emitting region. Claim 18 An electronic device according to claim 14, wherein the display panel further comprises a separating structure disposed between the second light-emitting region and the third light-emitting region. Claim 19 An electronic device according to claim 14, wherein the display panel further comprises a backplane layer disposed between a light-emitting element layer including the light-emitting elements and the substrate, and the backplane layer comprises transistors electrically connected to the plurality of light-emitting elements and an insulating layer disposed on the transistors. Claim 20 An electronic device according to claim 19, wherein the display panel further comprises connection holes for electrically connecting the plurality of light-emitting elements to each transistor by penetrating the insulating layer, and the connection holes are not disposed between the first light-emitting region and the second light-emitting region among the non-light-emitting regions surrounding the plurality of light-emitting regions, but are disposed in other parts of the non-light-emitting region.

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