Apparatus and method for programming OTP memory with pre-verification of OTP programming

Abstract

The present invention relates to an OTP memory programming device and method, and more specifically, to an OTP memory programming device and method having a pre-verification function for OTP programming, wherein, when programming an OTP (One Time Programmable: OTP) which has irreversible characteristics that are difficult to change once programmed, a temporary memory is set before programming a program into the OTP memory, and a program is programmed into the temporary memory through the set temporary memory and a control means for performing programming to perform verification, and the program is programmed into the OTP memory upon successful verification.

Description

Technology Field

[0001] The present invention relates to an OTP memory programming device and method, and more specifically, to an OTP memory programming device and method having a pre-verification function for OTP programming, wherein, when programming an OTP (One Time Programmable: OTP) which has irreversible characteristics that are difficult to change once programmed, a verification is performed by programming in a temporary memory before programming in the OTP memory, and the program is programmed in the OTP memory upon successful verification. Background Technology

[0002] One Time Programmable (OTP) memory is used in System on Chip (SoC) systems to enhance security, correct process deviations occurring during semiconductor manufacturing, and enable the creation of various Stock Keeping Units (SKUs) even for the same hardware.

[0003] As mentioned above, OTP memory securely stores encryption keys, digital signature keys, and secure boot authentication keys. It also prevents piracy by storing the unique ID or serial number of the SoC system and enhances security by enabling the execution of only trusted firmware during secure boot. Furthermore, OTP memory can improve system accuracy by storing different calibration values ​​for each individual chip to optimize the performance of analog circuits (e.g., ADC, PLL, etc.) and by storing calibration values ​​to increase the accuracy of sensors such as temperature and light sensors. In particular, during product configuration, it allows for the control of functional restrictions or activations, such as enabling / disabling specific cores or limiting clock speeds, and enables the setting of product classes, thereby allowing the production of hardware with various product variations.

[0004] These OTP memories are configured so that once programmed, the programmed settings cannot be changed, or only a part is programmed while another part can be programmed later.

[0005] Figure 1 is a diagram showing the configuration of a typical OTP memory programming device.

[0006] Referring to FIG. 1, the OTP memory programming device of the SoC system includes a processor (10), a control unit (20), and an OTP memory (30).

[0007] The processor (10) uses a method of directly programming the OTP memory (30) through the control unit (20), which is the programming control unit.

[0008] As described above, since the processor (10) directly programs the OTP memory (30) through the control unit (20), if the programming is incorrect, the data programmed in the OTP memory (30) cannot be changed. Therefore, if the programming is incorrect, the entire SoC must be replaced, or the OTP memory (30) must be removed and a new OTP memory (30) soldered.

[0009] Conventional OTP memory programming devices may incur additional costs due to SoC replacement and OTP memory replacement, and may have problems such as being cumbersome due to resoldering of the OTP memory (30) and reducing the reliability of the SoC system.

[0010] Therefore, when programming OTP memory, there is a need for a method to program the program more accurately and safely. Prior art literature

[0011] Republic of Korea Published Patent No. 10-2022-0086839 (Published June 24, 2022) The problem to be solved

[0012] Accordingly, the objective of the present invention is to provide an OTP memory programming apparatus and method having a pre-verification function for OTP programming, wherein, when programming an OTP (One Time Programmable: OTP) having irreversible characteristics that are difficult to change once programmed, a temporary memory is set before programming a program into the OTP memory, and a program is programmed into the temporary memory through the set temporary memory and a control means for performing programming to perform verification, and the program is programmed into the OTP memory upon successful verification. means of solving the problem

[0013] An OTP memory programming device having an OTP programming pre-verification function according to the present invention for achieving the above-mentioned purpose comprises: an OTP memory in which a portion is programmed with program data recorded thereon and the remainder is in an initial state to allow data to be recorded thereon, thereby enabling modification of the program by writing modification data to the remainder therein; a temporary memory unit that records modification data to be modified and outputs modified program data by merging the input program data with the modification data; a programming control unit that, upon a request to read the program data, outputs the program data programmed in the OTP memory to the temporary memory unit and outputs the modified program data merged with the modification data, and upon a request to program the modified program data, programs the modification data of the modified program data into the remainder of the OTP memory; and a judgment unit that receives an execution command for the modified program data, executes the modified program data to determine whether it operates normally, and outputs operation judgment information including the judgment information. The invention is characterized by including a processor that, upon the occurrence of a program programming event of the OTP memory, writes the modified data to be programmed to the temporary memory unit, requests the programming control unit to read the program data, receives the modified program data from the programming control unit in response to the request, requests the judgment unit to execute, receives operation judgment information regarding the execution request from the judgment unit, and if the programming is verified to be successful, requests the programming control unit to program the modified program.

[0014] The programming control unit comprises: a selector that reads the program data from the OTP memory and outputs it to the temporary memory unit upon a request to read the program data, and programs the modified program data into the OTP memory upon a request to program the modified program data; and a control unit that receives the modified program data, which is formed by merging the change data and the program data from the OTP memory, outputs it to the processor, and requests the selector to program the modified program data verified by the processor into the OTP memory.

[0015] The above temporary memory unit is characterized by including: a temporary memory for recording the change data to be changed; and a merger that merges the change data input from the temporary memory with the input program data to generate the modified program data and then outputs it to the programming control unit.

[0016] The above control unit is characterized by receiving the change data from the processor and recording it in the temporary memory.

[0017] The above control unit is characterized by receiving the program data programmed in the OTP memory from the OTP memory through the selector and recording it in the temporary memory upon a request to read program data according to the program programming event.

[0018] The control unit includes a backup register that stores backup data for program data programmed in the OTP memory, and is characterized by writing the program data stored as backup data in the backup register to the temporary memory upon a request to read the program data according to the program programming event.

[0019] The above temporary memory is a two-port or dual-port register in which the first port is connected to the process through a bus interface and the second port is connected to the selector through an OTP interface, and the processor is characterized by writing the change data to the temporary memory through the bus interface connected to the first port when a program programming event of the OTP memory occurs.

[0020] The above control unit is characterized by receiving the program data programmed in the OTP memory from the OTP memory through the selector and recording it in the temporary memory upon a request to read program data according to the program programming event.

[0021] The above control unit includes a backup register that stores backup data for program data programmed in the OTP memory, and is characterized by outputting the program data stored as backup data in the backup register to the merger when a program data reading request is made in accordance with the program programming event.

[0022] The control unit of the above programming control unit receives a request to write modified data from a processor, controls the selector upon the request to write modified data to block the OTP interface connected to the OTP memory, activates the OTP interface upon confirmation of normal operation of the modification program by the judgment unit, and blocks the interface connected to the temporary memory.

[0023] The OTP memory programming method having an OTP programming pre-verification function according to the present invention for achieving the above-mentioned purpose comprises: a change data writing process in which a processor records change data to be programmed in a temporary memory unit when a program programming event of the OTP memory occurs; a modification program data acquisition process in which the processor receives the modification program data from the programming control unit in response to the request to read the program data stored in the OTP memory from the programming control unit; a modification program test request process in which the processor receives the modification program data from the programming control unit in response to the request and requests execution from the judgment unit; and a modification program programming process in which the processor requests the programming of the modification program from the programming control unit if the operation judgment information regarding the execution request is input from the judgment unit and the operation judgment information is successful, and the modification program programming process in which the modification data of the modification program is programmed into the OTP memory by the programming control unit.

[0024] The above change data writing process is characterized by including: a change data writing request step in which the processor requests the control unit of the programming control unit to write change data to the temporary memory unit when a program programming event of the OTP memory occurs; and a change data writing step in which the control unit writes the change data to the temporary memory of the temporary memory unit through a selector of the programming control unit.

[0025] The above modification program data acquisition process is characterized by comprising: a program data read request step in which a processor requests the control unit of the programming control unit to read the program data stored in the OTP memory; a program data writing step in which the control unit reads the program data from the OTP memory through the selector and outputs it to the merger of the temporary memory unit; and a modification program generation step in which the merger of the temporary memory unit merges the modification data recorded in the temporary memory and the program data to generate a modification program data, which is then output to the processor through the selector and the control unit.

[0026] The above modification program data acquisition process is characterized by comprising: a program data read request step in which a processor requests the control unit of the programming control unit to read the program data stored in the OTP memory; a program data writing step in which the control unit reads the program data, which is the backup data, from a backup register that backs up the program data stored in the OTP memory as backup data and writes it to the temporary memory of the temporary memory unit; and a modification program generation step in which a merger of the temporary memory unit merges the modification data recorded in the temporary memory and the program data to generate a modification program data, which is then output to the processor through the selector and the control unit.

[0027] The above modification program data acquisition process is characterized by comprising: a program data read request step in which a processor requests the control unit of the programming control unit to read the program data stored in the OTP memory; a program data read step in which the control unit reads the program data, which is the backup data, from a backup register that backs up the program data stored in the OTP memory as backup data, and outputs it to a merger of the temporary memory unit; and a modification program generation step in which the merger of the temporary memory unit merges the modification data recorded in the temporary memory with the program data read from the backup register through the control unit to generate a modification program data, which is then output to the processor through the selector and the control unit.

[0028] The above temporary memory is a two-port or dual-port register in which the first port is connected to the process through a bus interface and the second port is connected to the selector through an OTP interface, and the change data writing process is characterized in that the processor directly writes the change data to the temporary memory through the bus interface and the first port.

[0029] The above temporary memory is a two-port or dual-port register in which the first port is connected to the process through a bus interface and the second port is connected to the selector through an OTP interface, and the change data writing process is characterized in that the processor directly writes the change data to the temporary memory through the bus interface and the first port.

[0030] The above change data writing process further includes an OTP interface blocking step in which, after the change data writing request step, the control unit of the programming control unit controls the selector to block the OTP interface connected to the OTP memory in accordance with the occurrence of the change data writing request, and is characterized by performing the change data writing step after the interface blocking step.

[0031] The above modification program programming process is characterized by comprising: a programming request step in which the processor monitors whether operation judgment information regarding the execution request is input from the judgment unit, and if operation judgment information is input from the judgment unit, the processor determines whether the operation judgment information is a programming success, and if successful, the processor requests the programming control unit to program the modification program; and an OTP programming step in which the control unit of the programming control unit activates the OTP interface according to the programming success determination from the processor, blocks the interface connected to the temporary memory, and then programs the modification data of the modification program into the OTP memory. Effects of the invention

[0032] The present invention has the effect of verifying whether a program reflecting the data to be changed operates normally before programming the OTP memory when changing a program programmed in the OTP memory.

[0033] In addition, by verifying whether the program to be modified in the OTP memory is functioning properly before programming it, the present invention has the effect of preventing additional tasks, such as replacing the OTP memory due to incorrect programming. Brief explanation of the drawing

[0035] Figure 1 is a diagram showing the configuration of a typical OTP memory programming device. FIG. 2 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the present invention. FIG. 3 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the first embodiment of the present invention. FIG. 4 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to a second embodiment of the present invention. FIG. 5 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to a third embodiment of the present invention. FIG. 6 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the fourth embodiment of the present invention. FIG. 7 is a flowchart illustrating an OTP memory programming method having an OTP programming pre-verification function according to the present invention. Specific details for implementing the invention

[0036] The configuration and operation of an OTP memory programming device according to the present invention will be described in detail below with reference to the attached drawings, and an OTP memory programming method in said device will be described.

[0037] FIG. 2 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the present invention.

[0038] Referring to FIG. 2, an OTP memory programming device having an OTP programming pre-verification function according to the present invention includes a processor (100), a programming control unit (110), an OTP memory (120), a temporary memory unit (130), and a judgment unit (140).

[0039] The processor (100) and the programming control unit (110) may be connected via a bus interface to perform data communication, the programming control unit (110) and the OTP memory (120) may be connected via an OTP interface to perform data communication, and the processor (100) and the temporary memory unit (130) may be connected via a bus interface to perform communication, and data communication may also be performed through the programming control unit (110) and the OTP interface connected via the bus interface.

[0040] One Time Programmable (OTP) memory (120) is a highly secure memory configured to be programmable only once, or to be programmable only once, in which some areas have program data recorded and are pre-programmed, and the remaining areas are in an initial state where program data is not recorded, so that the program can be modified later by programming the data to be changed (hereinafter referred to as "change data" or "update data").

[0041] That is, the OTP memory (120) allows programmed program data to be recorded and modified by adding change data to the recorded program data.

[0042] The temporary memory unit (130) records the change data to be changed, generates modified program data (UPD_OTP_RDATA) by merging the change data with the program data (OTP_RDATA) input in response to a program data read request (command) of the OTP memory (120), and then outputs it to the processor (100) through the programming control unit (110).

[0043] When a request to read the program data is made, the programming control unit (110) outputs the program data programmed in the OTP memory (120) to the temporary memory unit and outputs the modified program data merged with the modified data to the processor (100), and then when a request to program the modified program data is made, it programs the modified data of the modified program data into the OTP memory (120).

[0044] The judgment unit (140) receives an execution command for the modification program data from the processor (100), executes the modification program data to determine whether it operates normally, and outputs operation judgment information (ACK) to the processor (100). The operation judgment information may be either normal judgment information ("1" or "0") indicating that the modification program operates normally, or abnormal judgment information ("0" or "1") indicating that the modification program does not operate normally.

[0045] The judgment unit (140) may be one or more depending on the function and operation of the modification program data. In this case, the processor (100) will transmit an execution command of the modification program to the judgment unit (140) corresponding to the modification part.

[0046] The processor (100) detects the occurrence of a program programming event of the OTP memory (120) according to the present invention, receives the change data to be changed from an administrator or the like, and writes it to the temporary memory unit (130).

[0047] After the processor (100) records the modified data in the temporary memory unit (130), it transmits a request (command) to read the programmed program data of the OTP memory (120) according to the OTP memory (120) programming to the programming control unit (110), receives modified program data in which the modified data is merged into the program data from the programming control unit (110), and commands the judgment unit (140) to execute the modified program data.

[0048] When operation judgment information is input from the judgment unit (140) regarding the execution command of the modification program (data), the processor (100) provides the operation judgment information to the programming control unit (110), and if the operation judgment information is normal, requests the programming control unit (110) to program the modification program data.

[0049] The above processor (100) may be configured to generate an alarm indicating normality through an external alarm means (display, audio processing unit, etc., not shown) if the operation judgment information is normal judgment information, and to generate an alarm indicating abnormality if the operation judgment information is abnormal judgment information.

[0050] In the following description, the configuration of an OTP memory programming device having an OTP programming pre-verification function according to various embodiments is described with reference to the drawings, and the description of configurations that perform the same operation as FIG. 2 or operate the same as the previous embodiment is omitted.

[0051] FIG. 3 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the first embodiment of the present invention.

[0052] Referring to FIG. 3, the programming control unit (110) of the OTP memory programming device according to the first embodiment includes a control unit (111) and a selector (112), and the temporary memory unit (130) includes a temporary memory (131) and a merger (132).

[0053] The selector (112) is connected to the control unit (111), OTP memory (120), and temporary memory (131) via an OTP interface to perform data communication through selective connection, and performs data writing in 1-bit units and data reading in 32-bit units.

[0054] According to the embodiment, the selector (112) is configured to write (record) the change data of the processor (100) to the temporary memory (131), and is configured to write the program data to the temporary memory (131) when a request to read program data of the OTP memory (120) of the processor (100) is made through the control unit (111).

[0055] That is, when the processor (100) requests the writing of change data due to the occurrence of a program programming event, the control unit (111) writes the change data in 1-bit units to the temporary memory (131) through the selector (112), and when a request to read program data of the OTP memory (120) occurs from the processor (100), the program data of the OTP memory (120) is read in 32-bit units through the selector (112) and written to the temporary memory (131) in 32-bit units or output to the merger (132).

[0056] It would be preferable for the control unit (111) to control the selector (112) so that when a request to write change data occurs from the processor (100), it blocks the OTP interface connected to the OTP memory (120), connects to the temporary memory (131) via the OTP interface, and then writes the change data to the temporary memory (131).

[0057] Additionally, it would be preferable for the control unit (111) to be configured to control the selector (112) to block the OTP interface connected to the temporary memory (131) when operation judgment information (ACK), which is normal judgment information, is input from the judgment unit (140).

[0058] When both the modified data and the program data are written to the temporary memory (131), the merger (132) of the temporary memory unit (130) reads both the modified data and the program data from the temporary memory (131), merges them to create modified program data, and then outputs it to the processor (100) through the selector (112) and the control unit (111).

[0059] Additionally, according to another embodiment, the merger (132) may be configured to merge the change data stored in the temporary memory (131) and the program data input from either the OTP memory (120) or the programming control unit (110) according to the embodiment, and output the result to the processor (100) through the selector (112) and the control unit (110) of the programming control unit (110).

[0060] For example, if the change data is '1000_0100' and the program data is '0100_1001', the merger (132) generates and outputs modified program data, '1100_1101', by merging the change data and the program data.

[0061] FIG. 4 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the second embodiment of the present invention, showing the case where the control unit (111) of the first embodiment is equipped with a backup register (113).

[0062] The backup register (113) of the control unit (111) stores backup data identical to the program data recorded in the OTP memory (120). That is, the backup register (113) stores the program data as backup data. For example, the control unit (111) may be configured (designed) to store the program data of the OTP memory (120) as backup data in the backup register (113) when the reset of the SoC is released.

[0063] Accordingly, after the change data is written to the temporary memory (131), when a request to read program data by the processor (100) occurs, the control unit (111) writes the program data, which is backup data stored in the backup register (113), to the temporary memory (131) through a direct interface or a bus interface. The direct interface is an interface that is directly connected to the control unit (111) and the temporary memory unit (130) to perform mutual data communication.

[0064] Then, the merger (132) merges the modified program data generated by merging the change data and program data recorded in the temporary memory (131) and reads the modified program data through the selector (112) and the control unit (111) and outputs it to the processor (100).

[0065] Additionally, according to another embodiment, the merger (132) may be configured to output modified program data generated by merging the modified data recorded in the temporary memory (131) and the program data input from the backup register (113) through the control unit (111) to the processor (100) through the selector (112) and the control unit (111).

[0066] FIG. 5 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to a third embodiment of the present invention, and shows a case where the temporary memory (131) is a two-port register or a dual-port register having a first port (Port A) connected to a processor (100) through a bus interface and a second port (Port B) connected to a selector (112) and an OTP memory (120) through an OTP interface.

[0067] In this case, the processor (100) directly writes the change data obtained when a program programming event occurs to the temporary memory (131) through the first port (Port A) via the bus interface. Since the processor (100) uses the bus interface, it can write the change data to the temporary memory (131) at once in a size of 32 bits or 64 bits.

[0068] The processor (100) may be configured to block the bus interface with the programming control unit (110) and connect the bus interface to the temporary memory unit (130) when a program programming event occurs. Additionally, the processor (100) may be configured to write change data to the temporary memory (131) of the temporary memory unit (130) via the bus interface, then block the bus interface of the temporary memory unit (130) and connect the bus interface to the programming control unit (110).

[0069] Program data will be received through the second port via the OTP interface through the selector (112) and the control unit (111) and recorded in temporary memory (131) in 32-bit units.

[0070] When the change data and program data are written to the temporary memory (131), the merger (132) will merge the change data and program data to generate modified program data and then output it to the processor (100) through the selector (112) and the control unit (111).

[0071] FIG. 6 is a diagram showing the configuration of an OTP memory programming device having an OTP programming pre-verification function according to the fourth embodiment of the present invention, showing a case where the temporary memory (131) is a dual-port register or a dual-port register and the control unit (111) is equipped with a backup register (113).

[0072] Referring to FIG. 6, the processor (100) records the change data obtained directly through the first port (Port A) of the temporary memory (131) via the bus interface into the temporary memory (131) when a program programming event occurs.

[0073] And when the processor (100) requests to read program data, the control unit (111) writes the program data backed up in the backup register (113) to the temporary memory (131) through the selector (112), the OTP interface, and the second port (Port B) of the temporary memory (131).

[0074] When the change data and program data are written to the temporary memory (131), the merger (132) merges the change data and program data to generate modified program data, which is then output to the processor (100) through the selector (112) and the control unit (111).

[0075] FIG. 7 is a flowchart illustrating an OTP memory programming method having an OTP programming pre-verification function according to the present invention, and is a flowchart illustrating the operation from the perspective of a processor.

[0076] Referring to FIG. 7, the processor (100) monitors whether an OTP program programming event occurs (S111). The program programming event may be generated by a manager.

[0077] When a program programming event occurs, the processor (100) monitors whether the modified data, which is the data to be programmed, is obtained (S113), and if the modified data is obtained, the modified data obtained according to the above embodiments is written to the temporary memory (131) (S115).

[0078] After writing the modified data to the temporary memory (131), the processor (100) requests the control unit (111) of the programming control unit (110) to read the program data of the OTP memory (120) (S117), and monitors whether the modified program data is input from the control unit (111).

[0079] When modification program data is input, the processor (100) requests the judgment unit (140) to execute the modification program data (S121), and then monitors whether operation judgment information is input from the judgment unit (140) (S123).

[0080] When operation judgment information is input, the processor (100) provides the operation judgment information to the control unit (111) and analyzes the operation judgment information to determine whether the program execution was successful, that is, whether it operated normally (S125).

[0081] If, as a result of the judgment, it is not operating normally, the processor (100) outputs a programming failure through an alarm means, deletes the change data and program data recorded in the temporary memory (131), and performs an initialization process to initialize the selector (112) (S127).

[0082] If the result of the judgment is that it operated normally, the processor (100) requests the control unit (111) to program the modification program data into the OTP memory (120) and programs the modification program into the OTP memory (120) (S129).

[0083] After programming the modified program data, the processor (100) alerts the programmer of the programming success through an alarm means and performs initialization (S131).

[0084] Meanwhile, it will be readily understood by those skilled in the art that the present invention is not limited to the typical preferred embodiments described above, but can be implemented with various improvements, modifications, substitutions, or additions within the scope of the essence of the invention. If such implementation through improvements, modifications, substitutions, or additions falls within the scope of the appended claims below, the technical concept thereof should also be considered to belong to the present invention. Explanation of the symbols

[0085] 100: Processor 110: Programming control unit 111: Control unit 112: Selector 113: Backup Register 120: OTP Memory 130: Temporary memory unit 131: Temporary memory 132: Merger 140: Judgment Department

Claims

Claim 1 An OTP memory in which a portion is programmed with program data recorded therein and the remainder is in an initial state to allow data to be recorded, thereby enabling modification of the program by writing modified data to the remainder; a temporary memory unit that records modified data to be modified and outputs modified program data by merging the input program data with the modified data; a programming control unit that, upon a request to read the program data, outputs the program data programmed in the OTP memory to the temporary memory unit to output the modified program data merged with the modified data, and upon a request to program the modified program data, programs the modified data of the modified program data into the remainder of the OTP memory; and a judgment unit that receives an execution command for the modified program data, executes the modified program data to determine whether it operates normally, and outputs operation judgment information including the judgment information. An OTP memory programming device having an OTP programming pre-verification function, characterized by including a processor that, when a program programming event of the OTP memory occurs, writes the modified data to be programmed to the temporary memory unit, requests the programming control unit to read the program data, receives the modified program data from the programming control unit in response to the request, requests the judgment unit to execute, receives operation judgment information regarding the execution request from the judgment unit, and if the programming is verified to be successful, requests the programming control unit to program the modified program. Claim 2 An OTP memory programming device having an OTP programming pre-verification function, wherein, in claim 1, the programming control unit comprises: a selector that reads the program data from the OTP memory and outputs it to the temporary memory unit upon a request to read the program data, and programs the modified program data into the OTP memory upon a request to program the modified program data; and a control unit that receives the modified program data, which is formed by merging the change data and the program data from the OTP memory, outputs it to the processor, and requests the selector to program the modified program data verified by the processor into the OTP memory. Claim 3 An OTP memory programming device having an OTP programming pre-verification function, characterized in that, in claim 1 or 2, the temporary memory unit comprises: a temporary memory for recording the change data to be changed; and a merger that merges the change data input from the temporary memory with the input program data to generate the modified program data and then outputs it to the programming control unit. Claim 4 An OTP memory programming device having an OTP programming pre-verification function, wherein, in paragraph 3, the control unit receives the change data from the processor and records it in the temporary memory. Claim 5 An OTP memory programming device having an OTP programming pre-verification function, wherein, in claim 4, the control unit receives the program data programmed in the OTP memory through the selector and records it in the temporary memory upon a request to read program data according to the program programming event. Claim 6 An OTP memory programming device having an OTP programming pre-verification function, wherein, in claim 4, the control unit includes a backup register that stores backup data for program data programmed in the OTP memory, and when a request to read program data according to the program programming event is made, the program data stored as backup data in the backup register is written to the temporary memory. Claim 7 An OTP memory programming device having an OTP programming pre-verification function, wherein, in claim 4, the temporary memory is a two-port or dual-port register in which the first port is connected to the process through a bus interface and the second port is connected to the selector through an OTP interface, and the processor records the change data in the temporary memory through the bus interface connected to the first port when a program programming event of the OTP memory occurs. Claim 8 An OTP memory programming device having an OTP programming pre-verification function, wherein, in claim 7, the control unit receives the program data programmed in the OTP memory through the selector and records it in the temporary memory upon a request to read program data according to the program programming event. Claim 9 An OTP memory programming device having an OTP programming pre-verification function, wherein, in claim 7, the control unit includes a backup register that stores backup data for program data programmed in the OTP memory, and outputs the program data stored as backup data in the backup register to the merger when a program data reading request is made according to the program programming event. Claim 10 An OTP memory programming device having an OTP programming pre-verification function, wherein, in paragraph 3, the control unit of the programming control unit receives a request to write modified data from a processor, controls the selector upon the request to write modified data to block the OTP interface connected to the OTP memory, activates the OTP interface upon confirmation of normal operation of the modification program by the judgment unit, and blocks the interface connected to the temporary memory. Claim 11 An OTP memory programming method having an OTP programming pre-verification function, characterized by comprising: a change data writing process in which a processor writes change data to be programmed into a temporary memory unit when a program programming event of the OTP memory occurs; a modification program data acquisition process in which the processor receives the modification program data from the programming control unit in response to the request to read the program data stored in the OTP memory from the programming control unit; a modification program test request process in which the processor receives the modification program data from the programming control unit in response to the request and requests execution from the judgment unit; and a modification program programming process in which the processor requests the programming of the modification program from the programming control unit if the operation judgment information regarding the execution request is input from the judgment unit and the operation judgment information is successful, and the programming control unit programs the change data of the modification program into the OTP memory. Claim 12 In claim 11, the above change data writing process comprises: a change data writing request step in which the processor requests the control unit of the programming control unit to write the change data to the temporary memory unit when a program programming event of the OTP memory occurs; and a change data writing step in which the control unit writes the change data to the temporary memory of the temporary memory unit through a selector of the programming control unit, characterized in that the OTP memory programming method having an OTP programming pre-verification function. Claim 13 In claim 12, the modification program data acquisition process comprises: a program data read request step in which a processor requests the control unit of the programming control unit to read the program data stored in the OTP memory; a program data recording step in which the control unit reads the program data from the OTP memory through the selector and outputs it to the merger of the temporary memory unit; and a modification program generation step in which the merger of the temporary memory unit merges the modification data recorded in the temporary memory and the program data to generate a modification program data, which is then output to the processor through the selector and the control unit. Claim 14 In claim 12, the modification program data acquisition process comprises: a program data read request step in which a processor requests the control unit of the programming control unit to read the program data stored in the OTP memory; a program data writing step in which the control unit reads the program data, which is the backup data, from a backup register that backs up the program data stored in the OTP memory as backup data and writes it to the temporary memory of the temporary memory unit; and a modification program generation step in which a merger of the temporary memory unit merges the modification data and the program data recorded in the temporary memory to generate a modification program data, which is then output to the processor through the selector and the control unit. Claim 15 In claim 12, the process of acquiring modified program data comprises: a program data read request step in which a processor requests the control unit of the programming control unit to read the program data stored in the OTP memory; a program data read step in which the control unit reads the program data, which is the backup data, from a backup register that backs up the program data stored in the OTP memory as backup data and outputs it to a merger of the temporary memory unit; and a modified program generation step in which the merger of the temporary memory unit merges the modified data recorded in the temporary memory and the program data read from the backup register through the control unit to generate modified program data, which is then output to the processor through the selector and the control unit. Claim 16 An OTP memory programming method having an OTP programming pre-verification function, wherein, in claim 14 or 15, the temporary memory is a two-port or dual-port register in which the first port is connected to the process through a bus interface and the second port is connected to the selector through an OTP interface, and the change data writing process is characterized in that the processor directly writes the change data to the temporary memory through the bus interface and the first port. Claim 17 In claim 11, the temporary memory is a two-port or dual-port register in which the first port is connected to the process through a bus interface and the second port is connected to the selector through an OTP interface, and the change data writing process is characterized by the processor directly writing the change data to the temporary memory through the bus interface and the first port, thereby having an OTP programming pre-verification function. Claim 18 In claim 12, the change data writing process further includes an OTP interface blocking step in which the control unit of the programming control unit controls the selector to block the OTP interface connected to the OTP memory according to the occurrence of the change data writing request step after the change data writing request step, and is characterized by performing the change data writing step after the interface blocking step, an OTP memory programming method having an OTP programming pre-verification function. Claim 19 In claim 11, the modification program programming process comprises: a programming request step in which the processor monitors whether operation judgment information regarding the execution request is input from the judgment unit, and if operation judgment information is input from the judgment unit, the processor determines whether the operation judgment information is successful programming, and if successful, the processor requests the programming control unit to program the modification program; and an OTP programming step in which the control unit of the programming control unit activates the OTP interface according to the programming success judgment from the processor, blocks the interface connected to the temporary memory, and then programs the modified data of the modification program into the OTP memory.

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