Apparatus and method for detecting arc occurrence

Abstract

The present disclosure relates to an apparatus and method for detecting arc generation. According to one embodiment of the present disclosure, an apparatus for detecting arc generation may be provided, comprising: a first PCB having at least a portion of a sensor unit for acquiring sensor data for an electrical circuit to be detected for arc generation; and a second PCB having a power supply unit for converting an AC power source of the electrical circuit into a DC power source, wherein the first PCB and the second PCB are spaced apart from each other.

Description

Technology Field

[0001] The present disclosure relates to a device for detecting arc generation. Background Technology

[0002] Conventional earth leakage circuit breakers have a problem in that they cannot respond to arc faults, which are the cause of electrical fires. Although Arc-Fault Circuit Interrupters (AFCIs) have been developed to detect arcs using current or voltage waveforms, high-frequency detection, or optical sensors, conventional AFCIs are unable to effectively detect arcs, which pose a high risk of accidents, as their sensitivity is often lowered due to a high frequency of malfunctions.

[0003] It is known that arcs occur due to complex causes in various situations. Consequently, there is a clear limitation in that arc detection using rule-based systems is prone to frequent malfunctions, as it is difficult to provide a clear definition of the arc phenomenon.

[0004] Accordingly, there is a need for research and development of technology to detect arc occurrences with high accuracy by utilizing neural network models trained on a large amount of diverse data for arc detection.

[0005] The aforementioned background technology is technical information that the inventor possessed for the derivation of the present disclosure or acquired during the process of deriving the present disclosure, and it cannot be considered as prior art disclosed to the general public prior to the filing of the present disclosure. Prior art literature

[65535] (Patent Document 0001) JP 2023-069547 A(Patent Document 0002) KR 10-2010-0138239 A The problem to be solved

[0006] The present disclosure provides an apparatus for detecting arc generation. The problems to be solved by the present disclosure are not limited to those mentioned above, and other problems and advantages of the present disclosure not mentioned can be understood from the following description and will be more clearly understood from the embodiments of the present disclosure. Furthermore, it will be understood that the problems and advantages to be solved by the present disclosure can be realized by the means and combinations thereof set forth in the claims. means of solving the problem

[0007] As a technical means for achieving the technical problem described above, the first aspect of the present disclosure may provide a device for detecting arc generation, comprising: a first PCB having at least a portion of a sensor unit for acquiring sensor data for an electrical circuit to be detected for arc generation; and a second PCB having a power supply unit for converting an AC power of the electrical circuit into a DC power, wherein the first PCB and the second PCB are spaced apart.

[0008] According to one embodiment, a device may be provided in which the first PCB and the second PCB are arranged side by side.

[0009] According to one embodiment, the first PCB and the second PCB are spaced apart at a predetermined distance, and the predetermined distance may have a range of 5 mm to 15 mm, thereby providing a device.

[0010] According to one embodiment, a device may be provided in which the first PCB is disposed between the sensor part and the second PCB.

[0011] According to one embodiment, a device may be provided in which the second PCB is disposed between the power supply and the first PCB.

[0012] According to one embodiment, the device may be provided such that the second PCB further comprises a blocking member including a solenoid, and the second PCB is disposed between the first PCB and the blocking member.

[0013] According to one embodiment, the blocking unit may further include a field-effect transistor that controls the solenoid, thereby providing a device.

[0014] According to one embodiment, the direction in which the first PCB and the second PCB are each extended intersects the direction in which the third PCB is extended, and the third PCB is provided with a processing unit that receives a digital input configured based on the sensor data and generates a digital output corresponding to the digital input, and the digital output indicates whether an arc has occurred in the electrical circuit.

[0015] According to one embodiment, the operating unit may provide a device that generates the digital output based on the digital input using a previously trained neural network model.

[0016] According to one embodiment, a device may be provided in which the third PCB is disposed between the power supply unit and the operation unit.

[0017] A second aspect of the present disclosure provides a method for detecting arc generation, comprising: inputting a digital input configured based on sensor data for an electrical circuit to a processing unit; obtaining a digital output of the processing unit corresponding to the digital input; and generating a cutoff signal based on the digital output, wherein the digital output indicates whether an arc has occurred in the electrical circuit, and a first PCB having at least a portion of a sensor unit for obtaining the sensor data and a second PCB having a power supply unit for converting the AC power of the electrical circuit into DC power are spaced apart from each other.

[0018] Other aspects, features, and advantages other than those described above will become clear from the following drawings, claims, and detailed description of the invention. Effects of the invention

[0019] According to the means for solving the problem of the present disclosure described above, high-performance AFCI functions can be implemented by installing additional modules on existing circuit breakers, such as earth leakage circuit breakers, thereby minimizing changes to the manufacturing process.

[0020] In addition, according to the means for solving the problem of the present disclosure, a neural network-based arc detection operation can be performed using a cell array comprising a plurality of memory cells that store weights of a previously learned neural network model, so that the occurrence of an arc can be detected at a high speed and with high accuracy.

[0021] The effects of the embodiments of the present disclosure are not limited to the effects mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description in this specification. Brief explanation of the drawing

[0022] The following drawings attached to this specification are intended to illustrate at least one embodiment according to the present disclosure and serve to further enhance understanding of the technical concept of the present disclosure together with the detailed description of the invention set forth below; therefore, the present disclosure should not be interpreted as being limited only to the matters described in the drawings. FIG. 1 is a block diagram of a device for detecting arc generation according to one embodiment. Figure 2 is an exemplary diagram illustrating the implementation of a neuromorphic chip. FIGS. 3a and 3b are exemplary drawings for comparing a von Neumann structure and an in-memory computing structure. FIG. 4 is a diagram for schematically explaining the process of operation of a device for detecting arc generation according to one embodiment. FIG. 5 is a drawing illustrating a device for detecting arc generation according to one embodiment. FIG. 6 is a drawing illustrating the internal structure of a device for detecting arc generation according to one embodiment. FIGS. 7 and 8 are drawings illustrating a part of the internal structure of a device for detecting arc generation shown in FIG. 6. FIG. 9 is an example of how a device for detecting arc generation operates. FIGS. 10 and 11 are side views illustrating the internal structure of a device for detecting arc generation according to one embodiment. FIG. 12 is an exemplary drawing for explaining a blocking member according to one embodiment. Specific details for implementing the invention

[0023] The advantages and features of the present disclosure and the methods for achieving them will become clear by referring to the embodiments described in detail together with the accompanying drawings. However, the present disclosure is not limited to the embodiments presented below, but can be implemented in various different forms and should be understood to include all modifications, equivalents, and substitutions that fall within the spirit and scope of the present disclosure. The embodiments presented below are provided to make the present disclosure complete and to fully inform those skilled in the art of the scope of the invention. In describing the present disclosure, detailed descriptions of related prior art are omitted if it is determined that such detailed descriptions may obscure the essence of the present disclosure.

[0024] The terms used herein are used merely to describe specific embodiments and are not intended to limit the disclosure. Unless otherwise defined, all terms used herein have the same meaning as generally understood by those skilled in the art to which this disclosure pertains.

[0025] In this specification, singular expressions include plural expressions unless the context clearly indicates otherwise. Furthermore, terms such as "comprising" or "having" are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0026] Additionally, terms including ordinal numbers, such as "first" or "second" as used herein, may be used to describe various components, but the components should not be limited by the terms. The terms are used solely for the purpose of distinguishing one component from another.

[0027] Phrases such as "in one embodiment," "according to one embodiment," "related to one embodiment," or "according to an implementation of one embodiment" in this specification do not necessarily refer to the same embodiment. Furthermore, throughout this specification, "examples" are arbitrary distinctions to facilitate the description of the present disclosure, and each embodiment does not need to be mutually exclusive. For example, configurations mentioned for the description of one embodiment may be applied and / or implemented in other embodiments, and may be modified and applied and / or implemented to the extent that they do not depart from the scope of the present disclosure.

[0028] Some embodiments of the present disclosure may be represented by functional block configurations and various processing steps. Some or all of these functional blocks may be implemented by various numbers of hardware and / or software configurations that perform specific functions. For example, the functional blocks of the present disclosure may be implemented by one or more microprocessors or by circuit configurations for a specific function.

[0029] For example, the functional blocks of the present disclosure may be implemented in various programming or scripting languages. The functional blocks may be implemented as algorithms executed on one or more processors. Additionally, the present disclosure may employ prior art for electronic configuration, signal processing, and / or data processing, etc. Terms such as "mechanism," "element," "means," and "configuration" may be used broadly and are not limited to mechanical and physical configurations. Furthermore, terms such as "-part," "-module," etc. refer to a unit that processes at least one function or operation, which may be implemented in hardware or software, or as a combination of hardware and software.

[0030] Furthermore, the connecting lines or connecting members between the components depicted in the drawings are merely illustrative of functional connections and / or physical or circuit connections. In the actual device, connections between components may be represented by various alternative or added functional connections, physical connections, or circuit connections.

[0031] In addition, some components in the drawings may be depicted with their size or proportions slightly exaggerated. Also, components depicted in one drawing may not be depicted in another drawing.

[0032] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the attached drawings.

[0033] FIG. 1 is a block diagram of a device for detecting arc generation according to one embodiment.

[0034] Referring to FIG. 1, a device for detecting arc generation (hereinafter referred to as the ‘device’) (100) according to one embodiment of the present disclosure is provided in an electric circuit and can detect the generation of an arc in the electric circuit.

[0035] At this time, the electrical circuit is the target for detecting arc generation and may include, but is not limited to, residential electrical wiring (e.g., electrical wiring with an alternating voltage in the range of 50Hz-60Hz). The generation of an arc detected by the device (100) can be used for various purposes, such as blocking the current of the electrical circuit to prevent a fire caused by arc generation, or analyzing the degree of deterioration of the electrical circuit.

[0036] A device (100) according to one embodiment may be implemented as an AFCI (Arc Fault Circuit Breaker) and may detect the occurrence of an arc in an electrical circuit and interrupt the current in the electrical circuit based on the result of the detection. In addition, the device (100) implemented as an AFCI may be integrated with a leakage circuit breaker and / or an overload circuit breaker according to the prior art to perform both current interruption due to leakage and / or overload and current interruption due to arc occurrence.

[0037] According to the embodiments of the present disclosure described below, high-performance AFCI functions can be implemented by mounting additional modules on existing circuit breakers, thereby minimizing changes to the manufacturing process.

[0038] In one embodiment, the device (100) may include a power supply unit (110), an inference unit (120), and a blocking unit (130).

[0039] The power supply unit (110) is a circuit block that converts the AC power of an electrical circuit into DC power and supplies it to other components of the device (100), such as the inference unit (120) and / or the blocking unit (130). For example, the power supply unit (110) may include a rectifier element that rectifies the AC input, a smoothing capacitor that reduces ripple, a switching power circuit that lowers and stabilizes the voltage, a surge protection element that limits overvoltage / overcurrent in the event of an abnormality, and a fuse. Additionally, the power supply unit (110) may further include, but is not limited to, an AC input power line connected in series or in parallel to the supply line of the electrical circuit, a current transformer (CT) and / or zero current transformer (ZCT) for detecting current from the AC input power line, and a communication line for transmitting the signal obtained from these to the inference unit (120), etc.

[0040] In one embodiment, the power supply (110) may include a multi-stage voltage regulator to generate different levels of DC voltage required by different components such as a microcontroller, DSP, AI chip, and / or memory constituting the inference unit (120).

[0041] The inference unit (120) is a circuit block that receives power from the power supply unit (110), detects sensing signals such as voltage, current, and leakage current of an electrical circuit, infers whether an arc has occurred based on the detection result, and then outputs a blocking control signal to the blocking unit (130) according to the inference result. The inference unit (120) may be implemented as an electronic circuit module mounted on a single printed circuit board (PCB), may be formed as an add-on module that can be inserted inside a circuit breaker, or, if necessary, may be formed integrally on the same PCB as the power supply unit (110), etc.

[0042] The blocking unit (130) is a block that blocks the current of an electrical circuit by driving an opening / closing mechanism of the device (100) in response to a blocking control signal received from the inference unit (120). The blocking unit (130) may include a solenoid (131) that is linked to a mechanical trip mechanism and a solenoid control circuit (132) that controls the on / off of the current applied to the solenoid (131).

[0043] In one embodiment, the inference unit (120) may include a sensor unit (121), a control unit (122), and a calculation unit (123).

[0044] The sensor unit (121) can acquire sensor data for an electrical circuit equipped with the device (100). The sensor unit (121) may include at least one sensor used to measure current, voltage, resistance, or temperature, and may acquire current or voltage, etc. as sensor data. Here, the sensor data may include data acquired as an analog signal and / or data acquired as a digital signal.

[0045] For example, the sensor unit (121) may be configured to include, but is not limited to, a resistor voltage divider circuit for distributing line voltage, a current transformer for detecting line current, a current transformer for detecting leakage current, an analog filter for limiting the band of the sensing signal, and an isolation (or differential) amplifier for isolating (or amplifying) the detected signal.

[0046] In FIG. 1, the power supply unit (110) and the sensor unit (121) are shown as separate components, but at least a part of the sensor unit (121) (e.g., a video current transformer, etc.) may constitute the power supply unit (110).

[0047] Meanwhile, an example of the specific process by which the sensor unit (121) acquires sensor data will be described later with reference to FIG. 4, etc.

[0048] The control unit (122) is a block that determines whether to block based on an arc occurrence determination result provided by the calculation unit (123), or based on a combination of the arc occurrence determination result and sensor data collected by the sensor unit (121), and generates and outputs a control signal suitable for the blocking unit (130).

[0049] In one embodiment, the control unit (122) can control input and output for the operation unit (123). The control unit (122) may be implemented as a single MCU (Main Controller Unit; Microcontroller Unit), or it may be implemented by distinguishing between an input control unit that controls input to the operation unit (123) and an output control unit that controls output to the operation unit (123). For example, the input control unit may include an analog-to-digital converter for converting sensor data into a digital input and a communication unit for transmitting the digital input to the operation unit (123). Additionally, for example, the output control unit may include a communication unit that obtains a digital output from the operation unit (123) and a blocking signal generation unit that generates a blocking signal. In this case, the communication unit may be implemented as a serial communication circuit (e.g., UART, SPI, I2C, etc.) and a communication line (e.g., a pattern on a printed circuit board, a ribbon cable, etc.), but is not limited thereto.

[0050] Meanwhile, the control unit (122) may be implemented including a general-purpose processor, a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), etc., but is not limited thereto.

[0051] In one embodiment, the control unit (122) can generate a digital input based on sensor data. In this case, the sensor data may include various data regarding current, voltage, resistance and / or temperature, etc., for an electrical circuit.

[0052] For example, data regarding current in an electrical circuit may include data regarding the waveform of the current or specific frequency components of the current (e.g., high-frequency components, etc.), and data regarding voltage may include data regarding the waveform of the voltage or specific frequency components (e.g., high-frequency components, etc.), but is not limited thereto.

[0053] In addition, for example, data regarding resistance to an electrical circuit may include resistance or changes in resistance, and data regarding temperature may include temperature or changes in temperature, but are not limited thereto.

[0054] In one embodiment, the control unit (122) can generate a digital input by converting the entire sensor data into a digital form as is, or by converting preprocessed sensor data generated by preprocessing at least a part of the sensor data into a digital form.

[0055] In one embodiment, the control unit (122) may input a digital input configured based on sensor data for an electrical circuit to the calculation unit (123). In addition, in one embodiment, the control unit (122) may obtain a digital output of the calculation unit (123) corresponding to the digital input. At this time, the digital output may indicate whether an arc has occurred in the electrical circuit.

[0056] The operation unit (123) is a block that performs data processing and AI operations to determine whether an arc has occurred. The input of the operation unit (123) may include digital inputs processed by the control unit (122), such as voltage, current, and leakage current waveforms provided by the sensor unit (121), and the output of the operation unit (123) may include whether an arc has occurred calculated for each time interval (e.g., an arc determination signal, an arc occurrence probability value, an arc status code, etc.).

[0057] In one embodiment, the device (100) can detect the occurrence of an arc in an electrical circuit based on a neural network model. For example, the computation unit (123) can generate a digital output corresponding to a digital input based on a digital input received from the control unit (122) using a previously trained neural network model. In one embodiment, the computation unit (123) may include a cell array comprising a plurality of memory cells that store weights of the previously trained neural network model. At this time, the computation unit (123) can generate a digital output based on the digital input using the cell array.

[0058] In one embodiment, the cell array may be a crossbar array structure in which a memory cell (e.g., a variable resistor, a capacitor, etc.) is arranged at every intersection point where a plurality of row-direction lines and a plurality of column-direction lines intersect.

[0059] Meanwhile, in another embodiment, the operation unit (123) may be implemented in a structure including a non-volatile memory (e.g., flash memory, EEPROM, etc.) and / or a volatile memory (e.g., DRAM, SRAM, etc.) that stores the weights of a neural network model as digital values, and a processor that reads the weights stored in the memory and performs neural network operations. In this case, the operation unit (123) can generate a digital output corresponding to a digital input by having the processor exchange data with the memory and perform vector-matrix multiplication operations and activation function operations, etc., at the software or firmware level.

[0060] In one embodiment, the digital output may indicate whether an arc has occurred in the electric circuit. That is, the calculation unit (123) can generate a digital output by performing a calculation to predict the occurrence of an arc in the electric circuit based on a digital input regarding the electric circuit.

[0061] In one embodiment, the operation unit (123) may include, but is not limited to, a microcontroller (MCU), a digital signal processor (DSP), a processor or neural network accelerator specialized for AI computation, a non-volatile memory storing program code for controlling these processors, and a volatile memory storing sensing data and intermediate computation results.

[0062] The computation unit (123) can infer whether an arc has occurred by inputting a digital input to a pre-trained AI model (e.g., a neural network model) based on a large amount of training data. For example, the computation unit (123) receives a digital input provided by the control unit (122) at a predetermined sampling period, and, if necessary, performs one or more data processing operations on the digital input, such as filtering, normalization, frequency analysis, time-frequency conversion, and feature extraction, and then infers whether an arc has occurred using an AI model trained to perform an arc / non-arc classification task.

[0063] In one embodiment, the control unit (122) and the operation unit (123) may each be implemented as separate hardware performing individual functions. For example, the control unit (122) may be implemented as a separate logic IC, CPLD, FPGA, or simple digital circuit (flip-flop circuit, timer circuit, etc.) from the operation unit (123). As an example, the control unit (122) and the operation unit (123) may each be implemented as separate chips. For example, the control unit (122) may be implemented as an MCU chip, and the operation unit (123) may be implemented as a neuromorphic chip including a cell array.

[0064] In another embodiment, the control unit (122) and the operation unit (123) may be integrated into a single piece of hardware. For example, the control unit (122) may be implemented as a single chip and the operation unit (123) may be provided on the control unit (122) implemented as a chip as an operation module including a cell array, or the control unit (122) may be implemented as software or firmware within the same processor as the operation unit (123). In this case, unlike as illustrated in FIG. 1, the control unit (122) may be understood to include the operation unit (123). As an example, the control unit (122) may be implemented as an MCU chip equipped with an operation unit (123) implemented as an operation module including a cell array.

[0065] In one embodiment, the inference unit (120) may generate a cutoff signal based on the digital output of the operation unit (123). In this case, the cutoff signal may be a signal indicating that it is necessary to cut off the current of the electrical circuit as an arc occurs in the electrical circuit. For example, the control unit (122) may generate a cutoff signal based on the digital output obtained from the operation unit (123).

[0066] Meanwhile, the blocking unit (130) may include a solenoid (131) and a solenoid control circuit (132). In this case, the solenoid (131) is an electromagnetic driving element that drives a mechanical trip mechanism of the device (100) by moving a movable iron core or a plunger by means of a magnetic force generated when current flows through a coil. The solenoid (131) can induce a mechanical operation to open the circuit breaker contacts by means of a driving current supplied by the solenoid control circuit (132).

[0067] The solenoid control circuit (132) is a driving circuit that controls the on / off current flowing through the solenoid (131) to perform the tripping operation of the circuit breaker. The solenoid control circuit (132) can receive power from the power supply unit (110) to apply a driving current to the solenoid (131), and can receive a cutoff signal from the control unit (122) to control the solenoid (131) to drive a mechanical tripping mechanism.

[0068] For example, the solenoid control circuit (132) may include a switching element such as a FET, BJT, MOSFET, or IGBT connected between the DC power of the power supply unit (110) and the solenoid (131), a gate / base driving circuit for driving the switching element on / off, a flyback diode or surge absorber for absorbing surges caused by the back electromotive force of the solenoid (131), a current limiting circuit and a temperature protection circuit for preventing overcurrent and overheating, etc.

[0069] Figure 2 is an exemplary diagram illustrating the implementation of a neuromorphic chip.

[0070] Referring to FIG. 2, a previously learned neural network model (210) and a neural network device (220) in which the neural network model (210) is implemented can be seen.

[0071] The fact that the neural network model (210) has been trained means that the weights constituting each layer of the neural network model (210) have been determined by a large amount of training data. If the weights, which are the results of the training of the neural network model (210), are stored in a central cloud server, a cloud computing device using the neural network model (210) can communicate with the central cloud server to transmit input values ​​to the neural network model (210) and receive output values. In this case, even if the neural network model (210) is very complex or large-scale, the cloud computing device can use the output values ​​without any problems.

[0072] However, in the case where the neural network device (220) is an on-device computing device that processes data within the neural network device (220) itself without communicating with a central cloud server, the weights of the neural network model (210) determined through learning are stored in the neural network device (220), which is actual hardware, and specifically, can be stored in a plurality of memory cells constituting a cell array of the neural network device (220). In this case, the neural network device (220) can be implemented as a neuromorphic chip.

[0073] Neuromorphic chips are hardware that mimics human brain functions by creating circuits that imitate the shape of neurons. In other words, neuromorphic chips refer to any type of chip that mimics the structure of the nervous system. For example, neuromorphic chips can include CIM (computing in memory)-based AI chips. As an example, a neuromorphic chip can be implemented as an analog CIM-based AI chip configured to enable analog computation using analog signals such as voltage or current.

[0074] As another example, neuromorphic chips may be implemented as digital CIM-based AI chips or as Spiking Neural Network-based AI chips, but are not limited thereto.

[0075] Neuromorphic chips can be composed solely of the circuits necessary for neural network computation, offering advantages in terms of power, area, and speed. By mimicking the workings of the brain, neuromorphic chips allow structures connecting neurons and synapses to be configured in parallel.

[0076] The Von Neumann architecture, which is primarily adopted in existing computer architectures, processes data sequentially upon input, making it excellent for executing precisely written programs; however, it has problems such as limitations in power consumption and low efficiency in areas like pattern recognition and real-time recognition.

[0077] On the other hand, neuromorphic chips are not limited to digital methods that process data as 0s and 1s, but can also process data through analog operations using various analog states. The artificial neurons constituting neuromorphic chips can operate in an event-driven manner that does not require clock operation. Furthermore, neuromorphic chips can be used to efficiently process unstructured text, voice, and images that are difficult for conventional computers to intuitively recognize.

[0078] In one embodiment, when input data such as images, voice, or electromagnetic waves is input to a neuromorphic chip, a predetermined output data may be output from the neuromorphic chip through internal operations on the input data. At this time, the data input to the neuromorphic chip is not limited to the aforementioned images, voice, or electromagnetic waves, and may include various forms of data such as various signals, images, and text.

[0079] A neural network device (220) according to one embodiment may be implemented as an on-device AI chip. On-device AI refers to a technology that executes AI algorithms on a hardware device using on-device computing based on data generated by a system. AI processing is primarily carried out in cloud-based data centers requiring massive computing capacity, resulting in high server dependency. On the other hand, using on-device AI allows the execution of AI algorithm computations to be performed locally, thereby reducing dependency on the cloud (server) and consequently lowering communication costs. Furthermore, sensitive personal information is not transmitted to the cloud, thus protecting privacy. Therefore, by configuring the neuromorphic chip as an on-device AI chip, not only are cost reductions and security enhancements achieved, but a system with high responsiveness can also be implemented as computations are processed immediately within the same hardware.

[0080] Meanwhile, the state values ​​corresponding to each weight of the neural network model (210) can be very diverse (e.g., 128 states, etc.), and the memory cells of the cell array implemented in the neural network device (220) can be implemented as multibit memory cells that store state values ​​corresponding to the weights using multibits (e.g., 7 bits or 8 bits, etc.).

[0081] Meanwhile, various methods are being proposed to reduce the chip area and increase the accuracy and speed of computation when manufacturing the neural network device (220) in the form of a chip.

[0082] A computation unit (123) according to one embodiment of the present disclosure may include the neural network device (220) described above. In one embodiment, the computation unit (123) may include a neural network device (220) implemented as a neuromorphic chip, but is not limited thereto. Since rapid blocking is very important for arc detection, by implementing the computation unit (123) as an on-device AI chip, it is possible to respond to arc occurrence in a short period of time without being affected by network delays or communication failures.

[0083] FIGS. 3a and 3b are exemplary drawings for comparing a von Neumann structure and an in-memory computing structure.

[0084] Referring to Fig. 3a, the von Neumann architecture is a computer architecture proposed by John von Neumann, and is a stored-program computer architecture consisting of a typical three-level structure of main memory, central processing unit, and input / output device.

[0085] The von Neumann architecture can provide high versatility by changing only the software (programs) without modifying the hardware configuration (such as wiring) when changing tasks performed on a computing device. However, limitations arise in terms of computational speed and energy efficiency due to structural characteristics that require sequential instruction execution and repetitive data transfer between the computing unit and memory. This structural constraint is known as the 'von Neumann bottleneck' phenomenon.

[0086] To resolve the von Neumann bottleneck, alternatives such as the Harvard architecture, which separates memory into instruction and data storage areas, or the CIM architecture, which directly performs data operations as well as data storage in memory, are being proposed.

[0087] Referring to FIG. 3b, it can be seen that the in-memory computing structure includes memory having computing functions. The in-memory computing structure illustrated in FIG. 3b is composed of a processing unit (e.g., a processor, etc.) and memory having computing functions.

[0088] Unlike the conventional von Neumann architecture, where all data within memory is moved to the processing unit for computation, the in-memory computing architecture performs at least a portion of the computation within memory upon receiving an instruction from the processing unit and then transmits the resulting data to the processing unit. This eliminates the movement of large amounts of data, thereby effectively resolving the aforementioned von Neumann bottleneck. Additionally, it offers the advantage of significantly reduced power consumption.

[0089] Meanwhile, the CIM structure is a structure available for implementing an in-memory computing structure, representing a structure in which analog or digital operations are performed directly within the memory cell itself.

[0090] An apparatus (100) according to one embodiment of the present disclosure can perform a specific operation using a CIM-based AI chip based on a CIM structure. For example, the apparatus (100) can perform a CIM-based operation to derive the operation result of a neural network model using a CIM-based AI chip.

[0091] Since CIM-based AI chips can perform self-contained computations using memory cells without exchanging data with separate memory, they can eliminate the bottlenecks caused by data transfer between memory and the processing unit that occur in the traditional Von Neumann architecture. This enables CIM-based AI chips to achieve high performance and energy efficiency.

[0092] According to one embodiment, the computation unit (123) may be implemented as a CIM-based AI chip. For example, the computation unit (123) may be implemented as an analog CIM-based AI chip. As an example, the computation unit (123) may be implemented as a CIM-based AI chip that performs parallel computations through a cell array, and since data storage (e.g., weight storage, etc.) and data computation (e.g., vector-matrix multiplication, etc.) are performed integrally within the cell array itself, data transfer to a separate memory can be minimized. Through this, the computation unit (123) can have high energy efficiency.

[0093] A cell array constituting an operation unit (123) according to one embodiment may be composed of a plurality of memory cells capable of multi-bit implementation. That is, each memory cell included in the cell array may include multi-bit memory cells capable of multi-bit implementation.

[0094] For example, a cell array may be composed of memory cells capable of implementing 7 bits (128 analog memory states) or 8 bits (256 analog memory states). In this case, a memory cell capable of implementing n-bits may indicate that the memory cell can store any one of 2 to the power of n distinct state values.

[0095] Through this, unlike general CIM-based AI chips which exhibit problems such as increased power consumption or performance degradation as neural network models become more complex and the amount of data to be processed increases, the cell array constituting the computation unit (123) according to one embodiment of the present disclosure can perform processing of a vast amount of data with low power and high performance even during long-term use.

[0096] FIG. 4 is a diagram for schematically explaining the process of operation of a device for detecting arc generation according to one embodiment.

[0097] The device (400) illustrated in FIG. 4 is an example of the device (100) illustrated in FIG. 1. The first sensor unit (411), the second sensor unit (412), and the third sensor unit (413) illustrated in FIG. 4 may correspond to the sensor unit (121) illustrated in FIG. 1, and the control unit (420), the operation unit (430), and the blocking unit (440) illustrated in FIG. 4 may each correspond to the control unit (122), the operation unit (123), or the blocking unit (130) illustrated in FIG. 1.

[0098] Referring to FIG. 4, the first sensor unit (411), the second sensor unit (412), and the third sensor unit (413) may be used to collect sensor data. In one embodiment, the sensor data collected using the first sensor unit (411), the second sensor unit (412), and the third sensor unit (413) may include at least one of the alternating current, alternating voltage, and leakage current of an electric circuit. In one embodiment, the device (400) may include a first sensor unit (411) for acquiring the alternating current of an electric circuit, a second sensor unit (412) for acquiring the alternating voltage of an electric circuit, and a third sensor unit (413) for acquiring the leakage current of an electric circuit.

[0099] Meanwhile, the device (400) may include at least one sensor unit classified into fewer or more numbers than shown in FIG. 4. For example, the device (400) may further include a fourth sensor unit (not shown) for collecting sensor data regarding resistance and / or a fifth sensor unit (not shown) for collecting sensor data regarding temperature.

[0100] In one embodiment, the first sensor unit (411) is connected to the input power line (401) of the electrical circuit and can measure the waveform of the alternating current flowing through the input power line (401). The first sensor unit (411) according to one embodiment may include at least one current sensor implemented as a current transformer, but is not limited thereto. The waveform of the alternating current measured by the first sensor unit (411) can be transmitted to the control unit (420) in real time.

[0101] In addition, in one embodiment, the second sensor unit (412) is connected to the input power line (401) and input neutral line (402) of the electric circuit to measure the waveform of the alternating voltage applied to the electric circuit. The second sensor unit (412) according to one embodiment may include at least one voltage sensor, such as a resistive sensor or a capacitive sensor, but is not limited thereto. The waveform of the alternating voltage measured by the second sensor unit (412) can be transmitted to the control unit (420) in real time.

[0102] Additionally, in one embodiment, the third sensor unit (413) is connected to the input power line (401) and output power line (403) of the electrical circuit, and to the input neutral line (402) and output neutral line (404) to measure the waveform of the leakage current generated in the electrical circuit. The third sensor unit (413) according to one embodiment may include, but is not limited to, a current transformer. The waveform of the leakage current measured by the third sensor unit (413) can be transmitted to the control unit (420) in real time.

[0103] In one embodiment, the control unit (420) can configure a digital input based on sensor data for an electrical circuit collected in real time. For example, the control unit (420) can receive sensor data from a first sensor unit (411), a second sensor unit (412), and a third sensor unit (413).

[0104] Subsequently, the control unit (420) can configure the sensor data into a single digital input. For example, the control unit (420) can configure a digital input for the operation unit (430) by converting a waveform signal into a digital signal. Subsequently, the control unit (420) can input the digital input configured based on the sensor data for the electrical circuit to the operation unit (430).

[0105] At this time, the digital input configured by the control unit (420) may correspond to a constant time period set based on the period of the AC power applied to the electric circuit. For example, the digital input corresponding to the first time point may represent the waveform of the AC current, the waveform of the AC voltage and the waveform of the leakage current, the high frequency of the AC current, and the high frequency of the AC voltage for the time interval corresponding to the first time point. Specifically, the constant time period set based on the period of the AC power may represent a half period or a full period of the AC power, but is not limited thereto.

[0106] Subsequently, the control unit (420) can obtain a digital output of the operation unit (430) corresponding to the digital input. For example, the operation unit (430) can convert the received digital input into an analog input for the crossbar array using a digital-to-analog converter, generate an analog output as a result of operation on the analog input, and convert the analog output of the crossbar array into a digital output using an analog-to-digital converter.

[0107] In one embodiment, the digital output may indicate whether an arc has occurred in the electrical circuit. For example, the operation unit (430) may include a cell array that stores weights of a neural network model that predicts arc occurrence based on input data regarding the electrical circuit, and since the digital output can be generated as a prediction result of arc occurrence using the cell array, the digital output may indicate whether an arc has occurred in the electrical circuit.

[0108] For example, if the digital input is configured for one cycle of the alternating current power applied to the electric circuit, the calculation unit (430) generates a digital output of the predicted result of arc occurrence based on sensor data collected during the time interval of one cycle, so the digital output can indicate whether an arc occurred during that time interval.

[0109] Subsequently, the control unit (420) can generate a cutoff signal based on the digital output. In one embodiment, the control unit (420) can determine whether to generate a cutoff signal based on the digital output. The control unit (420) can generate a cutoff signal based on the digital output using a preset standard, and the preset standard may be set considering the possibility of an accident, such as a fire, occurring according to the size and frequency of an arc generated in the electrical circuit.

[0110] At this time, the digital output used to determine whether the control unit (420) generates a blocking signal may be a single digital output corresponding to a single digital input, but is not limited thereto. For example, the control unit (420) may determine whether to generate a blocking signal based on a plurality of digital outputs corresponding to each of a plurality of digital inputs.

[0111] In one embodiment, the control unit (420) can generate a blocking signal and apply the blocking signal to a blocking unit (440) that blocks the current of an electrical circuit based on the blocking signal. Through this, accidents such as fire caused by an arc can be prevented.

[0112] Meanwhile, the sensor data received by the control unit (420) may include preprocessed sensor data. For example, the device (100) may further include at least one amplifier. For example, the device (100) may include a first amplifier that amplifies an alternating current obtained through the first sensor unit (411), a second amplifier that amplifies an alternating voltage obtained through the second sensor unit (412), and a third amplifier that amplifies a leakage current obtained through the third sensor unit (413).

[0113] In one embodiment, the digital input may be configured based on sensor data preprocessed using at least one amplifier. For example, the first amplifier, the second amplifier, and the third amplifier may preprocess the sensor data by amplifying the waveform of the alternating current, the waveform of the alternating voltage and the waveform of the leakage current, the high frequency of the alternating current, the high frequency of the alternating voltage, etc.

[0114] Sensor data collected by at least one of the first sensor unit (411), the second sensor unit (412), and the third sensor unit (413) may be a signal that is too small or too large to predict arc occurrence. By converting the sensor data to an appropriate scale through preprocessing using at least one amplifier, the control unit (420) can obtain a signal waveform of an effective and appropriate size for predicting arc occurrence as preprocessed sensor data.

[0115] Additionally, in one embodiment, the preprocessed sensor data may include a plurality of alternating currents amplified to different magnitudes. For example, the device (100) may include a multi-amplifier. As an example, the first amplifier may be implemented as a multi-amplifier that converts an alternating current into a plurality of alternating currents amplified to different magnitudes.

[0116] In one embodiment, the first amplifier can acquire an alternating current from the first sensor unit (411) and generate a preset number of amplified alternating currents. In one embodiment, the first amplifier may have an input channel and a plurality of output channels, and may output a plurality of amplified alternating currents by amplifying the alternating current acquired through the input channel to a level corresponding to each of the plurality of output channels.

[0117] For example, the first amplifier can generate a plurality of alternating currents amplified to different sizes, such as an average of 1A, an average of 5A, an average of 30A, and an average of 500A. As another example, the first amplifier can generate a plurality of alternating currents amplified to different sizes, such as a 1x, 5x, 30x, and 500x scale. Subsequently, the first amplifier can transmit the generated alternating currents to the control unit (420).

[0118] Through this, the control unit (420) can configure a digital input that reflects all of the various ranges of current waveforms, and can configure a digital input that reflects all of the characteristics of microcurrents and / or large currents that are not adequately represented by only the fixed scale of a single current channel. In addition, as a result, the accuracy of the digital output can be improved, thereby reducing the possibility of false arc detection.

[0119] FIG. 5 is a drawing illustrating a device for detecting arc generation according to one embodiment.

[0120] The device (500) illustrated in FIG. 5 is an example of implementing the device (100) illustrated in FIG. 1, etc. The device (500) may include a terminal portion (510) configured to allow an electrical circuit to be connected to detect arc generation.

[0121] An input power line, an input neutral line, an output power line, and an output neutral line may be connected to the terminal section (510). For example, the terminal section (510) may include an input terminal section including a connection terminal (not shown) for an input power line and a connection terminal (not shown) for an input neutral line, and may include an output terminal section including a connection terminal (511) for an output power line and a connection terminal (512) for an output neutral line. In the device (500) illustrated in FIG. 5, the input terminal section may be provided on the opposite surface of the output terminal section.

[0122] In one embodiment, each connection terminal constituting the terminal portion (510) may be implemented as an open insertion port, but is not limited thereto.

[0123] Through this, the terminal section (510) can connect the input power line, input neutral line, output power line, and output neutral line in a one-to-one correspondence without significantly changing the wiring structure of the existing electrical circuit, so it is easy to install the device (500) inline in the existing wiring path at the site, and can reduce miswiring and short-circuit accidents between different lines.

[0124] Additionally, an operating lever (520) for switching the open / closed state may be provided on one side of the device (500) so as to be rotatable. In one embodiment, the operating lever (520) may protrude in the +z direction and may switch the current open / closed state of the device (500) by rotating the y-axis as a rotation axis according to the user's operation.

[0125] Additionally, the device (500) may include a housing portion (530) that accommodates a power supply portion, an inference portion, and a cutoff portion. In one embodiment, the housing portion may include a second housing member (532) that surrounds the device (500) with its upper and lower portions (+z direction and -z direction) open, a first housing member (531) coupled to the upper portion of the second housing member (532), and a third housing member (not shown) coupled to the lower portion of the second housing member (532).

[0126] Through this, a simple assembly process can be implemented in which the second housing member (532) forms an integrated side wall frame surrounding the side of the device (500), and a circuit module forming an internal current path is inserted into the second housing member (532) and then the first housing member (531) and / or the third housing member (not shown) are fastened together, so the mold structure of the housing member can be simplified and the convenience of maintenance can be improved.

[0127] In one embodiment, the first housing member (531) may have a lever opening formed therein through which at least a portion of the operating lever (520) protrudes.

[0128] FIG. 6 is a drawing illustrating the internal structure of a device for detecting arc generation according to one embodiment, and FIGS. 7 to 8 are drawings illustrating a part of the internal structure of a device for detecting arc generation shown in FIG. 6.

[0129] More specifically, FIG. 6 is a perspective view showing the internal structure of the device (500) by removing the housing portion (530) surrounding the device (500) shown in FIG. 5, FIG. 7 is a perspective view showing a current path electrically connecting the input terminal portion and the output terminal portion among the internal structure of the device (500), and FIG. 8 is a plan view looking down at the said current path from the +z direction. The x-axis shown in FIG. 6, etc. may represent an axis parallel to the length of the device (500), the y-axis may represent an axis parallel to the width of the device (500), and the z-axis may represent an axis parallel to the height of the device (500), but is not limited thereto.

[0130] Referring to FIGS. 6 to 8, a main circuit conductive path through which an input power line, an input neutral line, an output power line, and an output neutral line pass, and a printed circuit board and a sensor connected thereto may be arranged inside the housing portion (530) of the device (500).

[0131] As an example, the conductive path on the output terminal side of the device (500) may include a first conductive path (601) and a second conductive path (602), and the conductive path on the input terminal side of the device (500) may include a third conductive path (603) and a fourth conductive path (604).

[0132] At this time, the first conduction path (601) and the second conduction path (602) may each correspond to the input power line (401) or input neutral line (402) described above with reference to FIG. 4, etc., and the third conduction path (603) and the fourth conduction path (604) may each correspond to the output power line (403) or output neutral line (404) described above with reference to FIG. 4, etc. Additionally, the first conduction path (601) and the second conduction path (602) may each correspond to the output power line (403) or output neutral line (404) described above with reference to FIG. 4, etc., and the third conduction path (603) and the fourth conduction path (604) may each correspond to the input power line (401) or input neutral line (402) described above with reference to FIG. 4, etc.

[0133] In one embodiment, the output terminal side conductive path (601, 602) and the input terminal side conductive path (603, 604) can be bent near the central area and each connected to a video current transformer (not shown) placed in the central area.

[0134] In one embodiment, a portion of the first conductive path (601) corresponding to the output power line may be formed as at least a portion of the sensor unit (611). The sensor unit (611) may acquire sensor data, such as alternating current and voltage, by measuring the corresponding portion.

[0135] Additionally, a third PCB (630) extending in the xy plane may be disposed in the -z direction of the output terminal side conductive path (601, 602) and the input terminal side conductive path (603, 604), and at least one PCB extending in the yz plane may be disposed in the +z direction of the third PCB (630).

[0136] For example, a first PCB (610) and a second PCB (620) extending in the yz plane may be arranged in the +z direction of the third PCB (630). In one embodiment, a sensor unit (611) excluding an image current transformer (not shown) may be formed on the first PCB (610), a power supply unit and a cutoff unit may be formed on the second PCB (620), and a calculation unit may be formed on the third PCB (630). Additionally, in one embodiment, a control unit may be formed distributed on two or more of the first PCB (610), the second PCB (620), and the third PCB (630).

[0137] For example, sensor data collected by the sensor unit (611) on the first PCB (610) can be preprocessed through a control unit formed on the first PCB (610), the second PCB (620), and the third PCB (630) and input in the form of a digital input to a calculation unit formed on the third PCB (630), and according to the digital output from the calculation unit, the control unit can provide a blocking signal to a blocking unit on the second PCB (620). At this time, the blocking signal can induce the solenoid (621) to open the blocking contact, and when the blocking contact is opened, the on / off state of the operating lever (520) receiving power from the blocking contact driving member can be switched.

[0138] FIG. 9 is an example of how a device for detecting arc generation operates.

[0139] Referring to FIG. 9, in step 910, the device may input a digital input configured based on sensor data for an electrical circuit to a processing unit. For example, the device may include a control unit, and the control unit may input the digital input to the processing unit.

[0140] In one embodiment, the operation unit may include a cell array comprising a plurality of memory cells that store weights of a previously trained neural network model.

[0141] In one embodiment, the device may include a sensor unit. A sensor unit according to one embodiment may acquire sensor data for an electrical circuit. In one embodiment, the sensor data may include alternating current, alternating voltage and leakage current, alternating current high frequency, and alternating voltage high frequency. For example, the sensor unit may include a first sensor unit for acquiring alternating current, a second sensor unit for acquiring alternating voltage, and a third sensor unit for acquiring leakage current.

[0142] In one embodiment, the digital input may be configured based on sensor data preprocessed using at least one amplifier. For example, the device may include at least one amplifier, and the at least one amplifier may preprocess the sensor data. Additionally, in one embodiment, the preprocessed sensor data may include a plurality of alternating currents amplified to different magnitudes. For example, the device may include a multi-amplifier, and the multi-amplifier may convert the alternating current into a plurality of alternating currents amplified to different magnitudes.

[0143] In one embodiment, the operation unit may convert a digital input into an analog input and input it to a cell array. For example, the operation unit may further include a digital-to-analog converter that converts the digital input into an analog input and inputs it to a cell array.

[0144] In step 920, the device can obtain a digital output of an arithmetic unit corresponding to a digital input. For example, a control unit can obtain a digital output of an arithmetic unit corresponding to a digital input. At this time, the digital output may indicate whether an arc has occurred in the electrical circuit.

[0145] In one embodiment, the operation unit can convert the analog output of the cell array into a digital output. For example, the operation unit may further include an analog-to-digital converter that converts the analog output of the cell array into a digital output.

[0146] In step 930, the device can generate a cutoff signal based on the digital output of the arithmetic unit. For example, the control unit can generate a cutoff signal based on the digital output of the arithmetic unit. In this case, the digital output of the arithmetic unit may indicate whether an arc has occurred in the electrical circuit.

[0147] FIGS. 10 and 11 are side views illustrating the internal structure of a device for detecting arc generation according to one embodiment.

[0148] Referring to FIGS. 10 and 11, the device may include a sensor unit (1001), a power supply unit (1002), a calculation unit (1003), and a blocking unit (1004). In one embodiment, the device may include a first PCB (1010) equipped with a sensor unit (1001), a second PCB (1020) equipped with a power supply unit (1002) and a blocking unit (1004), and a third PCB (1030) equipped with a calculation unit (1003).

[0149] As described above with reference to FIG. 4, etc., the sensor unit (1001) may include at least one of a first sensor unit for measuring alternating current of an electrical circuit equipped with a device, a second sensor unit for measuring alternating voltage, and a third sensor unit for measuring leakage current.

[0150] Meanwhile, the power supply unit (1002) can supply driving power for driving at least one component constituting the device, such as the inference unit (120) and / or the blocking unit (130). For example, the power supply unit (1002) may include an AC-DC converter that converts AC power into DC driving power.

[0151] In addition, as described above with reference to FIG. 4, etc., the operation unit (1003) according to one embodiment may include a digital-to-analog converter, a crossbar array including a cell array, and an analog-to-digital converter.

[0152] Additionally, the blocking unit (1004) may include a solenoid and a solenoid control circuit that perform a blocking operation.

[0153] The direction in which the first PCB (1010) and the second PCB (1020) extend may intersect with the direction in which the third PCB (1030) extends. In one embodiment, the first PCB (1010) and the second PCB (1020) may be connected perpendicularly to the third PCB (1030). For example, the first PCB (1010) and the second PCB (1020) may each be connected perpendicularly to the third PCB (1030) so as to be parallel to each other. That is, the first PCB (1010) and the second PCB (1020) may be arranged side by side.

[0154] In one embodiment, the sensor portion (1001) may be placed on one side of the first PCB (1010) opposite to the second PCB (1020). That is, the first PCB (1010) may be provided between the sensor portion (1001) and the second PCB (1020). Additionally, the first PCB (1010) and the second PCB (1020) may be spaced apart by a predetermined gap (1040). For example, the predetermined gap (1040) may be designed to be in the range of 5-15 mm, but may be changed as needed, such as for specifications.

[0155] Through this, the sensor unit (1001) can be separated from the power supply unit (1002) by a certain distance, and air insulation breakdown phenomena such as switching noise or instantaneous overvoltage caused by the operation of the switching circuit of the power supply unit (1002) can be prevented, and sensor data can be measured stably.

[0156] Meanwhile, in one embodiment, the operation unit (1003) may be placed on one side of the third PCB (1030) opposite to the power supply unit (1002).

[0157] Through this, the influence of switching noise or momentary overvoltage generated in the power supply unit (1002) on the communication and neural network operations of the operation unit (1003) can be minimized, so the operation unit (1003) can stably exchange digital input and output with at least one other component in the device and can perform neural network operations based on analog input and output.

[0158] Additionally, the blocking unit (1004) can generate a relatively large magnetic field by means of a solenoid, and the magnetic field can cause distortion in the measurement of the sensor unit (1001), such as a current sensor.

[0159] In one embodiment, the blocking portion (1004) may be disposed on one side of the second PCB (1020) opposite to the sensor portion (1001). For example, the second PCB (1020) may be provided between the blocking portion (1004) and the sensor portion (1001). Additionally, for example, the first PCB (1010) and the second PCB (1020) may be provided between the blocking portion (1004) and the sensor portion (1001), spaced apart by a predetermined gap (1040).

[0160] Through this, the first PCB (1010) and the second PCB (1020) can provide a shielding effect, minimize the effect of the magnetic field caused by the blocking part (1004) on the sensor part (1001), and maximize the measurement performance of the sensor part (1001).

[0161] FIG. 12 is an exemplary drawing for explaining a blocking member according to one embodiment.

[0162] Referring to FIG. 12, the blocking unit (1200) may include a solenoid (1210). The solenoid (1210) may drive a circuit breaker contact driving member that opens and closes the circuit breaker contacts, and the blocking unit (1200) may include a solenoid control circuit for controlling the driving of the solenoid (1210). At this time, the solenoid control circuit may include a field effect transistor (FET) (1220).

[0163] According to the prior art, a silicon controlled rectifier was used to control the control operation of the circuit breaker contact driving member of the solenoid (1210). However, the silicon controlled rectifier has the problem that the required power is fixed to the output power line, and once it starts operating, it can only stop operating when the power supply to the load is cut off, which causes malfunctions. Additionally, there is a problem that it poses a risk of damage and fire in the event of reverse wiring.

[0164] According to one embodiment, the blocking unit (1200) may be implemented by including a solenoid (1210) and a field-effect transistor (1220) that controls the on / off of the current applied to the blocking contact driving member through the solenoid (1210).

[0165] Safety against malfunction can be ensured by using a field-effect transistor (1220) that allows for easy on-off control, and the connecting line (1201) is a wiring for selectively connecting one end of the solenoid (1210) to either an input power line or an output power line, and since the input power line or the output power line can be freely selected using the connecting line (1201), an efficient layout design of the device can be made possible.

[0166] Unless explicitly stated otherwise, the steps constituting the method according to the present disclosure may be performed in a suitable order. The present disclosure is not necessarily limited by the order in which the steps are described. The use of any examples or exemplary terms (e.g., etc.) in the present disclosure is merely for the purpose of describing the present disclosure in detail and, unless limited by the claims, the scope of the present disclosure is not limited by such examples or exemplary terms. Furthermore, those skilled in the art will understand that various modifications, combinations, and changes may be made according to design conditions and factors within the scope of the claims or equivalents to which they are added.

[0167] Accordingly, the scope of the present disclosure should not be limited to the embodiments described above, and all scopes equivalent to or equivalently modified from the claims set forth below, as well as the claims set forth below, shall be considered to fall within the scope of the scope of the present disclosure.

Claims

Claim 1 A device for detecting arc generation, comprising: a first PCB having at least a portion of a sensor unit for acquiring sensor data for an electrical circuit to be detected for arc generation; a second PCB having a power supply unit for converting AC power of the electrical circuit into DC power and a blocking unit including a solenoid; The device comprises: a third PCB having a processing unit that receives a digital input configured based on the sensor data and generates a digital output corresponding to the digital input; wherein the digital output indicates whether an arc has occurred in the electrical circuit; the first PCB and the second PCB are spaced apart at a predetermined distance and arranged parallel to each other on one side of the third PCB such that the direction in which each extends intersects the direction in which the third PCB extends, and the predetermined distance has a range of 5 mm to 15 mm; the sensor unit is disposed on one side of the first PCB opposite to the second PCB; the blocking unit is disposed on one side of the second PCB opposite to the first PCB; and the processing unit is disposed on one side of the third PCB opposite to the first PCB and the second PCB. Claim 2 delete Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 delete Claim 7 The device according to claim 1, wherein the blocking unit further comprises a field-effect transistor that controls the solenoid. Claim 8 delete Claim 9 In claim 1, the device wherein the operation unit generates the digital output based on the digital input using a previously trained neural network model. Claim 10 delete Claim 11 A method for detecting arc generation, comprising: a step of inputting a digital input configured based on sensor data for an electrical circuit into a processing unit; and a step of obtaining a digital output of the processing unit corresponding to the digital input. A method comprising the step of generating a blocking signal based on the digital output; wherein the digital output indicates whether an arc has occurred in the electrical circuit, and the first PCB and the second PCB are each arranged parallel to each other and spaced apart at a predetermined interval on one side of the third PCB having the calculation unit such that the direction in which they extend intersects the direction in which the third PCB extends, wherein the first PCB is provided with at least a part of a sensor unit for acquiring sensor data, and the second PCB is provided with a power supply unit for converting the AC power of the electrical circuit into DC power and a blocking unit including a solenoid, wherein the predetermined interval has a range of 5 mm to 15 mm, the sensor unit is arranged on one side of the first PCB opposite to the second PCB, the blocking unit is arranged on one side of the second PCB opposite to the first PCB, and the calculation unit is arranged on one side of the third PCB opposite to the first PCB and the second PCB.

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