Circuit board and manufacturing method thereof

Abstract

A circuit board according to an embodiment comprises an insulating layer, a conductive pad located on the insulating layer, a plating lead line located on the insulating layer and connected to the conductive pad, a solder resist layer located on the insulating layer and having a first opening that overlaps with the conductive pad and a second opening spaced apart from the first opening, wherein the plating lead line extends from the conductive pad to one side wall of the second opening, and the thickness of the second portion of the insulating layer that overlaps with the second opening is thinner than the thickness of the first portion of the insulating layer that overlaps with the first opening.

Description

Technology Field

[0001] The present disclosure relates to a circuit board and a method for manufacturing the same. Background Technology

[0002] When manufacturing a circuit board, any plated connection wire is connected to a conductive pad to proceed with plating on the surface of the conductive pad, and a process called etch back is performed to separate the plated connection wire before electrical inspection.

[0003] Dry film masking or LPR ink masking is used in the etch back process, but the manufacturing process is complex and there are limitations on the pattern design of the circuit board.

[0004] In addition, in the photosensitive film masking process or photosensitive ink masking process, there is a high possibility that process issues will occur due to residues of the photosensitive film or photosensitive ink. The problem to be solved

[0005] The embodiments are intended to provide a circuit board and a method for manufacturing the same, which can simplify the manufacturing process and minimize the occurrence of process issues.

[0006] However, the problems that the embodiments aim to solve are not limited to the problems described above and can be expanded in various ways within the scope of the technical ideas included in the embodiments. means of solving the problem

[0007] A circuit board according to an embodiment comprises an insulating layer, a conductive pad located on the insulating layer, a plating lead line located on the insulating layer and connected to the conductive pad, a solder resist layer located on the insulating layer and having a first opening that overlaps with the conductive pad and a second opening spaced apart from the first opening, wherein the plating lead line extends from the conductive pad to one side wall of the second opening, and the thickness of the second portion of the insulating layer that overlaps with the second opening is thinner than the thickness of the first portion of the insulating layer that overlaps with the first opening.

[0008] The above plating inlet line may not overlap with the above second opening in a planar manner.

[0009] The insulating layer includes a first surface and a second surface facing each other, and the height of the first surface of the second part of the insulating layer relative to the second surface of the insulating layer may be lower than the height of the first surface of the first part of the insulating layer.

[0010] The surface roughness of the second portion of the insulating layer may be greater than the surface roughness of the first portion of the insulating layer.

[0011] One end of the above-mentioned plating line may be located on the same plane as one side wall of the above-mentioned second opening.

[0012] It further includes an auxiliary pad covering the above-mentioned conductive pad, and the auxiliary pad may overlap with the first opening.

[0013] The above auxiliary pad may include a plating layer.

[0014] In addition, the method for manufacturing a circuit board according to an embodiment comprises forming a plated connection wire and a conductive pad connected to the plated connection wire on an insulating layer, forming a solder resist layer having a first opening that overlaps with the conductive pad on the insulating layer, forming a second opening by removing a portion of the solder resist layer that overlaps with the plated connection wire using a laser processing process, and forming a plated lead wire by removing a portion of the plated connection wire that overlaps with the second opening using the laser processing process.

[0015] The thickness of the second portion of the insulating layer overlapping with the second opening may be formed to be thinner than the thickness of the first portion of the insulating layer overlapping with the first opening.

[0016] Forming the above plating inlet line can remove a portion of the plating connection wiring that is not directly connected to the above conductive pad.

[0017] The above-mentioned plated connecting wires and the above-mentioned conductive pads can be formed by a photolithography process.

[0018] The surface roughness of the second portion of the insulating layer may be formed to be greater than the surface roughness of the first portion of the insulating layer.

[0019] One end of the above-mentioned plating line may be located on the same plane as one side wall of the above-mentioned second opening.

[0020] After forming the second opening using the above laser processing process, a portion of the plated connecting wire can be removed.

[0021] Using the above laser processing process, the second opening can be formed while simultaneously removing a portion of the plated connecting wire.

[0022] It further includes forming an auxiliary pad that covers the conductive pad, and the auxiliary pad can be formed using a plating process that applies an electrical signal to the plating connection wiring and the conductive pad. Effects of the invention

[0023] According to the embodiments, since the plated connecting wires can be cut and electrically separated using a laser processing process, it is not necessary to use a separate photosensitive film or photosensitive ink to separate the plated connecting wires during the etch-back process, thereby simplifying the manufacturing process. Accordingly, the manufacturing cost of the circuit board can be reduced.

[0024] In addition, since no separate photosensitive film or photosensitive ink is used, the generation of residue is prevented, thereby minimizing process issues such as the plating connection wiring not separating.

[0025] However, it is evident that the effects of the embodiments are not limited to the effects described above and can be extended in various ways without departing from the spirit and scope of the present invention. Brief explanation of the drawing

[0026] FIG. 1 is a plan view of a circuit board according to one embodiment. Figure 2 is a cross-sectional view taken along II-II' of Figure 1. Figure 3 is a cross-sectional view taken along III-III' of Figure 1. FIG. 4 is a plan view illustrating one step of a method for manufacturing a circuit board according to one embodiment. Figure 5 is a cross-sectional view taken along V-V' of Figure 4. Figure 6 is a plan view illustrating the next step of Figure 4. Figure 7 is a cross-sectional view taken along VII-VII' of Figure 6. Figure 8 is a plan view illustrating the next step of Figure 6. FIG. 9 is a cross-sectional view taken along IX-IX' of FIG. 8. Figure 10 is a plan view illustrating the next step of Figure 8. FIG. 11 is a cross-sectional view taken along XI-XI' of FIG. 10. FIG. 12 is a cross-sectional view illustrating one step of a method for manufacturing a circuit board according to another embodiment. Specific details for implementing the invention

[0027] Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings so that those skilled in the art can easily implement the present invention. The present invention may be embodied in various different forms and is not limited to the embodiments described herein.

[0028] To clearly explain the present invention, parts unrelated to the explanation have been omitted, and the same reference numerals are used for identical or similar components throughout the specification.

[0029] In addition, the attached drawings are intended only to facilitate understanding of the embodiments disclosed in this specification, and the technical concept disclosed in this specification is not limited by the attached drawings; it should be understood that all modifications, equivalents, and substitutions included within the concept and technical scope of the present invention are included.

[0030] Furthermore, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, and thus the present invention is not necessarily limited to what is illustrated. Thicknesses have been enlarged in the drawings to clearly represent various layers and regions. Additionally, for convenience of explanation, the thickness of some layers and regions has been exaggerated in the drawings.

[0031] Furthermore, when it is said that a part, such as a layer, membrane, region, or plate, is "on" or "on" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when it is said that a part is "directly above" another part, it means that there is no other part in between. Also, saying that a part is "on" or "on" a reference part means that it is located above or below the reference part, and does not necessarily mean that it is located "on" or "on" in the direction opposite to gravity.

[0032] Furthermore, throughout the specification, when a part is described as "including" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.

[0033] Additionally, throughout the specification, "planar" means when the subject part is viewed from above, and "cross-sectional" means when the cross-section obtained by vertically cutting the subject part is viewed from the side.

[0034] Furthermore, throughout the specification, when the term "connected" is used, it does not mean only that two or more components are directly connected, but may also mean that two or more components are indirectly connected through other components, that they are connected not only physically but also electrically, or that they are a single unit although referred to by different names depending on their location or function.

[0035] Various embodiments and variations are described in detail below with reference to the drawings.

[0036] Referring to FIGS. 1 to 3, a circuit board according to one embodiment will be described.

[0037] FIG. 1 is a plan view of a circuit board according to one embodiment, FIG. 2 is a cross-sectional view taken along II-II' of FIG. 1, and FIG. 3 is a cross-sectional view taken along III-III' of FIG. 1.

[0038] As illustrated in FIGS. 1 to 3, a circuit board according to one embodiment includes an insulating layer (100), circuit wiring (200), conductive pads (300), plating input lines (400), a solder resist layer (500), and auxiliary pads (600).

[0039] The insulating layer (100) may include a thermosetting resin such as epoxy resin or polyimide, a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), or polyvinyl chloride (PVC), or a composite resin such as prepreg in which reinforcing materials such as glass fiber or inorganic filler are impregnated therewith. In this embodiment, the insulating layer (100) includes BT resin, which is a type of thermosetting resin and includes bismaleimide and triazine resins, but is not necessarily limited thereto and various materials are possible.

[0040] The insulating layer (100) may include a first surface (100d) and a second surface (100u) facing each other. In this embodiment, with respect to the Z-axis direction, the first surface may be a lower surface (100d) and the second surface may be an upper surface (100u).

[0041] The circuit wiring (200) is located on the insulating layer (100) and can transmit electrical signals. In this embodiment, a via hole is shown as an example of the circuit wiring (200), but it is not necessarily limited thereto, and circuit wiring of various structures is possible.

[0042] A conductive pad (300) is positioned on an insulating layer (100) and can be connected to external wiring (not shown). Electrical signals from a circuit board can be transmitted and received with an external electronic component (not shown) using the conductive pad (300). The conductive pad (300) can overlap with a first opening (OH1). The conductive pad (300) may include a conductive material such as copper (Cu), gold (Au), or silver (Ag). The width of the conductive pad (300) may be wider than the width of the plated lead wire (400) to facilitate easy contact with the external wiring.

[0043] The plating input line (400) is positioned on the insulating layer (100) and can plating the conductive pad (300) by transmitting an electrical signal to the conductive pad (300).

[0044] These plating input lines (400) may include conductive materials such as copper (Cu), gold (Au), and silver (Ag).

[0045] The solder resist layer (500) is located on the lower surface (100d) and upper surface (100u) of the insulating layer (100) and can cover the circuit wiring (200) and the plating input wire (400). The solder resist layer (500) may include an insulating material such as solder resist.

[0046] The solder resist layer (500) may have a first opening (OH1) and a second opening (OH2) spaced apart from each other. The first opening (OH1) may be formed by a photolithography process, and the second opening (OH2) may be formed by a laser processing process. The upper surface (100u) of the insulating layer (100) may be exposed by these first opening (OH1) and second opening (OH2).

[0047] The first opening (OH1) may overlap with the planar conductive pad (300). At this time, the upper surface (100u) of the insulating layer (100) may be exposed in the portion of the first opening (OH1) that does not overlap with the conductive pad (300).

[0048] One end (400a) of the plating inlet line (400) may be located on the same plane as one side wall of the second opening (OH2). The other end (400b) of the plating inlet line (400) is directly connected to the conductive pad (300) and may be formed integrally with the conductive pad (300).

[0049] Since the plating lead line (400) is cut at the second opening (OH2), the second opening (OH2) does not overlap with the first wiring (410) and the second wiring (420) in a planar manner. Therefore, the plating lead line (400) can be extended from the conductive pad (300) to one side wall of the second opening (OH2).

[0050] A solder resist layer (500) can be patterned using a laser processing process to form a second opening (OH2), and the plated connecting wire (40, see FIG. 12) below the second opening (OH2) can be removed. That is, in an etch-back process to separate the plated connecting wire (40) before electrical inspection, a portion of the plated connecting wire (40) can be removed using a laser processing process to electrically separate it.

[0051] In this embodiment, a portion of the plated connecting wire (40) can be removed using a laser processing process without using a separate photosensitive film or photosensitive ink to block the second opening (OH2).

[0052] At this time, since the laser (L, see FIG. 11) is capable of anisotropic etching, the solder resist layer (500) and the plating connection wire (40) can be etched with the same width. That is, when the solder resist layer (500) and the plating connection wire (40) are etched with an etching solution that performs isotropic etching, the plating connection wire (40) located below the solder resist layer (500) may be over-etched. Therefore, the width of the plating connection wire (40) being etched may be greater than the width of the solder resist layer (500) being etched. However, in this embodiment, since the solder resist layer (500) and the plating connection wire (40) are etched using a laser (L), the width of the solder resist layer (500) being etched and the width of the plating connection wire (40) being etched may be the same. Accordingly, one end (400a) of the plating inlet line (400) may be located on the same plane as one side wall of the second opening (OH2). Here, one side wall of the second opening (OH2) may be a part adjacent to the plating inlet line (400).

[0053] In this way, in this embodiment, the solder resist layer (500) and the plating connection wire (40) are etched using a laser (L), so that over-etching of the plating connection wire (40) by the etching solution can be prevented.

[0054] At this time, the second portion (120) of the insulating layer (100) overlapping with the second opening (OH2) is exposed by removing a portion of the solder resist layer (500) and the plating connection wiring (40) by laser processing, so the upper surface (100u) of the second portion (120) of the insulating layer (100) can be partially removed by laser processing.

[0055] Accordingly, the thickness (t2) of the second part (120) of the insulating layer (100) overlapping with the second opening (OH2) may be thinner than the thickness (t1) of the first part (110) of the insulating layer (100) overlapping with the first opening (OH1). Additionally, with respect to the lower surface (100d) of the insulating layer (100), the height (h2) of the upper surface (100u) of the first part (120) of the insulating layer (100) may be lower than the height (h1) of the upper surface (100u) of the first part (110) of the insulating layer (100).

[0056] Additionally, the upper surface (100u) of the second portion (120) of the insulating layer (100) may be damaged by laser processing. Accordingly, the surface roughness of the second portion (120) of the insulating layer (100) may be greater than the surface roughness of the first portion (110) of the insulating layer (100) exposed by removing the solder resist layer (500) by a photolithography process.

[0057] An auxiliary pad (600) can cover a conductive pad (300). This auxiliary pad (600) may include a plating layer. The plating layer is formed by a plating process and may include gold (Au), silver (Ag), nickel (Ni), palladium (Pd), etc.

[0058] Then, with reference to FIGS. 4 to 11 together with FIGS. 1 to 3, a method for manufacturing a circuit board according to one embodiment will be described in detail.

[0059] FIG. 4 is a plan view illustrating one step of a method for manufacturing a circuit board according to one embodiment, FIG. 5 is a cross-sectional view taken along V-V' of FIG. 4, FIG. 6 is a plan view illustrating the next step of FIG. 4, FIG. 7 is a cross-sectional view taken along VII-VII' of FIG. 6, FIG. 8 is a plan view illustrating the next step of FIG. 6, FIG. 9 is a cross-sectional view taken along IX-IX' of FIG. 8, FIG. 10 is a plan view illustrating the next step of FIG. 8, and FIG. 11 is a cross-sectional view taken along XI-XI' of FIG. 10.

[0060] As shown in FIGS. 4 and 5, circuit wiring (200), plated connection wiring (40), and conductive pads (300) are formed on an insulating layer (100). The circuit wiring (200), plated connection wiring (40), and conductive pads (300) can be formed by patterning the conductive layer using a photolithography process after forming the conductive layer. At this time, the plated connection wiring (40) and the conductive pads (300) can be formed integrally.

[0061] Then, a resist layer (500m) is formed on the insulating layer (100) to cover the circuit wiring (200), the plating connection wiring (40), and the conductive pad (300). Then, a portion (SR1) of the resist layer (500m) is exposed to light and cured using a mask (M). Then, the remaining uncured portion (SR2) of the resist layer (500m) is developed and removed.

[0062] As illustrated in FIGS. 6 and 7, the remaining uncured portion of the resist layer (500m) is removed to form a first opening (OH1), and a solder resist layer (500) having such a first opening (OH1) is completed. The first opening (OH1) of the solder resist layer (500) can overlap with a planar conductive pad (300). Here, since the resist layer (500m) of the present invention is a positive photosensitive film, it is also possible to form the first opening (OH1) in a resist layer using a negative photosensitive film in which the exposed portion is cured, but the unexposed portion is cured.

[0063] In this embodiment, a first opening (OH1) is formed by exposing and developing a portion of the resist layer (500m) using a mask (M), but this is not necessarily limited to this method, and the first opening (OH1) can be formed in the resist layer in various ways.

[0064] As illustrated in FIGS. 8 and 9, an auxiliary pad (600) covering the conductive pad (300) is formed. This auxiliary pad (600) can be formed using a plating process that applies an electrical signal to the plated connecting wire (40) and the conductive pad (300). At this time, the auxiliary pad (600) can be formed overlapping with the first opening (OH1). Since the plated connecting wire (40) is covered by a solder resist layer (500), the auxiliary pad (600) is not formed on the plated connecting wire (40).

[0065] As illustrated in FIGS. 10 and 11, a second opening (OH2) is formed by removing a portion of the solder resist layer (500) overlapping the plated connecting wire (40) using a laser processing process. Here, the laser (L) used in the laser processing process may include a YAG laser, a carbon dioxide (CO2) laser, etc. However, it is not necessarily limited to these, and various lasers may be applied. The laser processing process may include laser drilling. Laser drilling is a processing method that forms an opening by irradiating a laser to a single point to melt and evaporate a target object with heat.

[0066] And, when removing the solder resist layer (500) containing the solder resist, for example, the power of the laser may be less than 1W.

[0067] As illustrated in FIGS. 1 to 3, the laser processing process is continued to remove a portion of the plating connection wiring (40) that overlaps with the second opening (OH2) to form a plating inlet wire (400). That is, the portion of the plating connection wiring (40) that is directly connected to the external wiring (not shown) can be removed to form the plating connection wiring (400) into a plating inlet wire (400) that is separated from the external wiring (not shown).

[0068] Here, the power of the laser when removing a portion of the plated connecting wire (40) may be greater than the power of the laser when removing a portion of the solder resist layer (500). For example, when removing a portion of the plated connecting wire (40) containing copper, the power of the laser may be 3W or more.

[0069] The second portion (120) of the insulating layer (100) overlapping with the second opening (OH2) is exposed by removing a portion of the solder resist layer (500) and the plated connecting wire (40) by a laser processing process, so the upper surface (100u) of the second portion (120) of the insulating layer (100) can be partially removed.

[0070] Accordingly, the thickness (t2) of the second part (120) of the insulating layer (100) overlapping with the second opening (OH2) may be thinner than the thickness (t1) of the first part (110) of the insulating layer (100) overlapping with the first opening (OH1). Additionally, with respect to the lower surface (100d) of the insulating layer (100), the height (h2) of the upper surface (100u) of the first part (120) of the insulating layer (100) may be lower than the height (h1) of the upper surface (100u) of the first part (110) of the insulating layer (100).

[0071] Additionally, the upper surface (100u) of the second portion (120) of the insulating layer (100) may be damaged by laser processing. Accordingly, the surface roughness of the second portion (120) of the insulating layer (100) may be greater than the surface roughness of the first portion (110) of the insulating layer (100) exposed by removing the solder resist layer (500) by a photolithography process.

[0072] In addition, as described above, since the laser (L) is capable of anisotropic etching, the solder resist layer (500) and the plating connection wire (40) can be etched with the same width. Accordingly, one end (400a) of the plating lead wire (400) can be positioned on the same plane as one side wall of the second opening (OH2).

[0073] In this way, in one embodiment, the plated connecting wire (40) can be cut using a laser processing process to electrically separate it from the external wire, so there is no need to use a separate photosensitive film or photosensitive ink to separate the plated connecting wire (40) during the etch back process. Therefore, the manufacturing process can be simplified, and the manufacturing cost of the circuit board can be reduced.

[0074] In addition, in the etch back process for separating the plated connecting wire (40), since a separate photosensitive film or photosensitive ink is not required, the occurrence of residue is prevented, thereby minimizing process issues such as the plated connecting wire (40) not being separated.

[0075] Meanwhile, in the above embodiment, a portion of the solder resist layer was removed using a laser and then a portion of the plated connecting wire was removed; however, other embodiments are also possible in which a portion of the solder resist layer and a portion of the plated connecting wire are removed simultaneously.

[0076] Hereinafter, with reference to FIG. 12, a method for manufacturing a circuit board according to another embodiment will be described in detail.

[0077] FIG. 12 is a cross-sectional view illustrating one step of a method for manufacturing a circuit board according to another embodiment.

[0078] Another embodiment shown in FIG. 12 is substantially the same as one embodiment shown in FIG. 4 to 11, except that the solder resist layer and the plated connecting wire are removed simultaneously, so a repeated description is omitted.

[0079] As illustrated in FIG. 12, a method for manufacturing a circuit board according to another embodiment uses a laser processing process to remove a portion of the solder resist layer (500) overlapping with the plated connecting wire (40) to form a second opening (OH2), while simultaneously removing the plated connecting wire (40) exposed by the second opening (OH2). At this time, since the solder resist layer (500) and the plated connecting wire (40) must be removed simultaneously using a laser (L), the power of the laser may be 3W or more.

[0080] At this time, by removing the plating connection wiring (40) exposed by the second opening (OH2), the plating connection wiring (40) is cut to form a plating inlet wire (400).

[0081] In this way, by using a laser (L) to simultaneously remove the solder resist layer (500) and the plating connection wiring (40), the manufacturing time of the circuit board can be shortened.

[0082] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto and can be implemented with various modifications within the scope of the claims, the detailed description of the invention, and the attached drawings, and it is obvious that such modifications also fall within the scope of the present invention. Explanation of the symbols

[0083] 100: Insulation layer 200: Circuit wiring 300: Conductive pad 400: Plating inlet wire 410: 1st wiring 420: 2nd wiring 500: Solder resist layer 600: Auxiliary pad OH1: First opening OH2: Second opening 40: Plated connection wiring

Claims

Claim 1 A circuit board comprising an insulating layer, a conductive pad located on the insulating layer, a plating lead line located on the insulating layer and connected to the conductive pad, and a solder resist layer located on the insulating layer and having a first opening that overlaps with the conductive pad and a second opening spaced apart from the first opening, wherein the plating lead line extends from the conductive pad to one side wall of the second opening, and the thickness of the second portion of the insulating layer overlapping with the second opening is thinner than the thickness of the first portion of the insulating layer overlapping with the first opening. Claim 2 In claim 1, the above-mentioned plating lead line does not overlap in plane with the above-mentioned second opening, the circuit board. Claim 3 A circuit board according to claim 1, wherein the insulating layer comprises a first surface and a second surface facing each other, and the height of the first surface of the second portion of the insulating layer relative to the second surface of the insulating layer is lower than the height of the first surface of the first portion of the insulating layer. Claim 4 In paragraph 3, a circuit board in which the surface roughness of the second portion of the insulating layer is greater than the surface roughness of the first portion of the insulating layer. Claim 5 In paragraph 4, a circuit board in which one end of the plating inlet line is located on the same plane as one side wall of the second opening. Claim 6 A circuit board according to claim 1, further comprising an auxiliary pad covering the conductive pad, wherein the auxiliary pad overlaps with the first opening. Claim 7 In paragraph 6, the auxiliary pad comprises a plating layer, a circuit board. Claim 8 A method for manufacturing a circuit board comprising forming a plated connecting wire and a conductive pad connected to the plated connecting wire on an insulating layer, forming a solder resist layer having a first opening that overlaps with the conductive pad on the insulating layer, forming a second opening by removing a portion of the solder resist layer that overlaps with the plated connecting wire using a laser processing process, and forming a plated lead wire by removing a portion of the plated connecting wire that overlaps with the second opening using the laser processing process. Claim 9 A method for manufacturing a circuit board according to claim 8, wherein the thickness of the second portion of the insulating layer overlapping with the second opening is formed to be thinner than the thickness of the first portion of the insulating layer overlapping with the first opening. Claim 10 In claim 8, a method for manufacturing a circuit board, wherein forming the plating input line involves removing a portion of the plating connection wiring that is not directly connected to the conductive pad. Claim 11 A method for manufacturing a circuit board, wherein, in claim 8, the plating connection wiring and the conductive pad are formed by a photolithography process. Claim 12 A method for manufacturing a circuit board according to claim 9, wherein the surface roughness of the second portion of the insulating layer is formed to be greater than the surface roughness of the first portion of the insulating layer. Claim 13 A method for manufacturing a circuit board according to claim 8, wherein one end of the plating inlet line is located on the same plane as one side wall of the second opening. Claim 14 A method for manufacturing a circuit board according to claim 8, wherein a portion of the plated connecting wire is removed after forming the second opening using the laser processing process. Claim 15 A method for manufacturing a circuit board according to claim 8, wherein the second opening is formed using the laser processing process while simultaneously removing a portion of the plated connecting wire. Claim 16 A method for manufacturing a circuit board according to claim 8, further comprising forming an auxiliary pad covering the conductive pad, wherein the auxiliary pad is formed using a plating process that applies an electrical signal to the plating connection wiring and the conductive pad.

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