HEMT device with AlGaN channel layer and manufacturing method of HEMT device

Abstract

The present invention relates to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing a HEMT device, and more specifically, to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing a HEMT device that includes a superlattice layer of a multilayer structure in which aluminum nitride (AlN) and aluminum gallium nitride (AlxGa1-xN) are repeatedly stacked, thereby relieving stress between the buffer layer and the channel layer and improving device characteristics.

Description

Technology Field

[0001] The present invention relates to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing the HEMT device, and more specifically, to aluminum nitride (AlN) and aluminum gallium nitride (AlGaN). x Ga 1-x The present invention relates to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing the HEMT device, wherein the stress between the buffer layer and the channel layer is relieved and the device characteristics are improved by including a superlattice layer of a multilayer structure in which N) is repeatedly stacked. Background Technology

[0002] HEMT (High Electron Mobility Transistor) devices are devices that form a heterojunction to enable electrons to have high mobility, and are more advantageous for high-frequency and high-power applications than general MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0003] However, conventional HEMT devices are prone to stress generation due to lattice mismatch caused by differences in lattice constants when forming a channel layer on top of a buffer layer. When stress occurs, defects such as dislocations are generated in the channel layer, ultimately leading to a degradation of the channel layer's crystallinity and morphology, which in turn causes a problem of reduced device performance.

[0004] In other words, there is a need for a HEMT device and a manufacturing method that can prevent the degradation of crystallinity and morphology of the channel layer by relieving stress between the buffer layer and the channel layer. The problem to be solved

[0005] The present invention relates to aluminum nitride (AlN) and aluminum gallium nitride (Al x Ga 1-xThe purpose is to provide a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing the HEMT device, which includes a superlattice layer of a multilayer structure in which N) is repeatedly stacked, thereby relieving stress between the buffer layer and the channel layer and improving device characteristics. means of solving the problem

[0006] To solve the above problems, one embodiment of the present invention is an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device comprising: a substrate layer; a buffer layer disposed on the substrate layer and containing aluminum nitride (AlN); a superlattice layer disposed on the buffer layer; and aluminum gallium nitride (AlGaN) disposed on the superlattice layer. x Ga 1-x A channel layer comprising N); and a barrier layer disposed on the channel layer and comprising aluminum gallium nitride (AlGaN); wherein the superlattice layer comprises aluminum gallium nitride (AlGaN). x Ga 1-x A HEMT device is provided, comprising a first layer including N), and a second layer including aluminum nitride (AlN) stacked on the first layer; wherein the stacked structure is a multilayer structure in which the stacked structure is repeatedly stacked one or more times.

[0007] In some embodiments of the present invention, aluminum gallium nitride (Al) contained in each of the superlattice layer and the channel layer x Ga 1-x N) has different x values, and the aluminum gallium nitride (Al) included in the superlattice layer x Ga 1-x The x value of N) is the aluminum gallium nitride (Al) included in the channel layer. x Ga 1-x It can be greater than the x value of N).

[0008] In some embodiments of the present invention, the superlattice layer may be formed by repeatedly stacking the stacked structure 1 to 1,000 times.

[0009] In some embodiments of the present invention, the substrate layer may be any one of silicon carbide (4H-SiC), (002) sapphire, (111) silicon (Si), and (002) aluminum nitride (AlN) substrates.

[0010] In some embodiments of the present invention, the buffer layer, superlattice layer, channel layer, and barrier layer each may be formed by organometallic chemical vapor deposition (MOCVD) and formed at a growth rate of 0.01 to 1000 μm / hr under conditions of a pressure of 0 to 760 torr and a temperature of 500 to 1300°C.

[0011] In some embodiments of the present invention, Al included in the superlattice layer x Ga 1-x The x value of N is 0.1 to 0.9, and Al included in the channel layer x Ga 1-x The x value of N can be from 0.05 to 0.8.

[0012] In some embodiments of the present invention, the HEMT device further comprises an electrode disposed on the barrier layer, and the electrode may include a source, a gate formed spaced apart from the source, and a drain formed spaced apart from the source and the gate.

[0013] In some embodiments of the present invention, the thickness of the superlattice layer may be 50 nm to 10 μm.

[0014] To solve the above problems, one embodiment of the present invention is a method for manufacturing an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device, comprising: a substrate layer preparation step of preparing a substrate layer; a buffer layer placement step of placing a buffer layer containing aluminum nitride (AlN) on the substrate layer; a superlattice layer placement step of placing a superlattice layer on the buffer layer; and aluminum gallium nitride (AlGaN) on the superlattice layer. x Ga 1-xA channel layer placement step for placing a channel layer including N); and a barrier layer placement step for placing a barrier layer including aluminum gallium nitride (AlGaN) on the channel layer; wherein the superlattice layer placement step comprises aluminum gallium nitride (AlGaN). x Ga 1-x A method for manufacturing a HEMT device is provided, comprising: a step of forming a stacked structure including a first layer including N, and a second layer including aluminum nitride (AlN) stacked on the first layer; and a step of repeatedly stacking the stacked structure one or more times to form a multilayer structure.

[0015] In some embodiments of the present invention, the repetitive stacking step may repeatedly stack the stacked structure 1 to 1000 times.

[0016] In some embodiments of the present invention, the method for manufacturing the HEMT device further comprises an electrode placement step of placing an electrode on the barrier layer; and the electrode may include a source, a gate formed spaced apart from the source, and a drain formed spaced apart from the source and the gate.

[0017] In some embodiments of the present invention, the superlattice layer arrangement step may be formed such that the superlattice layer has a thickness of 50 nm to 10 μm. Effects of the invention

[0018] According to one embodiment of the present invention, the HEMT device includes a superlattice layer, thereby relieving stress applied to the channel layer and preventing defects, which can improve the electrical characteristics of the device.

[0019] According to one embodiment of the present invention, by relieving stress through the superlattice layer, the scattering phenomenon occurring at the interface of each layer of the HEMT device is reduced, thereby improving the efficiency of the device.

[0020] According to one embodiment of the present invention, the channel layer includes a two-dimensional electron gas composed of a plurality of electrons, thereby increasing electron mobility within the channel layer and thereby improving the efficiency of the HEMT device.

[0021] According to one embodiment of the present invention, the HEMT device includes a superlattice layer, thereby preventing the generation of defects in the channel layer and exhibiting the effect of improved durability.

[0022] According to one embodiment of the present invention, the superlattice layer can exert a stress relief effect by blocking the propagation of stress occurring between the channel layer and the buffer layer, thereby relieving stress on the channel layer.

[0023] According to one embodiment of the present invention, as the thickness of the superlattice layer increases, the stress propagation blocking power to the channel layer is improved, thereby enhancing the effect of relieving stress.

[0024] According to one embodiment of the present invention, the superlattice layer can reduce the dislocation density of the channel layer, thereby improving the quality of the crystals of the channel layer and the barrier layer, respectively.

[0025] According to one embodiment of the present invention, the superlattice layer has crystallinity of the channel layer and the barrier layer.

[0026] By improving and reducing the contact resistance at the interface between the barrier layer and the electrode, it is possible to achieve an effect that enhances charge transport characteristics.

[0027] According to one embodiment of the present invention, the HEMT device can improve the usability of the device by including a superlattice layer to induce a positive shift of the threshold voltage. Brief explanation of the drawing

[0028] FIG. 1 schematically illustrates a HEMT device and a superlattice layer according to one embodiment of the present invention. FIG. 2 schematically illustrates the manufacturing steps of a HEMT device according to one embodiment of the present invention. FIG. 3 schematically illustrates the manufacturing steps of a superlattice layer according to one embodiment of the present invention. FIG. 4 schematically illustrates a HEMT device that does not include a superlattice layer according to one embodiment of the present invention. FIG. 5 schematically illustrates a HEMT device including a superlattice layer according to one embodiment of the present invention. FIG. 6 schematically illustrates an AFM image of the channel layer of a HEMT device according to one embodiment of the present invention. FIG. 7 schematically illustrates the XRD measurement results of the channel layer of a HEMT device according to one embodiment of the present invention. FIG. 8 schematically illustrates the RSM scan results of the channel layer of a HEMT device according to one embodiment of the present invention. FIG. 9 schematically illustrates the current-voltage curve of a HEMT device according to one embodiment of the present invention. FIG. 10 schematically illustrates the behavior of a HEMT device according to one embodiment of the present invention as a function of voltage. Specific details for implementing the invention

[0029] Hereinafter, various embodiments and / or aspects are disclosed with reference to the drawings. For illustrative purposes, numerous specific details are disclosed in the following description to aid in a general understanding of one or more aspects. However, it will also be recognized by those skilled in the art that these aspects may be practiced without such specific details. The following description and the accompanying drawings describe specific exemplary aspects of one or more aspects in detail. However, these aspects are exemplary, and some of the various methods in the principles of the various aspects may be used, and the description is intended to include all such aspects and their equivalents.

[0030] In addition, various aspects and features will be presented by a system that may include multiple devices, components and / or modules, etc. It should also be understood and recognized that various systems may include additional devices, components and / or modules, etc., and / or may not include all of the devices, components, modules, etc. discussed in relation to the drawings.

[0031] As used herein, terms such as "examples," "examples," "aspects," "examples," etc., may not be interpreted as implying that any aspect or design described is better or more advantageous than other aspects or designs.

[0032] Additionally, the terms “comprising” and / or “comprising” should be understood to mean that the relevant feature and / or component is present, but not to exclude the presence or addition of one or more other features, components and / or groups thereof.

[0033] Additionally, terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but said components are not limited by said terms. Such terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. The term "and / or" includes a combination of a plurality of related described items or any of a plurality of related described items.

[0034] Furthermore, in the embodiments of the present invention, all terms used herein, including technical or scientific terms, unless otherwise defined, have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the embodiments of the present invention.

[0035] High Electron Mobility Transistor (HEMT) devices are devices that form a heterojunction to possess high electron mobility and can be utilized in high-frequency and high-power fields. However, conventional HEMT devices have problems such as defects in the channel layer, reduced crystallinity, and degraded morphology caused by stress resulting from lattice mismatch between the buffer layer and the channel layer.

[0036] To solve this problem, the present invention proposes a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing the HEMT device, wherein the stress applied to the channel layer is relieved by forming a superlattice layer between the buffer layer and the channel layer.

[0037] More specifically, in the present invention, aluminum nitride (AlN) and aluminum gallium nitride (Al x Ga 1-x N) The superlattice layer (3000) of the multilayer structure, which is repeatedly stacked, can be formed between the buffer layer (2000) and the channel layer (4000). Each layer included in the multilayer structure of the superlattice layer (3000) is formed to a thickness less than the critical thickness at which no defects occur, so that even if a lattice mismatch occurs with the buffer layer (2000), no defects occur and the stress can be accumulated in the form of stress.

[0038] With such a structure, the superlattice layer (3000) can perform the role of blocking defects caused by lattice mismatch with the buffer layer (2000) from propagating to the channel layer (4000). Accordingly, the channel layer (4000) can relieve stress caused by lattice mismatch with the buffer layer (2000), and prevent defect occurrence, deterioration of crystallinity, and deterioration of morphology.

[0040] That is, according to one embodiment of the present invention, the HEMT device (1) includes a superlattice layer (3000) to relieve stress applied to the channel layer (4000) and prevent defects from occurring, thereby having the effect of improving the electrical characteristics of the device.

[0041] In addition, according to one embodiment of the present invention, by relieving stress through the superlattice layer (3000), the scattering phenomenon occurring at the interface of each layer of the HEMT device (1) is reduced, thereby improving the efficiency of the device.

[0042] Hereinafter, a HEMT device (1) having an aluminum gallium nitride (AlGaN) channel layer (4000) according to one embodiment of the present invention and a method for manufacturing the HEMT device (1) will be described in detail.

[0043] FIG. 1 schematically illustrates a HEMT device (1) and a superlattice layer (3000) according to one embodiment of the present invention.

[0044] FIG. 1(a) schematically illustrates a HEMT element (1) according to one embodiment of the present invention, and FIG. 1(b) schematically illustrates the shape of a superlattice layer (3000) included in the HEMT element (1).

[0045] According to one embodiment of the present invention, an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device (1) comprises: a substrate layer (1000); a buffer layer (2000) disposed on the substrate layer (1000) and containing aluminum nitride (AlN); a superlattice layer (3000) disposed on the buffer layer (2000); and aluminum gallium nitride (AlGaN) disposed on the superlattice layer (3000). x Ga 1-x A channel layer (4000) comprising N); and a barrier layer (5000) disposed on the channel layer (4000) and comprising aluminum gallium nitride (AlGaN); wherein the superlattice layer (3000) comprises aluminum gallium nitride (AlGaN). x Ga 1-x A HEMT device (1) can be provided, comprising a first layer (3110) including N), and a second layer (3120) including aluminum nitride (AlN) stacked on the first layer (3110); wherein the stacked structure (3100) is a multilayer structure in which the stacked structure (3100) is stacked one or more times.

[0046] According to one embodiment of the present invention, the HEMT element (1) further comprises an electrode (6000) disposed on the barrier layer (5000), and the electrode (6000) may include a source (6100), a gate (6200) formed spaced apart from the source (6100), and a drain (6300) formed spaced apart from the source (6100) and the gate (6200).

[0047] According to one embodiment of the present invention, the superlattice layer (3000) may be a multilayer structure in which the stacked structure (3100) is repeatedly stacked one or more times, and may further include the first layer (3110) on the upper side.

[0048] As illustrated in FIG. 1(a), the HEMT element (1) according to one embodiment of the present invention may include a substrate layer (1000), a buffer layer (2000), a superlattice layer (3000), a channel layer (4000), and a barrier layer (5000), and an electrode (6000) may be disposed on the barrier layer (5000).

[0049] Specifically, the HEMT element (1) may have the substrate layer (1000) disposed on the lower side and the buffer layer (2000) disposed on the substrate layer (1000). The buffer layer (2000) may include aluminum nitride (AlN).

[0050] The superlattice layer (3000) may be disposed on top of the buffer layer (2000) containing aluminum nitride. The superlattice layer (3000) is made of aluminum gallium nitride (Al x Ga 1-x It may include both a first layer (3110) containing N) and a second layer (3120) containing aluminum nitride (AlN). The second layer (3120) may be placed on top of the first layer (3110).

[0051] As illustrated in FIG. 1(b), a multilayer structure in which a total of two layers are combined can be formed when the second layer (3120) is placed on top of one of the first layers (3110). Hereinafter, the multilayer structure formed by placing the second layer (3120) on top of one of the first layers (3110) may be referred to as a stacked structure (3100).

[0052] In other words, the superlattice layer (3000) may include a stacked structure (3100) composed of the first layer (3110) and the second layer (3120). Additionally, the superlattice layer (3000) may be formed by stacking the stacked structure (3100) one or more times.

[0053] However, according to one embodiment of the present invention, the superlattice layer (3000) may be a structure formed by repeatedly stacking the stacked structure (3100) and further stacking the first layer (3110) on the upper side. For example, when the stacked structure (3100) is repeatedly stacked twice, the superlattice layer (3000) may have a multilayer structure configured in the form of a first layer / second layer / first layer / second layer / first layer by further stacking the first layer (3110) on top of the stacked structure (3100) that is repeatedly stacked twice.

[0054] In addition, as another example, when the stacked structure (3100) is stacked repeatedly once, the superlattice layer (3000) may have a multilayer structure composed of a first layer / second layer / first layer. That is, according to one embodiment of the present invention, the superlattice layer (3000) may further include an upper thin film layer (not shown) disposed on the upper side of the stacked structure (3100) after the repeated stacking is completed. The upper thin film layer (not shown) may have a composition corresponding to that of the first layer (3110).

[0055] In other words, the superlattice layer (3000) according to one embodiment of the present invention has a structure in which a first layer (3110) and a second layer (3120) are alternately stacked, and the layer placed at the bottom and the layer placed at the top, respectively, may each be the first layer (3110). That is, when the superlattice layer (3000) includes a plurality of first layers (3110) and second layers (3120), the layer placed at the bottom and positioned above the buffer layer (2000) may be the first layer (3110). In addition, the layer placed at the top of the superlattice layer (3000) and in contact with the lower side of the channel layer (4000) may also be the first layer (3110).

[0056] The first layer (3110) above is the aluminum gallium nitride (Al x Ga 1-x It includes N), and since the second layer (3120) includes the aluminum nitride, the superlattice layer (3000) is the aluminum gallium nitride (Alx Ga 1-x The structure may be one in which N) and aluminum nitride are alternately stacked. A more detailed description of the superlattice layer (3000) will be provided in the drawings described later.

[0057] The channel layer (4000) may be disposed on top of the superlattice layer (3000). The channel layer (4000) is made of aluminum gallium nitride (Al2), similar to the superlattice layer (3000). x Ga 1-x It may include N). However, according to one embodiment of the present invention, aluminum gallium nitride (Al) included in each of the channel layer (4000) and the superlattice layer (3000) x Ga 1-x The x value of N) may not be the same. A more detailed description of the composition of the channel layer (4000) will be provided in the drawings described later.

[0058] The channel layer (4000) may include a two-dimensional electron gas (E) (2DEG) formed on the inner side in a direction parallel to the lower surface. The two-dimensional electron gas (E) is a layer composed of a plurality of electrons and may exist in the form of a two-dimensional plane capable of moving in a horizontal direction relative to the surface of the channel layer (4000). The two-dimensional electron gas (E) may operate as a channel through which electrons move within the channel layer (4000), and accordingly, current may flow in the channel layer (4000).

[0059] That is, according to one embodiment of the present invention, the channel layer (4000) includes the two-dimensional electron gas (E) composed of a plurality of electrons, thereby increasing the electron mobility within the channel layer (4000) and thereby improving the efficiency of the HEMT device (1).

[0060] The barrier layer (5000) may be disposed on the channel layer (4000). The barrier layer (5000) may include aluminum gallium nitride (AlGaN). As the barrier layer (5000) is disposed on the channel layer (4000), a band bending phenomenon may occur at the interface between the barrier layer (5000) and the channel layer (4000). Due to the band bending phenomenon, a quantum well may be formed between the barrier layer (5000) and the channel layer (4000), and as electrons are trapped in the quantum well, the aforementioned two-dimensional electron gas (E) may be formed inside the channel layer (4000).

[0061] The electrode (6000) may be disposed on the barrier layer (5000). The electrode (6000) may include a source (6100), a gate (6200), and a drain (6300). The source (6100) may be disposed on the barrier layer (5000), and the gate (6200) may be disposed on the barrier layer (5000) but formed spaced apart from the source (6100). The drain (6300) may be disposed on the barrier layer (5000) but formed spaced apart from the source (6100) and the gate (6200), respectively.

[0062] The HEMT device (1) can receive voltage and current from the outside through the electrode (6000). For example, when voltage is applied to the gate (6200), current can flow through the HEMT device (1) as electrons move due to the two-dimensional electron gas (E) of the channel layer (4000).

[0063] According to one embodiment of the present invention, the superlattice layer (3000) may be formed by repeatedly stacking the stacked structure (3100) 1 to 1000 times.

[0064] According to one embodiment of the present invention, aluminum gallium nitride (Al) contained in each of the superlattice layer (3000) and the channel layer (4000) x Ga1-x N) has different x values, and the aluminum gallium nitride (Al) included in the superlattice layer (3000) has different x values. x Ga 1-x The x value of N) is aluminum gallium nitride (Al) included in the channel layer (4000). x Ga 1-x It can be greater than the x value of N).

[0065] According to one embodiment of the present invention, aluminum gallium nitride (Al) included in the superlattice layer (3000) x Ga 1-x The x value of N) is 0.1 to 0.9, and the aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x The x value of N) can be from 0.05 to 0.8.

[0066] As described above, the superlattice layer (3000) may include the stacked structure (3100) composed of the first layer (3110) and the second layer (3120), and the stacked structure (3100) may be stacked repeatedly one or more times.

[0067] Specifically, as illustrated in FIG. 1(b), the stacked structure (3100) may be a structure comprising two layers, wherein the second layer (3120) is disposed on top of the first layer (3110). Additionally, the stacked structure (3100) may be repeatedly stacked one or more times to form the superlattice layer (3000) of a multilayer structure.

[0068] According to one embodiment of the present invention, the stacked structure (3100) may be stacked repeatedly 1 to 1000 times. Preferably, the stacked structure (3100) is stacked repeatedly 10 to 500 times. More preferably, the stacked structure (3100) is stacked repeatedly 15 to 50 times. Even more preferably, the stacked structure (3100) is stacked repeatedly 20 times. However, as described above, the superlattice layer (3000) may be a structure in which the first layer (3110) is further disposed on top of a multilayer structure formed by stacking the stacked structure (3100) repeatedly.

[0069] Additionally, as described above, the superlattice layer (3000) may further include an upper thin film layer (not shown) disposed on the upper side of the stacked structure (3100) in which repetitive stacking is completed. The upper thin film layer (not shown) may have a composition corresponding to that of the first layer (3110).

[0070] The first layer (3110) above is aluminum gallium nitride (Al x Ga 1-x It includes N), and the second layer (3120) may include aluminum nitride (AlN). In the superlattice layer (3000) disposed between the buffer layer (2000) and the channel layer (4000), the lower surface of the superlattice layer (3000) disposed above the buffer layer (2000) and in contact with the upper surface of the buffer layer (2000) may correspond to the lower surface of any one of the plurality of first layers (3110). Additionally, the upper surface of the superlattice layer (3000) disposed below the channel layer (4000) and in contact with the lower surface of the channel layer (4000) may correspond to the upper surface of another of the plurality of first layers (3110).

[0071] That is, on the buffer layer (2000), there is aluminum gallium nitride (Al x Ga 1-xThe first layer (3110) including N) may be disposed, and likewise aluminum gallium nitride (Al) may be disposed on the lower side of the channel layer (4000). x Ga 1-x The first layer (3110) including N) may be disposed, wherein the first layer (3110) disposed adjacent to each of the buffer layer (2000) and the channel layer (4000) may be different layers.

[0072] As described above, the superlattice layer (3000) and the channel layer (4000) each have aluminum gallium nitride (Al x Ga 1-x Includes N), but with respect to gallium aluminum nitride (Al) included in the superlattice layer (3000). x Ga 1-x N) and aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x The x values ​​of N) may not be the same.

[0073] The first layer (3110) included in the superlattice layer (3000) is aluminum gallium nitride (Al x Ga 1-x It includes N). In other words, the aluminum gallium nitride included in the superlattice layer (3000) is the aluminum gallium nitride (Al nitride) included in the first layer (3110). x Ga 1-x It may mean N). Gallium aluminum nitride (Al) included in the superlattice layer (3000) above. x Ga 1-x The x value of N) is aluminum gallium nitride (Al) contained in the channel layer (4000). x Ga 1-x It can be greater than the x value of N).

[0074] According to stoichiometry, aluminum gallium nitride (Al) contained in each of the superlattice layer (3000) and channel layer (4000) x Ga 1-x The x value of N) must be a positive number greater than or equal to 0 and less than 1. Specifically, the aluminum gallium (Al) nitride contained in the superlattice layer (3000) x Ga1-x The x value of N) is 0.1 to 0.9, and the aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x The x value of N) can be from 0.05 to 0.8.

[0075] Preferably, aluminum gallium nitride (Al) contained in the superlattice layer (3000) x Ga 1-x The x value of N) is 0.3 to 0.8, and the aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x It is preferable that the x value of N) is 0.2 to 0.7. More preferably, the aluminum gallium (Al) nitride included in the superlattice layer (3000) x Ga 1-x The x value of N) is 0.5 to 0.7, and the aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x It is preferable that the x value of N) be 0.4 to 0.6.

[0076] Aluminum gallium nitride (Al) contained in each of the superlattice layer (3000) and channel layer (4000) x Ga 1-x Each x value of N) has a value within the range described above, and as described above, the aluminum gallium nitride (Al) included in the superlattice layer (3000) x Ga 1-x The x value of N) is aluminum gallium nitride (Al) included in the channel layer (4000). x Ga 1-x N) can always be greater than the x value.

[0077] FIG. 2 schematically illustrates the manufacturing steps of a HEMT device (1) according to one embodiment of the present invention, and FIG. 3 schematically illustrates the manufacturing steps of a superlattice layer (3000) according to one embodiment of the present invention.

[0078] According to one embodiment of the present invention, a method for manufacturing an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device (1) comprises: a substrate layer preparation step (S10) of preparing a substrate layer (1000); a buffer layer placement step (S20) of placing a buffer layer (2000) containing aluminum nitride (AlN) on the substrate layer (1000); a superlattice layer placement step (S30) of placing a superlattice layer (3000) on the buffer layer (2000); and aluminum gallium nitride (AlGaN) on the superlattice layer (3000). x Ga 1-x The method comprises: a channel layer placement step (S40) for placing a channel layer (4000) including N); and a barrier layer placement step (S50) for placing a barrier layer (5000) including aluminum gallium nitride (AlGaN) on the channel layer (4000); wherein the superlattice layer placement step (S30) comprises aluminum gallium nitride (AlGaN). x Ga 1-x A method for manufacturing a HEMT device (1) can be provided, comprising: a stacking structure forming step (S31) for forming a stacked structure (3100) including a first layer (3110) including N), and a second layer (3120) stacked on the first layer (3110) including aluminum nitride (AlN); and a repeating stacking step (S32) for forming a multilayer structure by repeatedly stacking the stacked structure (3100) one or more times.

[0079] According to one embodiment of the present invention, the substrate layer (1000) may be any one of silicon carbide (4H-SiC), (002) sapphire, (111) silicon (Si), and (002) aluminum nitride (AlN) substrates.

[0080] According to one embodiment of the present invention, the thickness of the superlattice layer (3000) may be 50 nm to 10 μm.

[0081] According to one embodiment of the present invention, each of the buffer layer (2000), superlattice layer (3000), channel layer (4000), and barrier layer (5000) may be formed by organometallic chemical vapor deposition (MOCVD) and may be formed at a growth rate of 0.01 to 1000 μm / hr under conditions of a pressure of 0 to 760 torr and a temperature of 500 to 1300°C.

[0082] According to one embodiment of the present invention, the method for manufacturing the HEMT device (1) further comprises an electrode placement step (S60) of placing an electrode (6000) on the barrier layer (5000); wherein the electrode (6000) may include a source (6100), a gate (6200) formed spaced apart from the source (6100), and a drain (6300) formed spaced apart from the source (6100) and the gate (6200).

[0083] As shown in FIG. 2, the HEMT element (1) can be formed by performing a substrate layer preparation step (S10), a buffer layer placement step (S20), a superlattice layer placement step (S30), a channel layer placement step (S40), a barrier layer placement step (S50), and an electrode placement step (S60).

[0084] Specifically, in the substrate layer preparation step (S10), the substrate layer (1000) may be prepared. According to one embodiment of the present invention, the substrate layer (1000) may be any one of silicon carbide (4H-SiC), (002) sapphire, (111) silicon (Si), and (002) aluminum nitride (AlN) substrates. The substrate layer (1000) may be a substrate on which aluminum nitride can be grown. The substrate layer (1000) may be placed in equipment for forming the buffer layer (2000).

[0085] When the above substrate layer preparation step (S10) is completed, the above buffer layer placement step (S20) may be performed. In the above buffer layer placement step (S20), the above buffer layer (2000) may be formed on the above substrate layer (1000). Specifically, in the above buffer layer placement step (S20), the above buffer layer (2000) containing aluminum nitride may be placed on the above substrate layer (1000) by depositing aluminum nitride (AlN) on the above substrate layer (1000).

[0086] According to one embodiment of the present invention, the thickness of the buffer layer (2000) formed in the buffer layer placement step (S20) may be 50 to 1000 nm. Preferably, the thickness of the buffer layer (2000) is 100 to 500 nm.

[0087] When the buffer layer placement step (S20) is completed, the superlattice layer placement step (S30) may be performed. As described above, the superlattice layer (3000) may be a multilayer structure in which the stacked structure (3100) is repeatedly stacked one or more times. The stacked structure (3100) is made of gallium aluminum nitride (Al x Ga 1-x The superlattice layer (3000) may include the first layer (3110) containing N) and the second layer (3120) disposed on the first layer (3110) and containing aluminum nitride (AlN). Additionally, the superlattice layer (3000) may have the layer disposed at the bottom and the layer disposed at the top each being the first layer (3110), and the first layer (3110) disposed at the bottom and the first layer (3110) disposed at the top may be different layers.

[0088] Accordingly, the superlattice layer placement step (S30) may include a stacked structure formation step (S31) and a repetitive stacking step (S32), as illustrated in FIG. 5. The stacked structure formation step (S31) may be a step of forming the stacked structure (3100) by placing the first layer (3110) on the buffer layer (2000) and placing the second layer (3120) on the first layer (3110).

[0089] After forming a stacked structure (3100) on the buffer layer (2000) by arranging each of the first layer (3110) and the second layer (3120) one layer at a time, a repetitive stacking step (S32) of repeatedly stacking the stacked structure (3100) one or more times may be performed. In the repetitive stacking step (S32), the first layer (3110) and the second layer (3120) may be formed alternately and repeatedly on the stacked structure (3100). However, the first layer (3110) may be placed on the upper side of the superlattice layer (3000). Accordingly, the repetitive stacking step (S32) may be terminated after repeatedly stacking the stacked structure (3100) and forming the first layer (3110) on the stacked structure (3100).

[0090] For example, in the above-mentioned repetitive stacking step (S32), the stacked structure (3100) is set to be stacked n times, and n is a natural number greater than or equal to 1. When the repetitive stacking of the stacked structure (3100) is performed n times, the repetitive stacking step (S32) can be completed after the first layer (3110) is formed one more time on top of the nth stacked structure (3100).

[0091] According to one embodiment of the present invention, the superlattice layer (3000) may be formed with a thickness of 50 nm to 10 μm. Preferably, the superlattice layer (3000) is formed with a thickness of 100 to 1000 nm. More preferably, the superlattice layer (3000) is formed with a thickness of 150 to 500 nm.

[0092] Meanwhile, each layer included in the multilayer structure of the superlattice layer (3000) may be formed to a critical thickness that does not cause defects. In other words, each of the first layer (3110) and the second layer (3120) included in the superlattice layer (3000) may be formed to a critical thickness.

[0093] According to one embodiment of the present invention, the first layer (3110) may be formed with a thickness of 1 to 20 nm, and the second layer (3120) may be formed with a thickness of 0.5 to 20 nm. Preferably, the first layer (3110) may be formed with a thickness of 2 to 15 nm, and the second layer (3120) may be formed with a thickness of 1 to 10 nm. More preferably, the first layer (3110) may be formed with a thickness of 5 to 10 nm, and the second layer (3120) may be formed with a thickness of 2 to 5 nm.

[0094] In the superlattice layer (3000), since the first layer (3110) and the second layer (3120) are each formed to be less than a critical thickness, a defect may not be formed even if stress is generated due to a lattice mismatch between the superlattice layer (3000) and the buffer layer (2000). That is, the superlattice layer (3000) can accommodate stress generated by the lattice mismatch.

[0095] Additionally, the interface between the superlattice layer (3000) and the channel layer (4000) may be a surface where the upper surface of the first layer (3110) and the lower surface of the channel layer (4000) come into contact. Each of the first layer (3110) and the channel layer (4000) is made of aluminum gallium nitride (Al) having different x values. x Ga 1-x It may include N). However, aluminum gallium nitride (Al) having different x values x Ga 1-xThe lattice structure of N) is aluminum nitride (AlN) and gallium aluminum nitride (AlN). x Ga 1-x N) It ​​may be a structure that is relatively more similar compared to each lattice structure.

[0096] Accordingly, the stress caused by the lattice mismatch between the superlattice layer (3000) and the channel layer (4000) according to one embodiment of the present invention may be relatively less than the stress caused by the lattice mismatch rate between the superlattice layer (3000) and the buffer layer (2000).

[0097] That is, the superlattice layer (3000) is inserted between the buffer layer (2000) and the channel layer (4000), thereby serving to block the propagation of stress caused by lattice mismatch between the buffer layer (2000) and the channel layer (4000). In other words, the superlattice layer (3000) can relieve stress on the channel layer (4000). Therefore, the HEMT device (1) can prevent the formation of defects in the channel layer (4000) by including the superlattice layer (3000). A more detailed explanation of the role of the superlattice layer (3000) will be provided in the drawings described later.

[0098] According to one embodiment of the present invention, the HEMT element (1) includes the superlattice layer (3000) to prevent the formation of defects in the channel layer (4000), thereby providing an effect of improved durability.

[0099] According to one embodiment of the present invention, the superlattice layer (3000) can exert a stress relief effect by blocking the propagation of stress occurring between the channel layer (4000) and the buffer layer (2000), thereby relieving stress on the channel layer (4000).

[0100] When the above iterative stacking step (S32) is terminated, the above superlattice layer placement step (S30) may be terminated. When the above superlattice layer placement step (S30) is terminated, the above channel layer placement step (S40) may be performed. In the above channel layer placement step (S40), aluminum gallium nitride (Al x Ga 1-x The channel layer (4000) including N) may be disposed on top of the superlattice layer (3000). Specifically, the channel layer (4000) may be disposed on top of the first layer (3110) which is disposed on the uppermost part of the superlattice layer (3000).

[0101] As described above, the aluminum gallium nitride (Al) of the channel layer (4000) x Ga 1-x The x value of N) is the aluminum gallium nitride (Al) of the first layer (3110) of the superlattice layer (3000). x Ga 1-x It may be smaller than the x value of N). Preferably, the aluminum gallium nitride (Al) contained in the superlattice layer (3000) x Ga 1-x The x value of N) is 0.3 to 0.8, and the aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x It is preferable that the x value of N) is 0.2 to 0.7. More preferably, the aluminum gallium (Al) nitride included in the superlattice layer (3000) x Ga 1-x The x value of N) is 0.5 to 0.7, and the aluminum gallium nitride (Al) included in the channel layer (4000) x Ga 1-x It is preferable that the x value of N) be 0.4 to 0.6.

[0102] According to one embodiment of the present invention, the thickness of the channel layer (4000) may be 10 to 500 nm. Preferably, the thickness of the channel layer (4000) is 50 to 300 nm. More preferably, the thickness of the channel layer (4000) is 100 to 200 nm.

[0103] When the above channel layer placement step (S40) is completed, the above barrier layer placement step (S50) may be performed. In the above barrier layer placement step (S50), the barrier layer (5000) containing aluminum gallium nitride (AlGaN) may be placed on top of the above channel layer (4000).

[0104] According to one embodiment of the present invention, the thickness of the barrier layer (5000) may be 5 to 100 nm. Preferably, the thickness of the barrier layer (5000) is 10 to 50 nm. More preferably, the thickness of the barrier layer (5000) is 15 to 40 nm.

[0105] By placing the barrier layer (5000) on top of the channel layer (4000), the two-dimensional electron gas (E) can be formed inside the channel layer (4000).

[0106] That is, according to one embodiment of the present invention, the HEMT element (1) can form a two-dimensional electron gas (E) by placing the barrier layer (5000) on the channel layer (4000) to produce the effect of improving electron mobility.

[0107] In the above buffer layer placement step (S20), superlattice layer placement step (S30), channel layer placement step (S40), and barrier layer placement step (S50), each of the buffer layer (2000), superlattice layer (3000), channel layer (4000), and barrier layer (5000) can be deposited by Metal Organic Chemical Vapor Deposition (MOCVD).

[0108] Specifically, each of the buffer layer (2000), superlattice layer (3000), channel layer (4000), and barrier layer (5000) can be deposited at a growth rate of 0.01 to 1000 μm / hr under pressure conditions of 0 to 760 torr and temperature conditions of 500 to 1300°C.

[0109] Preferably, the buffer layer (2000) is deposited at a growth rate of 0.1 to 100 μm / hr under pressure conditions of 0 to 500 torr and temperature conditions of 700 to 1300°C. More preferably, the buffer layer (2000) is deposited at a growth rate of 0.1 to 1 μm / hr under pressure conditions of 10 to 200 torr and temperature conditions of 900 to 1300°C.

[0110] Preferably, each of the superlattice layer (3000), channel layer (4000), and barrier layer (5000) is deposited at a growth rate of 0.01 to 100 μm / hr under pressure conditions of 0 to 500 torr and temperature conditions of 700 to 1200°C. More preferably, each of the superlattice layer (3000), channel layer (4000), and barrier layer (5000) is deposited at a growth rate of 0.01 to 1 μm / hr under pressure conditions of 100 to 300 torr and temperature conditions of 900 to 1100°C.

[0111] When the barrier layer placement step (S50) is completed, the electrode placement step (S60) may be performed. In the electrode placement step (S60), the electrode (6000), each comprising the source (6100), gate (6200), and drain (6300), may be placed on the barrier layer (5000).

[0112] As described above, the source (6100) is positioned on the barrier layer (5000), the gate (6200) is positioned on the barrier layer (5000) but can be formed spaced apart from the source (6100), and the drain (6300) is positioned on the barrier layer (5000) but can be formed spaced apart from each of the source (6100) and the gate (6200).

[0113] In FIGS. 4 to 10 below, a plurality of embodiments of the HEMT element (1) are formed to compare the performance of the HEMT element (1) according to the presence or absence of the superlattice layer (3000). Hereinafter, the HEMT element (1) that does not include the superlattice layer (3000) according to one embodiment of the present invention is referred to as Example 1, and the HEMT element (1) that includes the superlattice layer (3000) is referred to as Example 2.

[0114] FIG. 4 schematically illustrates a HEMT device (1) that does not include a superlattice layer (3000) according to one embodiment of the present invention, and FIG. 5 schematically illustrates a HEMT device (1) that includes a superlattice layer (3000) according to one embodiment of the present invention.

[0115] FIG. 4 illustrates Example 1 according to an embodiment of the present invention, and FIG. 5 illustrates Example 2 according to an embodiment of the present invention. Example 1 may be a HEMT device (1) that includes the substrate layer (1000), buffer layer (2000), channel layer (4000), barrier layer (5000), and electrode (6000), but does not include the superlattice layer (3000). Additionally, Example 2 may be a HEMT device (1) that includes all of the substrate layer (1000), buffer layer (2000), superlattice layer (3000), channel layer (4000), barrier layer (5000), and electrode (6000).

[0116] FIG. 4(a) shows a schematic diagram of the above-mentioned Example 1, and FIG. 4(b) shows a plan view of the above-mentioned Example 1.

[0117] As illustrated in FIG. 4(a), in the embodiment 1, the buffer layer (2000) may be disposed on the substrate layer (1000), the channel layer (4000) may be disposed on the buffer layer (2000), and the barrier layer (5000) may be disposed on the channel layer (4000). The electrode (6000) may be disposed on the barrier layer (5000). The electrode (6000) may include a source (6100), a gate (6200) disposed spaced apart from the source (6100), and a drain (6300) disposed spaced apart from the source (6100) and the gate (6200). Additionally, the channel layer (4000) of the embodiment 1 may include a two-dimensional electron gas (E).

[0118] As illustrated in FIG. 4(b), according to one embodiment of the present invention, the upper surface of the buffer layer (2000) may be partially exposed in Example 1. In Example 1, the barrier layer (5000) and the channel layer (4000) may be partially etched after the electrode (6000) is placed on the barrier layer (5000). Accordingly, the upper surface of the buffer layer (2000) may be partially exposed as the barrier layer (5000) and the channel layer (4000) are partially removed. However, although not illustrated in the drawings, according to one embodiment of the present invention, the upper surface of the buffer layer (2000) may not be exposed without etching the channel layer (4000) and the barrier layer (5000).

[0119] FIG. 5(a) shows a schematic diagram of the above-mentioned embodiment 2, and FIG. 5(b) shows a plan view of the above-mentioned embodiment 2.

[0120] As illustrated in FIG. 5(a), in the embodiment 2, the buffer layer (2000) may be disposed on the substrate layer (1000), the superlattice layer (3000) may be disposed on the buffer layer (2000), the channel layer (4000) may be disposed on the superlattice layer (3000), and the barrier layer (5000) may be disposed on the channel layer (4000). The superlattice layer (3000) of the embodiment 2 may be formed by repeatedly stacking the stacked structure (3100) 20 times. Additionally, the thickness of the superlattice layer (3000) may be 300 nm.

[0121] The electrode (6000) may be disposed on the barrier layer (5000). The electrode (6000) may include a source (6100), a gate (6200) disposed spaced apart from the source (6100), and a drain (6300) disposed spaced apart from the source (6100) and the gate (6200). Additionally, the channel layer (4000) of the embodiment 2 may include a two-dimensional electron gas (E).

[0122] As shown in FIG. 5(b), the above embodiment 2 may have a shape in which only the barrier layer (5000) is exposed when observed from the upper side.

[0123] The thicknesses of the substrate layer (1000), buffer layer (2000), channel layer (4000), and barrier layer (5000) of Example 1 and Example 2, respectively, may be the same. Additionally, the electrodes (6000) of Example 1 and Example 2, respectively, may be formed to have corresponding shapes. In other words, the difference between Example 1 and Example 2 may be only whether or not the superlattice layer (3000) is included. Below, the characteristics of Example 1 and Example 2 will be compared.

[0124] FIG. 6 schematically illustrates an AFM image of a channel layer (4000) of a HEMT device (1) according to one embodiment of the present invention. FIG. 6(a) is an AFM image of Example 1, and FIG. 6(b) is an AFM image of Example 2.

[0125] According to one embodiment of the present invention, the surface roughness of the channel layer (4000) may be 0.5 nm to 1.5 nm.

[0126] Specifically, the channel layer (4000) of each of the above Examples 1 and 2 is 5x5μm 2 Images of the surface can be measured using an Atomic Force Microscope (AFM) for the scanned area.

[0127] Generally, AFM images can roughly represent the surface roughness of a measured sample. On an AFM image, brightly colored areas are regions of relatively high height, and darkly colored areas are regions of relatively low height. In other words, the wider the area of ​​contrast on the AFM image, the more irregularities with large height differences are formed on the surface, and the greater the surface roughness can be interpreted.

[0128] As illustrated in FIGS. 6(a) and 6(b), the surface of the channel layer (4000) of Example 1 may have an AFM image with relatively greater contrast than the surface of the channel layer (4000) of Example 2. According to one embodiment of the present invention, the surface roughness of the channel layer (4000) of Example 2 may be 0.5 nm to 1.5 nm, and the surface roughness may be smaller than that of the surface of the channel layer (4000) of Example 1. Preferably, the surface roughness of the channel layer (4000) of Example 2 is 0.6 nm to 1.3 nm. More preferably, the surface roughness of the channel layer (4000) of Example 2 is 0.8 nm to 1.1 nm.

[0129] For example, if the surface roughness is calculated based on AFM measurement, the surface roughness of the channel layer (4000) of Example 1 is 1.4 nm, and the surface roughness of the channel layer (4000) of Example 2 is 1.09 nm.

[0130] In other words, when the HEMT element (1) includes the superlattice layer (3000), the surface roughness of the channel layer (4000) can be reduced. The reduction in surface roughness of the channel layer (4000) by the superlattice layer (3000) may be due to the stress relief effect of the superlattice layer (3000) described above.

[0131] Specifically, the above embodiment 2 can prevent stress caused by lattice mismatch between the buffer layer (2000) and the channel layer (4000) from propagating to the channel layer (4000) by including the superlattice layer (3000) between the buffer layer (2000) and the channel layer (4000). That is, the superlattice layer (3000) can serve as a stress relief layer for the channel layer (4000).

[0132] As the stress applied to the channel layer (4000) is relieved, the channel layer (4000) of Example 2 may have fewer defects than the channel layer (4000) of Example 1. Accordingly, the surface roughness may be reduced.

[0133] Although not illustrated in the drawings, according to one embodiment of the present invention, the surface roughness of the channel layer (4000) of the HEMT device (1) may decrease as the thickness of the superlattice layer (3000) increases. For example, when the thickness of the superlattice layer (3000) of the HEMT device (1) is 150 nm and 300 nm, respectively, the surface of the channel layer (4000) of the HEMT device (1) containing the superlattice layer (3000) with a thickness of 150 nm may be rougher than the surface of the channel layer (4000) of the HEMT device (1) containing the superlattice layer (3000) with a thickness of 300 nm.

[0134] That is, the superlattice layer (3000) according to one embodiment of the present invention can perform the role of a stress relief layer and reduce the surface roughness of the channel layer (4000), thereby having the effect of improving the quality of the device.

[0135] In addition, according to one embodiment of the present invention, as the thickness of the superlattice layer (3000) increases, the stress propagation blocking power for the channel layer (4000) is improved, thereby enhancing the effect of relieving stress.

[0136] FIG. 7 schematically illustrates the XRD measurement results of a HEMT element (1) according to one embodiment of the present invention.

[0137] FIG. 7(a) shows the results of high-resolution XRD measurement performed on Example 1, and FIG. 7(b) shows the results of high-resolution XRD measurement performed on Example 2.

[0138] According to one embodiment of the present invention, high-resolution XRD measurements can be performed in each of the above embodiments 1 and 2 through an ω / 2θ scan. As shown in FIGS. 7(a) and FIGS. 7(b), each of the above embodiments 1 and 2 may have different XRD measurement results.

[0139] Specifically, as illustrated in FIG. 7(a), the embodiment 1 is aluminum gallium nitride (Al x Ga 1-x It may include peaks for N), silicon carbide (SiC), and aluminum nitride (AlN), respectively. Gallium aluminum nitride (Al x Ga 1-x The peak of N) may be due to the channel layer (4000) of Example 1, the peak of silicon carbide (SiC) may be due to the substrate layer (1000), and the peak of aluminum nitride (AlN) may be due to the buffer layer (2000). According to one embodiment of the present invention, aluminum gallium nitride (AlN) included in the channel layer (4000) of Example 1 x Ga 1-x The x value of N) can be 0.58.

[0140] As shown in FIG. 7(b), the above Example 2 is aluminum gallium nitride (Al x Ga 1-x It may include peaks for N), silicon carbide (SiC), and aluminum nitride (AlN), respectively. Gallium aluminum nitride (Al x Ga 1-x The peak of N) may be due to the channel layer (4000) of Example 2, the peak of silicon carbide (SiC) may be due to the substrate layer (1000), and the peak of aluminum nitride (AlN) may be due to the buffer layer (2000). According to one embodiment of the present invention, aluminum gallium nitride (AlN) included in the channel layer (4000) of Example 2 x Ga 1-x The x value of N) can be 0.66.

[0141] However, as described above, the aluminum gallium nitride (Al) included in the superlattice layer (3000) of Example 2 is x Ga 1-x The x value of N) is the aluminum gallium nitride (Al) of the channel layer (4000). x Ga 1-x It can be greater than 0.66, which is the x value of N).

[0142] By performing calculations according to Vegard's law based on the positions of the ω / 2θ peaks shown in FIGS. 7(a) and 7(b), the aluminum (Al) composition for the channel layer (4000) of each of Example 1 and Example 2 can be determined. The aluminum composition for the channel layer (4000) is the aforementioned aluminum gallium nitride (Al x Ga 1-x It can correspond to the x value of N).

[0143] The aluminum composition and the measured values ​​calculated by XRD measurement for each of the channel layers (4000) of Example 1 and Example 2 above are listed in [Table 1] below.

[0144] Examples Aluminum composition %(ω-2θ) arcsec Potential density (x10 8 , cm -2 ) Spiral displacement Blade front Example 1 55.7 540 2.23 7.86 Example 2 66 475 1.96 6.08

[0145] As described in [Table 1], the channel layer (4000) of Example 1 may have an aluminum composition of 55.7%. Additionally, the channel layer (4000) of Example 2 may have an aluminum composition of 66%. The aluminum composition of the channel layer (4000) of Example 2 may be greater than the aluminum composition of the channel layer (4000) of Example 1.

[0146] The difference in the aluminum composition of the channel layer (4000) of each of the above Examples 1 and 2 may be due to the difference in the stress relief effect caused by the superlattice layer (3000). According to one embodiment of the present invention, aluminum gallium nitride (Al x Ga 1-x The bonding strength between gallium (Ga) and nitrogen (N) in N) may be relatively weak compared to aluminum (Al), and in the event of deformation due to stress, the adsorption of gallium and nitrogen may be easier than that of aluminum.

[0147] Since Example 1 above does not include the superlattice layer (3000), the channel layer (4000) can be deposited directly on the buffer layer (2000) during the manufacturing process. Therefore, because the adsorption of gallium and nitrogen due to stress between the buffer layer (2000) and the channel layer (4000) is easier than with aluminum, aluminum gallium nitride (Al2), which has a relatively lower aluminum composition than the channel layer (4000) of Example 2, is used. x Ga 1-x A channel layer (4000) including N) can be formed.

[0148] On the other hand, in the above Example 2, by including the superlattice layer (3000), the stress between the buffer layer (2000) and the channel layer (4000) can be blocked by the superlattice layer (3000). Therefore, the phenomenon in which the adsorption of gallium and nitrogen becomes easier compared to aluminum is reduced, so that the aluminum gallium nitride (Al) with a relatively higher aluminum composition than Example 1 is reduced. x Ga 1-x A channel layer (4000) including N) can be formed.

[0149] That is, since the above embodiment 1 does not include the superlattice layer (3000), the aluminum composition of the channel layer (4000) may have a smaller value than the aluminum composition of the channel layer (4000) of the above embodiment 2 which includes the superlattice layer (3000).

[0150] Meanwhile, by calculating the Full Width at Half Maximum (FWHM) of the peaks of Example 1 and Example 2, the dislocation density for each of the channel layers (4000) of Example 1 and Example 2 can be derived. As described in [Table 1], the density of screw dislocations in Example 1 is 2.23 × 10⁻⁶ 8 cm -2 and the density of edge dislocations is 7.86×10 8 cm -2 It may be. On the other hand, in the above Example 2, the density of spiral dislocations is 1.96 × 10⁻⁶ 8 cm -2 and the density of edge dislocations is 6.08×10 8 cm -2 As such, it may have a value smaller than Example 1 above.

[0151] As described above, the above embodiment 2 further includes the superlattice layer (3000) to block the stress applied from the buffer layer (2000) to the channel layer (4000), thereby preventing deformation of the channel layer (4000). That is, the superlattice layer (3000) can perform the role of preventing the generation of dislocations in the channel layer (4000). Accordingly, the dislocation density of the channel layer (4000) in the above embodiment 2 may be lower than that of the above embodiment 1, which does not include the superlattice layer (3000).

[0152] Although not illustrated in the drawings, according to one embodiment of the present invention, as the thickness of the superlattice layer (3000) included in the HEMT element (1) increases, the aluminum composition of the channel layer (4000) increases and the dislocation density may decrease. In other words, the crystallinity of the channel layer of the HEMT element may be improved as the thickness of the superlattice layer increases.

[0153] According to one embodiment of the present invention, the superlattice layer (3000) can reduce the dislocation density of the channel layer (4000) to improve the quality of the crystals of the channel layer (4000) and the barrier layer (5000), respectively.

[0154] FIG. 8 schematically illustrates the RSM scan results of a HEMT element (1) according to one embodiment of the present invention.

[0155] According to one embodiment of the present invention, the strain relaxation rate of the channel layer (4000) may be 10 to 25%.

[0156] FIG. 8(a) shows the result of performing an RSM scan on Example 1, and FIG. 8(b) shows the result of performing an RSM scan on Example 2.

[0157] According to one embodiment of the present invention, each of the above embodiments 1 and 2 can calculate the stress relaxation rate by performing a reciprocal space mapping (RSM) measurement using XRD. Specifically, as shown in FIGS. 8(a) and FIGS. 8(b), when the HEMT element (1) includes the superlattice layer (3000), the reciprocal lattice point (RLP) can approach R=1, which is a state where the reciprocal lattice point is completely relaxed.

[0158] The above R represents the strain relaxation rate and can be calculated by [Equation 1] below.

[0159] [Equation 1]

[0160]

[0161] In the above-described [Equation 1], AlGaN corresponds to gallium aluminum nitride included in the channel layer (4000), and AlN corresponds to aluminum nitride included in the buffer layer (2000). According to one embodiment of the present invention, the stress relaxation rate may be a relaxation rate for the intrinsic compressive stress of the channel layer (4000), and the intrinsic compressive stress of the channel layer (4000) may be the compressive stress acting on the channel layer (4000).

[0162] According to one embodiment of the present invention, the stress relaxation rate of the channel layer (4000) of the HEMT element (1) may be 10 to 25%. Preferably, the stress relaxation rate of the channel layer (4000) is 11% to 18%. More preferably, the stress relaxation rate of the channel layer (4000) is 14% to 17%.

[0163] According to one embodiment of the present invention, when Equation 1 is calculated for each of the above embodiments 1 and 2, the above embodiment 1 may have a stress relaxation rate of 1.2%, and the above embodiment 2 may have a stress relaxation rate of 17.3%. In other words, the compressive stress acting on the channel layer (4000) of the above embodiment 1 may be relieved by 1.2%, and the compressive stress acting on the channel layer (4000) of the above embodiment 2 may be relieved by 17.3%.

[0164] That is, when the HEMT element (1) includes the superlattice layer (3000), the relaxation rate of the compressive stress acting on the channel layer (4000) can be increased. Additionally, although not shown in the drawings, according to one embodiment of the present invention, when the thickness of the superlattice layer (3000) of the HEMT element (1) is increased, the stress relaxation rate of the channel layer (4000) can be increased.

[0165] Meanwhile, the hole measurement results for each of the above Examples 1 and 2 are listed in [Table 2] below.

[0166] Charge density [×10 13 , cm 2 ] Charge mobility [cm 2 Vs -1 ] Sheet resistance [kΩ / □] Example 1 3.3 77 2.4 Example 2 0.77 152 5.3

[0167] According to one embodiment of the present invention, when the compressive stress acting on the channel layer (4000) is reduced, the deformation caused by lattice mismatch between the channel layer (4000) and the barrier layer (5000) may be reduced. When the deformation between the channel layer (4000) and the barrier layer (5000) is reduced, the interface roughness scattering occurring at the interface between the channel layer (4000) and the barrier layer (5000) may be reduced.

[0168] As described in [Table 2], Example 1 may have a smaller charge mobility than Example 2. According to one embodiment of the present invention, the charge of the charge mobility may refer to electrons. As previously mentioned, since Example 1 does not include the superlattice layer (3000), the compressive stress acting on the channel layer (4000) may be greater than that of Example 2, which includes the superlattice layer (3000). Therefore, the interfacial roughness scattering between the channel layer (4000) and the barrier layer (5000) of Example 1 may occur more significantly than the interfacial roughness scattering between the channel layer (4000) and the barrier layer (5000) of Example 2. That is, the charge mobility of the HEMT device (1) may increase in proportion to the reduction in interfacial roughness scattering.

[0169] The superlattice layer (3000) according to one embodiment of the present invention can improve charge mobility by relieving stress applied to the channel layer (4000) and can have the effect of improving the electrical characteristics of the HEMT device (1).

[0170] However, according to one embodiment of the present invention, the embodiment 2 may have a lower charge density and a higher sheet resistance than the embodiment 1 by including the superlattice layer (3000). In the embodiment 2, the change caused by the intrinsic stress of the channel layer (4000) is mitigated by the superlattice layer (3000), so that the density of the two-dimensional electron gas (E) contained in the channel layer (4000) may be reduced compared to the density of the two-dimensional electron gas (E) of the embodiment 1. In proportion to the density of the two-dimensional electron gas (E), the charge density of the embodiment 2 may decrease, and the sheet resistance may increase compared to the embodiment 1.

[0171] However, as described above, the superlattice layer (3000) can have the effect of improving the crystallinity of each of the channel layer (4000) and the barrier layer (5000). Accordingly, the contact between the electrode (6000) of Example 2 and the barrier layer (5000) can be improved compared to the electrode (6000) of Example 1. Accordingly, Example 2 can have a relatively lower contact resistance than Example 1. That is, charge injection by the electrode (6000) in Example 2 can be relatively easier than in Example 1.

[0172] According to one embodiment of the present invention, the superlattice layer (3000) can improve the crystallinity of the channel layer (4000) and the barrier layer (5000) to reduce the contact resistance of the interface between the barrier layer (5000) and the electrode (6000), thereby improving charge transport characteristics.

[0173] FIG. 9 schematically illustrates the current-voltage curve of a HEMT element (1) according to one embodiment of the present invention, and FIG. 10 schematically illustrates the behavior of a HEMT element (1) according to one embodiment of the present invention according to voltage.

[0174] FIG. 9(a) shows a photograph of an electrode (6000) of a HEMT element (1) according to one embodiment of the present invention, and FIG. 9(b) schematically shows the current-voltage curves of each of the above embodiments 1 and 2. FIG. 10(a) schematically shows the current and transconductance-voltage curves of each of the above embodiments 1 and 2 on a linear scale, and FIG. 10(b) schematically shows the current-voltage curves of each of the above embodiments 1 and 2 on a semi-logarithmic scale.

[0175] As illustrated in FIG. 9(a), the HEMT device (1) according to one embodiment of the present invention may have the electrode (6000) comprising the source (6100), gate (6200), and drain (6300) disposed on the upper side as described above. The source (6100) may be disposed on the barrier layer (5000), the gate (6200) may be disposed on the barrier layer (5000) but formed spaced apart from the source (6100), and the drain (6300) may be disposed on the barrier layer (5000) but formed spaced apart from the source (6100) and the gate (6200).

[0176] For example, in each of the above embodiments 1 and 2, the length of the gate (6200) may be 5 μm and the width of the gate (6200) may be 100 μm. In addition, the distance between the gate (6200) and the source (6100) may be 5 μm, and the distance between the gate (6200) and the drain (6300) may be designed to be 10 μm.

[0177] According to one embodiment of the present invention, current-voltage measurements for each of Example 1 and Example 2 can be performed in units of ΔV=1V, with a gate voltage range of -6 to 2V. In the current-voltage curves illustrated in FIG. 9(b), the black line corresponds to the current-voltage curve of Example 1, and the red line corresponds to the current-voltage curve of Example 2. V on the x-axis of FIG. 9(b). dsrepresents the drain voltage, and I on the y-axis ds represents the drain current.

[0178] According to one embodiment of the present invention, the maximum drain current of Embodiment 1 is 3.1 mAmm -1 It may be, and the maximum drain current of Example 2 above is 7.9 mAmm -1 It may be. That is, the drain current value of Example 2 may be greater than the drain current value of Example 1. The difference between the drain current values ​​of Example 1 and Example 2 may be due to the presence or absence of the superlattice layer (3000).

[0179] As shown in FIG. 10(a), the maximum transconductance (g) of each of Example 1 and Example 2 m ) can exhibit behavior similar to the drain current of FIG. 9 described above. For example, the maximum transconductance of Example 1 is 0.7 mSmm -1 It may be, and the maximum transconductance of Example 2 above is 1.7 mSmm -1 As such, Example 2 may have a relatively larger maximum transconductance value than Example 1.

[0180] The difference between the aforementioned drain current and transconductance may be due to the stress relief effect of the superlattice layer (3000). As described above, the superlattice layer (3000) can reduce the interfacial roughness scattering between the channel layer (4000) and the barrier layer (5000) by blocking the stress applied from the buffer layer (2000) to the channel layer (4000) and thereby reducing the intrinsic stress of the channel layer (4000). Accordingly, as the electrons consumed at the interface are reduced, the charge mobility of the HEMT device (1) can increase inversely proportional to the interfacial roughness scattering.

[0181] That is, according to one embodiment of the present invention, the superlattice layer (3000) can have the effect of improving the current value of the HEMT device (1).

[0182] As described above, the above Example 2 may have a lower contact resistance than the above Example 1. As shown in FIG. 10(b), the on / off ratios of the above Example 1 are 4.0 × 10 5 It may be, and the on / off ratio of the above Example 2 is 8.0 × 10 5 It may be. In addition, the threshold voltage of Example 1 above may be -7.0V, and the threshold voltage of Example 2 above may be -2.5V. Generally, the threshold voltage is the gate-to-source voltage (V). GS It may correspond to ).

[0183] In other words, the above embodiment 2 may have a relatively larger on / off ratio than the above embodiment 1 and a threshold voltage that is relatively closer to a positive value than the above embodiment 1. The increase in the on / off ratio and the decrease in the threshold voltage of the above embodiment 2 may be due to the superlattice layer (3000). The above superlattice layer (3000) can block the threshold voltage from moving in the negative direction by preventing electron accumulation occurring in the two-dimensional electron gas (E) channel by reducing the compressive stress acting on the channel layer (4000).

[0184] According to one embodiment of the present invention, the HEMT device (1) can be applied as an E-mode device capable of operating in extreme environments as the threshold voltage moves in the positive direction.

[0185] That is, the HEMT device (1) according to one embodiment of the present invention can have the effect of improving the usability of the device by inducing a positive direction shift of the threshold voltage by including the superlattice layer (3000).

[0186] According to one embodiment of the present invention, the HEMT device includes a superlattice layer, thereby relieving stress applied to the channel layer and preventing defects, which can improve the electrical characteristics of the device.

[0187] According to one embodiment of the present invention, by relieving stress through the superlattice layer, the scattering phenomenon occurring at the interface of each layer of the HEMT device is reduced, thereby improving the efficiency of the device.

[0188] According to one embodiment of the present invention, the channel layer includes a two-dimensional electron gas composed of a plurality of electrons, thereby increasing electron mobility within the channel layer and thereby improving the efficiency of the HEMT device.

[0189] According to one embodiment of the present invention, the HEMT device includes a superlattice layer, thereby preventing the generation of defects in the channel layer and exhibiting the effect of improved durability.

[0190] According to one embodiment of the present invention, the superlattice layer can exert a stress relief effect by blocking the propagation of stress occurring between the channel layer and the buffer layer, thereby relieving stress on the channel layer.

[0191] According to one embodiment of the present invention, the HEMT device can achieve the effect of improving electron mobility by forming a two-dimensional electron gas by placing a barrier layer on top of a channel layer.

[0192] According to one embodiment of the present invention, the superlattice layer can perform the role of a stress relief layer and reduce the surface roughness of the channel layer, thereby having the effect of improving the quality of the device.

[0193] According to one embodiment of the present invention, as the thickness of the superlattice layer increases, the stress propagation blocking power to the channel layer is improved, thereby enhancing the effect of relieving stress.

[0194] According to one embodiment of the present invention, the superlattice layer can reduce the dislocation density of the channel layer, thereby improving the quality of the crystals of the channel layer and the barrier layer, respectively.

[0195] According to one embodiment of the present invention, the superlattice layer can improve charge mobility by relieving stress acting on the channel layer and can exhibit the effect of improving the electrical characteristics of the HEMT device.

[0196] According to one embodiment of the present invention, the superlattice layer can improve charge transport characteristics by improving the crystallinity of the channel layer and the barrier layer, thereby reducing the contact resistance at the interface between the barrier layer and the electrode.

[0197] According to one embodiment of the present invention, the HEMT device can improve the usability of the device by including a superlattice layer to induce a positive shift of the threshold voltage.

[0198] Although the embodiments have been described above with reference to limited examples and drawings, those skilled in the art can make various modifications and variations from the description above. For example, suitable results may be achieved even if the described techniques are performed in a different order than described, and / or if the components of the described system, structure, device, circuit, etc. are combined or assembled in a form different from described, or replaced or substituted by other components or equivalents. Therefore, other implementations, other embodiments, and equivalents to the claims below are also within the scope of the claims. Explanation of the symbols

[0199] 1 : HEMT device 1000 : Substrate layer 2000 : Buffer layer 3000 : Superlattice layer 3100 : Laminated structure 3110 : 1st floor 3120 : 2nd floor 4000 : Channel layer 5000 : Barrier layer 6000 : Electrode 6100 : Source 6200 : Gate 6300 : Drain E: 2D electron gas S10: Substrate layer preparation step S20: Buffer layer placement step S30: Superlattice layer placement stage S31: Layered structure formation stage S32: Iterative stacking step S40: Channel layer placement stage S50: Barrier layer placement stage S60: Electrode placement step

Claims

Claim 1 An aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device comprising: a substrate layer; a buffer layer disposed on the substrate layer and containing aluminum nitride (AlN); a superlattice layer disposed on the buffer layer; and aluminum gallium nitride (AlGaN) disposed on the superlattice layer. x Ga 1-x A channel layer comprising N); and a barrier layer disposed on the channel layer and comprising aluminum gallium nitride (AlGaN); wherein the superlattice layer comprises aluminum gallium nitride (AlGaN). x Ga 1-x A laminated structure comprising: a first layer formed with a thickness of 1 to 20 nm including (N); and a second layer laminated on the first layer and formed with a thickness of 0.5 to 20 nm including aluminum nitride (AlN); wherein the laminated structure is a multilayer structure in which the laminated structure is repeatedly laminated one or more times, and wherein the occurrence of defects is suppressed by each of the first layer and the second layer being formed to be less than a critical thickness, and wherein the aluminum gallium nitride (AlN) included in the channel layer x Ga 1-x A HEMT device in which the x value of N) increases in proportion to the thickness of the superlattice layer. Claim 2 In claim 1, the aluminum gallium nitride (Al) included in each of the superlattice layer and the channel layer x Ga 1-x N) has different x values, and the aluminum gallium nitride (Al) included in the superlattice layer is x Ga 1-x The x value of N) is the aluminum gallium nitride (Al) included in the channel layer. x Ga 1-x HEMT device, greater than the x value of N). Claim 3 The HEMT device according to claim 1, wherein the superlattice layer is formed by repeatedly stacking the stacked structure 1 to 1000 times. Claim 4 A HEMT device according to claim 1, wherein the substrate layer is any one of silicon carbide (4H-SiC), (002) sapphire, (111) silicon (Si), and (002) aluminum nitride (AlN) substrates. Claim 5 A HEMT device according to claim 1, wherein each of the buffer layer, superlattice layer, channel layer, and barrier layer is formed by organometallic chemical vapor deposition (MOCVD) and formed at a growth rate of 0.01 to 1000 μm / hr under conditions of a pressure of 0 to 760 torr and a temperature of 500 to 1300°C. Claim 6 In claim 2, the aluminum gallium nitride (Al) included in the superlattice layer x Ga 1-x The x value of N) is 0.1 to 0.9, and the aluminum gallium nitride (Al) included in the channel layer x Ga 1-x A HEMT device in which the x value of N) is 0.05 to 0.

8. Claim 7 The HEMT device according to claim 1, wherein the HEMT device further comprises an electrode disposed on the barrier layer, and the electrode comprises a source, a gate formed spaced apart from the source, and a drain formed spaced apart from the source and the gate. Claim 8 A HEMT device according to claim 1, wherein the thickness of the superlattice layer is 50 nm to 10 μm. Claim 9 A method for manufacturing an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device, comprising: a substrate layer preparation step of preparing a substrate layer; a buffer layer placement step of placing a buffer layer containing aluminum nitride (AlN) on the substrate layer; a superlattice layer placement step of placing a superlattice layer on the buffer layer; and aluminum gallium nitride (AlGaN) on the superlattice layer. x Ga 1-x A channel layer placement step for placing a channel layer including N); and a barrier layer placement step for placing a barrier layer including aluminum gallium nitride (AlGaN) on the channel layer; wherein the superlattice layer placement step comprises aluminum gallium nitride (AlGaN). x Ga 1-x A stacked structure forming step comprising a first layer formed with a thickness of 1 to 20 nm including N), and a second layer stacked on the first layer and formed with a thickness of 0.5 to 20 nm including aluminum nitride (AlN); and a repetitive stacking step of repeatedly stacking the stacked structure one or more times to form a multilayer structure; wherein the superlattice layer suppresses defect occurrence by forming each of the first layer and the second layer to be less than a critical thickness, and the aluminum gallium nitride (AlN) included in the channel layer x Ga 1-x A method for manufacturing a HEMT device in which the x value of N) increases in proportion to the thickness of the superlattice layer. Claim 10 A method for manufacturing a HEMT device according to claim 9, wherein the repetitive stacking step involves repeatedly stacking the stacked structure 1 to 1,000 times. Claim 11 The method of claim 9, wherein the method of manufacturing the HEMT device further comprises an electrode placement step of placing an electrode on the barrier layer; and wherein the electrode comprises a source, a gate formed spaced apart from the source, and a drain formed spaced apart from the source and the gate. Claim 12 A method for manufacturing a HEMT device according to claim 9, wherein the superlattice layer arrangement step is formed such that the superlattice layer has a thickness of 50 nm to 10 μm.

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