Electrode connection structure, method of manufacturing the same and digitizer including the same

Abstract

Embodiments according to the present invention provide an electrode connection structure. The electrode connection structure includes a substrate layer, a lower conductive line disposed on the upper surface of the substrate layer, a first insulating layer formed on the upper surface of the substrate layer and covering the periphery of the upper surface of the lower conductive line, a second insulating layer formed on the upper surface of the substrate layer and covering the first insulating layer entirely, and a via hole that exposes the upper surface of the lower conductive line, and an upper conductive line disposed on the second insulating layer and electrically connected to the lower conductive line through the via hole. The connection reliability between the conductive lines can be improved through a multilayer insulating structure.

Description

Technology Field

[0001] The present invention relates to an electrode connection structure, a method for manufacturing the same, and a digitizer including the same. More specifically, the invention relates to an electrode connection structure including a multilayer conductive structure, a method for manufacturing the same, and a digitizer including the same. Background Technology

[0002] Recently, various sensing and communication functions are combined with image display devices and are being implemented in the form of, for example, smartphones. For example, electronic devices are being developed in which a touch panel or touch sensor is attached to the display panel of the image display device and an information input function is implemented by selecting a menu displayed on the window surface.

[0003] In addition, as disclosed in Korean Registered Patent No. 10-1750564, a digitizer that converts analog coordinate information into a digital signal by an electromagnetic method is disposed on the rear side of the image display device.

[0004] The above-described digitizer may include conductive lines of a multilayer structure connected to each other with an insulating layer in between. To secure sufficient current intensity through low resistance, it may be desirable to increase the thickness of the conductive lines. In this case, the thickness of the insulating layer may also be increased.

[0005] If the thickness of the insulating layer is increased, via holes or contact holes for interconnecting conductive lines may not be formed with the desired shape and reliability. In addition, as the thickness of the digitizer increases, folding characteristics or flexibility may decrease, and the connection characteristics of the conductive lines may also deteriorate. Prior art literature

[0006] Korean Registered Patent Publication No. 10-1750564 The problem to be solved

[0007] One objective of the present invention is to provide an electrode connection structure having improved mechanical and electrical reliability.

[0008] One objective of the present invention is to provide a method for manufacturing an electrode connection structure having improved mechanical and electrical reliability.

[0009] One objective of the present invention is to provide a digitizer including an electrode connection structure having improved mechanical and electrical reliability. means of solving the problem

[0010] 1. An electrode connection structure comprising: a substrate layer; a lower conductive line disposed on the upper surface of the substrate layer; a first insulating layer formed on the upper surface of the substrate layer and covering the periphery of the upper surface of the lower conductive line; a second insulating layer formed on the upper surface of the first insulating layer and covering the entire first insulating layer, including a via hole that exposes the upper surface of the lower conductive line; and an upper conductive line disposed on the second insulating layer and electrically connected to the lower conductive line through the via hole.

[0011] 2. The electrode connection structure of 1 above, wherein the second insulating layer covers the substrate layer, the first insulating layer, and the lower conductive line together.

[0012] 3. An electrode connection structure according to 1 above, wherein the side surface of the first insulating layer and the upper surface of the substrate layer form a first taper angle, the side surface of the second insulating layer and the upper surface of the substrate layer form a second taper angle, and the first taper angle is larger than the second taper angle.

[0013] 4. An electrode connection structure according to 3, wherein the first taper angle is 75 to 80° and the second taper angle is 40 to 70°.

[0014] 5. An electrode connection structure according to 1 above, wherein the side surface of the first insulating layer and the upper surface of the lower conductive line form a third taper angle, the side surface of the second insulating layer and the upper surface of the lower conductive line form a fourth taper angle, and the third taper angle is greater than the fourth taper angle.

[0015] 6. An electrode connection structure according to 1 above, wherein the length of the portion of the second insulating layer in contact with the upper surface of the substrate layer is greater than the length of the portion of the first insulating layer in contact with the upper surface of the substrate layer.

[0016] 7. An electrode connection structure in which, in the above 1, the vertical length from the upper surface of the lower conductive line to the upper surface of the first insulating layer is greater than the vertical length from the upper surface of the first insulating layer to the upper surface of the second insulating layer.

[0017] 8. An electrode connection structure according to 1 above, wherein the thickness of the lower conductive line is greater than the thickness of the upper conductive line.

[0018] 9. An electrode connection structure according to 1, wherein the thickness of the lower conductive line is 10 μm or more.

[0019] 10. An electrode connection structure according to 1 above, wherein the lower conductive line and the upper conductive line extend in directions intersecting each other.

[0020] 11. A digitizer comprising the electrode connection structure described above, wherein the lower conductive line comprises a plurality of lower conductive lines and the upper conductive line comprises a plurality of upper conductive lines, and the lower conductive lines and the upper conductive lines are combined with each other through the via hole to form a plurality of conductive coils.

[0021] 12. A digitizer according to 11, wherein the lower conductive lines include first lower conductive lines and second lower conductive lines extending in the column direction, and the upper conductive lines include first upper conductive lines and second upper conductive lines extending in the row direction.

[0022] 13. The digitizer of the above 12, wherein the conductive coils include: a first conductive coil formed by connecting the first upper conductive lines and the second lower conductive lines to each other; and a second conductive coil formed by connecting the first lower conductive lines and the second upper conductive lines to each other.

[0023] 14. A digitizer according to 11, wherein the substrate layer includes a bending region, and the bending axis of the bending region intersects the upper conductive line and is parallel to the lower conductive line. Effects of the invention

[0024] In the electrode connection structure according to embodiments of the present invention, an insulating structure that partially covers the lower conductive line can be formed as a multilayer structure. Accordingly, even when the thickness of the lower conductive line is increased, the reliability of the connection between the lower conductive line and the upper conductive line through the insulating structure can be ensured.

[0025] According to some embodiments, the angle of inclination of the side of the second insulating layer provided in the upper insulating layer may be smaller than the angle of inclination of the side of the first insulating layer provided in the lower insulating layer. Accordingly, the disconnection and / or damage of the upper conductive line can be prevented and the driving reliability of the electrode connection structure can be improved.

[0026] By utilizing the above insulation structure, the thickness of the lower conductive line can be sufficiently increased to increase the current path. Accordingly, by employing the above electrode connection structure in the conductive coil of the digitizer, a digitizer having high resolution and improved flexible characteristics through the amplification of the electromagnetic induction phenomenon can be provided. Brief explanation of the drawing

[0027] FIG. 1 is a schematic cross-sectional view showing an electrode connection structure according to exemplary embodiments. FIGS. 2 to 4 are schematic cross-sectional views illustrating a method for manufacturing an electrode connection structure according to exemplary embodiments. FIG. 5 is a schematic cross-sectional view showing a digitizer according to exemplary embodiments. FIGS. 6 and 7 are schematic plan views showing conductive coils included in a digitizer according to exemplary embodiments. FIG. 8 is a schematic plan view showing a digitizer according to exemplary embodiments. Specific details for implementing the invention

[0028] Embodiments of the present invention provide an electrode connection structure having enhanced electrical connection reliability, comprising conductive lines of a multilayer structure and a plurality of insulating layers, and a method for manufacturing the same. Additionally, embodiments of the present invention provide a digitizer comprising the electrode connection structure.

[0029] Embodiments of the present invention will be described in more detail below with reference to the drawings. However, the following drawings attached to this specification are intended to illustrate preferred embodiments of the present invention and serve to further enhance understanding of the technical concept of the present invention together with the aforementioned description; therefore, the present invention should not be interpreted as being limited only to the matters described in such drawings.

[0030] FIG. 1 is a schematic cross-sectional view showing an electrode connection structure according to exemplary embodiments.

[0031] Referring to FIG. 1, the electrode connection structure may include a lower conductive line (110) and an upper conductive line (130) formed on a substrate layer (105). The lower conductive line (110) and the upper conductive line (130) may be separated into different layers with an insulating structure (120) in between.

[0032] For example, the insulation structure (120) may be provided as an interlayer insulation structure placed between the lower conductive line (110) and the upper conductive line (130).

[0033] The substrate layer (105) is used to encompass a support layer or film-type substrate for forming conductive lines (110, 130) and an insulating structure (120). For example, the substrate layer (105) may include a polymer applicable to a flexible display. Examples of the polymer include cyclic olefin polymer (COP), polyethylene terephthalate (PET), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), cellulose acetate propionate (CAP), polyethersulfone (PES), cellulose triacetate (TAC), polycarbonate (PC), cyclic olefin copolymer (COC), polymethyl methacrylate (PMMA), etc.

[0034] Preferably, the substrate layer (105) may include polyimide to ensure stable bending characteristics.

[0035] The lower conductive line (110) and the upper conductive line (130) may each include a low-resistance metal. For example, the lower conductive line (110) and the upper conductive line (130) may include silver (Ag), gold (Au), copper (Cu), aluminum (Al), platinum (Pt), palladium (Pd), chromium (Cr), titanium (Ti), tungsten (W), niobium (Nb), tantalum (Ta), vanadium (V), iron (Fe), manganese (Mn), cobalt (Co), nickel (Ni), zinc (Zn), tin (Sn), molybdenum (Mo), calcium (Ca), or an alloy containing at least two of these.

[0036] Preferably, the lower conductive line (110) and the upper conductive line (130) may include copper or a copper alloy for low resistance implementation.

[0037] An insulating structure (120) may be formed on the upper surface of the substrate layer (105) to partially cover the lower conductive line (110). The insulating structure (120) may include an organic insulating material such as an epoxy resin, an acrylic resin, a siloxane resin, a polyimide resin, or an inorganic insulating material such as silicon oxide or silicon nitride. Preferably, the insulating structure (120) may be formed using an organic insulating material to improve flexibility properties.

[0038] According to exemplary embodiments, the insulating structure (120) may have a multilayer structure including a first insulating layer (122) and a second insulating layer (124).

[0039] The first insulating layer (122) may be provided as a lower insulating layer. The first insulating layer (122) may be formed on the substrate layer (105) and partially cover the lower conductive line (110). For example, the first insulating layer (122) may be in contact with the side wall of the lower conductive line (110) and cover the periphery of the upper surface of the lower conductive line (110).

[0040] The side of the first insulating layer (122) may be inclined at an angle of less than 90° with respect to the upper surface of the substrate layer (105). For example, the side of the first insulating layer (122) and the upper surface of the substrate layer (105) may form a first taper angle (θ1).

[0041] In some embodiments, the first taper angle (θ1) may be 75 to 80°. Within this angle range, the second taper angle (θ2), which will be described later, can be lowered to prevent disconnection of the upper conductive line (130) and to ensure connection reliability between the lower conductive line (110) and the upper conductive line (130).

[0042] In exemplary embodiments, the second insulating layer (124) may be provided as an upper insulating layer. The second insulating layer (124) may be formed on the upper surface of the substrate layer (105) to cover the first insulating layer (122) entirely. For example, the second insulating layer (124) may cover the substrate layer (105), the first insulating layer (122), and the lower conductive line (110) together.

[0043] In exemplary embodiments, the second insulating layer (124) may include a via hole (125). The upper surface of the lower conductive line (110) may be at least partially exposed through the via hole (125). In one embodiment, the upper surface of the lower conductive line (110) may be partially exposed through the via hole (125).

[0044] The side of the second insulating layer (124) may be inclined at an angle of less than 90° with respect to the upper surface of the substrate layer (105). For example, the side of the second insulating layer (124) and the upper surface of the substrate layer (105) may form a second taper angle (θ2).

[0045] In some embodiments, the second taper angle (θ2) may be 40 to 70°. In the angle range, stable process operation can be achieved while suppressing damage to the upper conductive line (130).

[0046] For example, the second taper angle (θ2) may be reduced so that the angle between the portion of the upper conductive line (130) in contact with the side of the second insulating layer (124) and the portion of the upper conductive line (130) in contact with the upper surface of the substrate layer (105) may be mitigated. Accordingly, damage and / or cracking of the upper conductive line (130) at the portion of the upper conductive line (130) in contact with the upper surface of the substrate layer (105) may be suppressed.

[0047] In some embodiments, the first taper angle (θ1) may be larger than the second taper angle (θ2). In this case, the second taper angle (θ2) may be formed gently even if the thickness of the lower conductive line (110) increases. Accordingly, the connection reliability and structural stability of the upper conductive line (130) and the lower conductive line (110) can be improved.

[0048] In some embodiments, the side surface of the first insulating layer (122) and the upper surface of the lower conductive line (110) may form a third taper angle (θ3), and the side surface of the second insulating layer (124) and the upper surface of the lower conductive line (110) may form a fourth taper angle (θ4).

[0049] For example, the third taper angle (θ3) may be larger than the fourth taper angle (θ4). In this case, the side of the second insulating layer (124) may have a gentle slope angle. Accordingly, the reliability and stability of the upper conductive line (130), which is patterned at an angle corresponding to the side of the second insulating layer (124), may be improved.

[0050] In some embodiments, the length (W2) of the portion where the second insulating layer (124) contacts the upper surface of the substrate layer (105) may be greater than the length (W1) of the portion where the first insulating layer (122) contacts the upper surface of the substrate layer (105). In this case, the second taper angle (θ2) may be reduced compared to the first taper angle (θ1), so that the slope of the side wall of the insulating structure (120) can be formed gently. Accordingly, the connection reliability of the upper conductive line (130) may be improved.

[0051] In some embodiments, the vertical length (H1) from the upper surface of the lower conductive line (110) to the upper surface of the first insulating layer (122) may be greater than the vertical length (H2) from the upper surface of the first insulating layer (122) to the upper surface of the second insulating layer (124). In this case, the second taper angle (θ2) is reduced so that the sidewall of the second insulating layer (124) can be formed more gently. Accordingly, the structural stability of the electrode connection structure can be improved.

[0052] According to one embodiment, the vertical length (H1) from the upper surface of the lower conductive line (110) to the upper surface of the first insulating layer (122) may be 7 to 9 μm, and the vertical length (H2) from the upper surface of the first insulating layer (122) to the upper surface of the second insulating layer (124) may be 5 to 8 μm.

[0053] The above-described metal or alloy may be filled inside the via hole (125) to form an upper conductive line (130) that is electrically connected to the lower conductive line (110). The upper conductive line (130) may sufficiently fill the via hole (125) and at least partially cover the upper surface of the second insulating layer (124).

[0054] A contact (135) may be formed inside the via hole (125). The contact (135) may be a part of the upper conductive line (130) formed inside the via hole (125) and may be formed as a substantially integral member with the upper conductive line (130).

[0055] In some embodiments, the thickness of the lower conductive line (110) may be 10 μm or more. For example, the thickness of the lower conductive line (110) may be 10 to 20 μm, or 10 to 15 μm.

[0056] As described above, the thickness of the insulating layer for electrical connection of the lower conductive line (110), which is formed relatively thickly, can also be increased. For example, if the insulating layer is formed by a single coating process, the sidewall of the lower conductive line (110) may be exposed, or the insulating layer may become too thin and unsuitable to be provided as an insulating layer between electrode layers.

[0057] However, according to the exemplary embodiments described above, an insulating structure (120) of a multilayer structure can be formed to form an insulating layer of sufficient thickness for insulating the lower conductive line (110). Additionally, a via hole (125) of sufficient height and width can be formed for connection with the upper conductive line (130).

[0058] Additionally, the insulating structure (120) may include a multilayer structure in which a second insulating layer (124) having a relatively low taper angle is laminated on a first insulating layer (122) having a high taper angle. In this case, the upper conductive line (130) or contact (135) may be extended at a gentle angle of inclination and electrically connected to the lower conductive line (110). Accordingly, the upper conductive line (130) may be prevented from being disconnected at the contact portion between the upper conductive line (130) and the lower conductive line (110), and the connection reliability may be improved.

[0059] In some embodiments, the thickness of the upper conductive line (130) may be smaller than the thickness of the lower conductive line (110). For example, the thickness of the upper conductive line (130) may be about 6 μm or less, and preferably about 1 to 6 μm.

[0060] By forming the thickness of the upper conductive line (130) relatively thin, sufficient channel current or conductive coil current can be secured from the lower conductive line (110), and folding or bending characteristics can be improved. In addition, by utilizing the upper conductive line (130) in the form of a thin film, the adhesion characteristics to the via hole (125) described above can be further enhanced.

[0061] A passivation layer (140) covering an upper conductive line (130) may be formed on the insulating structure (120). For example, the passivation layer may include an organic insulating material or an inorganic insulating material that is substantially the same or similar to the insulating structure (120).

[0062] According to one embodiment, the lower conductive line (110) and the upper conductive line (130) can be extended in directions that intersect each other.

[0063] FIGS. 2 to 4 are schematic cross-sectional views illustrating a method for manufacturing an electrode connection structure according to exemplary embodiments. A detailed description of the structure and material described with reference to FIG. 1 is omitted.

[0064] For example, a lower conductive film comprising the metal or alloy described above can be formed on the upper surface of the substrate layer (105). A lower conductive line (110) can be formed by patterning the lower conductive film to a predetermined width.

[0065] As described above, the lower conductive line (110) can be formed with a thickness of about 10 μm or more.

[0066] Referring to FIG. 3, a first insulating layer (122) can be formed on the substrate layer (105) to cover the periphery of the upper surface of the lower conductive line (110).

[0067] For example, a first coating layer can be formed on a substrate layer (105) to completely cover the lower conductive line (110). According to exemplary embodiments, the first coating layer can be formed through a first spin coating process using a photosensitive composition comprising a photosensitive resin such as an epoxy resin, an acrylic resin, a siloxane resin, an imide resin, a novolak resin, etc.

[0068] For the first coating layer, for example, a pre-baking (or soft baking) process can be performed at a temperature of about 80 to 110°C. Afterwards, an exposure process can be performed using a mask to expose a portion of the upper surface of the lower conductive line (110).

[0069] In some embodiments, the post-baking process after the exposure process can be performed at a temperature of, for example, about 130 to 160°C.

[0070] Afterwards, the first insulating layer (122) can be formed by partially removing the first coating layer through a development process using, for example, an alkaline aqueous solution, thereby exposing a portion of the upper surface of the lower conductive line (110).

[0071] In one embodiment, the post-baking process may be performed for a longer period than the pre-baking process. For example, the pre-baking process may be performed for about 3 to 10 minutes, and the post-baking process may be performed for about 20 to 30 minutes.

[0072] By performing the above post-baking process for a sufficient amount of time and temperature, damage to the first insulating layer (122) can be prevented when forming the second insulating layer (124) or via hole (125) described later.

[0073] Referring to FIG. 4, a second insulating layer (124) can be formed on the first insulating layer (122).

[0074] For example, a second coating layer can be formed by forming the photosensitive composition described above on the substrate layer (105) and the first insulating layer (122) through a second spin coating process. The second coating layer can be formed to fill the upper surface of the lower conductive line (110) exposed when the first insulating layer (122) is formed.

[0075] For the second coating layer, for example, a pre-baking process can be performed at a temperature of about 80 to 110°C. Afterwards, an exposure process can be performed using a mask for forming via holes (125).

[0076] In some embodiments, the post-baking process after the exposure process can be performed at a temperature of, for example, about 180 to 220°C.

[0077] Afterwards, the second coating layer can be partially removed to form via holes (125) through a development process using, for example, an alkaline aqueous solution. Accordingly, a second insulating layer (124) can be formed that covers the first insulating layer (122) entirely and partially exposes the upper surface of the lower conductive line (110).

[0078] At least a portion of the second coating layer filling the upper surface of the lower conductive line (110) exposed in the above development process may be removed together to form a via hole (125). As described above, since the first insulating layer (122) is in a cured state through pre-baking and post-baking processes, a via hole (125) can be formed without damaging the first insulating layer (122).

[0079] Even when forming the second insulating layer (124), the post-baking process may be performed for a longer time than the pre-baking process. For example, the pre-baking process may be performed for about 3 to 10 minutes, and the post-baking process may be performed for about 20 to 30 minutes.

[0080] In some embodiments, the rotational speed of the first spin coating process for forming the first insulating layer (122) and the rotational speed of the second spin process for forming the second insulating layer (124) can each be adjusted to about 300 to 500 rpm. Accordingly, the height of the first insulating layer (122) can be sufficiently increased, and the connection reliability between the conductive lines (110, 130) can be improved through the gentle taper angle of the second insulating layer (124).

[0081] In the insulating structure (120) manufactured according to the above-described process, the taper angle formed by the side of the first insulating layer (122) and the upper surface of the substrate layer (105) may be greater than the taper angle formed by the side of the second insulating layer (124) and the upper surface of the substrate layer (105).

[0082] For example, the aforementioned taper angles (θ 1, θ2) can be controlled by changing the exposure and development conditions during the formation of the insulating layers (122, 124).

[0083] For example, tapered angles (θ 1, θ2) can be adjusted by changing at least one of the conditions for the formation of insulating layers (122, 124), such as the exposure time, the power of the exposure device, the distance from the exposure device, and the development time.

[0084] The insulating structure (120) can be formed continuously in two steps to uniformly control the thickness and surface flatness of the insulating layers (122, 124).

[0085] Again, referring to FIG. 1, an upper conductive layer can be formed on the second insulating layer (124) to fill via holes (125). Subsequently, the upper conductive layer can be patterned to a predetermined width to form an upper conductive line (130) including contacts (135) that contact the lower conductive line (110) through via holes (125).

[0086] FIG. 5 is a schematic cross-sectional view showing a digitizer according to exemplary embodiments. FIG. 6 and FIG. 7 are schematic plan views showing conductive coils included in a digitizer according to exemplary embodiments. For example, FIG. 5 is a cross-sectional view cut along the thickness direction along the II' line indicated in FIG. 6.

[0087] In FIGS. 5 to 7, two directions that are parallel to and intersect each other on the upper surface of the digitizer (100) or substrate layer (105) are defined as the first direction and the second direction. For example, the first direction and the second direction may intersect perpendicularly to each other.

[0088] The first direction may correspond to the width direction, row direction, or X-direction of the digitizer (100). The second direction may correspond to the length direction, column direction, or Y-direction of the digitizer (100).

[0089] Referring to FIGS. 5 through 7, the digitizer (100) may include an electrode connection structure according to exemplary embodiments described with reference to FIG. 1. According to exemplary embodiments, the digitizer (100) may include a lower conductive line (110) and an upper conductive line (130) formed on a substrate layer (105). The lower conductive line (110) and the upper conductive line (130) may be separated into different layers with an insulating structure (120) in between.

[0090] A digitizer (100) according to exemplary embodiments may include a first conductive coil (50) (see FIG. 6) and a second conductive coil (70) (see FIG. 7).

[0091] The first conductive coil (50) and the second conductive coil (70) can be defined by combining the lower conductive line (110) and the upper conductive line (130) by contacts (135).

[0092] The lower conductive line (110) may include a first lower conductive line (112) (see FIG. 7) and a second lower conductive line (114) (see FIG. 6). The upper conductive line (130) may include a first upper conductive line (132) (see FIG. 6) and a second upper conductive line (134) (see FIG. 7).

[0093] The first lower conductive line (112) and the second lower conductive line (114) can be extended in a second direction. The first upper conductive line (132) and the second upper conductive line (134) can be extended in a first direction.

[0094] As shown in FIG. 6, the first upper conductive line (132) of the upper conductive line (130) and the second lower conductive line (114) of the lower conductive line (110) can be combined to form a first conductive coil (50).

[0095] The first upper conductive line (132) and the second lower conductive line (114) together form the first conductive coil (50) and can be provided together as a sensing line for an input pen through electromagnetic induction.

[0096] For example, the first upper conductive line (132) and the second lower conductive line (114) may be electrically connected to each other through the first contact (135a). A plurality of first upper conductive lines (132) and a plurality of second lower conductive lines (114) may be electrically connected to each other through the plurality of first contacts (135a) so that a plurality of conductive loops may be included within a single first conductive coil (50). For example, four first conductive loops may be included within a single first conductive coil (50).

[0097] In some embodiments, the first conductive loops may have different sizes or areas in the planar direction. The first contact (135a) may penetrate the insulating structure (120) and be formed substantially integrally with the first upper conductive line (132).

[0098] A first input line (113) and a first output line (115) may be connected to any one of the first conductive loops. For example, the first input line (113) may be connected to the innermost first conductive loop among the first conductive loops. The first output line (115) may be connected to the outermost first conductive loop among the first conductive loops.

[0099] The current input from the first input line (113) alternately circulates through the lower conductive line (110) and the upper conductive line (130) via the first conductive loops and can be discharged through the first output line (115).

[0100] In some embodiments, the first input line (113) and the first output line (115) may be included in the lower conductive line (110).

[0101] In some embodiments, the lower conductive line (110) may include a first internal connection line (114a). For example, adjacent first conductive loops may be connected by the first internal connection line (114a).

[0102] As shown in FIG. 7, the first lower conductive line (112) of the lower conductive line (110) and the second upper conductive line (134) of the upper conductive line (130) can be combined to form a second conductive coil (70).

[0103] The first lower conductive line (112) and the second upper conductive line (134) together form a second conductive coil (70) and can be provided together as a sensing line for an input pen through electromagnetic induction.

[0104] For example, the first lower conductive line (112) and the second upper conductive line (134) may be electrically connected to each other through the second contact (135b). A plurality of first lower conductive lines (112) and a plurality of second upper conductive lines (134) may be electrically connected to each other through the plurality of second contacts (135b) so that a plurality of conductive loops may be included within a single second conductive coil (70). For example, four second conductive loops may be included within a single second conductive coil (70).

[0105] In some embodiments, the second conductive loops may have different sizes or areas in the planar direction. The second contact (135b) may penetrate the insulating structure (120) and be formed substantially integrally with the second upper conductive line (134).

[0106] A second input line (117) and a second output line (119) may be connected to any one of the second conductive loops. For example, the second input line (117) may be connected to the innermost second conductive loop among the second conductive loops. The second output line (119) may be connected to the outermost second conductive loop among the second conductive loops.

[0107] The current input from the second input line (117) alternately circulates through the lower conductive line (110) and the upper conductive line (130) via the second conductive loops and can be discharged through the second output line (119).

[0108] In some embodiments, the second input line (117) and the second output line (119) may be included in the lower conductive line (110).

[0109] In some embodiments, the upper conductive line (130) may further include an external connection line (134a). For example, the second input line (117) and the second output line (119) may be connected via the external connection line (134a) through the second conductive loop and the second contact (135b).

[0110] In one embodiment, the external connection line (134a) may be connected to two different second conductive coils. For example, a second output line (119) connected to one of the second conductive coils (70) may be connected to a second input line (117) of another second conductive coil (70) through the external connection line (134a).

[0111] In some embodiments, the upper conductive line (130) may further include a second internal connection line (134b). For example, adjacent second conductive loops within the second conductive coil (70) may be connected to each other by the second internal connection line (134b).

[0112] Although FIGS. 6 and 7 show that four conductive loops are included within a single conductive coil, the number of conductive loops within the conductive coil can be adjusted considering the size and resolution of the image display device.

[0113] As described with reference to FIGS. 6 and 7, the first conductive coil (50) and the second conductive coil (70) may each include a plurality of conductive loops of different sizes.

[0114] Accordingly, the magnetic field strength generated through the digitizer (100) can be sufficiently increased to efficiently enhance energy transfer to an input pen that contacts, for example, the window surface of an image display device.

[0115] In addition, the lower conductive line (110) and the upper conductive line (130) are connected through the contact (135) to form a conductive loop, thereby efficiently increasing the number of loops of the conductive coil within a limited space and improving electromagnetic induction efficiency.

[0116] As described above, the thickness of the lower conductive line (110) may be greater than the thickness of the upper conductive line (130). As described below with reference to FIG. 8, the upper conductive line (130) may extend in a first direction (e.g., row direction or width direction) and may intersect with the bending axis. For example, the upper conductive line (130) may be perpendicular to the bending axis. The lower conductive line (110) may extend in a second direction (column direction or length direction) and may be substantially parallel to the bending axis.

[0117] According to exemplary embodiments, the thickness of the upper conductive line (130), which intersects the bending axis and is easily transmitted to the bending stress, can be reduced to prevent or suppress cracking within the conductive line. A first lower conductive line (110), which is parallel to the bending axis and relatively free from bending stress, can be formed with a large thickness to expand the current path through the conductive coil, thereby enabling a sufficient electromagnetic induction effect.

[0118] Additionally, as described with reference to FIG. 1, the contact (135) can be formed within an insulating structure (120) that includes a via hole (125). Accordingly, even when the thickness of the lower conductive line (110) is increased, stable connection reliability with the upper conductive line (130) can be secured while maintaining a certain level of insulation.

[0119] FIG. 8 is a schematic plan view showing a digitizer according to exemplary embodiments. For convenience of explanation, the detailed structure / configuration of the conductive coil is omitted in FIG. 8.

[0120] Referring to FIG. 8, a plurality of first conductive coils (50) and second conductive coils (70) may be arranged on the upper surface of the substrate layer (105).

[0121] The first conductive coil (50) may extend in the first direction or row direction. A plurality of first conductive coils (50) may be arranged along the second direction or column direction.

[0122] For example, n first conductive coils (50-1 to 50-n) may be arranged sequentially along the second direction (n is a natural number).

[0123] The second conductive coil (70) may extend in the second direction or column direction. A plurality of second conductive coils (70) may be arranged along the first direction or row direction.

[0124] For example, m second conductive coils (70-1 to 70-m) may be arranged sequentially along the first direction.

[0125] A bending region (BA) may be included in the central portion of the substrate layer (105). A bending axis (80) extending in the second direction may be located within the bending region (BA). A digitizer (100) according to exemplary embodiments may be bent or folded around the bending axis (80).

[0126] As described above, in some embodiments, the thickness of the upper conductive line (130) intersecting the bending axis (80) may be relatively small. Thus, it is possible to prevent cracking of the upper conductive line (130) to which bending stress is directly applied and to increase flexibility.

[0127] The thickness of the lower conductive line (110), which is parallel to the bending axis (80) and has relatively low bending stress, can be increased to reduce resistance and improve the efficiency of generating a magnetic field through the conductive coil.

[0128] In addition, by utilizing the electrode connection structure described with reference to FIG. 1, even when the thickness of the upper conductive line (130) is reduced, the electrical connection of the conductive coil (50, 70) is maintained during repeated folding or bending, thereby enabling the desired electromagnetic generation. Explanation of the symbols

[0129] 50: 1st Conductive Coil 70: 2nd Conductive Coil 100: Digitizer 105: Substrate layer 110: Lower conductive line 120: Insulation structure 122: First insulating layer 124: Second insulating layer 125: Via hole 130: Upper conduction line 135: Contact 140: Passivation layer

Claims

Claim 1 A digitizer comprising: a substrate layer; a lower conductive line disposed on the upper surface of the substrate layer; a first insulating layer formed on the upper surface of the substrate layer and covering the periphery of the upper surface of the lower conductive line; a second insulating layer formed on the upper surface of the first insulating layer and covering the first insulating layer entirely, the second insulating layer including a via hole that exposes the upper surface of the lower conductive line; and an upper conductive line disposed on the second insulating layer and electrically connected to the lower conductive line through the via hole, wherein the side surface of the first insulating layer and the upper surface of the substrate layer form a first taper angle, the side surface of the second insulating layer and the upper surface of the substrate layer form a second taper angle, and the first taper angle is greater than the second taper angle. Claim 2 A digitizer according to claim 1, wherein the second insulating layer covers the substrate layer, the first insulating layer and the lower conductive line together. Claim 3 delete Claim 4 A digitizer according to claim 1, wherein the first taper angle is 75 to 80° and the second taper angle is 40 to 70°. Claim 5 A digitizer according to claim 1, wherein the side surface of the first insulating layer and the upper surface of the lower conductive line form a third taper angle, the side surface of the second insulating layer and the upper surface of the lower conductive line form a fourth taper angle, and the third taper angle is greater than the fourth taper angle. Claim 6 A digitizer according to claim 1, wherein the length of the portion of the second insulating layer in contact with the upper surface of the substrate layer is greater than the length of the portion of the first insulating layer in contact with the upper surface of the substrate layer. Claim 7 A digitizer according to claim 1, wherein the vertical length from the upper surface of the lower conductive line to the upper surface of the first insulating layer is greater than the vertical length from the upper surface of the first insulating layer to the upper surface of the second insulating layer. Claim 8 A digitizer according to claim 1, wherein the thickness of the lower conductive line is greater than the thickness of the upper conductive line. Claim 9 A digitizer according to claim 1, wherein the thickness of the lower conductive line is 10 μm or more. Claim 10 A digitizer according to claim 1, wherein the lower conductive line and the upper conductive line extend in a direction intersecting each other. Claim 11 A digitizer according to claim 1, wherein the lower conductive line comprises a plurality of lower conductive lines and the upper conductive line comprises a plurality of upper conductive lines, and the lower conductive lines and the upper conductive lines are combined with each other through the via hole to form a plurality of conductive coils. Claim 12 A digitizer according to claim 11, wherein the lower conductive lines include first lower conductive lines and second lower conductive lines extending in a column direction, and the upper conductive lines include first upper conductive lines and second upper conductive lines extending in a row direction. Claim 13 A digitizer according to claim 12, wherein the conductive coils comprise: a first conductive coil formed by connecting the first upper conductive lines and the second lower conductive lines to each other; and a second conductive coil formed by connecting the first lower conductive lines and the second upper conductive lines to each other. Claim 14 A digitizer according to claim 11, wherein the substrate layer includes a bending region, and the bending axis of the bending region intersects the upper conductive line and is parallel to the lower conductive line.

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