Display apparatus

Abstract

A display device according to an embodiment of the present specification may include a substrate, a buffer layer on the substrate, a first active layer made of a low-temperature polysilicon material, a first gate electrode overlapping with the first active layer with a first gate insulating layer and a second gate insulating layer in between, and a first source electrode and a first drain electrode electrically connected to the first active layer, and a second thin-film transistor including a second active layer made of an oxide semiconductor, a second gate electrode overlapping with the second active layer with a second gate insulating layer in between, and a second source electrode and a second drain electrode electrically connected to the second active layer. Additionally, the first gate electrode of the first thin-film transistor and the second gate electrode of the second thin-film transistor may be disposed on the second gate insulating layer.

Description

Technology Field

[0001] This specification relates to a display device, and more specifically, to a display device in which a plurality of thin-film transistors are formed of different semiconductors. Background Technology

[0002] Recently, as we have entered the full-scale information age, the field of displays that visually represent electrical information signals has developed rapidly, and in response to this, various display apparatuses with excellent performance such as thinness, lightness, and low power consumption are being developed.

[0003] Specific examples of such display devices include liquid crystal displays (LCDs) and electroluminescence display apparatuses such as organic light-emitting diodes (OLEDs) and quantum dot light-emitting diodes (QLEDs). In particular, electroluminescence display apparatuses are next-generation display devices with self-emissive properties and possess superior characteristics compared to liquid crystal displays in terms of viewing angle, contrast, response speed, and power consumption.

[0004] An electroluminescent display device includes a display area for displaying an image and a non-display area disposed adjacent to the display area. Additionally, the pixel area includes a pixel circuit and a light-emitting element. A plurality of thin-film transistors are located in the pixel circuit to drive light-emitting elements disposed in a plurality of pixels.

[0005] Thin-film transistors can be classified according to the material constituting the semiconductor layer. Among them, low-temperature polysilicon (LTPS) thin-film transistors and oxide semiconductor thin-film transistors are the most widely used. Meanwhile, active technological development is underway for electroluminescent display devices in which low-temperature polysilicon thin-film transistors and oxide semiconductor thin-film transistors are formed on the same substrate. The problem to be solved

[0006] In the method for manufacturing the inventor display device of the present specification, it was recognized that the operating characteristics of a pixel can be improved by forming a plurality of thin-film transistors with different semiconductors.

[0007] Accordingly, the inventor of this specification has invented a display device capable of reducing damage to semiconductor devices while forming each of the semiconductors of the plurality of thin-film transistors on different layers in order to form a plurality of thin-film transistors on different semiconductors.

[0008] Accordingly, the problem that the present specification aims to solve is to provide a thin-film transistor and a display device in which damage to semiconductor elements is reduced during the manufacture of a display device by forming a plurality of thin-film transistors from different semiconductor materials.

[0009] The problems described in this specification are not limited to those mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0010] A display device according to an embodiment of the present specification may include a substrate, a buffer layer on the substrate, a first active layer made of a low-temperature polysilicon material, a first gate electrode overlapping with the first active layer with a first gate insulating layer and a second gate insulating layer in between, and a first source electrode and a first drain electrode electrically connected to the first active layer, and a second thin-film transistor including a second active layer made of an oxide semiconductor, a second gate electrode overlapping with the second active layer with a second gate insulating layer in between, and a second source electrode and a second drain electrode electrically connected to the second active layer. Additionally, the first gate electrode of the first thin-film transistor and the second gate electrode of the second thin-film transistor may be disposed on the second gate insulating layer.

[0011] A display device according to an embodiment of the present specification may include a first thin-film transistor comprising a first active layer, a first gate electrode, a first source electrode, and a first drain electrode, and a second thin-film transistor comprising a second active layer, a second gate electrode, a second source electrode, and a second drain electrode. Additionally, the display device may include a substrate, a buffer layer on the substrate, a first active layer on the buffer layer and made of a low-temperature polysilicon material, a first gate insulating layer on the first active layer and the buffer layer, a second active layer on the first gate insulating layer and made of an oxide semiconductor, a second gate insulating layer on the second active layer and the first gate insulating layer, a first gate electrode and a second gate electrode on the second gate insulating layer, a first gate electrode, a second gate electrode, and an interlayer insulating layer on the second gate insulating layer, and a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode on the interlayer insulating layer.

[0012] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0013] The present specification states that the reliability of a display device can be improved by arranging thin-film transistors comprising different semiconductor materials.

[0014] In addition, the present specification can improve product reliability by blocking the charge on the lower polyimide (PI) by forming an inorganic film between two polyimides (PI). Furthermore, since the process of forming a metal layer to block the charge on the polyimide (PI) can be omitted, the process can be simplified and production costs can be reduced.

[0015] Furthermore, the present specification allows for the prevention of hydrogen generated in the substrate from diffusing into the active layer by arranging a blocking layer integrally formed and connected to a capacitor electrode so as to overlap with the active layer of a thin-film transistor comprising an oxide semiconductor material. Additionally, by forming a buffer layer disposed between the blocking layer and the active layer as a multilayer consisting of an upper buffer layer with a relatively low hydrogen content and a lower buffer layer with relatively high insulation, the upper buffer layer in contact with the lower surface of the active layer can prevent hydrogen from diffusing into the active layer of the thin-film transistor comprising the oxide semiconductor material. Furthermore, the lower buffer layer disposed between the blocking layer and the upper buffer layer can prevent the charge accumulated in the blocking layer from being transferred to the active layer of the thin-film transistor.

[0016] In addition, the present specification allows for the first gate electrode of a first thin-film transistor, the second gate electrode of a second thin-film transistor, and the first capacitor electrode of a storage capacitor to be formed on the same layer in a single process, thereby reducing the number of production process steps. Furthermore, by shortening the production process time, there is an effect of reducing process costs.

[0017] The effects according to this specification are not limited to those exemplified above, and a wider variety of effects are included within this specification. Brief explanation of the drawing

[0018] FIG. 1 is a cross-sectional view illustrating a display device according to one embodiment of the present specification. FIG. 2 is a cross-sectional view illustrating a display device according to another embodiment of the present specification. Specific details for implementing the invention

[0019] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0020] Shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are exemplary, and therefore the present invention is not limited to the depicted details. Throughout the specification, the same reference numerals refer to the same components. Furthermore, in describing the present invention, if it is determined that a detailed description of related prior art may unnecessarily obscure the essence of the present invention, such detailed description is omitted. Where terms such as "includes," "has," or "is made up" are used in this specification, other parts may be added unless "only" is used. Where a component is expressed in the singular, it includes cases where it is included in the plural unless specifically stated otherwise.

[0021] In interpreting the components, they are interpreted to include a margin of error even in the absence of a separate explicit statement.

[0022] In the case of describing a positional relationship, for example, when the positional relationship between two parts is described using expressions such as 'on,' 'upper,' 'lower,' or 'next to,' one or more other parts may be located between the two parts unless 'immediately' or 'directly' is used.

[0023] When an element or layer is referred to as "on" another element or layer, it includes cases where another layer or element is placed directly on top of or in between.

[0024] Although terms such as "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the technical scope of the present invention.

[0025] Throughout the specification, the same reference numerals refer to the same components.

[0026] The size and thickness of each component shown in the drawings are illustrated for convenience of explanation, and the present invention is not necessarily limited to the size and thickness of the illustrated components.

[0027] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and as will be fully understood by those skilled in the art, various technical interlocking and operation are possible, and each embodiment may be implemented independently of one another or together in an interlocking relationship.

[0028] Hereinafter, various embodiments of the present invention will be described with reference to the attached drawings.

[0029] The display apparatus of this specification may be applied to electroluminescence display apparatuses such as organic light-emitting display devices (OLEDs) or quantum dot light-emitting display devices (QLEDs), but is not limited thereto and may be applied to various display devices. For example, it may also be applied to liquid crystal display devices (LCDs).

[0030] FIG. 1 is a cross-sectional view illustrating a display device according to one embodiment of the present specification.

[0031] Referring to FIG. 1, a display device (100) according to an embodiment of the present specification may include a substrate (110), a first buffer layer (111), a first thin-film transistor (120), a second thin-film transistor (130), a storage capacitor (140), a first gate insulating layer (112), a first interlayer insulating layer (113), a second buffer layer (114), a second gate insulating layer (115), a second interlayer insulating layer (116), a first flattening layer (117), a second flattening layer (118), a connecting electrode (150), a bank (180), an auxiliary electrode (160), a spacer (190), a light-emitting element (210), and an encapsulation portion (220).

[0032] The substrate (110) can support various components of the display device (100). The substrate (110) may be made of glass or a plastic material having flexibility. If the substrate (110) is made of a plastic material, for example, it may be made of polyimide (PI). If the substrate (110) is made of polyimide (PI), the display device manufacturing process may proceed with a support substrate made of glass placed under the substrate (110), and the support substrate may be released after the display device manufacturing process is completed. Additionally, after the support substrate is released, a back plate for supporting the substrate (110) may be placed under the substrate (110).

[0033] When the substrate (110) is made of polyimide (PI), moisture components may penetrate the substrate (110) made of polyimide (PI) and permeate to the first thin-film transistor (120) or light-emitting structure (200), thereby degrading the performance of the display device (100). In order to prevent the performance of the display device (100) from degrading due to moisture permeation, the display device (100) according to one embodiment of the present specification may be composed of double polyimide (PI). Furthermore, by forming an inorganic film between the two polyimide (PI) layers, moisture components can be blocked from penetrating the lower polyimide (PI) layer, thereby improving the reliability of the product performance.

[0034] In addition, when an inorganic film is formed between two polyimides (PI), the charge on the lower polyimide (PI) can form a back bias and affect the first thin-film transistor (120). Therefore, it is necessary to form a separate metal layer to block the charge on the polyimide (PI). However, the display device (100) according to one embodiment of the present specification can improve product reliability by blocking the charge on the lower polyimide (PI) by forming an inorganic film between two polyimides (PI). Also, since the process of forming a metal layer to block the charge on the polyimide (PI) can be omitted, the process can be simplified and production costs can be reduced.

[0035] In a flexible display device product using polyimide (PI) as a substrate (110), it is very important to ensure environmental reliability and performance reliability of the panel.

[0036] A display device (100) according to one embodiment of the present specification may implement a structure for ensuring environmental reliability of the product by using a double base layer as a substrate. For example, as shown in FIG. 1, the substrate (110) of the display device (100) may include a first base layer (110a), a second base layer (110c), and an inorganic insulating layer (110b) formed between the first base layer (110a) and the second base layer (110c). The inorganic insulating layer (110b) may serve to block the charge from affecting the first thin-film transistor (120) through the second base layer (110b) when the charge is charged on the first base layer (110a). Also, the inorganic insulating layer (110b) formed between the first base layer (110a) and the second base layer (110c) may serve to block moisture components from penetrating through the first base layer (110b).

[0037] The inorganic insulating layer (110b) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. A display device (100) according to one embodiment of the present specification may form the inorganic insulating layer (110b) with a silicon oxide (SiOx) material. For example, among the silicon oxide (SiOx) materials, silicon dioxide (Siica or Silicon Dioxide: SiO2) material may be formed as the inorganic insulating layer (110b). However, it is not limited thereto, and the inorganic insulating layer (110b) may be formed as a double layer of silicon dioxide (SiO2) and silicon nitride (SiNx).

[0038] The first buffer layer (111) may be formed on the entire surface of the substrate (110). The first buffer layer (111) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. For example, if the first buffer layer (111) is a multilayer, the first buffer layer (111) may be a multilayer composed of a silicon nitride (SiNx) layer and a silicon dioxide (SiO2) layer. The first buffer layer (111) may perform the role of improving the adhesion between the layers formed on the first buffer layer (111) and the substrate (110), and blocking alkaline components, etc., from leaking out from the substrate (110). Also, the first buffer layer (111) is not an essential component and may be omitted based on the type and material of the substrate (110), the structure and type of the thin-film transistor, etc.

[0039] According to one embodiment of the present specification, the first buffer layer (111) may be formed as a multilayer formed alternately of silicon nitride (SiNx) and silicon oxide (SiOx). Specifically, the first buffer layer (111) may consist of n+1 layers. Here, n represents an even number including 0, such as 0, 2, 4, 6, and 8. Thus, when n=0, the first buffer layer (111) is formed as a single layer. When the first buffer layer (111) is formed as a single layer, the first buffer layer (111) may be formed of silicon nitride (SiNx) or silicon oxide (SiOx) material. Meanwhile, when n=2, the first buffer layer (111) may be formed as a triple layer. When the first buffer layer (111) is formed as a triple layer, the upper and lower layers may be silicon oxide (SiOx), and the intermediate layer placed between the upper and lower layers may be silicon nitride (SiNx). And, when n=4, the first buffer layer (111) may be formed as a quintet. When the first buffer layer (111) is formed as a quintet, as shown in FIG. 1, the first-a buffer layer (111a) may be formed on the substrate (110). Also, the first-a buffer layer (111a) may be formed of silicon oxide (SiOx) material. And, the first-b buffer layer (111b) may be formed of silicon nitride (SiNx) material and may be placed on the first-a buffer layer (111a). Additionally, the first-c buffer layer (111c) may be formed of a silicon oxide (SiOx) material and may be placed on the first-b buffer layer (111b). Additionally, the first-d buffer layer (111d) may be formed of a silicon nitride (SiNx) material and may be placed on the first-c buffer layer (111c). Additionally, the first-e buffer layer (111e) may be formed of a silicon oxide (SiOx) material and may be placed on the first-d buffer layer (111d).In this way, when n is an even number greater than or equal to 2, the first buffer layer (111) may be formed as a multilayer structure in which silicon oxide (SiOx) and silicon nitride (SiNx) are alternately formed. Furthermore, the uppermost and lowermost layers of the first buffer layer (111) formed as a multilayer structure may be formed from silicon oxide (SiOx) material. The silicon oxide (SiOx) material may be silicon dioxide (SiO2) material. For example, the first buffer layer (111) formed as a plurality of layers may include an upper layer in contact with the first active layer (121) of the first thin-film transistor (120), a lower layer in contact with the substrate (110), and an intermediate layer located between the upper layer and the lower layer. Furthermore, the upper layer and the lower layer may be formed from silicon oxide (SiOx) material. Furthermore, the upper layer of the first buffer layer (111) formed as a multilayer structure may be formed to be thicker than the thickness of the lower layer and the intermediate layer. In the first buffer layer (111) composed of multiple layers, the thickness of the upper layer in contact with the first active layer (121) of the first thin-film transistor (120) may be greater than the thickness of the lower layer and the middle layer of the first buffer layer (111). For example, as shown in FIG. 1, when the first buffer layer (111) is a 5-layer structure, the first-e buffer layer (111e) in contact with the first active layer (121) may be the upper layer. Also, the first-a buffer layer (111a) in contact with the substrate (110) may be the lower layer. Furthermore, the first-b buffer layer (111b), the first-c buffer layer (111c), and the first-d buffer layer (111d) disposed between the first-a buffer layer (111a) and the first-e buffer layer (111e) may be middle layers. Here, the thickness of the upper layer, the first-e buffer layer (111e), may be greater than the thickness of the lower layer, the first-a buffer layer (111a), and the respective thicknesses of the middle layers, the first-b buffer layer (111b), the first-c buffer layer (111c), and the first-d buffer layer (111d).More specifically, the thickness of the first-e buffer layer (111e) may be 3000 Å, and the first-a buffer layer (111a) may be formed to be 1000 Å, but is not limited to these thicknesses. Also, the thicknesses of the first-b buffer layer (111b), the first-c buffer layer (111c), and the first-d buffer layer (111d) may each be formed to be 1000 Å, but are not limited to these thicknesses.

[0040] In addition, in the first buffer layer (111) composed of multiple layers, all other layers except the upper layer that contacts the first active layer (121) of the first thin-film transistor (120) may have the same thickness. For example, the thicknesses of the first-a buffer layer (111a), the first-b buffer layer (111b), the first-c buffer layer (111c), and the first-d buffer layer (111d), excluding the first-e buffer layer (111e) that contacts the first active layer (121), may all be the same.

[0041] A first thin-film transistor (120) may be disposed on a first buffer layer (111). The first thin-film transistor (120) may include a first active layer (121), a first gate electrode (124), a first source electrode (122), and a first drain electrode (123). Here, depending on the design of the pixel circuit, the first source electrode (122) may become a drain electrode, and the first drain electrode (123) may become a source electrode. The first active layer (121) of the first thin-film transistor (120) may be disposed on the first buffer layer (111).

[0042] The first active layer (121) may include low temperature polysilicon (LTPS). Since polysilicon material has high mobility (100 cm² / Vs or more), low energy consumption, and excellent reliability, it can be applied to a gate driver and / or multiplexer (MUX) for driving devices that drive thin-film transistors for display devices, and can be applied as an active layer of a driving thin-film transistor in a display device according to the embodiment, but is not limited thereto. For example, it may be applied as an active layer of a switching thin-film transistor depending on the characteristics of the display device. Polysilicon can be formed by depositing an amorphous silicon (a-Si) material on the first buffer layer (111) and performing a dehydrogenation process and a crystallization process, and the first active layer (121) can be formed by patterning the polysilicon. The first active layer (121) may include a first channel region (121a) where a channel is formed when the first thin-film transistor (120) is driven, a first source region (121b) and a first drain region (121c) on both sides of the first channel region (121a). The first source region (121b) may be a portion of the first active layer (121) connected to the first source electrode (122), and the first drain region (121c) may be a portion of the first active layer (121) connected to the first drain electrode (123). The first source region (121b) and the first drain region (121c) may be formed by ion doping (impurity doping) of the first active layer (121). The first source region (121b) and the first drain region (121c) can be created by ion doping a polysilicon material, and the first channel region (121a) can be a portion left as a polysilicon material without ion doping.

[0043] A first gate insulating layer (112) may be disposed on the first active layer (121) of the first thin-film transistor (120). The first gate insulating layer (112) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. Contact holes may be formed in the first gate insulating layer (112) for connecting the first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120), respectively, to the first source region (121b) and the first drain region (121c) of the first active layer (121) of the first thin-film transistor (120), respectively.

[0044] A first gate electrode (124) of a first thin-film transistor (120) and a first capacitor electrode (141) of a storage capacitor (140) may be disposed on a first gate insulating layer (112).

[0045] The first gate electrode (124) and the first capacitor electrode (141) may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or alloys thereof. The first gate electrode (124) may be formed on the first gate insulating layer (112) so as to overlap with the first channel region (121a) of the first active layer (121) of the first thin-film transistor (120). The first capacitor electrode (141) may be omitted based on the driving characteristics of the display device (100) and the structure and type of the thin-film transistor. The first gate electrode (124) and the first capacitor electrode (141) may be formed by the same process. Furthermore, the first gate electrode (124) and the first capacitor electrode (141) may be formed from the same material and may be formed on the same layer.

[0046] A first interlayer insulating layer (113) may be disposed on a first gate insulating layer (112), a first gate electrode (124), and a first capacitor electrode (141). The first interlayer insulating layer (113) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. A contact hole may be formed in the first interlayer insulating layer (113) to expose a first source region (121b) and a first drain region (121c) of a first active layer (121) of a first thin-film transistor (120).

[0047] A second capacitor electrode (142) of a storage capacitor (140) may be disposed on the first interlayer insulating layer (113). The second capacitor electrode (142) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The second capacitor electrode (142) may be formed on the first interlayer insulating layer (113) so as to overlap with the first capacitor electrode (141). Additionally, the second capacitor electrode (142) may be formed from the same material as the first capacitor electrode (141). The second capacitor electrode (142) may be omitted based on the driving characteristics of the display device (100) and the structure and type of the thin-film transistor, etc.

[0048] A second buffer layer (114) may be disposed on the first interlayer insulating layer (113) and the second capacitor electrode (142). The first buffer layer (114) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. A contact hole may be formed in the second buffer layer (114) to expose the first source region (121b) and the first drain region (121c) of the first active layer (121) of the first thin-film transistor (120). Additionally, a contact hole may be formed to expose the second capacitor electrode (142) of the storage capacitor (140).

[0049] A second active layer (131) of a second thin-film transistor (130) may be disposed on the second buffer layer (114). The second thin-film transistor (130) may include a second active layer (131), a second gate insulating layer (115), a second gate electrode (134), a second source electrode (132), and a second drain electrode (133). Here, depending on the design of the pixel circuit, the second source electrode (132) may become a drain electrode, and the second drain electrode (133) may become a source electrode.

[0050] The second active layer (131) may include a second channel region (131a) where a channel is formed when the second thin-film transistor (130) is driven, a second source region (131b) and a second drain region (131c) on both sides of the second channel region (131a). The second source region (131b) may be a portion of the second active layer (131) connected to the second source electrode (132), and the second drain region (131c) may be a portion of the second active layer (131) connected to the second drain electrode (133).

[0051] The second active layer (131) may be made of an oxide semiconductor. Since oxide semiconductor materials have a larger bandgap compared to silicon materials, electrons cannot cross the bandgap in the off state, and consequently, the off-current is low. Therefore, a thin-film transistor including an active layer made of an oxide semiconductor may be suitable for a switching thin-film transistor that maintains a short on time and a long off time, but is not limited thereto. Depending on the characteristics of the display device, it may also be applied as a driving thin-film transistor. Also, since the off-current is small, the size of the auxiliary capacitance can be reduced, making it suitable for high-resolution display devices. For example, the second active layer (131) may be made of a metal oxide, and may be made of various metal oxides such as IGZO (indium-gallium-zinc-oxide). Although the second active layer (131) of the second thin-film transistor (130) is described as being formed based on an IGZO layer assuming that it is composed of IGZO among various metal oxides, it is not limited thereto and may be formed with other metal oxides such as IZO (indium-zinc-oxide), IGTO (indium-gallium-tin-oxide), or IGO (indium-gallium-oxide).

[0052] The second active layer (131) can be formed by depositing a metal oxide on the second buffer layer (114), performing a heat treatment process for stabilization, and then patterning the metal oxide.

[0053] An insulating material layer and a metal material layer can be formed sequentially on the entire surface of the substrate including the second active layer (131), and a photoresist pattern can be formed on the metal material layer.

[0054] The insulating material layer can be formed using the PECVD method, and the metallic material layer can be formed using the sputtering method.

[0055] A second gate electrode (134) can be formed by wet etching a metal material layer using a photoresist pattern (PR) as a mask. For the wet etching solution to etch the metal material layer, a material that selectively etches molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or their alloys constituting the metal material layer, and does not etch the insulating material layer, may be used.

[0056] A second gate insulating layer (115) can be formed by dry etching an insulating material layer using a photoresist pattern (PR) and a second gate electrode (134) as a mask.

[0057] Through a dry etching process, the insulating material layer can be etched to form a second gate insulating layer (115) pattern on the second active layer (131). Additionally, a portion of the second active layer (131) exposed by the patterned second gate insulating layer (115) can be made conductive by the dry etching process.

[0058] A second active layer (131) may be formed, comprising a second channel region (131a) that is not conductive in correspondence with the region where the second gate electrode (134) is formed, and a second source region (131b) and a second drain region (131c) that are conductive at both ends of the second active layer (131), respectively.

[0059] The second source region (131b) and the second drain region (131c) of the conductive second active layer (131) have lowered resistance, thereby improving the device performance of the second thin-film transistor (130), and accordingly, the effect of improving the reliability of the display device (100) according to the embodiment of the present specification can be obtained.

[0060] The second channel region (131a) of the second active layer (131) may be arranged to overlap with the second gate electrode (134). Additionally, the second source region (131b) and the second drain region (131c) of the second active layer (131) may be arranged on both sides of the second channel region (131a). Furthermore, the second gate insulating layer (115) may be arranged between the second gate electrode (134) and the second active layer (131). Additionally, the second gate insulating layer (115) may be arranged to overlap with the second gate electrode (134) and the second channel region (131a) of the second active layer (131).

[0061] As the insulating material layer and the metal material layer are etched using a photoresist pattern (PR) as a mask, the second gate insulating layer (115) and the second gate electrode (134) can be formed in the same pattern. The second gate insulating layer (115) can be placed on the second active layer (131). The second gate insulating layer (115) can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. The second gate insulating layer (115) can be patterned to overlap with the second channel region (131a) of the second active layer (131). The second gate electrode (134) can be placed on the second gate insulating layer (114). The second gate electrode (134) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The second gate electrode (134) may be patterned to overlap with the second active layer (131) and the second gate insulating layer (115). The second gate electrode (134) may be patterned to overlap with the second channel region (131a) of the second active layer (131). And, the second gate insulating layer (115) may be patterned to overlap with the second channel region (131a) of the second active layer (131). Thus, the second gate electrode (134) and the second gate insulating layer (115) may overlap with the second channel region (131a) of the second active layer (131). The second interlayer insulating layer (116) may be disposed on the second buffer layer (114), the second active layer (131), and the second gate electrode (134). A contact hole may be formed in the second interlayer insulating layer (116) to expose the first active layer (121) of the first thin-film transistor (120) and the second active layer (131) of the second thin-film transistor (130).For example, a contact hole may be formed in the second interlayer insulating layer (116) to expose the first source region (121b) and the first drain region (121c) of the first active layer (121) of the first thin-film transistor (120). Additionally, a contact hole may be formed in the second interlayer insulating layer (116) to expose the second source region (131b) and the second drain region (131c) of the second active layer (131) of the second thin-film transistor (130). The second interlayer insulating layer (116) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof.

[0062] A connecting electrode (150), a first source electrode (122) and a first drain electrode (123) of a first thin-film transistor (120), and a second source electrode (132) and a second drain electrode (133) of a second thin-film transistor (130) may be disposed on the second interlayer insulating layer (116).

[0063] The first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120) can be connected to the first active layer (121) of the first thin-film transistor (120) through contact holes formed in the first gate insulating layer (112), the first interlayer insulating layer (113), the second buffer layer (114), and the second interlayer insulating layer (116). Accordingly, the first source electrode (122) of the first thin-film transistor (120) can be connected to the first source region (121b) of the first active layer (121) through contact holes formed in the first gate insulating layer (112), the first interlayer insulating layer (113), the second buffer layer (114), and the second interlayer insulating layer (116). And, the first drain electrode (123) of the first thin-film transistor (120) can be connected to the first drain region (121c) of the first active layer (121) through a contact hole formed in the first gate insulating layer (112), the first interlayer insulating layer (113), the second buffer layer (114), and the second interlayer insulating layer (116).

[0064] Additionally, the connecting electrode (150) can be electrically connected to the second drain electrode (133) of the second thin-film transistor (130). Additionally, the connecting electrode (150) can be electrically connected to the second capacitor electrode (142) of the storage capacitor (140) through a contact hole formed in the second buffer layer (114) and the second interlayer insulating layer (116). Thus, the connecting electrode (150) can serve to electrically connect the second capacitor electrode (142) of the storage capacitor (140) and the second drain electrode (133) of the second thin-film transistor (130).

[0065] Additionally, the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130) can be connected to the second active layer (131) through a contact hole formed in the second interlayer insulating layer (116). Accordingly, the second source electrode (132) of the second thin-film transistor (130) can be connected to the second source region (131b) of the second active layer (131) through a contact hole formed in the second interlayer insulating layer (116), and the second drain electrode (133) of the second thin-film transistor (130) can be connected to the second drain region (131c) of the second active layer (131) through a contact hole formed in the second interlayer insulating layer (116).

[0066] The connecting electrode (150), the first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120), and the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130) can be formed by the same process. Also, the connecting electrode (140), the first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120), and the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130) can be formed from the same material. The connecting electrode (140), the first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120), and the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130) may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. For example, the connecting electrode (140), the first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120), and the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130) may be formed as a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of a conductive metal material, but is not limited thereto.

[0067] The connecting electrode (150) can be formed as an integral unit connected to the second drain electrode (133) of the second thin-film transistor (130).

[0068] The first flattening layer (117) may be disposed on the connection electrode (140), the first source electrode (122) and the first drain electrode (123) of the first thin-film transistor (120), the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130), and the second interlayer insulating layer (116). As shown in FIG. 1, a contact hole may be formed in the first flattening layer (117) to expose the second drain electrode (133), but is not limited thereto. For example, a contact hole may be formed in the first flattening layer (117) to expose the second source electrode (132) of the second thin-film transistor (130). Alternatively, a contact hole may be formed in the first flattening layer (117) to expose a connecting electrode (150) electrically connected to the second drain electrode (133) of the second thin-film transistor (130). The first flattening layer (117) may be an organic material layer for flattening and protecting the upper portion of the first thin-film transistor (120) and the second thin-film transistor (130). For example, the flattening layer (118) may be formed from an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0069] An auxiliary electrode (160) may be disposed on the first flattening layer (117). The auxiliary electrode (160) may be connected to the second drain electrode (133) of the second thin-film transistor (130) through a contact hole of the first flattening layer (117). The auxiliary electrode (160) may serve to electrically connect the second thin-film transistor (130) and the first electrode (211) of the light-emitting element (210). The auxiliary electrode (160) may electrically connect the second thin-film transistor (130) and the light-emitting element (210). The light-emitting element (210) may include a first electrode (211), a light-emitting structure (212), and a second electrode (213). The auxiliary electrode (160) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The auxiliary electrode (160) may be formed of the same material as the second source electrode (132) and the second drain electrode (133) of the second thin-film transistor (130).

[0070] The second flattening layer (118) may be disposed on the auxiliary electrode (160) and the first flattening layer (117). And, as shown in FIG. 1, a contact hole may be formed in the second flattening layer (118) to expose the auxiliary electrode (160). The second flattening layer (118) may be an organic material layer for flattening the upper portion of the first thin-film transistor (120) and the second thin-film transistor (130). For example, the second flattening layer (118) may be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0071] The first electrode (211) can be disposed on the second flattening layer (118). The first electrode (211) can be electrically connected to the auxiliary electrode (160) through a contact hole formed in the second flattening layer (118). Thus, the first electrode (170) can be electrically connected to the second thin-film transistor (130) by being connected to the auxiliary electrode (160) through the contact hole formed in the second flattening layer (118).

[0072] The first electrode (211) may be formed as a multilayer structure including a transparent conductive film and an opaque conductive film with high reflection efficiency. The transparent conductive film may be made of a material with a relatively high work function value, such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO). The opaque conductive film may be formed as a single layer or multilayer structure including Al, Ag, Cu, Pb, Mo, Ti, or alloys thereof. For example, the first electrode (211) may be formed as a structure in which a transparent conductive film, an opaque conductive film, and a transparent conductive film are sequentially stacked. However, it is not limited thereto, and it may also be formed as a structure in which a transparent conductive film and an opaque conductive film are sequentially stacked.

[0073] Since the display device (100) according to the embodiment of the present specification is a top emission display device (indicated by an arrow in FIG. 1), the first electrode (211) may be an anode electrode. In the case where the display device (100) is bottom emission, the first electrode (211) disposed on the second flattening layer (118) may be a cathode electrode.

[0074] A bank (180) may be disposed on the first electrode (211) and the second flattening layer (118). An opening may be formed in the bank (180) to expose the first electrode (211). Since the bank (180) can define a light-emitting area of ​​the display device (100), it may also be called a pixel defining film. A spacer (190) may be further disposed on the bank (180). And, a light-emitting structure (212) including a light-emitting layer may be further disposed on the first electrode (211).

[0075] The light-emitting structure (212) may be formed by stacking a hole layer, a light-emitting layer, and an electron layer in the order of or in reverse order on the first electrode (211). In addition, the light-emitting structure (212) may have first and second light-emitting structures facing each other with a charge-generating layer in between. In this case, one of the light-emitting layers of the first and second light-emitting structures may generate blue light, and the other of the light-emitting layers of the first and second light-emitting structures may generate yellow-green light, thereby generating white light through the first and second light-emitting structures. The white light generated from the light-emitting structure (212) may be incident on a color filter (not shown) located above the light-emitting structure (212) to create a color image. Alternatively, a color image may be created by generating color light corresponding to each subpixel in each light-emitting structure (212) without a separate color filter. That is, the light-emitting structure (212) of the red (R) subpixel may emit red light, the light-emitting structure (212) of the green (G) subpixel may emit green light, and the light-emitting structure (212) of the blue (B) subpixel may emit blue light.

[0076] A second electrode (213) may be further disposed on the light-emitting structure (212). The second electrode (213) may be disposed on the light-emitting structure (212) so as to face the first electrode (211) with the light-emitting structure (212) in between. In the display device (100) according to the embodiment of the present specification, the second electrode (213) may be a cathode electrode. A sealing portion (220) that suppresses moisture penetration may be further disposed on the second electrode (213) of the light-emitting element (210).

[0077] The encapsulation portion (220) may include a first inorganic encapsulation layer (220a), a second organic encapsulation layer (220b), and a third inorganic encapsulation layer (220c). The first inorganic encapsulation layer (220a) of the encapsulation portion (220) may be disposed on the second electrode (210). Additionally, the second organic encapsulation layer (220b) may be disposed on the first inorganic encapsulation layer (220a). Furthermore, the third inorganic encapsulation layer (220c) may be disposed on the second organic encapsulation layer (220b). The first inorganic encapsulation layer (220a) and the third inorganic encapsulation layer (220c) of the encapsulation portion (220) may be formed from inorganic materials such as silicon nitride (SiNx) or silicon oxide (SiOx). The second organic bag layer (220b) of the bag portion (220) may be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0078] FIG. 2 is a cross-sectional view illustrating a display device according to another embodiment of the present specification. It is described primarily in terms of differences compared with FIG. 1, and redundant descriptions are omitted or briefly explained. For example, the substrate (310), buffer layer (311), light-emitting element (350), bank (317), spacer (318), and encapsulation portion (360) are substantially identical. Therefore, redundant descriptions of the configuration of FIG. 2, which is substantially identical to FIG. 1, are omitted or briefly explained.

[0079] Referring to FIG. 2, a display device (300) according to another embodiment of the present specification may include a substrate (310), a buffer layer (311), a first thin-film transistor (320), a second thin-film transistor (330), a first gate insulator (312), a first gate insulator layer (313), an interlayer insulating film (314), a first protective layer (315), a second protective layer (316), a storage capacitor (340), a bank (317), an auxiliary electrode (379), a spacer (318), a light-emitting element (350), and an encapsulation portion (360). Additionally, the first active layer (321) of the first thin-film transistor (320) may be made of a low-temperature polysilicon material, and the second active layer (331) of the second thin-film transistor (330) may be made of an oxide semiconductor.

[0080] A buffer layer (311) may be disposed on a substrate (310). And, the buffer layer (311) is substantially the same as the first buffer layer (111) of FIG. 1.

[0081] A first thin-film transistor (320) may be disposed on a buffer layer (311). The first thin-film transistor (320) may include a first active layer (321), a first gate electrode (324), a first source electrode (322), and a first drain electrode (323). The first active layer (321) of the first thin-film transistor (320) may be disposed on the buffer layer (311). The lower surface of the first active layer (321) may be in direct contact with the upper surface of the buffer layer (311).

[0082] The first active layer (321) may include low temperature polysilicon (LTPS). The first active layer (321) may include a first channel region (321a) where a channel is formed when the first thin-film transistor (320) is driven, a first source region (321b) and a first drain region (321c) on both sides of the first channel region (321a). The first source region (321b) may be a portion of the first active layer (321) connected to the first source electrode (322), and the first drain region (321c) may be a portion of the first active layer (321) connected to the first drain electrode (323). The first source region (321b) and the first drain region (321c) may be created by ion doping a polysilicon material, and the first channel region (321a) may be a portion left as a polysilicon material without ion doping. A first gate insulating layer (312) may be disposed on the buffer layer (311) and the first active layer (321) of the first thin-film transistor (320). The lower surface of the first gate insulating layer (312) may be in direct contact with the upper surface of the first active layer (321) and the upper surface of the buffer layer (311). The first gate insulating layer (312) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. A contact hole may be formed in the first gate insulating layer (312) for connecting the first source electrode (322) and the first drain electrode (323) of the first thin-film transistor (320) to the first source region (321b) and the first drain region (321c) of the first active layer (321) of the first thin-film transistor (320), respectively.

[0083] A second active layer (331) of a second thin-film transistor (330) may be disposed on a first gate insulating layer (312). The lower surface of the second active layer (331) may be in direct contact with the upper surface of the first gate insulating layer (312). The second thin-film transistor (330) may include a second active layer (331), a second gate electrode (334), a second source electrode (332), and a second drain electrode (333). A first gate insulating layer (312) may be disposed between the lower surface of the second active layer (331) and the upper surface of the first active layer (321).

[0084] The second active layer (331) may include a second channel region (331a) where a channel is formed when the second thin-film transistor (330) is driven, a second source region (331b) and a second drain region (331c) on both sides of the second channel region (331a). The second source region (331b) may be a portion of the second active layer (331) connected to the second source electrode (332), and the second drain region (331c) may be a portion of the second active layer (331) connected to the second drain electrode (333). Additionally, the second active layer (331) may be made of an oxide semiconductor.

[0085] A second gate insulating layer (313) may be disposed on the first gate insulating layer (312) and the second active layer (331) of the second thin-film transistor (330). The lower surface of the second gate insulating layer (313) may be in direct contact with the upper surface of the second active layer (331) and the upper surface of the first gate insulating layer (312). The second gate insulating layer (313) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. Contact holes may be formed in the second gate insulating layer (313) for connecting the first source electrode (322) and the first drain electrode (323) of the first thin-film transistor (320), respectively, to the first source region (321b) and the first drain region (321c) of the first active layer (321) of the first thin-film transistor (320), respectively. Additionally, a contact hole may be formed in the second gate insulating layer (313) so that the second source electrode (332) and the second drain electrode (333) of the second thin-film transistor (330) are each connected to the second source region (331b) and the second drain region (331c) of the second active layer (331) of the second thin-film transistor (330), respectively.

[0086] The first gate electrode (324) of the first thin-film transistor (320), the second gate electrode (334) of the second thin-film transistor (330), and the first capacitor electrode (341) of the storage capacitor (340) may be disposed on the second gate insulating layer (313).

[0087] The first gate electrode (324), the first capacitor electrode (341), and the second gate electrode (334) may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or alloys thereof. The first gate electrode (324) may be formed on the second gate insulating layer (313) so as to overlap with the first channel region (321a) of the first active layer (321) of the first thin-film transistor (320). The first capacitor electrode (341) may be omitted based on the driving characteristics of the display device (300) and the structure and type of the thin-film transistor. Additionally, the second gate electrode (334) may be formed on the second gate insulating layer (313) so as to overlap with the second channel region (331a) of the second active layer (331) of the second thin-film transistor (330). The first gate electrode (324), the second gate electrode (334), and the first capacitor electrode (341) can be formed by the same process. Additionally, the first gate electrode (324), the second gate electrode (334), and the first capacitor electrode (341) can be formed from the same material and can be formed on the same layer.

[0088] Each lower surface of the first gate electrode (324), the first capacitor electrode (341), and the second gate electrode (334) can come into direct contact with the upper surface of the second gate insulating layer (313). In the display device (300) according to the embodiment of the present specification, the first gate electrode (324), the second gate electrode (334), and the first capacitor electrode (341) can be formed on the same layer in a single process, thereby reducing the number of production process steps. Furthermore, by shortening the production process time, there is an effect of reducing process costs.

[0089] The first gate electrode (324) may be positioned to overlap the first active region (321a) of the first active layer (321) with the first gate insulating layer (312) and the second gate insulating layer (313) in between. The second gate electrode (334) may be positioned to overlap the second active region (331a) of the second active layer (331) with the second gate insulating layer (313) in between. For example, the first gate insulating layer (312) and the second gate insulating layer (313) may be positioned between the upper surface of the first active layer (321) and the lower surface of the first gate electrode (324). Additionally, the lower surface of the first gate electrode (324) may be positioned to face the upper surface of the first active layer (321) with the first gate insulating layer (312) and the second gate insulating layer (313) in between. Additionally, a second gate insulating layer (313) may be disposed between the upper surface of the second active layer (331) and the lower surface of the second gate electrode (334). Furthermore, the lower surface of the second gate electrode (334) may be disposed to face the upper surface of the second active layer (331) with the second gate insulating layer (313) in between.

[0090] An interlayer insulating layer (314) may be disposed on the second gate insulating layer (313), the first gate electrode (324), the first capacitor electrode (341), and the second gate electrode (334). The interlayer insulating layer (314) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. A contact hole may be formed in the interlayer insulating layer (314) to expose the first source region (321b) and the first drain region (321c) of the first active layer (321) of the first thin-film transistor (320). Additionally, a contact hole may be formed in the interlayer insulating layer (314) to expose the second source region (331b) and the second drain region (331c) of the second active layer (331) of the second thin-film transistor (330).

[0091] A first source electrode (322) and a first drain electrode (323) of a first thin-film transistor (320), a second source electrode (332) and a second drain electrode (333) of a second thin-film transistor (330), and a second capacitor electrode (342) of a storage capacitor (340) may be disposed on an interlayer insulating layer (314). The first source electrode (322), the first drain electrode (323), the second source electrode (332), the second drain electrode (333), and the second capacitor electrode (342) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0092] The first source electrode (322), the first drain electrode (323), the second source electrode (332), the second drain electrode (333), and the second capacitor electrode (342) can be formed by the same process. Additionally, the first source electrode (322), the first drain electrode (323), the second source electrode (332), the second drain electrode (333), and the second capacitor electrode (342) can be formed from the same material and can be formed on the same layer. The second capacitor electrode (342) and the second drain electrode (333) can be formed as an integrated unit connected to each other.

[0093] The first source electrode (322) and the first drain electrode (323) of the first thin-film transistor (320) can be connected to the first source region (321b) and the first drain region (321c) of the first active layer (321) through contact holes of the first gate insulating layer (312), the second gate insulating layer (313), and the interlayer insulating layer (314).

[0094] The second source electrode (332) and the second drain electrode (333) of the second thin-film transistor (330) can be connected to the second source region (331b) and the second drain region (331c) of the second active layer (331) through the contact holes of the second gate insulating layer (313) and the interlayer insulating layer (314).

[0095] The second capacitor electrode (342) may be arranged to overlap the first capacitor electrode (341) with an interlayer insulating layer (314) in between. Additionally, the second capacitor electrode (342) may be formed of the same material as the first capacitor electrode (341).

[0096] A first protective layer (315) may be disposed on an interlayer insulating layer (314), a first source electrode (322) and a first drain electrode (323) of a first thin-film transistor (320), a second source electrode (332) and a second drain electrode (333) of a second thin-film transistor (330), and a second capacitor electrode (342) of a storage capacitor (340). The first protective layer (315) may be an inorganic material layer for protecting the thin-film transistor disposed on the lower surface. For example, it may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. However, it is not limited thereto, and the first protective layer (315) may be an organic material layer for flattening the upper surface and protecting the thin-film transistor disposed on the lower surface. For example, the first protective layer (315) may be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0097] A contact hole may be formed in the first protective layer (315) to expose the second drain electrode (333) of the second thin-film transistor (330), but is not limited thereto. For example, a contact hole may be formed in the first protective layer (315) to expose the second source electrode (332) of the second thin-film transistor (330). Alternatively, a contact hole may be formed in the first protective layer (315) to expose the first source electrode (322) or the first drain electrode (323) of the first thin-film transistor (320).

[0098] An auxiliary electrode (370) may be disposed on the first protective layer (315). The auxiliary electrode (370) may be connected to the second drain electrode (333) of the second thin-film transistor (330) through a contact hole of the first protective layer (315). The auxiliary electrode (370) may serve to electrically connect the second drain electrode (333) of the second thin-film transistor (330) and the first electrode (351) of the light-emitting element (350). The auxiliary electrode (370) may electrically connect the second thin-film transistor (330) and the light-emitting element (350). The light-emitting element (350) may include a first electrode (351), a light-emitting structure (352), and a second electrode (353). The auxiliary electrode (370) may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The auxiliary electrode (370) may be formed of the same material as the second source electrode (332) and the second drain electrode (333) of the second thin-film transistor (330).

[0099] The second protective layer (316) may be disposed on the auxiliary electrode (370) and the first protective layer (315). And, as shown in FIG. 2, a contact hole may be formed in the second protective layer (316) to expose the auxiliary electrode (370). The second protective layer (316) may be an organic material layer for flattening the upper surface of the first thin-film transistor (320) and the second thin-film transistor (330). For example, the second protective layer (316) may be formed of an organic material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0100] The first electrode (351) may be disposed on the second protective layer (316). The first electrode (351) may be electrically connected to the auxiliary electrode (370) through a contact hole formed in the second protective layer (316). Thus, the first electrode (351) may be electrically connected to the second thin-film transistor (330) by being connected to the auxiliary electrode (370) through the contact hole formed in the second protective layer (316).

[0101] A bank (317) may be disposed on the first electrode (351) and the second protective layer (316). An opening may be formed in the bank (317) to expose the first electrode (351). Since the bank (317) can define a light-emitting area of ​​the display device (300), it may also be called a pixel defining film. A spacer (318) may be further disposed on the bank (317). And, a light-emitting structure (352) including a light-emitting layer may be further disposed on the first electrode (351).

[0102] The light-emitting structure (352) may be formed by stacking a hole layer, a light-emitting layer, and an electron layer in the order of or in reverse order on the first electrode (351). In addition, the light-emitting structure (352) may have first and second light-emitting structures facing each other with a charge generation layer in between. In this case, one of the light-emitting layers of the first and second light-emitting structures may generate blue light, and the other of the light-emitting layers of the first and second light-emitting structures may generate yellow-green light, thereby generating white light through the first and second light-emitting structures. The white light generated from the light-emitting structure (352) may be incident on a color filter (not shown) located above the light-emitting structure (352) to create a color image. Alternatively, a color image may be created by generating color light corresponding to each subpixel in each light-emitting structure (352) without a separate color filter. That is, the light-emitting structure (352) of the red (R) subpixel may emit red light, the light-emitting structure (352) of the green (G) subpixel may emit green light, and the light-emitting structure (352) of the blue (B) subpixel may emit blue light.

[0103] A second electrode (353) may be further disposed on the light-emitting structure (352). The second electrode (353) may be disposed on the light-emitting structure (352) so as to face the first electrode (351) with the light-emitting structure (352) in between. A sealing portion (360) that inhibits moisture penetration may be further disposed on the light-emitting element (350) comprising the first electrode (351), the light-emitting structure (352), and the second electrode (353).

[0104] The encapsulation portion (360) may include a first inorganic encapsulation layer (361), a second organic encapsulation layer (362), and a third inorganic encapsulation layer (363). The first inorganic encapsulation layer (361) of the encapsulation portion (360) may be disposed on the second electrode (352). Additionally, the second organic encapsulation layer (362) may be disposed on the first inorganic encapsulation layer (361). Furthermore, the third inorganic encapsulation layer (363) may be disposed on the second organic encapsulation layer (362). The first inorganic encapsulation layer (361) and the third inorganic encapsulation layer (363) of the encapsulation portion (360) may be formed from an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx). The second organic bag layer (362) of the bag portion (360) may be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0105] A display device according to an embodiment of the present specification may be described as follows.

[0106] A display device according to an embodiment of the present specification may include a substrate, a buffer layer on the substrate, a first active layer made of a low-temperature polysilicon material, a first gate electrode overlapping with the first active layer with a first gate insulating layer and a second gate insulating layer in between, and a first source electrode and a first drain electrode electrically connected to the first active layer, and a second thin-film transistor including a second active layer made of an oxide semiconductor, a second gate electrode overlapping with the second active layer with a second gate insulating layer in between, and a second source electrode and a second drain electrode electrically connected to the second active layer. Additionally, the first gate electrode of the first thin-film transistor and the second gate electrode of the second thin-film transistor may be disposed on the second gate insulating layer.

[0107] According to an embodiment of the present specification, the first active layer of the first thin-film transistor is on the buffer layer, and the first gate insulating layer is on the first active layer and the buffer layer; the second active layer of the second thin-film transistor is on the first gate insulating layer, and the second gate insulating layer is on the second active layer and the first gate insulating layer; the first gate electrode of the first thin-film transistor and the second gate electrode of the second thin-film transistor are on the second gate insulating layer; the interlayer insulating layer is on the first gate electrode, the second gate electrode, and the second gate insulating layer; and the first source electrode and the first drain electrode of the first thin-film transistor and the second source electrode and the second drain electrode of the second thin-film transistor may be on the interlayer insulating layer.

[0108] According to an embodiment of the present specification, the first source electrode and the first drain electrode may be electrically connected to the first active layer through an interlayer insulating layer, a second gate insulating layer, and a contact hole of the first gate insulating layer, and the second source electrode and the second drain electrode may be electrically connected to the second active layer through an interlayer insulating layer and a contact hole of the second gate insulating layer.

[0109] According to an embodiment of the present specification, the first active layer may include a first active region overlapping with a first gate electrode, a first source region in contact with a first source electrode, and a first drain region in contact with a first drain electrode, and the second active layer may include a second active region overlapping with a second gate electrode, a second source region in contact with a second source electrode, and a second drain region in contact with a second drain electrode.

[0110] According to an embodiment of the present specification, a first active region of a 1 active layer may overlap with a first gate electrode with a first gate insulating layer and a second gate insulating layer in between, and a second active region of a 2 active layer may overlap with a second gate electrode with a second gate insulating layer in between.

[0111] According to the embodiments of the present specification, the first gate electrode and the second gate electrode may be made of the same material. A display device according to the embodiments of the present specification may include a first thin-film transistor comprising a first active layer, a first gate electrode, a first source electrode, and a first drain electrode, and a second thin-film transistor comprising a second active layer, a second gate electrode, a second source electrode, and a second drain electrode. Furthermore, the display device may include a substrate, a buffer layer on the substrate, a first active layer on the buffer layer and made of a low-temperature polysilicon material, a first gate insulating layer on the first active layer and the buffer layer, a second active layer on the first gate insulating layer and made of an oxide semiconductor, a second gate insulating layer on the second active layer and the first gate insulating layer, a first gate electrode and a second gate electrode on the second gate insulating layer, a first gate electrode, a second gate electrode, and an interlayer insulating layer on the second gate insulating layer, and a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode on the interlayer insulating layer.

[0112] According to an embodiment of the present specification, the first source electrode and the first drain electrode may contact the first active layer through an interlayer insulating layer, a second gate insulating layer, and a contact hole of the first gate insulating layer, and the second source electrode and the second drain electrode may contact the second active layer through a contact hole of the interlayer insulating layer and the second gate insulating layer.

[0113] According to an embodiment of the present specification, the first gate electrode may overlap with the first active layer with the first gate insulating layer and the second gate insulating layer in between, and the second gate electrode may overlap with the second active layer with the second gate insulating layer in between.

[0114] According to an embodiment of the present specification, the lower surface of the first gate electrode and the lower surface of the second gate electrode can be in direct contact with the upper surface of the second gate insulating layer.

[0115] According to an embodiment of the present specification, a first gate insulating layer may be present between the upper surface of the first active layer and the lower surface of the second active layer.

[0116] According to an embodiment of the present specification, the lower surface of the second gate insulating layer may be in direct contact with the upper surface of the second active layer and the upper surface of the first gate insulating layer.

[0117] According to an embodiment of the present specification, the lower surface of the first gate insulating layer may be in direct contact with the upper surface of the first active layer and the upper surface of the buffer layer.

[0118] According to an embodiment of the present specification, a second gate insulating layer may be present between the upper surface of the second active layer and the lower surface of the second gate electrode, and a first gate insulating layer and a second gate insulating layer may be present between the upper surface of the first active layer and the lower surface of the first gate electrode.

[0119] Although the embodiments of this specification have been described in more detail with reference to the attached drawings, this specification is not necessarily limited to these embodiments and may be modified in various ways within the scope of the technical spirit of the invention. Accordingly, the embodiments disclosed in this specification are intended to explain, not limit, the technical spirit of the invention, and the scope of the technical spirit of the invention is not limited by these embodiments. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. The scope of protection of the invention shall be interpreted by the claims below, and all technical spirits within an equivalent scope shall be interpreted as being included within the scope of rights of the invention. Explanation of the symbols

[0120] 100, 300: Display device 110, 310: Substrate 120, 320: First thin-film transistor 121: 1st active layer 122, 322: First source electrode 123, 323: First drain electrode 124, 324: First gate electrode 130, 330: Second thin-film transistor 131, 331: Second active layer 132, 332: Second source electrode 133, 333: Second drain electrode 134, 334: Second gate electrode 140, 340: Storage capacitors 160, 370: Auxiliary electrode 210, 350: Light-emitting elements 220, 360: Bag section

Claims

Claim 1 A substrate comprising a plurality of subpixels; a buffer layer on the substrate; a first thin-film transistor comprising a first active layer made of a low-temperature polysilicon material, a first gate electrode overlapping the first active layer with a first gate insulating layer and a second gate insulating layer in between, and a first source electrode and a first drain electrode electrically connected to the first active layer; A second thin-film transistor comprising a second active layer made of an oxide semiconductor, a second gate electrode overlapping the second active layer with the second gate insulating layer in between, and a second source electrode and a second drain electrode electrically connected to the second active layer; a storage capacitor comprising a first capacitor electrode disposed on the same layer as the first gate electrode and the second gate electrode, and a second capacitor electrode integrally formed with the second drain electrode; a first protective layer disposed on the first thin-film transistor and the second thin-film transistor; an auxiliary electrode disposed on the first protective layer and electrically connected to the second thin-film transistor; a second protective layer disposed on the auxiliary electrode; a first electrode disposed on the second protective layer; a bank disposed on the first electrode and the second protective layer; a spacer disposed on the bank; a light-emitting structure disposed on the first electrode, the bank, and the spacer, comprising a hole layer, a light-emitting layer, and an electron layer; and a second electrode disposed on the light-emitting structure, wherein the first gate electrode of the first thin-film transistor and the second A display device wherein the second gate electrode of a thin-film transistor is disposed on the second gate insulating layer, and the buffer layer comprises an upper layer in contact with the first active layer, a lower layer in contact with the substrate, and an intermediate layer located between the upper layer and the lower layer, wherein the upper layer is thicker than the thickness of the lower layer and the intermediate layer. Claim 2 A display device according to claim 1, wherein the first active layer of the first thin-film transistor is on the buffer layer, the first gate insulating layer is on the first active layer and the buffer layer, the second active layer of the second thin-film transistor is on the first gate insulating layer, the second gate insulating layer is on the second active layer and the first gate insulating layer, the first gate electrode of the first thin-film transistor and the second gate electrode of the second thin-film transistor are on the second gate insulating layer, the interlayer insulating layer is on the first gate electrode, the second gate electrode, and the second gate insulating layer, and the first source electrode and the first drain electrode of the first thin-film transistor and the second source electrode and the second drain electrode of the second thin-film transistor are on the interlayer insulating layer. Claim 3 A display device according to claim 2, wherein the first source electrode and the first drain electrode are electrically connected to the first active layer through the interlayer insulating layer, the second gate insulating layer, and the contact hole of the first gate insulating layer, and the second source electrode and the second drain electrode are electrically connected to the second active layer through the contact hole of the interlayer insulating layer and the second gate insulating layer. Claim 4 A display device according to claim 3, wherein the first active layer comprises a first active region overlapping with the first gate electrode, a first source region in contact with the first source electrode, and a first drain region in contact with the first drain electrode, and the second active layer comprises a second active region overlapping with the second gate electrode, a second source region in contact with the second source electrode, and a second drain region in contact with the second drain electrode. Claim 5 A display device according to claim 4, wherein the first active region of the first active layer overlaps with the first gate electrode with the first gate insulating layer and the second gate insulating layer in between, and the second active region of the second active layer overlaps with the second gate electrode with the second gate insulating layer in between. Claim 6 A display device according to claim 2, wherein the first gate electrode and the second gate electrode are made of the same material. Claim 7 delete Claim 8 delete Claim 9 delete Claim 10 delete Claim 11 delete Claim 12 delete Claim 13 delete Claim 14 delete Claim 15 A display device according to claim 1, wherein the substrate comprises: a first base layer; a second base layer on the first base layer; and an inorganic insulating layer disposed between the first base layer and the second base layer. Claim 16 delete Claim 17 A display device according to claim 1, wherein the auxiliary electrode is electrically connected to the second thin-film transistor and the first electrode. Claim 18 delete Claim 19 A display device according to claim 1, wherein the bank defines a light-emitting region by exposing at least a portion of the first electrode, and the light-emitting region overlaps with the first thin-film transistor. Claim 20 delete

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