Display device

Abstract

Embodiments of the present invention relate to a display device, and provide a structure in which, in a structure including a hole area in which a camera sensor or the like is disposed in an active area of ​​a display panel, a layer in which a data line driving a green subpixel is disposed among data lines disposed by bypassing the hole area is adjusted to prevent an increase in the load of the data line driving the green subpixel. Accordingly, a decrease in brightness exhibited by the subpixel driven by the data line disposed by bypassing the hole area is prevented in the vicinity of the hole area, and the uniformity of brightness exhibited in the vicinity of the hole area can be improved.

Description

Technology Field

[0001] Embodiments of the present invention relate to a display device. Background Technology

[0002] As the information society develops, the demand for display devices that display images is increasing, and various types of display devices, such as liquid crystal displays and organic light-emitting displays, are being utilized.

[0003] A display device may include a display panel in which a plurality of subpixels are arranged to display an image, and various driving circuits for driving the subpixels arranged on the display panel.

[0004] In addition, the display device may provide a function to detect an object approaching the display panel and perform input processing based on the detection information, or to capture an object approaching the display panel and display the captured video or image through the display panel.

[0005] Accordingly, the display device may include sensors such as proximity sensors or camera sensors depending on the required function. And, such sensors may be placed, for example, in a bezel area of ​​the display panel where an image is not displayed.

[0006] Alternatively, in some cases, to prevent an increase in the bezel area of ​​the display panel, a camera sensor, etc., may be located in a part of the active area where an image is displayed on the display panel.

[0007] In such cases, since an area for sensor placement exists within the active area where signal lines and subpixels for display driving are arranged, there is a problem in that it is difficult to arrange the configuration for display driving due to the sensor area.

[0008] In addition, due to the placement of the sensor area, structures such as signal lines and subpixels located around the sensor area may be formed differently from other areas within the active area, which presents a problem where display quality may degrade as a result of placing the sensor in the active area. The problem to be solved

[0009] Embodiments of the present invention provide a signal line arrangement structure capable of driving subpixels arranged around the area where a sensor is arranged, while including an area where a sensor is arranged in the active area of ​​a display panel.

[0010] Embodiments of the present invention provide a method for improving the uniformity of an image displayed in subpixels located around an area where a sensor is placed in an active area. means of solving the problem

[0011] In one aspect, embodiments of the present invention provide a display device comprising a display panel having a plurality of gate lines, a plurality of data lines and a plurality of subpixels arranged thereon, at least one hole region located in an active area of ​​the display panel, and a boundary region arranged in contact with the outer edge of the hole region.

[0012] A plurality of data lines included in such a display device may include a plurality of first data lines that supply data voltage to a first color subpixel among a plurality of subpixels and have a portion disposed in a boundary area, and a plurality of second data lines that supply data voltage to a second color subpixel among a plurality of subpixels and have a portion disposed in a boundary area and are disposed in a layer different from the layer where the first data lines are disposed.

[0013] Also, the gate line may be placed on a different layer from the layer where the data line is placed, and the vertical distance between the second data line and the gate line may be greater than the vertical distance between the first data line and the gate line.

[0014] Here, the first data line can supply data voltage to the red subpixel and the blue subpixel, and the second data line can supply data voltage to the green subpixel.

[0015] In another aspect, embodiments of the present invention provide a display device comprising at least one hole area disposed in an active area, a boundary area disposed in contact with the outer edge of the hole area, and a plurality of data lines, each having a portion disposed in the boundary area and at least a portion having a curved shape, wherein two adjacent data lines among the plurality of data lines are disposed on different layers. Effects of the invention

[0016] According to embodiments of the present invention, a boundary area is placed around a hole area where a camera sensor, etc. is placed in an active area of ​​a display panel, and a signal line for driving the display is placed in the boundary area, thereby providing a structure for placing a signal line that drives a subpixel located around a hole area.

[0017] In addition, by varying the layer in which the data line is placed according to the subpixel driven by the data line placed in the boundary area located around the hole area, the increase in load caused by the increase in the length of the data line placed in the boundary area can be reduced.

[0018] Therefore, it is possible to prevent a decrease in brightness caused by an increased load on the data lines driving the subpixels located around the hole area, and to improve the uniformity of the image displayed around the hole area. Brief explanation of the drawing

[0019] FIG. 1 is a diagram showing the schematic configuration of a display device according to embodiments of the present invention. FIG. 2 is a diagram showing an example of a circuit structure and driving timing of a subpixel included in a display device according to embodiments of the present invention. FIG. 3 is a diagram showing an example of a structure in which a hole area is arranged in the active area of ​​a display device according to embodiments of the present invention. FIG. 4 is a diagram showing an example of a structure in which a signal line is placed in a boundary area located around a hole area placed in an active area of ​​a display device according to embodiments of the present invention. FIG. 5 is a diagram showing another example of a structure in which a signal line is placed in a boundary area located around a hole area placed in an active area of ​​a display device according to embodiments of the present invention. FIG. 6 is a diagram showing an example of a data line arrangement structure for driving a subpixel located around a hole area in an active area of ​​a display device according to embodiments of the present invention. FIG. 7 is a diagram showing another example of a structure in which a data line is placed in a boundary area located around a hole area placed in an active area of ​​a display device according to embodiments of the present invention. FIG. 8 is a drawing showing an example of a structure in which data lines are arranged on the outer and inner sides of a boundary area located around the hole area illustrated in FIG. 7. FIG. 9 is a drawing showing an example of a structure in which a data line is placed in a boundary area located between two hole areas shown in FIG. 7. FIGS. 10 and FIGS. 11 are drawings showing an example in which the brightness uniformity of the active area is improved by the arrangement structure of the data lines shown in FIGS. 7. Specific details for implementing the invention

[0020] Hereinafter, some embodiments of the present invention will be described in detail with reference to the exemplary drawings. In assigning reference numerals to the components of each drawing, the same components may have the same reference numeral as much as possible, even if they are shown in different drawings. Furthermore, in describing the present invention, if it is determined that a detailed description of related known components or functions may obscure the essence of the present invention, such detailed description may be omitted. Where terms such as "comprising," "having," or "consisting of" are used in this specification, other parts may be added unless "only" is used. Where a component is expressed in the singular, it may include a plural unless there is a special explicit description otherwise.

[0021] Additionally, terms such as first, second, A, B, (a), (b), etc., may be used when describing the components of the present invention. These terms are used merely to distinguish the components from other components, and the essence, order, sequence, or number of the components are not limited by such terms.

[0022] In describing the positional relationship of components, where it is stated that two or more components are "connected," "combined," or "joined," it should be understood that while the two or more components may be directly "connected," "combined," or "joined," they may also be "connected," "combined," or "joined" with other components "intervened." Here, the other components may be included in one or more of the two or more components that are "connected," "combined," or "joined" with one another.

[0023] In describing the temporal or flow relationships of components, for example, when the temporal or flow-related relationships are described using "after," "following," "next," "before," etc., cases that are not continuous may be included unless "immediately" or "directly" is used.

[0024] Meanwhile, where numerical values ​​or corresponding information regarding a component (e.g., levels, etc.) are mentioned, even without separate explicit notation, the numerical values ​​or corresponding information may be interpreted as including a range of error that may occur due to various factors (e.g., process factors, internal or external shocks, noise, etc.).

[0025] FIG. 1 is a diagram showing the schematic configuration of a display device (100) according to embodiments of the present invention.

[0026] Referring to FIG. 1, a display device (100) according to embodiments of the present invention may include a display panel (110) having a plurality of subpixels (SP) arranged therein, a gate driving circuit (120) for driving the display panel (110), a data driving circuit (130), and a controller (140), etc.

[0027] The display panel (110) may include an active area (A / A) in which a plurality of subpixels (SP) are arranged to display an image, and a non-active area (N / A) located outside the active area (A / A) in which signal lines, etc. are arranged.

[0028] A plurality of gate lines (GL) and a plurality of data lines (DL) are arranged in the active area (A / A) of the display panel (110), and a subpixel (SP) can be arranged in the area where the gate lines (GL) and data lines (DL) intersect.

[0029] Each of these subpixels (SP) may include a light-emitting element (ED), and two or more subpixels (SP) may form a single pixel.

[0030] The gate driving circuit (120) is controlled by the controller (140) and sequentially outputs scan signals to a plurality of gate lines (GL) arranged on the display panel (110) to control the driving timing of a plurality of subpixels (SP).

[0031] The gate driving circuit (120) may include one or more gate driver integrated circuits (GDICs) and, depending on the driving method, may be located on only one side of the display panel (110) or on both sides.

[0032] The data driving circuit (130) receives image data from the controller (140) and converts the image data into an analog data voltage (Vdata). Then, at the timing when a scan signal is applied through the gate line (GL), the data voltage (Vdata) is output to each data line (DL) so that each subpixel (SP) expresses brightness according to the image data.

[0033] The data driving circuit (130) may include one or more source driver integrated circuits (SDIC).

[0034] The controller (140) supplies various control signals to the gate driving circuit (120) and the data driving circuit (130) and controls the operation of the gate driving circuit (120) and the data driving circuit (130).

[0035] The controller (140) causes the gate driving circuit (120) to output a scan signal according to the timing implemented in each frame, converts the image data received from the outside to match the data signal format used by the data driving circuit (130), and outputs the converted image data to the data driving circuit (130).

[0036] The controller (140) receives various timing signals, including a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), an input data enable signal (DE: Data Enable), a clock signal (CLK), etc., along with video data from an external source (e.g., a host system).

[0037] The controller (140) can generate various control signals using various timing signals received from the outside and output them to the gate driving circuit (120) and the data driving circuit (130).

[0038] For example, the controller (140) outputs various gate control signals (GCS), including a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE), to control the gate driving circuit (120).

[0039] Here, the gate start pulse (GSP) controls the operation start timing of one or more gate driver integrated circuits (GDICs) constituting the gate driving circuit (120). The gate shift clock (GSC) is a clock signal commonly input to one or more gate driver integrated circuits (GDICs) and controls the shift timing of the scan signal. The gate output enable signal (GOE) specifies the timing information of one or more gate driver integrated circuits (GDICs).

[0040] Additionally, the controller (140) outputs various data control signals (DCS), including a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE), in order to control the data driving circuit (130).

[0041] Here, the source start pulse (SSP) controls the data sampling start timing of one or more source driver integrated circuits (SDICs) constituting the data driving circuit (130). The source sampling clock (SSC) is a clock signal that controls the data sampling timing in each source driver integrated circuit (SDIC). The source output enable signal (SOE) controls the output timing of the data driving circuit (130).

[0042] Such a display device (100) may further include a power management integrated circuit that supplies various voltages or currents to a display panel (110), a gate driving circuit (120), a data driving circuit (130), etc., or controls various voltages or currents to be supplied.

[0043] In addition to the gate line (GL) and data line (DL), a voltage line to which various signals or voltages are supplied may be arranged in the display panel (110), and a light-emitting element (ED) and a transistor for driving it may be arranged in each subpixel (SP).

[0044] FIG. 2 is a diagram showing an example of the circuit structure and driving timing of a subpixel (SP) included in a display device (100) according to embodiments of the present invention.

[0045] Referring to FIG. 2, a light-emitting element (ED) is placed in a subpixel (SP) placed on a display panel (110), and a driving transistor (DRT) that drives the light-emitting element (ED) by controlling the current flowing through the light-emitting element (ED) may be placed.

[0046] The light-emitting element (ED) placed in the subpixel (SP) may be an organic light-emitting diode (OLED), but depending on the case, it may be a light-emitting diode (LED) or a micro light-emitting diode (μLED), etc.

[0047] In addition, at least one transistor may be placed in the subpixel (SP) in addition to the driving transistor (DRT), and a storage capacitor (Cstg), etc., may be placed to maintain the voltage of the gate node of the driving transistor (DRT) for one frame.

[0048] FIG. 2 illustrates a 7T1C structure in which seven transistors, including a driving transistor (DRT), and one storage capacitor (Cstg) are disposed in a subpixel (SP), but the structure of the subpixel (SP) included in the display device (100) according to embodiments of the present invention is not limited thereto. FIG. 2 illustrates a case in which the subpixel (SP) is configured with PMOS type transistors, but at least some of the transistors disposed in the subpixel (SP) may be configured in NMOS type.

[0049] The light-emitting element (ED) may include an anode electrode electrically connected to a driving transistor (DRT) and a cathode electrode to which a base voltage (Vss) is supplied.

[0050] The driving transistor (DRT) can be electrically connected between the driving voltage line (DVL), to which the driving voltage (Vdd) is applied, and the light-emitting element (ED). Additionally, the driving transistor (DRT) can be electrically connected to the data line (DL), to which the data voltage (Vdata) is applied. Furthermore, the gate node of the driving transistor (DRT) can be electrically connected to the storage capacitor (Cstg) and the initialization voltage line (IVL).

[0051] The first transistor (T1) is controlled by a scan signal SCAN (N) and can be electrically connected between the first node (N1) and the second node (N2) of the driving transistor (DRT). The first transistor (T1) can be controlled so that a voltage compensated for the threshold voltage (Vth) of the driving transistor (DRT) is applied to the gate node of the driving transistor (DRT) at the data voltage (Vdata).

[0052] The second transistor (T2) is controlled by a scan signal SCAN (N-1) and can be electrically connected between the first node (N1) of the driving transistor (DRT) and the initialization voltage line (IVL). The second transistor (T2) can be used to initialize the voltage of the gate node of the driving transistor (DRT).

[0053] The third transistor (DRT) is controlled by a scan signal SCAN (N) and can be electrically connected between the third node (N3) of the driving transistor (DRT) and the data line (DL). And, the fourth transistor (T4) is controlled by a scan signal EM and can be electrically connected between the third node (N3) of the driving transistor (DRT) and the driving voltage line (DVL).

[0054] The fifth transistor (T5) is controlled by the scan signal EM and can be electrically connected between the second node (N2) of the driving transistor (DRT) and the light-emitting element (ED). The fifth transistor (T5) can control the light emission timing of the light-emitting element (ED).

[0055] The sixth transistor (T6) is controlled by a scan signal SCAN (N) and can be electrically connected between the anode electrode of the light-emitting element (ED) and the initialization voltage line (IVL). The sixth transistor (T6) can be used to initialize the voltage of the anode electrode of the light-emitting element (ED).

[0056] To explain the driving method of such subpixels (SP), the subpixels (SP) can be driven by dividing them into an initialization period, a data writing period, and a light emission period during the duration of a single video frame.

[0057] During the initialization period, a low-level scan signal SCAN (N-1) is supplied to the subpixel (SP) to turn on the second transistor (T2). As the second transistor (T2) is turned on, an initialization voltage (Vini) can be applied to the gate node of the driving transistor (DRT).

[0058] When initialization is complete, a high-level scan signal SCAN (N-1) and a low-level scan signal SCAN (N) can be supplied to the subpixel (SP) during the data writing period. Then, the second transistor (T2) can be turned off, and the first transistor (T1), the third transistor (T3), and the sixth transistor (T6) can be turned on.

[0059] Since the first transistor (T1) is turned on, the first node (N1) and the second node (N2) of the driving transistor (DRT) are electrically connected.

[0060] Additionally, since the third transistor (T3) is turned on, the data voltage (Vdata) can be applied to the first node (N1), which is the gate node of the driving transistor (DRT), through the driving transistor (DRT) and the first transistor (T1). At this time, a voltage in which the threshold voltage (Vth) of the driving transistor (DRT) is reflected in the data voltage (Vdata) is applied to the gate node of the driving transistor (DRT), so that compensation for the threshold voltage (Vth) of the driving transistor (DRT) can be achieved.

[0061] And, since the sixth transistor (T6) is turned on during the data writing period, the anode electrode of the light-emitting element (ED) can be initialized by the initialization voltage (Vini). That is, during the data writing period, the application of voltage to the gate node of the driving transistor (DRT) and the initialization of the anode electrode of the light-emitting element (ED) can be performed simultaneously.

[0062] During the light emission period, a high-level scan signal SCAN (N-1) and a high-level scan signal SCAN (N) are supplied to the subpixel (SP), and a low-level scan signal EM can be supplied. Accordingly, the first transistor (T1), the third transistor (T3), and the sixth transistor (T6) are turned off, and the fourth transistor (T4) and the fifth transistor (T5) can be turned on.

[0063] As the fourth transistor (T4) is turned on, a driving voltage (Vdd) is supplied to the third node (N3) of the driving transistor (DRT), and a voltage difference is formed between the first node (N1) and the third node (N3) of the driving transistor (DRT) due to the data voltage (Vdata) and the driving voltage (Vdd), and current according to the data voltage (Vdata) can flow through the driving transistor (DRT).

[0064] As the fifth transistor (T5) is turned on, current corresponding to the data voltage (Vdata) is supplied to the light-emitting element (ED), and the light-emitting element (ED) can display brightness corresponding to the data voltage (Vdata).

[0065] Meanwhile, the display device (100) according to embodiments of the present invention may include an area in which a sensor, such as a camera sensor, is disposed within an active area (A / A) of a display panel (110) in which the aforementioned subpixel (SP) is disposed.

[0066] For example, a subpixel (SP) may not be placed in a portion of the active area (A / A) of the display panel (110). Then, the area where the subpixel (SP) is not placed may be left open so that a sensor, such as a camera sensor, may be placed in that area. That is, a hole area (HA) may be formed within the active area (A / A), and a sensor may be placed in the hole area (HA).

[0067] In such cases, during the process of arranging electrodes or signal lines for display driving, components for display driving can be prevented from being placed in the corresponding area. That is, electrodes and signal lines can be arranged so that an image is displayed only in the area excluding the area where a hole area (HA) is formed within the active area (A / A).

[0068] In this way, by forming a hole area (HA) in a part of the active area (A / A) and placing a sensor in the hole area (HA), it is possible to prevent the width of the non-active area (N / A) of the display panel (110) from increasing overall due to the placement of the sensor.

[0069] FIG. 3 is a diagram showing an example of a structure in which a hole region (HA) is disposed in an active region (A / A) of a display device (100) according to embodiments of the present invention.

[0070] Referring to FIG. 3, a portion of the active area (A / A) of the display panel (110) may be a hole area (HA) where a camera sensor, etc. is placed. Additionally, a boundary area (BA) may be placed around the hole area (HA).

[0071] The boundary region (BA) is adjacent to the outer edge of the hole region (HA) and can be located between the hole region (HA) and the area where subpixels (SP) are placed in the active region (A / A).

[0072] These boundary regions (BA) may include a first boundary region (BA1) in which signal lines, etc. for driving a camera sensor, etc., placed in a hole region (HA) are arranged, and a second boundary region (BA2) in which signal lines, etc. for driving a subpixel (SP) placed around the hole region (HA) are arranged.

[0073] Here, the hole area (HA) and the first boundary area (BA1) may be areas that are opened for the placement of the camera sensor. That is, with the hole area (HA) and the first boundary area (BA1) open, the area where the sensor part of the camera sensor is placed can be viewed as the hole area (HA), and the area where the bezel part of the camera sensor is placed can be viewed as the first boundary area (BA1).

[0074] A second boundary region (BA2) located around a hole region (HA) may be an area where signal lines, etc., for driving a subpixel (SP) located in an active region (A / A) are placed. Since the hole region (HA) is located within the active region (A / A), signal lines connected to subpixels (SP) located around the hole region (HA) cannot be placed at the location of the hole region (HA). Therefore, a second boundary region (BA2) is formed around the hole region (HA), and signal lines for display driving, such as a gate line (GL) and a data line (DL), can be placed in the second boundary region (BA2).

[0075] Depending on the type and number of sensors placed in the active area (A / A), a single Hall area (HA) may be placed in the active area (A / A) or multiple Hall areas may be placed.

[0076] For example, as shown in EX 1 of FIG. 3, a hole area (HA) may be placed in the active area (A / A) of the display panel (110). A first boundary area (BA1) and a second boundary area (BA2) may be placed around the hole area (HA). And, a subpixel (SP), etc., may be placed outside the second boundary area (BA2). That is, the outer edge of the boundary area (BA) may be positioned spaced apart from the outer edge of the active area (A / A).

[0077] As another example, as shown in EX 2 in FIG. 3, two hole regions (HA) may be placed in the active area (A / A) of the display panel (110). The first hole region (HA1) and the second hole region (HA2) may have the same shape and size, or they may have different shapes and sizes as shown in EX 2.

[0078] A first boundary area (BA1) may be located around a first hole area (HA1) where signal lines, etc. for driving a sensor placed in the first hole area (HA1) are arranged, and a second boundary area (BA2) may be located around a second hole area (HA2) where signal lines, etc. for driving a sensor placed in the second hole area (HA2) are arranged.

[0079] A second boundary region (BA2) may be located outside the first boundary region (BA1). Additionally, subpixels (SP) may be placed in the area excluding the hole region (HA) and the boundary region (BA) in the active region (A / A), and an image may be displayed.

[0080] Therefore, since the signal line for driving the subpixel (SP) located around the hole region (HA) cannot be placed in the hole region (HA), it is placed in the boundary region (BA) located around the hole region (HA) and can be connected to the subpixel (SP) located outside the boundary region (BA).

[0081] FIG. 4 is a diagram showing an example of a structure in which a signal line is placed in a boundary area (BA) located around a hole area (HA) placed in an active area (A / A) of a display device (100) according to embodiments of the present invention.

[0082] Referring to FIG. 4, a gate line (GL) may be placed in one direction in the active area (A / A) of the display panel (110), and a data line (DL) may be placed in a direction intersecting the gate line (GL).

[0083] And, when a hole region (HA) is located in an active region (A / A), signal lines such as a gate line (GL) and a data line (DL) can be placed by passing through a boundary region (BA) located around the hole region (HA).

[0084] For example, a gate line (GL) to which a scan signal is applied may be placed in a boundary region (BA) located around a hole region (HA). The gate line (GL) may be placed in a curved shape according to the shape of the outer edge of the hole region (HA) in the boundary region (BA). Also, the part of the gate line (GL) extending outward from the boundary region (BA) may be bent.

[0085] That is, the gate line (GL) is arranged in a curved shape in the boundary region (BA), and may include a bent portion to be connected to the subpixel (SP) while maintaining a constant spacing between the gate lines (GL) outside the boundary region (BA).

[0086] Additionally, a data line (DL) to which a data voltage (Vdata) is applied may be placed in a boundary region (BA) located around the hole region (HA). The data line (DL) may also be placed in a bent shape in the boundary region (BA), similar to the gate line (GL). Furthermore, the portion of the data line (DL) extending outward from the boundary region (BA) may be bent.

[0087] These gate lines (GL) and data lines (DL) can be placed on different layers of the display panel (110).

[0088] For example, referring to an example of a schematic cross-sectional structure of part II' shown in FIG. 4, a buffer layer (BUF), etc., may be disposed on a substrate (SUB), and a gate line (GL) may be disposed on the buffer layer (BUF). An insulating layer (ILD) may be disposed on the gate line (GL), and a data line (DL) may be disposed on the insulating layer (ILD). Additionally, a protection layer (PAS) may be disposed on the data line (DL).

[0089] The gate line (GL) and data line (DL) are placed on different layers and are arranged in a curved shape at the boundary region (BA), so they can be connected to a subpixel (SP) located outside the hole region (HA).

[0090] In this case, since the gate line (GL) and data line (DL) are positioned along the outer shape of the hole region (HA) in the boundary region (BA), they may be longer than the signal line positioned outside the boundary region (BA). Furthermore, as the length of the signal line increases, the load on the signal line may increase, and in particular, an increase in the load on the data line (DL) supplying the data voltage (Vdata) may cause a decrease in the brightness of the subpixel (SP).

[0091] Embodiments of the present invention include a hole area (HA) in which a sensor or the like can be placed within an active area (A / A), and provide a method to prevent degradation of the quality of an image displayed around the hole area (HA).

[0092] FIG. 5 is a diagram showing another example of a structure in which a signal line is placed in a boundary area (BA) located around a hole area (HA) placed in an active area (A / A) of a display device (100) according to embodiments of the present invention.

[0093] Referring to FIG. 5, a hole area (HA) in which a sensor or the like is placed may be located in the active area (A / A) of the display panel (110). A boundary area (BA) may be located around the hole area (HA) and is placed in contact with the outer edge of the hole area (HA).

[0094] Gate lines (GL) and data lines (DL), etc., for driving subpixels (SP) located around a hole area (HA) can be placed in a boundary area (BA).

[0095] For example, a gate line (GL) to which a scan signal is applied may be arranged in one direction and may be arranged including a curved portion and a bent portion in a boundary region (BA). And, a data line (DL) to which a data voltage (Vdata) is supplied may be arranged in a direction intersecting the gate line (GL) and may be arranged including a curved portion and a bent portion in a boundary region (BA).

[0096] Here, some of the data lines (DL) placed in the boundary area (BA) may be placed on different layers.

[0097] Referring to an example of a schematic cross-sectional structure of the JJ' portion shown in FIG. 5, an insulating layer (ILD) may be disposed on the gate line (GL), and a first data line (DL1) may be disposed on the insulating layer (ILD). A first protective layer (PAS1) may be disposed on the first data line (DL1), and a second data line (DL2) may be disposed on the first protective layer (PAS1). Additionally, a second protective layer (PAS2) may be disposed on the second data line (DL2).

[0098] Here, the first data line (DL1) and the second data line (DL2) can be made of the same material.

[0099] Also, since the second data line (DL2) is located above the first data line (DL1), the vertical distance d2 between the second data line (DL2) and the gate line (GL) may be greater than the vertical distance d1 between the first data line (DL1) and the gate line (GL).

[0100] As the distance between the second data line (DL2) and the gate line (GL) located below increases, the parasitic capacitance that may be formed between the second data line (DL2) and the gate line (GL) is reduced, and the load on the second data line (DL2) can be reduced.

[0101] That is, embodiments of the present invention can prevent an increase in load due to an increase in the length of the data line (DL) by increasing the distance between some data lines (DL) placed in a boundary region (BA) located around a hole region (HA) and signal lines such as a gate line (GL) placed in another layer.

[0102] Therefore, it is possible to prevent a decrease in brightness caused by an increased load on the data line (DL) supplying data voltage (Vdata) to the subpixel (SP) located in the area adjacent to the hole area (HA).

[0103] In addition, by reducing the load of the data line (DL) driving the subpixel (SP) that has a significant impact on brightness among the data lines (DL), the effect of brightness improvement exhibited by the surrounding area of ​​the hole area (HA) can be enhanced.

[0104] FIG. 6 is a diagram showing an example of a layout structure of a data line (DL) that drives a subpixel (SP) located around a hole area (HA) in an active area (A / A) of a display device (100) according to embodiments of the present invention.

[0105] Referring to FIG. 6, a red subpixel (R SP), a green subpixel (G SP), and a blue subpixel (B SP) may be arranged in the active area (A / A) of the display panel (110). Here, the red subpixel (R SP) and the blue subpixel (B SP) may be arranged alternately to be driven by a first data line (DL1). And, the green subpixel (G SP) may be arranged in the same column to be driven by a second data line (DL2).

[0106] The peak wavelength of light emitted by the green subpixel (G SP) may be smaller than the peak wavelength of light emitted by the red subpixel (R SP) and may be smaller than the peak wavelength of light emitted by the blue subpixel (B SP). Also, the luminance may vary depending on the intensity of the light emitted by the green subpixel (G SP).

[0107] Therefore, the second data line (DL2) driving the green subpixel (G SP) is positioned in a higher layer than the first data line (DL1) driving the red subpixel (R SP) and the blue subpixel (B SP), thereby reducing the load on the second data line (DL2) and increasing the brightness of the area driven by the data line (DL).

[0108] In this way, a signal line driving a subpixel (SP) located around a hole area (HA) is placed in a boundary area (BA) and has a structure that can be connected to the subpixel (SP), and by adjusting the layer where some signal lines are placed, image quality degradation due to increased load can be prevented.

[0109] In addition, the arrangement structure of the data line (DL) described above can also be applied when a plurality of hole areas (HA) are located in the active area (A / A) of the display panel (110).

[0110] FIG. 7 is a diagram showing another example of a structure in which a data line (DL) is placed in a boundary area (BA) located around a hole area (HA) placed in an active area (A / A) of a display device (100) according to embodiments of the present invention.

[0111] Referring to FIG. 7, a first hole area (HA1) and a second hole area (HA2) can be placed in the active area (A / A).

[0112] A boundary region (BA) may be located around the first hole region (HA1) and the second hole region (HA2), adjacent to the outer edge of the first hole region (HA1) and the outer edge of the second hole region (HA2). In this boundary region (BA), a gate line (GL) connected to a subpixel (SP) located on one side (e.g., left) and the other side (e.g., right) of the hole region (HA) may be placed.

[0113] Additionally, a data line (DL) connected to a subpixel (SP) located on one side (e.g., upper side) and the other side (e.g., lower side) of the hole area (HA) may be placed in the boundary area (BA).

[0114] The data line (DL) may have a curved shape in a portion of the part placed in the boundary area (BA). Additionally, the data line (DL) may have a bent shape in a portion of the part extending from the boundary area (BA) to the outside of the boundary area (BA).

[0115] Here, a first data line (DL1) driving a red subpixel (R SP) and a blue subpixel (B SP) and a second data line (DL2) driving a green subpixel (G SP) may be arranged alternately. Also, the second data line (DL2) may be arranged on a higher layer than the first data line (DL1).

[0116] Accordingly, the distance between the second data line (DL2) and the signal line placed in the lower layer of the data line (DL) increases. And as the distance between the second data line (DL) and the signal line placed in the lower layer of the data line (DL) increases, the load of the second data line (DL2) can be reduced.

[0117] By doing so, an increase in load due to an increase in the length of the second data line (DL2) placed in the boundary area (BA) is prevented, and a decrease in brightness of the subpixel (SP) driven by the second data line (DL2) is prevented.

[0118] In addition, the first data line (DL1) and the second data line (DL2) can be arranged in a specific pattern outside the boundary area (BA) or in the boundary area (BA) between the hole area (HA) for the sake of uniformity of brightness and ease of wiring arrangement.

[0119] FIG. 8 is a diagram showing an example of a structure in which data lines (DL) are arranged on the outer and inner sides of a boundary area (BA) located around a hole area (HA) shown in FIG. 7.

[0120] Referring to FIG. 8, an example of the structure of a data line (DL) placed in a boundary area (BA) located to the left of the first hole area (HA1) and an active area (A / A) located outside the boundary area (BA) is shown.

[0121] A data line (DL) connected to a subpixel (SP) positioned above and a subpixel (SP) positioned below the first hole area (HA1) may be positioned bypassing the first hole area (HA1). The length of the curved portion of the data line (DL) may be larger as it is positioned closer to the outer edge of the first hole area (HA1). Additionally, the length of the curved portion of the data line (DL) may be smaller as it is positioned closer to the outer edge of the boundary area (BA).

[0122] Here, even if the spacing between the curved parts of the data line (DL) placed in the boundary area (BA) is narrowed due to the width of the boundary area (BA), the spacing between the straight parts of the data line (DL) placed outside the boundary area (BA) can be constant.

[0123] Accordingly, the data line (DL) is arranged in a structure that bypasses the hole area (HA) in the boundary area (BA), and is connected to subpixels (SP) located above and below the hole area (HA) to drive the corresponding subpixels (SP).

[0124] In addition, by placing the second data line (DL2) that drives the green subpixel (G SP) in the upper layer, the load of the second data line (DL2) that supplies data voltage (Vdata) to the green subpixel (G SP) is reduced, thereby preventing a decrease in brightness of the area driven by the data line (DL) which is partially placed in the boundary area (BA).

[0125] In addition, for ease of wiring arrangement, data lines (DL) located outside the boundary area (BA) can be arranged in the same pattern as data lines (DL) placed in the boundary area (BA). That is, the first data line (DL1) and the second data line (DL2) located outside the boundary area (BA) can be arranged on different layers.

[0126] Accordingly, in the display device (100) according to the embodiments of the present invention, two adjacent data lines (DL) may have a structure in which they are placed on different layers.

[0127] FIG. 9 is a diagram showing an example of a structure in which a data line (DL) is placed in a boundary region (BA) located between two hole regions (HA) shown in FIG. 7.

[0128] Referring to FIG. 9, an example of a structure is shown in which a data line (DL) is placed in a boundary region (BA) located between a first hole region (HA1) and a second hole region (HA2).

[0129] In the area between the first hole area (HA1) and the second hole area (HA2), some data lines (DL) may have a curved shape following the outer shape of the first hole area (HA1), and other data lines (DL) may have a curved shape following the outer shape of the second hole area (HA2). Accordingly, in the boundary area (BA) located between the first hole area (HA1) and the second hole area (HA2), data lines (DL) that are curved in opposite directions may be placed.

[0130] The data line (DL) is arranged in a curved shape in the boundary area (BA) between the first hole area (HA1) and the second hole area (HA2), and the spacing between the data lines (DL) may be narrowed. In addition, the straight portion of the data line (DL) extending outward from the boundary area (BA) has a constant spacing and may be connected to a subpixel (SP) located outward from the boundary area (BA).

[0131] Here, in the boundary region (BA) between the first hole region (HA1) and the second hole region (HA2), two adjacent data lines (DL) may have a shape that is curved in opposite directions. And, since the first data line (DL1) and the second data line (DL2) are arranged alternately, adjacent data lines (DL) that are curved in opposite directions may be arranged on different layers.

[0132] Thus, the display device (100) according to embodiments of the present invention provides a structure in which a sensor can be disposed within the active area (A / A) by including a hole area (HA) within the active area (A / A). Furthermore, by providing a structure in which a signal line for display driving is disposed in a boundary area (BA) located outside the hole area (HA), a structure of a signal line capable of driving a subpixel (SP) located around the hole area (HA) is provided.

[0133] In addition, by adjusting the layer where the data line (DL) driving the subpixel (SP) representing some colors is placed, the load on the data line (DL) is reduced, thereby reducing the load increase caused by the data line (DL) being placed bypassing the hole area (HA) and improving the uniformity of brightness around the hole area (HA).

[0134] FIGS. 10 and FIGS. 11 are drawings showing an example in which the brightness uniformity of the active area (A / A) is improved by the arrangement structure of the data line (DL) shown in FIG. 7.

[0135] Referring to FIG. 10, an example is shown in which a data driving circuit (130) that supplies a data voltage (Vdata) to a data line (DL) is located on the lower side of an active area (A / A). Since the data line (DL) is placed in a boundary area (BA) located around a hole area (HA) and the load increases as the length increases, a low brightness area may occur in which the subpixel (SP) driven by the data line (DL).

[0136] That is, when a hole area (HA) and a boundary area (BA), etc. are spaced apart from the outer edge of an active area (A / A), a subpixel (SP) driven by a data line (DL) placed in the boundary area (BA) may exist between the hole area (HA), etc. and the outer edge of the active area (A / A).

[0137] And, since the data line (DL) driving these subpixels (SP) is placed in the boundary area (BA) and the load increases, the area where the subpixel (SP) driven by the data line (DL) is placed may exhibit low brightness.

[0138] Embodiments of the present invention can prevent a decrease in brightness in an area surrounding a hole region (HA) by positioning the second data line (DL2) that drives a green subpixel (G SP) among the data lines (DL) placed in a boundary region (BA) in a layer capable of reducing the load of the second data line (DL2).

[0139] In addition, embodiments of the present invention may be applied even when a hole region (HA) is positioned adjacent to the outer edge of an active region (A / A), in which case a subpixel (SP) driven by a data line (DL) positioned in a boundary region (BA) exists between the hole region (HA) and the outer edge of the active region (A / A).

[0140] For example, as shown in the example illustrated in FIG. 11, a portion of the outer edge of the boundary area (BA) located around the hole area (HA) may be positioned in contact with the outer edge of the active area (A / A).

[0141] In this case, if the outer edge of the boundary region (BA) includes a curved portion, a subpixel (SP) on which an image is displayed can be placed between the outer edge of the boundary region (BA) and the outer edge of the active region (A / A). Additionally, a data line (DL) for driving the said subpixel (SP) can be placed in the boundary region (BA) while bypassing the hole region (HA).

[0142] At this time, by placing the second data line (DL2) driving the green subpixel (G SP) on a different layer from the first data line (DL1) driving the red subpixel (R SP) and the blue subpixel (B SP) and reducing the load, it is possible to prevent a decrease in brightness that may occur due to an increase in the load of the data line (DL) in the area.

[0143] According to the embodiments of the present invention described above, a structure is provided in which a sensor can be placed within an active area (A / A) by placing a hole area (HA) in a part of an active area (A / A) of a display panel (110).

[0144] In addition, by forming a boundary region (BA) on the outer side of a hole region (HA) and arranging a signal line for display driving in a curved shape in the boundary region (BA), a signal line arrangement structure capable of driving a subpixel (SP) located around the hole region (HA) can be provided.

[0145] In addition, a structure is provided in which the data line (DL) driving the green subpixel (G SP) among the data lines (DL) driving the subpixel (SP) located outside the boundary area (BA) is placed in a different layer from the other data lines (DL).

[0146] Therefore, by preventing an increase in the load of the data line (DL) driving the green subpixel (G SP), a method can be provided to prevent a decrease in the brightness of the subpixel (SP) driven by the said data line (DL) and to improve the uniformity of brightness appearing around the hole area (HA).

[0147] The foregoing description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention. Furthermore, the embodiments disclosed in the present invention are intended to explain, not limit, the technical concept of the present invention, and thus the scope of the technical concept of the present invention is not limited by these embodiments. The scope of protection of the present invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present invention. Explanation of the symbols

[0148] 100: Display device 110: Display panel 120: Gate driving circuit 130: Data driving circuit 140: Controller

Claims

Claim 1 A display panel having an active area in which a plurality of subpixels are arranged; at least one hole area surrounded by the active area; a boundary area arranged between the at least one hole area and the active area; a first gate line arranged in the active area and the boundary area and supplying a scan signal to a first subpixel group among the plurality of subpixels; a second gate line arranged in the active area and the boundary area and supplying an EM signal to the first subpixel group; and a first data line arranged in the active area and the boundary area and supplying a data voltage to a second subpixel group among the plurality of subpixels. A display device comprising a second data line that is disposed in the active region and the boundary region and supplies the data voltage to a third subpixel group among the plurality of subpixels, wherein the second subpixel group includes a red subpixel or a blue subpixel, the third subpixel group includes a green subpixel, and the first subpixel group includes all of the red subpixel, the green subpixel, and the blue subpixel, wherein the vertical distance between the second data line and the first gate line is different from the vertical distance between the first data line and the first gate line, and wherein at least one second data line among the plurality of second data lines that supply the data voltage to the third subpixel group is disposed closer to the hole of the at least one hole region than at least one first data line among the plurality of first data lines that supply the data voltage to the second subpixel group. Claim 2 A display device according to claim 1, wherein the boundary area comprises a bezel portion on which a sensor is disposed, a first boundary area on which a signal line for driving a sensor disposed in the at least one hole area is disposed, and a second boundary area located around the hole area on which a signal line for driving a subpixel is disposed, wherein the at least one hole area and the first boundary area are areas open in the active area, and the signal line connected to the subpixels around the hole area is not located in the hole area. Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 A display device according to claim 1, wherein the vertical distance between the second data line and the first gate line is greater than the vertical distance between the first data line and the first gate line. Claim 7 A display panel having an active area in which a plurality of subpixels are arranged; at least one hole area surrounded by the active area; a boundary area arranged between the at least one hole area and the active area; a first gate line arranged in the active area and the boundary area and supplying a scan signal to a first subpixel group among the plurality of subpixels; a second gate line arranged in the active area and the boundary area and supplying an EM signal to the first subpixel group; and a first data line arranged in the active area and the boundary area and supplying a data voltage to a second subpixel group among the plurality of subpixels. A display device comprising a second data line that supplies a data voltage to a third subpixel group among a plurality of subpixels, wherein the second subpixel group comprises a red subpixel or a blue subpixel, the third subpixel group comprises a green subpixel, and the first subpixel group comprises all of the red subpixel, the green subpixel, and the blue subpixel, wherein the boundary region comprises a curved portion, and the plurality of subpixels are disposed between the outer side of the boundary region and the outer side of the active region, and the display panel comprises a buffer layer disposed on a substrate; an insulating layer disposed on the buffer layer; and a passivation layer disposed on the insulating layer, wherein the first gate line and the second gate line are disposed on the buffer layer such that the insulating layer covers the first gate line and the second gate line, the first data line is disposed on the insulating layer, and the second data line is disposed on the passivation layer. Claim 8 A display device according to claim 1, wherein the first gate line is alternately arranged with the second gate line in one direction, and the first data line is alternately arranged with the second data line in another direction intersecting the one direction. Claim 9 A display device according to claim 1, wherein the first data line and the second data line each overlap with the first gate line and the second gate line at one subpixel. Claim 10 In claim 1, the first data line and the second data line are a display device that intersects the first gate line and the second gate line, respectively, in the boundary area. Claim 11 A display device according to claim 1, wherein the first gate line, the second gate line, the first data line, and the second data line each include a curved portion and a bent portion, the curved portion of the first gate line intersects the bent portion of the first data line, and the bent portion of the first gate line intersects the curved portion of the first data line. Claim 12 In claim 1, the boundary area includes a first boundary area surrounding the hole area and a second boundary area surrounding the first boundary area, and the first gate line, the second gate line, the first data line and the second data line are arranged in the second boundary area excluding the first boundary area. Claim 13 In paragraph 12, the above-mentioned hole area and the above-mentioned first boundary area are open areas for placing a sensor part, in a display device. Claim 14 In paragraph 13, the signal line for driving the sensor unit is a display device disposed in the first boundary area. Claim 15 A display device according to claim 1, wherein the first data line is connected to a plurality of red subpixels and a plurality of blue subpixels, and the second data line is connected to a plurality of green subpixels. Claim 16 delete Claim 17 A display device according to claim 1, wherein the first data line and the second data line are positioned at different locations.

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