Display apparatus, electronic device including the same, method for manufacturing the display apparatus

Abstract

The present invention provides a display device that minimizes the possibility of degradation of a light-emitting element during a manufacturing process thereby minimizing the deterioration of display quality, an electronic device equipped with the same, and a method for manufacturing a display device, wherein the display device comprises a first display area, a second display area having a transparent area, and a peripheral area disposed outside the first display area and the second display area, the display device comprising: a substrate; a first pixel circuit disposed on the substrate and located in the first display area; and an organic insulating layer covering the first display area and the second display area and disposed on the first pixel circuit, wherein the thickness of the organic insulating layer in the first display area is smaller than the thickness of the organic insulating layer in the second display area. The invention also provides an electronic device equipped with the same and a method for manufacturing a display device.

Description

Technology Field

[0001] The present invention relates to a display device, an electronic device including the same, and a method for manufacturing a display device. Background Technology

[0002] A display device is a device that visually displays data. Recently, the uses of display devices have become more diverse. As display devices become thinner and lighter, their range of applications is expanding.

[0003] As a means to expand the area occupied by the display region while simultaneously adding various functions to the display region, research on display devices for adding functions other than image display to the inner side of the display region is continuing.

[0004] Among various display devices, organic light-emitting diodes (OLEDs) have the advantages of a wide viewing angle, excellent contrast, and fast response speed, which has expanded their range of applications and led to their widespread use. The problem to be solved

[0005] However, conventionally, during the manufacturing process of a display device, there was a problem where impurities such as gases generated from the organic layer included in the display device penetrated into the light-emitting element (e.g., organic light-emitting diode), causing the light-emitting element to degrade.

[0006] The present invention aims to solve various problems, including those mentioned above, by minimizing the degradation of light-emitting elements and thereby minimizing the deterioration of display quality, and to provide a display device, an electronic device equipped with the same, and a method for manufacturing the display device. However, these problems are exemplary and the scope of the present invention is not limited by them. means of solving the problem

[0007] According to one aspect of the present invention, a display device comprising a first display area, a second display area having a transparent area, and a peripheral area disposed outside the first display area and the second display area, is provided, the display device comprising: a substrate; a first pixel circuit disposed on the substrate and located in the first display area; and an organic insulating layer covering the first display area and the second display area and disposed on the first pixel circuit, wherein the thickness of the organic insulating layer in the second display area is smaller than the thickness of the organic insulating layer in the first display area.

[0008] According to the present embodiment, the organic insulating layer comprises a first organic layer and a second organic layer on the first organic layer, and the thickness of the second organic layer in the second display area may be smaller than the thickness of the second organic layer in the first display area.

[0009] According to the present embodiment, the organic insulating layer further comprises a third organic layer on the second organic layer, and the thickness of the third organic layer in the second display area may be smaller than the thickness of the third organic layer in the first display area.

[0010] According to the present embodiment, the apparatus further comprises: a first pixel electrode located in the first display area, disposed on the organic insulating layer, and electrically connected to the first pixel circuit; and a second pixel electrode located in the second display area and disposed on the organic insulating layer, wherein the area of ​​the second pixel electrode on a plane may be larger than the area of ​​the first pixel electrode.

[0011] According to the present embodiment, the pixel defining film further comprises a first opening and a second opening disposed on the first pixel electrode and the second pixel electrode, respectively, and exposing a portion of the first pixel electrode and a portion of the second pixel electrode, respectively, and the area of ​​the second opening on a plane may be larger than the area of ​​the first opening.

[0012] According to the present embodiment, the pixel defining film may include a light-blocking material.

[0013] According to the present embodiment, the distance between the substrate and the second pixel electrode may be smaller than the distance between the substrate and the first pixel electrode.

[0014] According to the present embodiment, the display device may further include a second pixel circuit disposed in the peripheral region on the substrate and electrically connected to the second pixel electrode.

[0015] According to the present embodiment, the display device further includes an intermediate region located between the first display area and the second display area; and may further include a second pixel circuit disposed in the intermediate region on the substrate and electrically connected to the second pixel electrode.

[0016] According to the present embodiment, the first pixel circuit may include: a first thin-film transistor having a first semiconductor layer and a first gate electrode that overlaps at least partially with the first semiconductor layer; and a second thin-film transistor having a second semiconductor layer having a material different from the first semiconductor layer and a second gate electrode that overlaps at least partially with the second semiconductor layer.

[0017] According to the present embodiment, the first semiconductor layer of the first thin-film transistor may include a silicon semiconductor material, and the second semiconductor layer of the second thin-film transistor may include an oxide semiconductor material.

[0018] According to another aspect of the present invention, an electronic device is provided comprising: a display device including a first display area, a second display area having a transparent area, and a peripheral area disposed outside the first display area and the second display area, and an electronic component disposed to correspond to the second display area; wherein the display device comprises: a substrate; a first pixel circuit disposed on the substrate and located in the first display area; and an organic insulating layer covering the first display area and the second display area and disposed on the first pixel circuit, wherein the thickness of the organic insulating layer in the first display area is smaller than the thickness of the organic insulating layer in the second display area.

[0019] According to the present embodiment, the organic insulating layer comprises a first organic layer and a second organic layer on the first organic layer, and the thickness of the second organic layer in the second display area may be smaller than the thickness of the second organic layer in the first display area.

[0020] According to the present embodiment, the organic insulating layer further comprises a third organic layer on the second organic layer, and the thickness of the third organic layer in the second display area may be smaller than the thickness of the third organic layer in the first display area.

[0021] According to the present embodiment, the display device further comprises: a first pixel electrode located in the first display area, disposed on the organic insulating layer, and electrically connected to the first pixel circuit; and a second pixel electrode located in the second display area and disposed on the organic insulating layer; wherein the area of ​​the second pixel electrode on a plane may be larger than the area of ​​the first pixel electrode.

[0022] According to the present embodiment, the display device further comprises a pixel defining film disposed on the first pixel electrode and the second pixel electrode, the pixel defining film comprising a first opening and a second opening that respectively expose a part of the first pixel electrode and a part of the second pixel electrode, and the area of ​​the second opening on a plane may be larger than the area of ​​the first opening.

[0023] According to the present embodiment, the distance between the substrate and the second pixel electrode may be smaller than the distance between the substrate and the first pixel electrode.

[0024] According to another aspect of the present invention, the method comprises the steps of: preparing a substrate having a first region and a second region adjacent to the first region; forming a first pixel circuit in the first region on the substrate; forming an organic insulating layer disposed on the first pixel circuit and covering the first region and the second region of the substrate; and forming a first pixel electrode located in the first region and a second pixel electrode located in the second region disposed on the organic insulating layer; wherein the step of forming the organic insulating layer may include forming the organic insulating layer using a halftone mask such that the thickness of the organic insulating layer in the first region is smaller than the thickness of the organic insulating layer in the second region.

[0025] According to the present embodiment, the step of forming the organic insulating layer may include: a step of forming a first organic layer; and a step of forming a second organic layer on the first organic layer, wherein the second organic layer is formed using a halftone mask such that the thickness of the second organic layer in the second region is smaller than the thickness of the second organic layer in the first region.

[0026] According to the present embodiment, the step of forming the organic insulating layer may further include the step of forming a third organic layer on the second organic layer, wherein the third organic layer is formed using a halftone mask such that the thickness of the third organic layer in the second region is smaller than the thickness of the third organic layer in the first region.

[0027] According to the present embodiment, a method for manufacturing a display device in which the area of ​​the second pixel electrode on a plane is larger than the area of ​​the first pixel electrode.

[0028] According to the present embodiment, a method for manufacturing a display device further comprises the step of forming a pixel defining film disposed on the first pixel electrode and the second pixel electrode, the film comprising a first opening and a second opening that respectively expose a portion of the first pixel electrode and a portion of the second pixel electrode, wherein the area of ​​the second opening on a plane is larger than the area of ​​the first opening.

[0029] Other aspects, features, and advantages other than those described above will become clear from the specific details, claims, and drawings for implementing the invention below.

[0030] These general and specific aspects may be implemented using a system, method, computer program, or any combination of a system, method, or computer program. Effects of the invention

[0031] According to one embodiment of the present invention as described above, a display device capable of image display even in an area where electronic components are placed, an electronic device equipped with the same, and a method for manufacturing the display device can be realized. Furthermore, a display device that minimizes the degradation of display quality by minimizing the possibility of degradation of the light-emitting element during the manufacturing process, an electronic device equipped with the same, and a method for manufacturing the display device can be realized. Of course, the scope of the present invention is not limited by these effects. Brief explanation of the drawing

[0032] FIG. 1 is a perspective view schematically illustrating an electronic device according to one embodiment of the present invention. FIG. 2 is a perspective view schematically illustrating an electronic device according to another embodiment of the present invention. FIG. 3 is a cross-sectional view schematically illustrating a part of an electronic device according to one embodiment of the present invention. FIG. 4 is an equivalent circuit diagram of any one pixel circuit included in an electronic device according to one embodiment of the present invention. FIGS. 5a to 5g are plan views schematically showing parts of a display device provided in an electronic device according to embodiments of the present invention. FIGS. 6a and 6b are schematic plan views illustrating some configurations of a display device provided in an electronic device according to embodiments of the present invention. FIG. 7 is a cross-sectional view schematically illustrating a part of a display device provided in an electronic device according to one embodiment of the present invention. FIG. 8 is a cross-sectional view schematically illustrating a part of a display device provided in an electronic device according to another embodiment of the present invention. FIGS. 9a to 9h are cross-sectional views schematically illustrating a method for manufacturing a display device provided in an electronic device according to an embodiment of the present invention. Specific details for implementing the invention

[0033] The present invention is capable of various modifications and may have various embodiments; specific embodiments are illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various forms.

[0034] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. When describing with reference to the drawings, identical or corresponding components are given the same reference numerals, and redundant descriptions thereof will be omitted.

[0035] In the following embodiments, terms such as first, second, etc. are used not in a limiting sense, but for the purpose of distinguishing one component from another component.

[0036] In the following examples, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0037] In the following embodiments, terms such as "include" or "have" mean that the features or components described in the specification are present, and do not preclude the possibility that one or more other features or components may be added.

[0038] In the following embodiments, when a part such as a film, region, or component is described as being on or above another part, it includes not only cases where it is directly on top of another part, but also cases where another film, region, or component is interposed in between.

[0039] Where an embodiment can be implemented differently, a specific process sequence may be performed differently from the order described. For example, two processes described consecutively may be performed substantially simultaneously or proceed in the reverse order of the description.

[0040] In this specification, "A and / or B" indicates the case where it is A, B, or both A and B. And, "at least one of A and B" indicates the case where it is A, B, or both A and B.

[0041] In the following embodiments, when a membrane, region, component, etc. is described as being connected, it includes cases where the membrane, region, or component is directly connected, or / or cases where other membranes, regions, or components are interposed between the membranes, regions, or components to be indirectly connected. For example, when a membrane, region, component, etc. is described as being electrically connected in this specification, it indicates cases where the membrane, region, or component, etc. are directly electrically connected, and / or cases where other membranes, regions, or components are interposed between them to be indirectly electrically connected.

[0042] The x-axis, y-axis, and z-axis are not limited to the three axes of an orthogonal coordinate system but can be interpreted in a broader sense that includes them. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but they may also refer to different directions that are not orthogonal to each other.

[0043] FIG. 1 is a perspective view schematically illustrating an electronic device according to one embodiment of the present invention.

[0044] Referring to FIG. 1, an electronic device (1) may include a display area (DA) and a peripheral area (PA) located outside the display area (DA). The display area (DA) may include a first display area (DA1) and a second display area (DA2) adjacent to the first display area (DA1). The first display area (DA1) may surround at least a portion of the second display area (DA2).

[0045] An electronic device (1) can provide an image through an array of multiple pixels (PX) arranged two-dimensionally in a display area (DA). For example, a first image can be provided using light emitted from multiple first pixels (PX1) placed in a first display area (DA1), and a second image can be provided using light emitted from multiple second pixels (PX2) placed in a second display area (DA2). In some embodiments, the first image and the second image may each be a part of one of the images provided through the display area (DA) of the electronic device (1). Or, in some embodiments, the first image and the second image may be provided as independent images.

[0046] As an example, FIG. 1 illustrates a second display area (DA2) located within a first display area (DA1). In another embodiment, the electronic device (1) may have two or more second display areas (DA2), and the shapes and sizes of the multiple second display areas (DA2) may differ from one another. When viewed from a direction approximately perpendicular to the upper surface of the electronic device (1), the shape of the second display area (DA2) may have various shapes, such as a polygon (like a square), a circle, an ellipse, a star shape, or a diamond shape. In one embodiment, the ratio of the second display area (DA2) to the display area (DA) may be smaller than the ratio of the first display area (DA1) to the display area (DA).

[0047] FIG. 1 illustrates a second display area (DA2) positioned at the upper center (+y direction) of a first display area (DA1) having a roughly rectangular shape when viewed from a direction approximately perpendicular to the upper surface of an electronic device (1); however, the second display area (DA2) may be positioned, for example, at the upper right or upper left side of the first display area (DA1), which is rectangular. Additionally, the second display area (DA2) may be positioned inside the first display area (DA1) as shown in FIG. 1, for example, and completely surrounded by the first display area (DA1). As another example, the second display area (DA2) may be positioned on one side of the first display area (DA1) and partially surrounded by the first display area (DA1). For example, the second display area (DA2) may be positioned at one corner of the first display area (DA1) and partially surrounded by the first display area (DA1).

[0048] An electronic component (20, see FIG. 3) may be placed in the second display area (DA2). The electronic component (20) may be placed at the bottom of the display device (10, see FIG. 3) corresponding to the second display area (DA2). In order for the electronic component (20) to function smoothly, the second display area (DA2) may include a transmission area (TA) through which light or / and sound, etc., can be transmitted, which is output from the electronic component (20) to the outside or travels from the outside toward the electronic component (20).

[0049] The transmission area (TA) is an area through which light can be transmitted, and may be an area where pixels (PX) are not placed. In the case of an electronic device (1) according to one embodiment of the present invention, when light is transmitted through a second display area (DA2) including the transmission area (TA), the light transmittance may be about 10% or more, more preferably 25% or more, 40% or more, 50% or more, 85% or more, or 90% or more.

[0050] Since the second display area (DA2) includes a transparent area (TA), the array of multiple first pixels (PX1) placed in the first display area (DA1) and the array of multiple second pixels (PX2) placed in the second display area (DA2) may be different from each other. For example, a transparent area (TA) may be placed between adjacent second pixels (PX2) among the multiple second pixels (PX2). In this case, the resolution of the second display area (DA2) may be lower than that of the first display area (DA1). That is, since the second display area (DA2) includes a transparent area (TA), the number of second pixels (PX2) that can be placed per unit area in the second display area (DA2) may be smaller than the number of first pixels (PX1) placed per unit area in the first display area (DA1). For example, the resolution of the second display area (DA2) may be about 1 / 2, 3 / 8, 1 / 3, 1 / 4, 2 / 9, 1 / 8, 1 / 9, 1 / 16, etc. of the resolution of the first display area (DA1). For example, the resolution of the first display area (DA1) may be about 400 ppi or higher, and the resolution of the second display area (DA2) may be about 200 ppi or about 100 ppi.

[0051] A peripheral area (PA) is a non-display area that does not provide an image and may surround a display area (DA) entirely or partially. For example, the peripheral area (PA) may surround a first display area (DA1) and / or a second display area (DA2) entirely or partially. Drivers or the like for providing electrical signals or power to the display area (DA) may be placed in the peripheral area (PA). Pads, which are areas where electronic components or printed circuit boards can be electrically connected, may be placed in the peripheral area (PA).

[0052] Meanwhile, for the convenience of explanation, the following description describes the case where the electronic device (1) is used in a smartphone, but the electronic device (1) of the present invention is not limited thereto. The electronic device (1) can be applied to various products such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT), as well as portable electronic devices such as mobile phones, smartphones, tablet personal computers, mobile communication terminals, electronic notebooks, electronic books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs). In addition, the electronic device (1) according to one embodiment can be applied to wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). Additionally, the electronic device (1) according to one embodiment can be applied to a center information display (CID) placed on the center fascia or dashboard of a vehicle, a room mirror display replacing the side mirror of a vehicle, and a display screen placed on the back of the front seat as entertainment for the rear seat of a vehicle.

[0053] Additionally, the following description describes that the electronic device (1) includes an Organic Light Emitting Diode (OLED) as a light-emitting element, but the electronic device (1) of the present invention is not limited thereto. As another embodiment, the electronic device (1) may be a light-emitting display device including an inorganic light-emitting diode, i.e., an inorganic light-emitting display. As yet another embodiment, the electronic device (1) may be a quantum dot light-emitting display.

[0054] FIG. 2 is a perspective view schematically illustrating an electronic device according to another embodiment of the present invention. Descriptions of components that are identical or substantially identical to those described above with reference to FIG. 1 are omitted, and the following description focuses on the differences.

[0055] Referring to FIG. 2, the electronic device (1) may be of a foldable type. For example, the electronic device (1) may include a hinge portion (HP) and may be folded around a folding axis (FAX) that crosses a display area (DA) by the hinge portion (HP). As an example, the electronic device (1) may be folded so that a part of the display area (DA) faces another part, as shown in FIG. 2 (i.e., in-folding method). As another example, the electronic device (1) may be folded so that a part of the display area (DA) faces away from another part (i.e., out-folding method).

[0056] FIG. 2 illustrates a case where the folding axis (FAX) is extended in the x-direction, but in other embodiments, the folding axis (FAX) may be extended in the y-direction. In yet another embodiment, the folding axis (FAX) may also be extended in a direction intersecting the x-direction and the y-direction on the xy-plane. Additionally, FIG. 2 illustrates a case where there is only one folding axis (FAX), but in other embodiments, the electronic device (1) may be folded multiple times around multiple folding axes (FAX) crossing the display area (DA).

[0057] FIG. 3 is a cross-sectional view schematically illustrating a part of an electronic device according to one embodiment of the present invention.

[0058] Referring to FIG. 3, the electronic device (1) may include a display device (10) and an electronic component (20) placed overlapping the display device (10). A cover window (not shown) protecting the display device (10) may be further disposed on the upper part of the display device (10).

[0059] The display device (10) may include a first display area (DA1) that provides a first image and a second display area (DA2) that provides a second image and is an area where an electronic component (20) overlaps. The display device (10) may include a substrate (100), a display layer (DISL) on the substrate (100), a touchscreen layer (TSL), and a panel protection member (PB) disposed on the lower part of the substrate (100).

[0060] The display layer (DISL) may include a pixel circuit layer (PCL) including a pixel circuit (PC), a light-emitting element layer including a light-emitting element (LE), and a sealing member (ENCM). As an example, the sealing member (ENCM) may be a thin film encapsulation layer (TFEL). A buffer layer (111) may be disposed between the substrate (100) and the display layer (DISL), and an insulating layer (IL) may be disposed within the display layer (DISL).

[0061] The substrate (100) may be made of an insulating material such as glass, quartz, or polymer resin. The substrate (100) may be a rigid substrate or a flexible substrate capable of bending, folding, rolling, etc.

[0062] In the first display area (DA1) of the display device (10), a plurality of first pixel circuits (PC1) and a plurality of first light-emitting elements (LE1) electrically connected to each of the plurality of first pixel circuits (PC1) may be arranged. The first pixel circuit (PC1) includes at least one thin film transistor (TFT) and can control the light emission of the first light-emitting element (LE1). The first light-emitting element (LE1) emits light through a light-emitting region, and said light-emitting region may be defined as the first pixel (PX1). That is, the first pixel (PX1) can be realized by the light emission of the first light-emitting element (LE1).

[0063] A plurality of second light-emitting elements (LE2) may be disposed in the second display area (DA2) of the display device (10). According to some embodiments, a second pixel circuit (PC2) that controls the light emission of the second light-emitting elements (LE2) may not be disposed in the second display area (DA2) but may be disposed in a peripheral area (PA). In another embodiment, the second pixel circuit (PC2) may be disposed in a part of the first display area (DA1) or between the first display area (DA1) and the second display area (DA2).

[0064] The second pixel circuit (PC2) includes at least one thin-film transistor (TFT') and can be electrically connected to the second light-emitting element (LE2) by a connecting wire (CWL). For example, the connecting wire (CWL) may be provided with a transparent conductive material. The second pixel circuit (PC2) can control the light emission of the second light-emitting element (LE2). The second light-emitting element (LE2) emits light through a light-emitting region, and said light-emitting region can be defined as the second pixel (PX2). That is, the second pixel (PX2) can be realized by the light emission of the second light-emitting element (LE2).

[0065] Additionally, the area in the second display area (DA2) where the second light-emitting element (LE2) is not placed may include a transmission area (TA). The transmission area (TA) may be an area through which light / signals emitted from an electronic component (20) placed in correspondence with the second display area (DA2) or light / signals incident on the electronic component (20) are transmitted.

[0066] A connecting wire (CWL) that electrically connects the second pixel circuit (PC2) and the second light-emitting element (LE2) can be placed in a transparent area (TA). Since the connecting wire (CWL) can be provided with a transparent conductive material with high transmittance, even if the connecting wire (CWL) is placed in the transparent area (TA), a decrease in the transmittance of the transparent area (TA) can be prevented.

[0067] In addition, in one embodiment of the present invention, since the second pixel circuit (PC2) is not placed in the second display area (DA2), the area of ​​the transmission area (TA) can be sufficiently secured, thereby improving the light transmittance of the second display area (DA2).

[0068] A light-emitting element (LE) can be covered with a thin film encapsulation layer (TFEL). In some embodiments, the thin film encapsulation layer (TFEL) may include at least one inorganic encapsulation layer and at least one organic encapsulation layer as shown in FIG. 3. In one embodiment, the thin film encapsulation layer (TFEL) may include a first inorganic encapsulation layer (310) and a second inorganic encapsulation layer (330) and an organic encapsulation layer (320) between them.

[0069] The touchscreen layer (TSL) can acquire coordinate information based on external input, such as a touch event. The touchscreen layer (TSL) may include touch electrodes and touch wiring connected to the touch electrodes. The touchscreen layer (TSL) can detect external input using a magnetic capacitance method or a mutual capacitance method.

[0070] A touchscreen layer (TSL) may be formed on a thin film encapsulation layer (TFEL). Alternatively, the touchscreen layer (TSL) may be formed separately on a touch substrate and then bonded onto the thin film encapsulation layer (TFEL) through an adhesive layer such as an optically clear adhesive (OCA). In one embodiment, the touchscreen layer (TSL) may be formed directly on the thin film encapsulation layer (TFEL), in which case the adhesive layer may not be interposed between the touchscreen layer (TSL) and the thin film encapsulation layer (TFEL).

[0071] A panel protection member (PB) may be attached to the lower part of a substrate (100) to support and protect the substrate (100). The panel protection member (PB) may have a hole (PB_H) corresponding to a second display area (DA2). By having the panel protection member (PB) a hole (PB_H), the light transmittance of the second display area (DA2) can be improved. The panel protection member (PB) may be provided with polyethylene terephthalate (PET) or polyimide (PI).

[0072] The area of ​​the second display area (DA2) may be provided to be larger than the area where the electronic component (20) is placed. Accordingly, the area of ​​the hole (PB_H) provided in the panel protection member (PB) may not match the area of ​​the second display area (DA2).

[0073] An electronic component (20) may be placed in the second display area (DA2). The electronic component (20) may be an electronic element that uses light or sound. For example, the electronic element may be a sensor that measures distance, such as a proximity sensor; a sensor that recognizes a part of a user's body (e.g., fingerprint, iris, face, etc.); a small lamp that emits light; or an image sensor that captures images (e.g., a camera). An electronic element that uses light may use light of various wavelength bands, such as visible light, infrared light, or ultraviolet light. An electronic element that uses sound may use ultrasound or sound of other frequency bands. In some embodiments, a plurality of electronic components (20) may be placed in the second display area (DA2). In this case, the plurality of electronic components (20) may have different functions from each other.

[0074] In some embodiments, a bottom metal layer (BML) may be disposed in the second display area (DA2). The bottom metal layer (BML) may be disposed between the substrate (100) and the second light-emitting element (LE2) so as to overlap with the second light-emitting element (LE2). This bottom metal layer (BML) may include a light-blocking material and may block external light from reaching the second light-emitting element (LE2).

[0075] FIG. 4 is an equivalent circuit diagram of any one pixel circuit included in an electronic device according to one embodiment of the present invention.

[0076] Referring to FIG. 4, the pixel circuit (PC) may include first to seventh thin-film transistors (T1, T2, T3, T4, T5, T6, T7), a first capacitor (Cst), and a second capacitor (Cbt). Additionally, the pixel circuit (PC) may be connected to a plurality of signal lines, first and second initialization voltage lines (VIL1, VIL2) and a power supply voltage line (PL). The signal lines may include a data line (DL), a first scan line (SL1), a second scan line (SL2), a third scan line (SL3), a fourth scan line (SL4), and a light emission control line (EL). In another embodiment, at least one of the signal lines, the first and second initialization voltage lines (VIL1, VIL2) and / or the power supply voltage line (PL) may be shared among adjacent pixel circuits.

[0077] The power supply voltage line (PL) can transmit a driving power supply voltage (ELVDD) to the first thin-film transistor (T1). The first initialization voltage line (VIL1) can transmit a first initialization voltage (Vint1) that initializes the first thin-film transistor (T1) to the pixel circuit (PC). The second initialization voltage line (VIL2) can transmit a second initialization voltage (Vint2) that initializes the light-emitting element (LE) to the pixel circuit (PC).

[0078] For example, in FIG. 4, among the first to seventh thin-film transistors (T1 to T7), the third thin-film transistor (T3) and the fourth thin-film transistor (T4) are implemented as NMOS (n-channel MOSFET), and the rest are implemented as PMOS (p-channel MOSFET).

[0079] The first thin-film transistor (T1) can be connected to the power supply voltage line (PL) via the fifth thin-film transistor (T5) and electrically connected to the light-emitting element (LE) via the sixth thin-film transistor (T6). The first thin-film transistor (T1) acts as a driving thin-film transistor and can receive a data signal (Dm) according to the switching operation of the second thin-film transistor (T2) and supply a driving current (Id) to the light-emitting element (LE).

[0080] The second thin-film transistor (T2) is a switching thin-film transistor and is connected to the first scan line (SL1) and the data line (DL), and can be connected to the power supply voltage line (PL) via the fifth thin-film transistor (T5). The second thin-film transistor (T2) can perform a switching operation in which it is turned on according to the first scan signal (Sn) received through the first scan line (SL1) and transmits the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0081] The third thin-film transistor (T3) is a compensation thin-film transistor and is connected to the fourth scan line (SL4), and can be connected to the light-emitting element (LE) via the sixth thin-film transistor (T6). The third thin-film transistor (T3) is turned on according to the fourth scan signal (Sn') received through the fourth scan line (SL4) and can diode-connect the first thin-film transistor (T1).

[0082] The fourth thin-film transistor (T4) is a first initialization thin-film transistor and is connected to the third scan line (SL3), which is a previous scan line, and the first initialization voltage line (VIL1). It is turned on according to the third scan signal (Sn-1), which is a previous scan signal received through the third scan line (SL3), and transmits the first initialization voltage (Vint1) from the first initialization voltage line (VIL1) to the gate electrode of the first thin-film transistor (T1) to initialize the voltage of the gate electrode of the first thin-film transistor (T1).

[0083] The fifth thin-film transistor (T5) may be an operation control thin-film transistor, and the sixth thin-film transistor (T6) may be a light-emitting control thin-film transistor. The fifth thin-film transistor (T5) and the sixth thin-film transistor (T6) are connected to a light-emitting control line (EL), and are simultaneously turned on according to a light-emitting control signal (En) received through the light-emitting control line (EL) to form a current path so that a driving current (Id) can flow from the power supply voltage line (PL) toward the light-emitting element (LE).

[0084] The seventh thin-film transistor (T7) is a second initialization thin-film transistor and is connected to the second scan line (SL2), which is the next scan line, and the second initialization voltage line (VIL2). It is turned on according to the second scan signal (Sn+1), which is the next scan signal received through the second scan line (SL2), and transmits the second initialization voltage (Vint2) from the second initialization voltage line (VIL2) to the light-emitting element (LE) to initialize the light-emitting element (LE). In some embodiments, the seventh thin-film transistor (T7) may be omitted.

[0085] The first capacitor (Cst) may include a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) may be connected to the gate electrode of the first thin-film transistor (T1), and the second electrode (CE2) may be connected to the power supply voltage line (PL). The first capacitor (Cst) can maintain the voltage applied to the gate electrode of the first thin-film transistor (T1) by storing and maintaining a voltage corresponding to the difference between the voltages of the power supply voltage line (PL) and the gate electrode of the first thin-film transistor (T1).

[0086] The second capacitor (Cbt) may include a third electrode (CE3) and a fourth electrode (CE4). The third electrode (CE3) may be connected to the gate electrode of the first scan line (SL1) and the second thin-film transistor (T2). The fourth electrode (CE4) may be connected to the gate electrode of the first thin-film transistor (T1) and the first electrode (CE1) of the first capacitor (Cst). The second capacitor (Cbt) is a boosting capacitor, and when the first scan signal (Sn) of the first scan line (SL1) is a voltage that turns off the second thin-film transistor (T2), it can increase the voltage of the second node (N2) to reduce the voltage that displays black (black voltage).

[0087] The light-emitting element (LE) is an organic light-emitting diode (OLED) and includes a pixel electrode and a counter electrode, and the counter electrode can receive a common power supply voltage (ELVSS). The light-emitting element (LE) receives a driving current (Id) from the first thin-film transistor (T1) and emits light to display an image.

[0088] The specific operation of each pixel circuit (PC) according to one embodiment is as follows.

[0089] During the first initialization period, when a third scan signal (Sn-1) is supplied through the third scan line (SL3), the fourth thin-film transistor (T4) is turned on in response to the third scan signal (Sn-1), and the first thin-film transistor (T1) can be initialized by the first initialization voltage (Vint1) supplied from the first initialization voltage line (VIL1).

[0090] During the data programming period, when the first scan signal (Sn) and the fourth scan signal (Sn') are supplied through the first scan line (SL1) and the fourth scan line (SL4), respectively, the second thin-film transistor (T2) and the third thin-film transistor (T3) can be turned on in response to the first scan signal (Sn) and the fourth scan signal (Sn'). At this time, the first thin-film transistor (T1) can be diode-connected to the turned-on third thin-film transistor (T3) and forward-biased. Then, a voltage compensated for the threshold voltage (Vth) of the first thin-film transistor (T1) from the data signal (Dm) supplied from the data line (DL) can be applied to the gate electrode of the first thin-film transistor (T1). A driving power supply voltage (ELVDD) and a compensation voltage are applied to both ends of the first capacitor (Cst), and a charge corresponding to the voltage difference between the two ends can be stored in the first capacitor (Cst).

[0091] During the light emission period, the fifth thin-film transistor (T5) and the sixth thin-film transistor (T6) can be turned on by the light emission control signal (En) supplied from the light emission control line (EL). A driving current (Id) is generated according to the voltage difference between the voltage of the gate electrode of the first thin-film transistor (T1) and the driving power supply voltage (ELVDD), and the driving current (Id) can be supplied to the light-emitting element (LE) through the sixth thin-film transistor (T6).

[0092] During the second initialization period, when the second scan signal (Sn+1) is supplied through the second scan line (SL2), the seventh thin-film transistor (T7) is turned on in response to the second scan signal (Sn+1), and the light-emitting element (LE) is initialized by the second initialization voltage (Vint2) supplied from the second initialization voltage line (VIL2).

[0093] Meanwhile, in one embodiment, a plurality of thin-film transistors (T1 to T7) may include silicon-based thin-film transistors comprising a silicon semiconductor. In another embodiment, at least one of the plurality of thin-film transistors (T1 to T7) may include an oxide-based thin-film transistor comprising an oxide semiconductor, and the remainder may include silicon-based thin-film transistors comprising a silicon semiconductor.

[0094] Specifically, the first thin-film transistor (T1), which directly affects the brightness of the display device (10, see FIG. 3), is composed of a silicon-based thin-film transistor including a silicon semiconductor composed of polycrystalline silicon with high reliability, thereby enabling the implementation of a high-resolution display device.

[0095] Meanwhile, since oxide semiconductors have high carrier mobility and low leakage current, the voltage drop is not significant even when the driving time is long. In other words, since the color change of the image due to the voltage drop is not significant even during low-frequency driving, low-frequency driving is possible. As oxide semiconductors have the advantage of low leakage current, at least one of the third thin-film transistor (T3) and the fourth thin-film transistor (T4) connected to the gate electrode of the first thin-film transistor (T1) is equipped with an oxide semiconductor to prevent leakage current from flowing to the gate electrode of the first thin-film transistor (T1) while simultaneously reducing power consumption.

[0096] For convenience of explanation, the following description will explain the case where the first, second, fifth, sixth, and seventh thin-film transistors (T1, T2, T5, T6, T7) are silicon-based thin-film transistors containing silicon semiconductors, and the third and fourth thin-film transistors (T3, T4) are oxide-based thin-film transistors containing oxide semiconductors.

[0097] FIGS. 5a to 5g are plan views schematically showing parts of a display device provided in an electronic device according to embodiments of the present invention.

[0098] Referring to FIG. 5a, various components forming a display device (10) may be placed on a substrate (100). The display device (10) may include a display area (DA) and a peripheral area (PA) placed outside the display area (DA). The display area (DA) may include a first display area (DA1) and a second display area (DA2) having a transparent area (TA).

[0099] A first light-emitting element (LE1), such as an organic light-emitting diode (OLED), may be disposed in a first display area (DA1). The first light-emitting element (LE1) may emit light of a predetermined color through a first pixel (PX1, see FIG. 1). That is, the first pixel (PX1) may be implemented by the first light-emitting element (LE1), and the first pixel (PX1) may be a sub-pixel. The first light-emitting element (LE1) may emit light of, for example, red, green, blue, or white. A first pixel circuit (PC1) that drives the first light-emitting element (LE1) is disposed in the first display area (DA1) and may be electrically connected to the first light-emitting element (LE1). The first pixel circuit (PC1) may be disposed overlapping with the first light-emitting element (LE1), for example.

[0100] As shown in FIG. 5a, the second display area (DA2) may be located on one side of the entire display area (DA) and partially surrounded by the first display area (DA1). A second light-emitting element (LE2), such as an organic light-emitting diode (OLED), may be placed in the second display area (DA2). The second light-emitting element (LE2) may emit light of a predetermined color through a second pixel (PX2, see FIG. 1). That is, the second pixel (PX2) may be implemented by the second light-emitting element (LE2), and the second pixel (PX2) may be a sub-pixel. The second light-emitting element (LE2) may emit light of, for example, red, green, blue, or white.

[0101] The second pixel circuit (PC2) that drives the second light-emitting element (LE2) is placed in a peripheral area (PA) and can be electrically connected to the second light-emitting element (LE2). For example, the second pixel circuit (PC2) can be placed in a peripheral area (PA) adjacent to the second display area (DA2). That is, the second pixel circuit (PC2) can be placed adjacent to the outer edge of the second display area (DA2). As shown in FIG. 5a, when the second display area (DA2) is placed above the entire display area (DA), the second pixel circuit (PC2) can be placed above the peripheral area (PA). The second pixel circuit (PC2) and the second light-emitting element (LE2) can be electrically connected by a connecting wire (CWL) extending, for example, in the y-direction. The connecting wire (CWL) can be extended in the same direction as the extension direction of the data line (DL), for example.

[0102] Meanwhile, the second display area (DA2) may include a transmission area (TA). The transmission area (TA) may be arranged to surround the second light-emitting elements (LE2). Alternatively, the transmission area (TA) may be arranged in a grid form with a plurality of second light-emitting elements (LE2).

[0103] Each of the first pixel circuit (PC1) and the second pixel circuit (PC2) can be electrically connected to outer circuits placed in the peripheral area (PA). In the peripheral area (PA), a first scan driving circuit (SDRV1), a second scan driving circuit (SDRV2), a terminal section (PAD), a driving voltage supply line (11), and a common voltage supply line (13) may be placed.

[0104] The first scan driving circuit (SDRV1) can apply a scan signal to each of the first pixel circuits (PC1) that drive the first light-emitting elements (LE1) through a scan line (SL). The scan line (SL) may be the first to fourth scan lines (SL1, SL2, SL3, SL4) of FIG. 4. The first scan driving circuit (SDRV1) can apply a light-emitting control signal to each of the first pixel circuits (PC1) through a light-emitting control line (EL). The second scan driving circuit (SDRV2) may be located on the opposite side of the first scan driving circuit (SDRV1) with respect to the first display area (DA1) and may be approximately parallel to the first scan driving circuit (SDRV1). Some of the first pixel circuits (PC1) of the first display area (DA1) may be electrically connected to the first scan driving circuit (SDRV1), and the rest may be electrically connected to the second scan driving circuit (SDRV2).

[0105] In some embodiments, although not illustrated, each of the second pixel circuits (PC2) driving the second light-emitting elements (LE2) may also receive a scan signal and a light-emitting control signal from the first scan driving circuit (SDRV1) and / or the second scan driving circuit (SDRV2) through separate wiring extending from the scan line (SL) and / or the light-emitting control line (EL).

[0106] A terminal portion (PAD) may be disposed on one side of the substrate (100). The terminal portion (PAD) is exposed without being covered by an insulating layer and is connected to a display circuit board (30). A display driving portion (31) may be disposed on the display circuit board (30).

[0107] The display driving unit (31) can generate a control signal to be transmitted to the first scan driving circuit (SDRV1) and the second scan driving circuit (SDRV2). The display driving unit (31) generates a data signal, and the generated data signal can be transmitted to the first pixel circuits (PC1) through the fan-out wiring (FW) and the data line (DL) connected to the fan-out wiring (FW). Additionally, although not shown, the data signal can also be transmitted to the second pixel circuits (PC2) through the data line (DL) or separate wiring extending from the data line (DL).

[0108] The display driving unit (31) can supply a driving power supply voltage (ELVDD) to the driving voltage supply line (11) and can supply a common power supply voltage (ELVSS) to the common voltage supply line (13). The driving power supply voltage (ELVDD) is applied to the first pixel circuit (PC1) through a power voltage line (PL) connected to the driving voltage supply line (11), and although not shown, the driving power supply voltage (ELVDD) can also be applied to the second pixel circuits (PC2) through the driving voltage supply line (11) or separate wiring extending from the driving voltage supply line (11). The common power supply voltage (ELVSS) can be connected to the common voltage supply line (13) and applied to the opposing electrodes of the first light-emitting element (LE1) and the second light-emitting element (LE2), respectively.

[0109] The driving voltage supply line (11) may extend, for example, in the x-direction from the lower side of the first display area (DA1). The common voltage supply line (13) may have a loop shape with one side open, so as to partially surround the first display area (DA1).

[0110] Referring to FIG. 5b, the second pixel circuit (PC2) may be placed in a peripheral area (PA) adjacent to the first display area (DA1). The second pixel circuit (PC2) may be placed adjacent to the outer edge of the first display area (DA1). In this case, the second pixel circuit (PC2) and the second light-emitting element (LE2) may be electrically connected by a connecting wire (CWL) extending, for example, in the x-direction and the y-direction. The connecting wire (CWL) may extend, for example, in the same direction as the extension direction of the scan line (SL) and / or in the same direction as the extension direction of the data line (DL).

[0111] Referring to FIG. 5c, a second display area (DA2) may be placed inside the first display area (DA1) and completely surrounded by the first display area (DA1). A second light-emitting element (LE2) may be placed in the second display area (DA2), and a second pixel circuit (PC2) that drives the second light-emitting element (LE2) may be placed in a peripheral area (PA) located above the second display area (DA2). The second pixel circuit (PC2) and the second light-emitting element (LE2) may be electrically connected by a connecting wire (CWL). In this case, the connecting wire (CWL) may extend in the same direction as, for example, a data line (DL).

[0112] Referring to FIG. 5d, a second light-emitting element (LE2) may be placed in a second display area (DA2) that is positioned inside the first display area (DA1). For example, a second pixel circuit (PC2) that drives the second light-emitting element (LE2) may be placed in a peripheral area (PA) located on the upper left and / or upper right side of the second display area (DA2). The second pixel circuit (PC2) and the second light-emitting element (LE2) may be electrically connected by a connecting wire (CWL), in which case the connecting wire (CWL) may be extended in the same direction as the extension direction of the scan line (SL) and / or the same direction as the extension direction of the data line (DL), for example.

[0113] Referring to FIG. 5e, the second display area (DA2) is located on one side of the entire display area (DA) and may be partially surrounded by the first display area (DA1). In one embodiment, an intermediate area (MA) may be located between the first display area (DA1) and the second display area (DA2). The intermediate area (MA) may be positioned to surround at least a portion of the second display area (DA2). For example, the intermediate area (MA) may be positioned to the left and / or right of the second display area (DA2). Alternatively, the intermediate area (MA) may also be positioned below the second display area (DA2).

[0114] A second light-emitting element (LE2) may be disposed in the second display area (DA2), and a second pixel circuit (PC2) that drives the second light-emitting element (LE2) may be disposed in the intermediate area (MA). The second pixel circuit (PC2) and the second light-emitting element (LE2) may be electrically connected by a connecting wire (CWL). If the intermediate area (MA) is disposed to the left and / or right of the second display area (DA2), the connecting wire (CWL) may extend in the same direction as, for example, the scan line (SL).

[0115] In one embodiment, the number of second pixel circuits (PC2) placed in the intermediate area (MA) per equal area may be equal to or less than the number of first pixel circuits (PC1) placed in the first display area (DA1) per equal area.

[0116] Referring to FIG. 5f, the second display area (DA2) may be positioned inside the first display area (DA1) and completely surrounded by the first display area (DA1). An intermediate area (MA) may be located between the first display area (DA1) and the second display area (DA2). In one embodiment, not only the second display area (DA2) but also the intermediate area (MA) may be completely surrounded by the first display area (DA1).

[0117] In one embodiment, the intermediate area (MA) may surround the second display area (DA2) entirely or partially. For example, as shown in FIG. 5f, the intermediate area (MA) may be positioned to the left and / or right of the second display area (DA2). Alternatively, the intermediate area (MA) may also be positioned above and / or below the second display area (DA2).

[0118] A second light-emitting element (LE2) may be disposed in the second display area (DA2), and a second pixel circuit (PC2) that drives the second light-emitting element (LE2) may be disposed in the intermediate area (MA). The second pixel circuit (PC2) and the second light-emitting element (LE2) may be electrically connected by a connecting wire (CWL). If the intermediate area (MA) is disposed to the left and / or right of the second display area (DA2), the connecting wire (CWL) may be extended, for example, in the same direction as the extension direction of the scan line (SL). Although not illustrated, if the intermediate area (MA) is disposed to the upper and / or lower side of the second display area (DA2), the connecting wire (CWL) may be extended, for example, in the same direction as the extension direction of the scan line (SL) and in the same direction as the extension direction of the data line (DL).

[0119] In one embodiment, the number of second pixel circuits (PC2) placed in the intermediate area (MA) per equal area may be equal to or less than the number of first pixel circuits (PC1) placed in the first display area (DA1) per equal area.

[0120] As described above, the arrangement of the second pixel circuit (PC2) can be varied in many ways, and since the second pixel circuit (PC2) is not arranged in the second display area (DA2), the area of ​​the transmission area (TA) can be sufficiently secured, thereby improving the light transmittance of the second display area (DA2).

[0121] In FIGS. 5a to 5f, the second pixel circuit (PC2) is not shown in the second display area (DA2), but the present invention is not limited thereto. As shown in FIG. 5g, the second pixel circuit (PC2) may be placed within the second display area (DA2). The second pixel circuit (PC2) and the second light-emitting element (LE2) may be placed in an overlapping manner and may be electrically connected by a contact electrode (not shown). In this embodiment, a transmission area (TA) is placed in the second display area (DA2), thereby ensuring light transmittance.

[0122] FIGS. 6a and 6b are schematic plan views illustrating some configurations of a display device provided in an electronic device according to an embodiment of the present invention, focusing on a first display area and a second display area of ​​the display device.

[0123] Referring to FIG. 6a, a plurality of first pixel electrodes (211) are disposed in a first display area (DA1), and the plurality of first pixel electrodes (211) may be spaced apart from each other on a plane. The plurality of first pixel electrodes (211) may include a first-1 pixel electrode (211-1), a first-2 pixel electrode (211-2), and a first-3 pixel electrode (211-3) having different areas. In one embodiment, the area of ​​the first-2 pixel electrode (211-2) may be larger than the area of ​​the first-1 pixel electrode (211-1), and the area of ​​the first-3 pixel electrode (211-3) may be larger than the area of ​​the first-2 pixel electrode (211-2).

[0124] A plurality of second pixel electrodes (212) are disposed in the second display area (DA2), and the plurality of second pixel electrodes (212) may be disposed spaced apart from each other on a plane. A transmission area (TA) may be located between the plurality of second pixel electrodes (212). The plurality of second pixel electrodes (212) may include a second-1 pixel electrode (212-1), a second-2 pixel electrode (212-2), and a second-3 pixel electrode (212-3) having different areas. In one embodiment, the area of ​​the second-2 pixel electrode (212-2) may be larger than the area of ​​the second-1 pixel electrode (212-1), and the area of ​​the second-3 pixel electrode (212-3) may be larger than the area of ​​the second-2 pixel electrode (212-2).

[0125] In one embodiment, the area of ​​each second pixel electrode (212) on a plane may be larger than the area of ​​each first pixel electrode (211). For example, the second-1 pixel electrode (212-1), the second-2 pixel electrode (212-2), and the second-3 pixel electrode (212-3) may each have a larger area than the first-1 pixel electrode (211-1), the first-2 pixel electrode (211-2), and the first-3 pixel electrode (211-3).

[0126] A pixel defining film (120) may be disposed on a plurality of first pixel electrodes (211) and a plurality of second pixel electrodes (212). Since a plurality of pixel electrodes (210) are disposed on the lower part of the pixel defining film (120), the edges of each pixel electrode (210) are shown as dotted lines in FIG. 6a.

[0127] The pixel defining film (120) may include a plurality of first openings (OP1) that expose a portion of each of the plurality of first pixel electrodes (211), such as a central portion, and a plurality of second openings (OP2) that expose a portion of each of the plurality of second pixel electrodes (212), such as a central portion.

[0128] A plurality of first openings (OP1) may include a first-1 opening (OP1-1), a first-2 opening (OP1-2), and a first-3 opening (OP1-3) corresponding to each of the first-1 pixel electrode (211-1), the first-2 pixel electrode (211-2), and the first-3 pixel electrode (211-3). In one embodiment, the area of ​​the first-2 opening (OP1-2) may be larger than the area of ​​the first-1 opening (OP1-1), and the area of ​​the first-3 opening (OP1-3) may be larger than the area of ​​the first-2 opening (OP1-2).

[0129] A plurality of second openings (OP2) may include a second-1 opening (OP2-1), a second-2 opening (OP2-2), and a second-3 opening (OP2-3) corresponding to each of the second-1 pixel electrode (212-1), the second-2 pixel electrode (212-2), and the second-3 pixel electrode (212-3). In one embodiment, the area of ​​the second-2 opening (OP2-2) may be larger than the area of ​​the second-1 opening (OP2-1), and the area of ​​the second-3 opening (OP2-3) may be larger than the area of ​​the second-2 opening (OP2-2).

[0130] In one embodiment, the area of ​​each second opening (OP2) on a plane may be larger than the area of ​​each first opening (OP1). For example, the area of ​​the second-1 opening (OP2-1), the second-2 opening (OP2-2), and the second-3 opening (OP2-3) may be larger than the area of ​​the first-1 opening (OP1-1), the first-2 opening (OP1-2), and the first-3 opening (OP1-3), respectively.

[0131] Although not shown in FIG. 6a, an intermediate layer (not shown) having a light-emitting layer that emits light of a predetermined color may be disposed on the first pixel electrode (211) and the second pixel electrode (212), and may be located within the first opening (OP1) and the second opening (OP2) of the pixel defining film (120). For example, an intermediate layer having a red light-emitting layer may be located within the first-1 opening (OP1-1) and the second-1 opening (OP2-1), an intermediate layer having a green light-emitting layer may be located within the first-2 opening (OP1-2) and the second-2 opening (OP2-2), and an intermediate layer having a blue light-emitting layer may be located within the first-3 opening (OP1-3) and the second-3 opening (OP2-3).

[0132] The opposing electrode can be disposed on the pixel defining film (120) and the intermediate layer, and can be formed integrally across a plurality of pixel electrodes (210).

[0133] The stacked structure of the pixel electrode (210), intermediate layer, and counter electrode can form a single organic light-emitting diode (OLED) as a single light-emitting element (LE). A first opening (OP1) of the pixel defining film (120) corresponds to a first light-emitting element (LE1, see FIG. 3) and can define a light-emitting region. That is, the first opening (OP1) of the pixel defining film (120) can define a first pixel (PX1). Additionally, a second opening (OP2) of the pixel defining film (120) corresponds to a second light-emitting element (LE2, see FIG. 3) and defines a light-emitting region, and thus can define a second pixel (PX2).

[0134] A plurality of first pixels (PX1) may be arranged in a first display area (DA1), and a plurality of second pixels (PX2) may be arranged in a second display area (DA2). In one embodiment, the plurality of first pixels (PX1) may include a first red pixel (Pr1), a first green pixel (Pg1), and a first blue pixel (Pb1). Each of the first red pixel (Pr1), the first green pixel (Pg1), and the first blue pixel (Pb1) may emit red light, green light, and blue light, respectively. The first red pixel (Pr1) may overlap with the first-1 pixel electrode (211-1) and be defined by the first-1 aperture (OP1-1). The first green pixel (Pg1) may overlap with the first-2 pixel electrode (211-2) and be defined by the first-2 aperture (OP1-2). The first blue pixel (Pb1) overlaps with the first-third pixel electrode (211-3) and can be defined by the first-third aperture (OP1-3).

[0135] Similarly, a plurality of second pixels (PX2) may include a red second pixel (Pr2), a green second pixel (Pg2), and a blue second pixel (Pb2). Each of the red second pixel (Pr2), the green second pixel (Pg2), and the blue second pixel (Pb2) may emit red light, green light, and blue light, respectively. The red second pixel (Pr2) may overlap with the second-1 pixel electrode (212-1) and may be defined by the second-1 aperture (OP2-1). The green second pixel (Pg2) may overlap with the second-2 pixel electrode (212-2) and may be defined by the second-2 aperture (OP2-2). The blue second pixel (Pb2) may overlap with the second-3 pixel electrode (212-3) and may be defined by the second-3 aperture (OP2-3). Here, red light may be light in the wavelength range of 580 nm to 780 nm, green light may be light in the wavelength range of 495 nm to 580 nm, and blue light may be light in the wavelength range of 400 nm to 495 nm.

[0136] In one embodiment, the area of ​​the second pixel (PX2) on a plane may be larger than the area of ​​the first pixel (PX1). For example, the area of ​​the red second pixel (PX2) may be larger than the area of ​​the red first pixel (PX1), the area of ​​the green second pixel (PX2) may be larger than the area of ​​the green first pixel (PX1), and the area of ​​the blue second pixel (PX2) may be larger than the area of ​​the blue first pixel (PX1). To this end, as described above, the area of ​​the second pixel electrode (212) may be larger than the area of ​​the first pixel electrode (211), and the area of ​​the second opening (OP2) of the pixel defining film (120) may be larger than the area of ​​the first opening (OP1).

[0137] Since the second display area (DA2) includes a transmission area (TA), the resolution may be lower than that of the first display area (DA1). However, as described above, by configuring the second pixel (PX2) located in the second display area (DA2) to have an area larger than the first pixel (PX1) located in the first display area (DA1), the brightness between the first display area (DA1) and the second display area (DA2) can be maintained to be equal.

[0138] Meanwhile, FIG. 6a illustrates a plurality of first pixels (PX1) and a plurality of second pixels (PX2) arranged in an RGBG type (so-called pentile® structure), but it is obvious that they can be arranged in various shapes such as a stripe type. In addition, the shape of each of the first pixels (PX1) and second pixels (PX2) on a plane is not limited to a circle, and can be various shapes such as polygons like triangles and squares, or ellipses.

[0139] In the second display area (DA2), the pixel defining film (120) may not be placed in the transmission area (TA). The pixel defining film (120) may be spaced apart and placed corresponding to each of the second-1 pixel electrode (212-1), the second-3 pixel electrode (212-2), and the second-3 pixel electrode (212-3). In FIG. 6a, the outer edge of the pixel defining film (120) placed in the second display area (DA2) is shown as being rectangular, but is not limited thereto.

[0140] As shown in FIG. 6b, the outer edge of the pixel defining film (120) placed in the second display area (DA2) may be provided in an elliptical shape. Alternatively, the shape of the outer edge of the pixel defining film (120) placed in the second display area (DA2) may be varied in various ways, such as a circle, a polygon with more than a hexagon.

[0141] Additionally, in FIGS. 6a and 6b, the size of the second pixel electrode (212) and the second pixel (PX2) placed in the second display area (DA2) is depicted as being larger than the size of the first pixel electrode (211) and the first pixel (PX1) placed in the first display area (DA1), but the present invention is not limited thereto. Various variations are possible, such as the size of the second pixel electrode (212) and the second pixel (PX2) being the same as the size of the first pixel electrode (211) and the first pixel (PX1).

[0142] FIG. 7 is a cross-sectional view schematically illustrating a part of a display device provided in an electronic device according to one embodiment of the present invention.

[0143] Referring to FIG. 7, the display device (10) includes a substrate (100), and the substrate (100) may include glass or a polymer resin. For example, the substrate (100) may include a polymer resin such as polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC), and cellulose acetate propionate (CAP). When the substrate (100) includes a polymer resin, the substrate (100) may have flexible or bendable properties.

[0144] The substrate (100) may have a single layer or a multilayer structure of the above material, and in the case of a multilayer structure, may further include an inorganic layer. For example, the substrate (100) may include a first base layer (101), a first barrier layer (102), a second base layer (103), and a second barrier layer (104) that are sequentially stacked. The first base layer (101) and the second base layer (103) may each include the polymer resin described above. The first barrier layer (102) and the second barrier layer (104) are barrier layers that prevent the penetration of external foreign substances, and are silicon nitride (SiN x ) or silicon oxide (SiO x It may be a single layer or a multilayer containing inorganic materials such as ).

[0145] A buffer layer (111) may be disposed on the substrate (100). The buffer layer (111) may serve to increase the smoothness of the upper surface of the substrate (110), and the buffer layer (111) may be silicon oxide (SiO₂). x Oxide films such as ), and / or silicon nitride (SiN x Nitride films such as ), or silicon oxynitride (SiO₂) x N y It can be provided as ).

[0146] A plurality of pixel circuits (PC) may be disposed on the buffer layer (111). The plurality of pixel circuits (PC) may include a plurality of first pixel circuits (PC1) located in a first display area (DA1) and a plurality of second pixel circuits (PC2) located in a peripheral area (PA). The first pixel circuit (PC1) may be electrically connected to a first light-emitting element (LE1) located in the first display area (DA1), and the second pixel circuit (PC2) may be electrically connected to a second light-emitting element (LE2) located in the second display area (DA2). In one embodiment, each of the first and second pixel circuits (PC1, PC2) may include the aforementioned first to seventh thin-film transistors (T1, T2, T3, T4, T5, T6, T7), but in FIG. 5, only the first thin-film transistor (T1) and the third thin-film transistor (T3) are shown for convenience of illustration. In addition, as an example, since the first pixel circuit (PC1) and the second pixel circuit (PC2) have the same configuration and structure, the explanation will focus on the first pixel circuit (PC1) for convenience of explanation.

[0147] A silicon semiconductor layer containing a silicon semiconductor material may be disposed on the buffer layer (111). FIG. 7 illustrates a first semiconductor layer (A1) of a first thin-film transistor (T1) as a silicon semiconductor layer. The first semiconductor layer (A1) may include a first channel region (C1), a first source region (S1) and a first drain region (D1) on both sides of the first channel region (C1). For example, the source region and the drain region may be doped with impurities, and the impurities may include N-type impurities or P-type impurities. The channel region is a region that overlaps with the gate electrode to be described later, and may not be doped with impurities or may contain a very small amount of impurities. The source region and the drain region may correspond to the source electrode and the drain electrode of the thin-film transistor, respectively. The source region and the drain region may be interchanged depending on the properties of the thin-film transistor. For convenience, the terms source region and drain region will be used below instead of source electrode or drain electrode.

[0148] A first gate insulating layer (112) may be located on the first semiconductor layer (A1). The first gate insulating layer (112) may include an inorganic material including an oxide or a nitride. For example, the first gate insulating layer (112) may be silicon oxide (SiO2) or silicon nitride (SiN x ), silicon oxynitride (SiO₂ x N y It may include at least one aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).

[0149] A first gate electrode (G1) may be disposed on the first gate insulating layer (112). The first gate electrode (G1) may overlap at least partially with the first semiconductor layer (A1). For example, the first gate electrode (G1) may overlap with the first channel region (C1) of the first semiconductor layer (A1). The first gate electrode (G1) of the first thin-film transistor (T1) may include a low-resistance conductive material such as molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti), and may be a single layer or multilayer structure made of the aforementioned materials. Additionally, a third lower gate electrode (G3a) may be disposed on the first gate insulating layer (112). The third lower gate electrode (G3a) may overlap at least partially with the third semiconductor layer (A3) described later. The third lower gate electrode (G3a) may contain the same material as the first gate electrode (G1).

[0150] The first capacitor (Cst) may include a first electrode (CE1) and a second electrode (CE2). In one embodiment, the first capacitor (Cst) may be formed to overlap with the first thin-film transistor (T1). In this case, the first gate electrode (G1) can simultaneously perform the function of the first electrode (CE1) as well as the function of the gate electrode of the first thin-film transistor (T1). That is, the first gate electrode (G1) may be formed integrally with the first electrode (CE1). The first electrode (CE1) may be formed as an island-shaped electrode. In another embodiment, the first capacitor (Cst) may exist in a separate location without overlapping with the first thin-film transistor (T1).

[0151] A second gate insulating layer (113) may be disposed on the first gate electrode (G1). The second gate insulating layer (113) may include an inorganic material including an oxide or a nitride. For example, the second gate insulating layer (113) may be silicon oxide (SiO2) or silicon nitride (SiN2). x ), silicon oxynitride (SiO₂ x Ny It may include at least one aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).

[0152] The second electrode (CE2) of the first capacitor (Cst) can be arranged to overlap with the first electrode (CE1). At this time, a second gate insulating layer (113) may be interposed between the first electrode (CE1) and the second electrode (CE2), and the second gate insulating layer (113) may serve as the dielectric layer of the first capacitor (Cst). The storage capacitance can be determined by the charge accumulated in the first capacitor (Cst) and the voltage between the two electrodes (CE1, CE2).

[0153] The second electrode (CE2) of the first capacitor (Cst) may include a metal, an alloy, a conductive metal oxide, a transparent conductive material, etc. The second electrode (CE2) may include, for example, at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu), and may be composed of a single layer or multiple layers.

[0154] A first interlayer insulating layer (114) may be disposed on the second electrode (CE2) of the first capacitor (Cst). The first interlayer insulating layer (114) may include an inorganic material including an oxide or a nitride. For example, the first interlayer insulating layer (114) may be silicon oxide (SiO2) or silicon nitride (SiN2). x ), silicon oxynitride (SiO₂ x N y It may include at least one aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).

[0155] A semiconductor layer containing a material different from that of the first semiconductor layer (A1) may be disposed on the first interlayer insulating layer (114), for example, an oxide-based semiconductor layer containing an oxide semiconductor may be disposed. The oxide-based semiconductor layer may be a Zn oxide-based material and may include Zn oxide, In-Zn oxide, Ga-In-Zn oxide, etc. In some embodiments, the oxide-based semiconductor layer may include an IGZO (In-Ga-Zn-O), ITZO (In-Sn-Zn-O), or IGTZO (In-Ga-Sn-Zn-O) semiconductor containing metals such as indium (In), gallium (Ga), and tin (Sn) in ZnO. FIG. 7 illustrates the third semiconductor layer (A3) of the third thin-film transistor (T3) as an oxide semiconductor layer. The third semiconductor layer (A3) may include a third channel region (C3), a third source region (S3) on both sides of the third channel region (C3), and a third drain region (D3).

[0156] A third gate insulating layer (115) may be disposed on the third semiconductor layer (A3) of the third thin-film transistor (T3). The third gate insulating layer (115) may include an inorganic material including an oxide or a nitride. For example, the third gate insulating layer (115) may be silicon oxide (SiO2) or silicon nitride (SiN2). x ), silicon oxynitride (SiO₂ x N y It may include at least one aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), and hafnium oxide (HfO2).

[0157] A third upper gate electrode (G3b) of a third thin-film transistor (T3) may be disposed on the third gate insulating layer (115). The third upper gate electrode (G3b) may overlap with at least a portion of the third semiconductor layer (A3) of the third thin-film transistor (T3), for example, with the third channel region (C3) of the third semiconductor layer (A3). Additionally, the third upper gate electrode (G3b) may overlap with the aforementioned third lower gate electrode (G3a). The third upper gate electrode (G3b) is electrically connected to the third lower gate electrode (G3a) through a contact hole formed in the first interlayer insulating layer (114) and the third gate insulating layer (115), thereby forming a double gate structure. The third upper gate electrode (G3b) may include a low-resistance conductive material such as molybdenum (Mo), aluminum (Al), copper (Cu) and / or titanium (Ti), and may be a single layer or multilayer structure made of the aforementioned material.

[0158] A second interlayer insulating layer (116) may be disposed on the third upper gate electrode (G3b) of the third thin-film transistor (T3). The second interlayer insulating layer (116) may cover the third thin-film transistor (T3). The second interlayer insulating layer (116) may include an inorganic material including an oxide or a nitride. For example, the second interlayer insulating layer (116) may be silicon oxide (SiO2) or silicon nitride (SiN2). x ), silicon oxynitride (SiO₂ x N y It may include at least one aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), and hafnium oxide (HfO2).

[0159] A source electrode (SE) and a drain electrode (DE) may be disposed on the second interlayer insulating layer (116). The source electrode (SE) and the drain electrode (DE) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials. As an example, the source electrode (SE) and the drain electrode (DE) may be formed as a multilayer structure of Ti / Al / Ti.

[0160] The aforementioned first gate insulating layer (112), second gate insulating layer (113), first interlayer insulating layer (114), third gate insulating layer (115) and second interlayer insulating layer (116) may be referred to as inorganic insulating layers (IIL).

[0161] An organic insulating layer (OIL) may be disposed on the second interlayer insulating layer (116). The organic insulating layer (OIL) covers the first display area (DA1) and the second display area (DA2) and may be disposed on the first pixel circuit (PC1) and the second pixel circuit (PC2). The organic insulating layer (OIL) acts as a protective film covering the pixel circuit (PC), and the upper surface of the organic insulating layer (OIL) is provided to be flattened. The organic insulating layer (OIL) may be provided as a single layer or a multilayer. In one embodiment, the organic insulating layer (OIL) may include a first organic layer (117) and a second organic layer (118) on the first organic layer (117). The first organic layer (117) and the second organic layer (118) may include organic materials such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane).

[0162] When the organic insulating layer (OIL) comprises a first organic layer (117) and a second organic layer (118), a contact metal (CM) and a connecting wire (CWL) may be disposed between the first organic layer (117) and the second organic layer (118).

[0163] The contact metal (CM) can electrically connect the first pixel circuit (PC1) and the first light-emitting element (LE1) to each other. The contact metal (CM) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer containing the above materials. As an example, the contact metal (CM) may be composed of a multilayer structure of Ti / Al / Ti.

[0164] The connecting wire (CWL) can electrically connect the second pixel circuit (PC2) and the second light-emitting element (LE2) to each other. In one embodiment, the connecting wire (CWL) may be made of the same material as the contact metal (CM). In another embodiment, the connecting wire (CWL) may include a transparent conductive material. The connecting wire (TWL) may include, for example, a transparent conducting oxide (TCO). The connecting wire (TWL) may include a conductive oxide such as, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), indium zinc gallium oxide (IZGO), or aluminum zinc oxide (AZO).

[0165] A plurality of pixel electrodes (210) may be disposed on the upper surface of the organic insulating layer (OIL). The plurality of pixel electrodes (210) may include a plurality of first pixel electrodes (211) disposed in a first display area (DA1) and a plurality of second pixel electrodes (212) disposed in a second display area (DA2). The pixel electrode (210) may include a transparent conductive layer formed of a transparent conductive oxide such as ITO, In2O3, or IZO, and a reflective layer formed of a metal such as Al or Ag. For example, the pixel electrode (210) may have a three-layer structure of ITO / Ag / ITO.

[0166] A pixel defining film (120) is disposed on the pixel electrode (210), and the pixel defining film (120) can define a pixel (PX) by having an opening corresponding to each pixel (PX), that is, an opening (OP) that exposes at least the central part of the pixel electrode (210). For example, the pixel defining film (120) can define a first pixel (PX1) by having a first opening (OP1) that exposes the central part of the first pixel electrode (211), and define a second pixel (PX2) by having a second opening (OP2) that exposes the central part of the second pixel electrode (212). In addition, the pixel defining film (120) can prevent the occurrence of arcs, etc. between the edge of the pixel electrode (210) and the opposing electrode (230) by increasing the distance between them.

[0167] The pixel defining film (120) may include an organic insulating material. Alternatively, the pixel defining film (120) may include an inorganic insulating material such as silicon nitride, silicon oxynitride, or silicon oxide. Alternatively, the pixel defining film (120) may include an organic insulating material and an inorganic insulating material.

[0168] In one embodiment, the pixel defining film (120) includes a light-blocking material and may be provided in black. The light-blocking material may include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal particles such as nickel, aluminum, molybdenum and their alloys, metal oxide particles (e.g., chromium oxide), or metal nitride particles (e.g., chromium nitride). When the pixel defining film (120) includes a light-blocking material, it can reduce external light reflection by metal structures placed on the lower part of the pixel defining film (120).

[0169] An intermediate layer (220) may be disposed on the pixel defining film (120). The intermediate layer (220) may be disposed between the pixel electrode (210) and the counter electrode (230). The intermediate layer (220) may include a light-emitting layer formed to overlap with the pixel electrode (210). The light-emitting layer may include an organic light-emitting material, such as a polymer or low-molecular-weight organic material, that emits light of a predetermined color. Alternatively, the light-emitting layer may include an inorganic light-emitting material or quantum dots.

[0170] As an optional embodiment, functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may be further disposed below and above the light-emitting layer. For example, among the functional layers, the first functional layer may be a single-layer hole transport layer (HTL) and may be formed of polyethylene dihydroxythiophene (PEDOT) or polyaniline (PANI). Alternatively, the first functional layer may include a hole injection layer (HIL) and a hole transport layer (HTL). Among the functional layers, the second functional layer (223) may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0171] The counter electrode (230) is disposed on the intermediate layer (220) and may be disposed to cover a portion of the first display area (DA1) and the second display area (DA2). The counter electrode (230) may be formed integrally to cover a plurality of pixel electrodes (210). The counter electrode (230) may extend from the first display area (DA1) and the second display area (DA2) to the surrounding area (PA). The counter electrode (230) may be made of a conductive material with a low work function. For example, the counter electrode (230) may include a (semi)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof. Alternatively, the counter electrode (230) may further include a layer such as ITO, IZO, ZnO, or In2O3 on a (semi)transparent layer containing the aforementioned material.

[0172] The stacked structure of a pixel electrode (210), an intermediate layer (220), and a counter electrode (230) can form an organic light-emitting diode (OLED) as a light-emitting element (LE). For example, the stacked structure of a first pixel electrode (211), an intermediate layer (220), and a counter electrode (230) can form a first light-emitting element (LE1), and the stacked structure of a second pixel electrode (212), an intermediate layer (220), and a counter electrode (230) can form a second light-emitting element (LE2).

[0173] The light-emitting region of the light-emitting element (LE) can be defined as a pixel (PX). Since the opening (OP) of the pixel defining film (120) defines the size and / or width of the light-emitting region, the size and / or width of the pixel (PX) may depend on the size and / or width of the corresponding opening (OP) of the pixel defining film (120).

[0174] Meanwhile, the electronic component (20) may be positioned to overlap with the second display area (DA2), and a transmission area (TA) through which light emitted from or directed toward the electronic component (20) is transmitted may be positioned in the second display area (DA2). In some embodiments, the pixel defining film (120) and the counter electrode (230) may each include holes (120H, 230H) located in the transmission area (TA) and overlapping each other. In other embodiments, the first gate insulating layer (112), the second gate insulating layer (113), the first interlayer insulating layer (114), the third gate insulating layer (115), the second interlayer insulating layer (116), the first organic layer (117), and the second organic layer (118) on the substrate (100) may each include holes located in the transmission area (TA) and overlapping each other. Through this, the light transmittance in the transmission region (TA) can be improved.

[0175] In one embodiment, a lower metal layer (BML) may be located at the bottom of the pixel circuit (PC). The lower metal layer (BML) may be interposed between the substrate (100) and the buffer layer (111). The lower metal layer (BML) may be positioned to overlap with the first thin-film transistor (T1) of each of the first pixel circuit (PC1) and the second pixel circuit (PC2). The lower metal layer (BML) may not overlap with the transmission area (TA) of the second display area (DA2) so as not to cause a decrease in light transmittance in the transmission area (TA). Although not illustrated, the lower metal layer (BML) may be electrically connected to the pixel circuit (PC) to receive a constant voltage. This may help the first thin-film transistor (T1) of the pixel circuit (PC) to have stable electrical characteristics.

[0176] Additionally, the lower metal layer (BML) may include a light-blocking material, and the light-blocking material may include, for example, a metallic material such as chromium (Cr) or molybdenum (Mo), black ink and / or dye. The lower metal layer (BML) can prevent light emitted from or reflected from the electronic component (20) from being incident on the second pixel circuit (PC2) adjacent to the second display area (DA2). By doing so, the performance degradation of the thin-film transistor of the second pixel circuit (PC2) caused by the light can be minimized.

[0177] According to one embodiment of the present invention, the thickness of the organic insulating layer (OIL) may vary depending on the display area (DA). The thickness (tt2) of the organic insulating layer (OIL) in the second display area (DA2) may be smaller than the thickness (tt1) of the organic insulating layer (OIL) in the first display area (DA1). As an example, the thickness of the first organic layer (117) of the organic insulating layer (OIL) may be the same in the first display area (DA1) and the second display area (DA2), but the thickness (ttb) of the second organic layer (118) in the second display area (DA2) may be smaller than the thickness (tta) of the second organic layer (118) in the first display area (DA1). As another example, it is also possible for the thickness of the first organic layer (117) in the second display area (DA2) to be smaller than the thickness of the first organic layer (117) in the first display area (DA1).

[0178] Since the thickness of the organic insulating layer (OIL) varies depending on the display area (DA), the distance between the substrate (100) and the pixel electrode (210) may also vary depending on the display area (DA). For example, the distance (dd2) between the lower surface of the second pixel electrode (212) located in the second display area (DA2) and the upper surface of the substrate (100) may be smaller than the distance (dd1) between the lower surface of the first pixel electrode (211) located in the first display area (DA1) and the upper surface of the substrate (100).

[0179] Additionally, the distance between the connecting wire (CWL) located in the second display area (DA2) and the second pixel electrode (212) may be smaller than the distance between the contact metal (CM) and the first pixel electrode (211) in the first display area (DA1).

[0180] Meanwhile, the organic insulating layer (OIL) placed in the surrounding area (PA) may be provided with a thickness substantially equal to that of the organic insulating layer (OIL) placed in the first display area (DA1).

[0181] When a certain amount of heat is applied to the organic insulating layer (OIL) during the manufacturing process of the display device (10), some of the material contained in the organic insulating layer (OIL) may be vaporized. If the gas generated from the organic insulating layer (OIL) is not sufficiently discharged to the outside of the display device (10), the gas affects the light-emitting element (LE), and thus the light-emitting element (LE) may deteriorate, resulting in a failure to emit light or a defect such as shrinkage of the light-emitting element (LE). As described above, since the area of ​​the second pixel electrode (212) is formed to be relatively large, the discharge of the gas in the second display area (DA2) may be delayed or obstructed by the second pixel electrode (212). Accordingly, the possibility of defects in the second light-emitting element (LE2) may increase.

[0182] However, according to one embodiment of the present invention, the volume of the organic insulating layer (OIL) in the second display area (DA2) can be minimized by reducing the thickness (tt2) of the organic insulating layer (OIL) in the second display area (DA2). Through this, the amount of gas emitted from the organic insulating layer (OIL) in the second display area (DA2) can be minimized, and thus the possibility of degradation and defects of the second light-emitting element (LE2) can be reduced.

[0183] FIG. 8 is a cross-sectional view schematically illustrating a part of a display device provided in an electronic device according to another embodiment of the present invention. Descriptions of components that are identical or substantially identical to the components described above with reference to FIG. 7 are omitted, and the following description focuses on the differences.

[0184] Referring to FIG. 8, the organic insulating layer (OIL) of the display device (10) may further include a third organic layer (119) on the second organic layer (118). That is, the third organic layer (119) may be located between the second organic layer (118) and the pixel electrode (210). In this case, a contact metal (CM2) may be placed between the second organic layer (118) and the third organic layer (119). Thus, by additionally providing the third organic layer (119), the integration density of the display device (10) can be improved.

[0185] In one embodiment, the thickness (ttd) of the third organic layer (119) in the second display area (DA2) may be smaller than the thickness (ttc) of the third organic layer (119) in the first display area (DA1). By doing so, the volume of the organic insulating layer (OIL) in the second display area (DA2) can be minimized, thereby minimizing the amount of gas emitted from the organic insulating layer (OIL) in the second display area (DA2), and thus reducing the possibility of degradation and defects of the second light-emitting element (LE2).

[0186] FIGS. 9a to 9h are cross-sectional views schematically illustrating a method for manufacturing a display device provided in an electronic device according to an embodiment of the present invention.

[0187] Referring to FIG. 9a, a substrate (100) may be prepared having a first region (AR1) and a second region (AR2) adjacent to the first region (AR1). Since the first display region (DA1) and the second display region (DA2) are regions where an image is provided by a plurality of first pixels (PX1) and second pixels (PX2), respectively, the regions corresponding to the first display region (DA1) and the second display region (DA2), respectively, with respect to the substrate (100) where pixels are not yet formed, are referred to as the first region (AR1) and the second region (AR2). Additionally, the substrate (100) includes a third region (AR3), and the third region (AR3) may correspond to a peripheral region (PA) of the display device (10).

[0188] Referring to FIG. 9b, a buffer layer (111) and a plurality of pixel circuits (PCs) can be formed on a substrate (100). For example, a buffer layer (111) can be formed first over the entire area of ​​the substrate (100). Then, a first pixel circuit (PC1) can be formed in a first area (AR1) on the substrate (100), and a second pixel circuit (PC2) can be formed in a third area (AR3).

[0189] In order to form a pixel circuit (PC), various insulating layers, semiconductor layers, and electrode layers can be formed on a substrate (100). For example, after forming various material layers through a coating process or a deposition process, the various material layers can be patterned through a photolithography process and an etching process to form the various insulating layers, semiconductor layers, and electrode layers.

[0190] Here, for the coating process, methods such as spin coating may be used, and for the deposition process, chemical vapor deposition (CVD) methods such as thermochemical vapor deposition (TCVD), plasma deposition (PECVD), and atmospheric pressure chemical vapor deposition (APCVD), or physical vapor deposition (PVD) methods such as thermal evaporation, sputtering, and electron beam deposition (e-beam evaporation) may be used.

[0191] Referring to FIGS. 9c to 9g, an organic insulating layer (OIL) can be formed that is disposed on a first pixel circuit (PC1) and a second pixel circuit (PC2) and covers a first region (AR1) and a second region (AR2) of a substrate (100). In one embodiment, the organic insulating layer (OIL) can be formed using a halftone mask (HM) such that the thickness (tt1) of the organic insulating layer (OIL) in the first region (AR1) is smaller than the thickness (t2) of the organic insulating layer (OIL) in the second region (AR2).

[0192] Specifically, referring to FIG. 9c, a first organic layer (117) can be formed that is first disposed on a first pixel circuit (PC1) and a second pixel circuit (PC2) and covers a first region (AR1) and a second region (AR2) of the substrate (100). For the formation of the first organic layer (117), for example, a deposition process and a photolithography process may be performed. In some embodiments, the first organic layer (117) may have a uniform thickness in the first region (AR1) and the second region (AR2), but the present invention is not limited thereto. As with the method for forming the second organic layer (118) described later, the first organic layer (117) may also be formed to have different thicknesses in the first region (AR1) and the second region (AR2).

[0193] Referring to FIG. 9d, a first material layer (118m) can be formed after a contact metal (CM) and a connecting wire (CWL) are formed on the first organic layer (117). The contact metal (CM) and the connecting wire (CWL) can be formed through a coating process, a photolithography process, and an etching process. The first material layer (118m) can be formed through a coating process or a deposition process. The first material layer (118m) covers the first region (AR1) and the second region (AR2), and its thickness can be substantially uniform.

[0194] Subsequently, the first material layer (118m) can be patterned using a halftone mask (HM). The halftone mask (HM) may include a light-transmitting portion (TP), a light-transmitting portion (HTP), and a light-blocking portion (BP). The light-transmitting portion (TP) can allow most of the light to pass through. The light-transmitting portion (HTP) can allow a portion of the light to pass through. Therefore, the amount of exposure can be controlled using the light-transmitting portion (HTP). The light-blocking portion (BP) can block most of the light. For example, when the first material layer (118m) is exposed through the halftone mask (HM) and then developed, the first material layer (118m) may be removed by different thicknesses in the areas corresponding to the light-transmitting portion (TP) and the light-transmitting portion (HTP), respectively, while the first material layer (118m) may not be removed in the area corresponding to the light-blocking portion (BP).

[0195] Referring to FIG. 9e, a second organic layer (118) can be formed by patterning a first material layer (118m, see FIG. 9d) using a halftone mask (HM). The area corresponding to the semi-transparent portion (HTP, see FIG. 9d) of the aforementioned halftone mask (HM, see FIG. 9d) may be the second area (AR2), and the area corresponding to the light-blocking portion (BP, see FIG. 9d) may be the first area (AR1). Accordingly, the second organic layer (118) may be formed such that the thickness (ttb) of the second organic layer (118) in the second area (AR2) is smaller than the thickness (tta) of the second organic layer (118) in the first area (AR1). Meanwhile, the area corresponding to the light-transmitting portion (TP, see FIG. 9d) of the halftone mask (HM) may be the area where the contact hole of the second organic layer (118) is located.

[0196] Referring to FIG. 9f, after forming a contact metal (CM) and a connecting wire (CWL) on the second organic layer (118), a second material layer (119m) can be formed. The second material layer (119m) can be formed through a coating process or a deposition process. The second material layer (119m) covers the first region (AR1) and the second region (AR2), and its thickness may be substantially uniform. Subsequently, the second material layer (119m) can be patterned using a halftone mask (HM'), similar to the patterning of the first material layer (118m).

[0197] Referring to FIG. 9g, a third organic layer (119) can be formed by patterning a second material layer (119m, see FIG. 9f) using a halftone mask (HM', see FIG. 9f). The area corresponding to the semi-transparent portion (HTP, see FIG. 9f) of the aforementioned halftone mask (HM') may be the second area (AR2), and the area corresponding to the light-blocking portion (BP, see FIG. 9f) may be the first area (AR1). Accordingly, the third organic layer (119) may be formed such that the thickness (ttd) of the third organic layer (119) in the second area (AR2) is smaller than the thickness (ttc) of the third organic layer (119) in the first area (AR1). Meanwhile, the area corresponding to the light-transmitting portion (TP, see FIG. 9f) of the halftone mask (HM') may be the area where the contact hole of the third organic layer (119) is located.

[0198] Referring to FIG. 9h, a pixel electrode (210), a pixel defining film (120), an intermediate layer (220), and a counter electrode (230) can be formed on the third organic layer (119) to form a light-emitting element (LE) and a pixel (PX).

[0199] The present invention has been described with reference to the embodiments illustrated in the drawings, but this is merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims. Explanation of the symbols

[0200] 1: Electronic devices 10: Display device 20: Electronic Components OIL: Organic insulating layer 117: First organic layer 118: Second organic layer 119: Third organic layer 120: Pixel definition membrane 210: Pixel electrode HM: Halftone Mask OP: Opening of the pixel definition membrane

Claims

Claim 1 A display device comprising a first display area, a second display area having a transparent area, and a peripheral area disposed outside the first display area and the second display area, the display device comprising: a substrate; a first pixel circuit disposed on the substrate and located in the first display area; and an organic insulating layer disposed on the first pixel circuit and disposed across the first display area and the second display area, wherein the thickness of the organic insulating layer in the second display area is smaller than the thickness of the organic insulating layer in the first display area. Claim 2 A display device according to claim 1, wherein the organic insulating layer comprises a first organic layer and a second organic layer on the first organic layer, and the thickness of the second organic layer in the second display area is smaller than the thickness of the second organic layer in the first display area. Claim 3 A display device according to paragraph 2, wherein the organic insulating layer further comprises a third organic layer on the second organic layer, and the thickness of the third organic layer in the second display area is smaller than the thickness of the third organic layer in the first display area. Claim 4 A display device according to claim 2, further comprising: a first pixel electrode located in the first display area, disposed on the organic insulating layer, and electrically connected to the first pixel circuit; and a second pixel electrode located in the second display area and disposed on the organic insulating layer; wherein the distance between the contact metal disposed on the first organic layer of the first display area and the first pixel electrode is greater than the distance between the connecting wire disposed on the first organic layer of the second display area and the second pixel electrode. Claim 5 A display device according to claim 1, further comprising: a first pixel electrode located in the first display area, disposed on the organic insulating layer, and electrically connected to the first pixel circuit; and a second pixel electrode located in the second display area and disposed on the organic insulating layer, wherein the area of ​​the second pixel electrode on a plane is larger than the area of ​​the first pixel electrode. Claim 6 A display device according to claim 5, further comprising a pixel defining film disposed on the first pixel electrode and the second pixel electrode, the pixel defining film including a first opening and a second opening that respectively expose a portion of the first pixel electrode and a portion of the second pixel electrode, wherein the area of ​​the second opening on a plane is larger than the area of ​​the first opening. Claim 7 In claim 6, the above pixel defining film comprises a light-blocking material, a display device. Claim 8 A display device according to claim 5, wherein the distance between the substrate and the second pixel electrode is smaller than the distance between the substrate and the first pixel electrode. Claim 9 A display device according to claim 5, further comprising a second pixel circuit disposed in the peripheral region on the substrate and electrically connected to the second pixel electrode. Claim 10 A display device according to claim 5, further comprising: an intermediate region located between the first display region and the second display region; and a second pixel circuit disposed in the intermediate region on the substrate and electrically connected to the second pixel electrode. Claim 11 A display device according to claim 1, wherein the first pixel circuit comprises: a first thin-film transistor having a first semiconductor layer and a first gate electrode that overlaps at least partially with the first semiconductor layer; and a second thin-film transistor having a second semiconductor layer having a material different from the first semiconductor layer and a second gate electrode that overlaps at least partially with the second semiconductor layer. Claim 12 A display device according to claim 11, wherein the first semiconductor layer of the first thin-film transistor comprises a silicon semiconductor material, and the second semiconductor layer of the second thin-film transistor comprises an oxide semiconductor material. Claim 13 An electronic device comprising: a display device including a first display area, a second display area having a transparent area, and a peripheral area disposed outside the first display area and the second display area, and an electronic component disposed to correspond to the second display area; wherein the display device comprises: a substrate; a first pixel circuit disposed on the substrate and located in the first display area; and an organic insulating layer disposed on the first pixel circuit and disposed across the first display area and the second display area, wherein the thickness of the organic insulating layer in the second display area is smaller than the thickness of the organic insulating layer in the first display area. Claim 14 An electronic device according to claim 13, wherein the organic insulating layer of the display device comprises a first organic layer and a second organic layer on the first organic layer, and the thickness of the second organic layer in the second display area is smaller than the thickness of the second organic layer in the first display area. Claim 15 An electronic device according to claim 14, wherein the organic insulating layer of the display device further comprises a third organic layer on the second organic layer, and the thickness of the third organic layer in the second display area is smaller than the thickness of the third organic layer in the first display area. Claim 16 In claim 13, the display device further comprises: a first pixel electrode located in the first display area, disposed on the organic insulating layer, and electrically connected to the first pixel circuit; and a second pixel electrode located in the second display area and disposed on the organic insulating layer; wherein the area of ​​the second pixel electrode on a plane is larger than the area of ​​the first pixel electrode. Claim 17 In claim 16, the display device further comprises a pixel defining film disposed on the first pixel electrode and the second pixel electrode, the pixel defining film comprising a first opening and a second opening that respectively expose a portion of the first pixel electrode and a portion of the second pixel electrode, wherein the area of ​​the second opening on a plane is larger than the area of ​​the first opening. Claim 18 An electronic device according to claim 16, wherein the distance between the substrate and the second pixel electrode is smaller than the distance between the substrate and the first pixel electrode. Claim 19 A method for manufacturing a display device comprising: a step of preparing a substrate having a first region and a second region adjacent to the first region; a step of forming a first pixel circuit in the first region on the substrate; a step of forming an organic insulating layer disposed on the first pixel circuit and disposed across the first region and the second region of the substrate; and a step of forming a first pixel electrode located in the first region and a second pixel electrode located in the second region disposed on the organic insulating layer; wherein the step of forming the organic insulating layer comprises forming the organic insulating layer using a halftone mask such that the thickness of the organic insulating layer in the second region is smaller than the thickness of the organic insulating layer in the first region. Claim 20 A method for manufacturing a display device according to claim 19, wherein the step of forming the organic insulating layer comprises: a step of forming a first organic layer; and a step of forming a second organic layer on the first organic layer, wherein the second organic layer is formed using a halftone mask such that the thickness of the second organic layer in the second region is smaller than the thickness of the second organic layer in the first region. Claim 21 A method for manufacturing a display device according to claim 20, wherein the step of forming the organic insulating layer further comprises the step of forming a third organic layer on the second organic layer, wherein the third organic layer is formed using a halftone mask such that the thickness of the third organic layer in the second region is smaller than the thickness of the third organic layer in the first region. Claim 22 A method for manufacturing a display device according to claim 19, wherein the area of ​​the second pixel electrode on a plane is larger than the area of ​​the first pixel electrode. Claim 23 A method for manufacturing a display device according to claim 19, further comprising the step of forming a pixel defining film disposed on the first pixel electrode and the second pixel electrode, the film comprising a first opening and a second opening that respectively expose a portion of the first pixel electrode and a portion of the second pixel electrode, wherein the area of ​​the second opening on a plane is larger than the area of ​​the first opening.

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