Display panel and display device

Abstract

One embodiment of the present invention discloses a display panel and a display device including the same, wherein the corner area comprises a main display area and a corner area, the corner area comprises an intermediate area adjacent to a first display area; and a plurality of mutually spaced extension areas extending from the intermediate area in a direction away from the first display area, wherein the intermediate area comprises a plurality of sub-areas corresponding to each of the plurality of extension areas, and each of the plurality of sub-areas is radial.

Description

Technology Field

[0001] The present invention relates to a display panel and a display device. More specifically, the present invention relates to a display panel and a display device with curved edges. Background Technology

[0002] Recently, as other components for driving display devices become smaller, the proportion of display devices in electronic devices is gradually increasing, and structures that can be bent to a predetermined angle from a flat state are also being developed. The problem to be solved

[0003] An embodiment of the present invention aims to provide a highly reliable display panel and display device capable of minimizing brightness non-uniformity between the main display area and the corner area. means of solving the problem

[0004] An embodiment of the present invention discloses a display panel comprising: a substrate including a first display area and a second display area; and a plurality of pixels disposed in the first display area and the second display area of ​​the substrate; wherein the first display area includes a planar central area, a first area adjacent to the first direction of the central area, and a second area adjacent to the second direction intersecting the first direction of the central area; the second display area includes a corner area between the first area and the second area; the corner area includes an intermediate area adjacent to the first display area; and a plurality of mutually spaced linear extension areas extending from the intermediate area in a direction away from the first display area; wherein the intermediate area includes a plurality of sub-areas corresponding to each of the plurality of extension areas, and each of the plurality of sub-areas is radial.

[0005] In one embodiment, in each of the plurality of extended regions, a pixel unit, which is a set of a plurality of pixels, is arranged along a plurality of columns parallel to each other, and in each of the plurality of sub-regions, the pixel unit may be arranged along a plurality of radial columns.

[0006] In one embodiment, a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region may be placed in the same way as the reference pixel.

[0007] In one embodiment, a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region may be arranged by rotating by the radiation angle of the corresponding column of the corresponding sub-region relative to the reference pixel.

[0008] In one embodiment, the pixel arrangement structure of the plurality of pixels of the pixel unit may be different from the pixel arrangement structure of the first display area.

[0009] In one embodiment, the pixel arrangement structure of the plurality of pixels of the pixel unit may be the same as the pixel arrangement structure of the first display area.

[0010] In one embodiment, the pixel arrangement structure of the plurality of pixels of the pixel unit may include a pentile structure, a stripe structure, or an S-stripe structure.

[0011] In one embodiment, the plurality of pixels includes a first pixel, a second pixel, and a third pixel that emit different colors, and in each extended area, a plurality of columns include a first column and a second column in which the positions of the first to third pixels arranged within the pixel unit according to the pixel array structure are different, and the first column and the second column can alternate.

[0012] In one embodiment, the plurality of extension regions include a first extension region and a second extension region adjacent to each other, and the plurality of sub-regions include a first sub-region corresponding to the first extension region and a second sub-region corresponding to the second extension region, and when the first extension region and the second extension region are unfolded, the light emission pitch of pixels arranged adjacent to the boundary between the first display region and the intermediate region within the first sub-region, within the second sub-region, and between the first sub-region and the second sub-region is the same, and the light emission pitch of pixels arranged adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region may be the same.

[0013] In one embodiment, when the first extension region and the second extension region are bent, the light emission pitch of pixels adjacent to the end of the first extension region and the end of the second extension region within the first extension region, within the second extension region, and between the first extension region and the second extension region may be the same.

[0014] In one embodiment, when the first extension region and the second extension region are bent, the light emission pitch of pixels positioned adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region, and the light emission pitch of pixels positioned adjacent to the end of the first extension region and the end of the second extension region may be the same.

[0015] An embodiment of the present invention discloses a display device comprising: a display panel; and a cover window disposed on the display panel; wherein the display panel comprises a substrate including a first display area and a second display area; and a plurality of pixels disposed on the first display area and the second display area of ​​the substrate; wherein the first display area comprises a planar central area, a first area adjacent to the first direction of the central area, and a second area adjacent to the second direction intersecting the first direction of the central area; the second display area comprises a corner area between the first area and the second area; the corner area comprises an intermediate area adjacent to the first display area; and a plurality of mutually spaced linear extension areas extending from the intermediate area in a direction away from the first display area; wherein the intermediate area comprises a plurality of sub-areas corresponding to each of the plurality of extension areas, and each of the plurality of sub-areas is radial.

[0016] In one embodiment, in each of the plurality of extended regions, a pixel unit, which is a set of a plurality of pixels, is arranged along a plurality of columns parallel to each other, and in each of the plurality of sub-regions, the pixel unit may be arranged along a plurality of radial columns.

[0017] In one embodiment, a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region may be placed in the same way as the reference pixel.

[0018] In one embodiment, a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region may be arranged by rotating by the radiation angle of the corresponding column of the corresponding sub-region relative to the reference pixel.

[0019] In one embodiment, the pixel arrangement structure of the plurality of pixels of the pixel unit is the same or different from the pixel arrangement structure of the first display area, and the pixel arrangement structure of the plurality of pixels of the pixel unit may include a Pentile structure, a Stripe structure, or an S-Stripe structure.

[0020] In one embodiment, the plurality of pixels includes a first pixel, a second pixel, and a third pixel that emit different colors, and in each extended area, a plurality of columns include a first column and a second column in which the positions of the first to third pixels arranged within the pixel unit according to the pixel array structure are different, and the first column and the second column can alternate.

[0021] In one embodiment, the plurality of extension regions include a first extension region and a second extension region adjacent to each other, and the plurality of sub-regions include a first sub-region corresponding to the first extension region and a second sub-region corresponding to the second extension region, and when the first extension region and the second extension region are unfolded, the light emission pitch of pixels arranged adjacent to the boundary between the first display region and the intermediate region within the first sub-region, within the second sub-region, and between the first sub-region and the second sub-region is the same, and the light emission pitch of pixels arranged adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region may be the same.

[0022] In one embodiment, when the first extension region and the second extension region are bent, the light emission pitch of pixels adjacent to the end of the first extension region and the end of the second extension region within the first extension region, within the second extension region, and between the first extension region and the second extension region may be the same.

[0023] In one embodiment, when the first extension region and the second extension region are bent, the light emission pitch of pixels positioned adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region, and the light emission pitch of pixels positioned adjacent to the end of the first extension region and the end of the second extension region may be the same. Effects of the invention

[0024] Embodiments of the present invention can provide a highly reliable display panel and display device capable of minimizing brightness non-uniformity between the main display area and the corner area. Brief explanation of the drawing

[0025] FIG. 1 is a schematic perspective view of a display device according to one embodiment. FIG. 2a is a cross-sectional view of the display device of FIG. 1 along the line A-A'. FIG. 2b is a cross-sectional view of the display device of FIG. 1 along the line B-B'. FIG. 2c is a cross-sectional view of the display device of FIG. 1 along the line C-C'. FIG. 3 is a schematic plan view of a display panel according to one embodiment. FIGS. 4a and FIGS. 4b are equivalent circuit diagrams of a pixel according to one embodiment, respectively. FIG. 5 is a schematic diagram showing a cross-section taken along the line D-D' of the first display area in the display panel of FIG. 3. Figure 6 is an enlarged view of part E of the display panel of Figure 3. Figures 7a and 7b are enlarged views of part F, which is part of part E of Figure 6. Figures 8a and 8b are example diagrams of the configuration of the second pixel unit, respectively. FIGS. 9a to 9c are schematic drawings of the basic unit of FIG. 6, respectively. FIG. 10 is a schematic diagram showing the arrangement of two basic units with the display panel in an unbended state. FIG. 11 is a schematic diagram showing the corner area (CNA) when the display panel is bent. FIGS. 12a to 14c are drawings showing various examples of a basic unit (BU) according to one embodiment. Figure 15 is a schematic diagram showing a cross-section of a stripe area taken along the line G-G' of Figure 6. FIG. 16 is a schematic drawing of a basic unit showing the corner dam of the stripe area of ​​FIG. 15. Specific details for implementing the invention

[0026] The present invention is capable of various modifications and may have various embodiments; specific embodiments are illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various forms.

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. When describing with reference to the drawings, identical or corresponding components are given the same reference numerals, and redundant descriptions thereof will be omitted.

[0028] In the following embodiments, terms such as first, second, etc. are used not in a limiting sense, but for the purpose of distinguishing one component from another component.

[0029] In the following examples, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0030] In the following embodiments, terms such as "include" or "have" mean that the features or components described in the specification are present, and do not preclude the possibility that one or more other features or components may be added.

[0031] In the following embodiments, when a part such as a film, region, or component is described as being on or above another part, it includes not only cases where it is directly on top of another part, but also cases where another film, region, or component is interposed in between.

[0032] In the drawings, the size of components may be exaggerated or reduced for convenience of explanation. For example, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, so the present invention is not necessarily limited to what is illustrated.

[0033] Where an embodiment can be implemented differently, a specific process sequence may be performed differently from the order described. For example, two processes described consecutively may be performed substantially simultaneously or proceed in the reverse order of the description.

[0034] In the following embodiments, when it is stated that a membrane, region, component, etc. is connected, it includes not only cases where the membrane, region, or component is directly connected, but also cases where other membranes, regions, or components are interposed between them to form an indirect connection. For example, when it is stated in this specification that a membrane, region, component, etc. is electrically connected, it includes not only cases where the membrane, region, or component, etc. are directly electrically connected, but also cases where other membranes, regions, or components are interposed between them to form an indirect electrical connection.

[0035] In this specification, "A and / or B" indicates the case where it is A, B, or both A and B. Additionally, in this specification, "at least one of A and B" indicates the case where it is A, B, or both A and B.

[0036] In the following embodiments, "planar" means when the target part is viewed from above, and "cross-sectional" means when the cross-section obtained by vertically cutting the target part is viewed from the side. In the following embodiments, "overlapping" of the first component with the second component means that the first component is located above or below the second component.

[0037] A display device is a device for displaying video or still images, and can be used as a display screen for various products such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT), as well as portable electronic devices such as mobile phones, smartphones, tablet personal computers, mobile communication terminals, electronic notebooks, e-books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs). In addition, a display device according to one embodiment can be used in wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). Furthermore, a display device according to one embodiment can be used as a Center Information Display (CID) placed on the instrument panel of a vehicle, the center fascia or dashboard of a vehicle, a room mirror display replacing the side mirror of a vehicle, and a display placed on the back of the front seat for entertainment in the rear seat of a vehicle.

[0038] FIG. 1 is a schematic perspective view of a display device (1) according to one embodiment. FIG. 2a is a cross-sectional view of the display device (1) of FIG. 1 along the line A-A'. FIG. 2b is a cross-sectional view of the display device (1) of FIG. 1 along the line B-B'. FIG. 2c is a cross-sectional view of the display device (1) of FIG. 1 along the line C-C'. FIG. 3 is a schematic plan view of a display panel (10) according to one embodiment. FIG. 1 is a drawing of the display panel (10) in a bent state, and FIG. 3 is a drawing of the display panel (10) in an unbended state.

[0039] Referring to FIGS. 1 to 3, the display device (1) may have an edge of a first direction and an edge of a second direction. Here, the first direction and the second direction may be directions that intersect each other. For example, the first direction and the second direction may be at an acute angle to each other. As another example, the first direction and the second direction may be at an obtuse angle to each other or may be orthogonal. Below, we will describe in detail focusing on the case where the first direction and the second direction are orthogonal to each other. For example, the first direction may be the x direction or the -x direction, and the second direction may be the y direction or the -y direction. A third direction perpendicular to the first direction and the second direction may be the z direction or the -z direction.

[0040] The display device (1) may include a display panel (10) and a cover window (20).

[0041] The display panel (10) may include a display area (DA) and a peripheral area (PA). The display area (DA) may include a first display area (DA1) and a second display area (DA2). The display area (DA) and the peripheral area (PA) may be defined on the substrate (100) of the display panel (10). That is, the substrate (100) may include the display area (DA) and the peripheral area (PA).

[0042] The first display area (DA1) may include a substantially flat central area (CA), a first area (A1) and a second area (A2) which are side display areas adjacent to the central area (CA). The first display area (DA1) may be the main display screen of the display device (1). The second display area (DA2) may include a corner area (CNA).

[0043] The first region (A1) may be adjacent to the center region (CA) in the first direction. The first region (A1) may be extended and bent in the first direction from the edge of the center region (CA) in the second direction. The first region (A1) may be a region that is bent from the boundary with the center region (CA) in a cross-section in the first direction (e.g., an xz cross-section). In FIG. 2a, the first region (A1) that is bent and extends in the x direction from the center region (CA) and the first region (A1) that is bent and extends in the -x direction from the center region (CA) are shown to have the same curvature. In another embodiment, the first region (A1) that is bent and extends in the x direction from the center region (CA) and the first region (A1) that is bent and extends in the -x direction from the center region (CA) may have different curvatures.

[0044] The second region (A2) may be adjacent to the center region (CA) in the second direction. The second region (A2) may be extended and bent in the second direction from the edge of the center region (CA) in the first direction. The second region (A2) may be a region that is bent from the boundary with the center region (CA) in a cross-section in the second direction (e.g., a yz cross-section). In FIG. 2b, the second region (A2) that is bent and extends in the y direction from the center region (CA) and the second region (A2) that is bent and extends in the -y direction from the center region (CA) are shown to have the same curvature. In another embodiment, the second region (A2) that is bent and extends in the y direction from the center region (CA) and the second region (A2) that is bent and extends in the -y direction from the center region (CA) may have different curvatures.

[0045] A corner region (CNA) may be an area positioned at a corner (CN) of a display device (1). In one embodiment, the corner region (CNA) may be an area where the edge of the first direction and the edge of the second direction of the display device (1) meet. The corner region (CNA) may be an area between a first region (A1) and a second region (A2). In one embodiment, the corner (CN) may have a predetermined curvature. When the first region (A1) extends and bends in the first direction and the second region (A2) extends and bends in the second direction, at least a portion of the corner region (CNA) may extend and bend in the first direction and extend and bend in the second direction. At least a portion of the corner region (CNA) may be an area where multiple curvatures in multiple directions overlap. Multiple corner regions (CNA) may be provided. Four corner regions (CNA) are illustrated in FIGS. 1 and FIGS. 3. The corner area (CNA) may include a center corner area (CCA), a first adjacent area (ACA1), a second adjacent area (ACA2), and an intermediate area (MCA).

[0046] The center corner region (CCA) may be extended in a first direction and a second direction and may be bent. The center corner region (CCA) may be bent at a cross section in the first direction (e.g., an xz cross section) and a cross section in the second direction (e.g., a yz cross section). The center corner region (CCA) may be an area where curvatures in multiple directions overlap. The center corner region (CCA) may be positioned between a first adjacent region (ACA1) and a second adjacent region (ACA2).

[0047] The first adjacent region (ACA1) may be adjacent to the center corner region (CCA). In one embodiment, the first adjacent region (ACA1) may be positioned between the center corner region (CCA) and the first region (A1). That is, at least a portion of the first region (A1) may be positioned between the center region (CA) and the first adjacent region (ACA1) in the first direction. The first adjacent region (ACA1) may be defined as a corner region (CNA) that is bent in the cross-section in the first direction (e.g., xz cross-section) and substantially unbent in the cross-section in the second direction (e.g., yz cross-section).

[0048] The second adjacent region (ACA2) may be adjacent to the center corner region (CCA). In one embodiment, the second adjacent region (ACA2) may be positioned between the center corner region (CCA) and the second region (A2). That is, at least a portion of the second region (A2) may be positioned between the center region (CA) and the second adjacent region (ACA2) in the second direction. The second adjacent region (ACA2) may be defined as a corner region (CNA) that is bent in the cross-section in the second direction (e.g., yz cross-section) and is substantially not bent in the cross-section in the first direction (e.g., yz cross-section).

[0049] The intermediate area (MCA) may be adjacent to the first display area (DA1). The intermediate area (MCA) may be positioned between the first area (A1) and the center corner area (CCA). In one embodiment, the intermediate area (MCA) may extend between the first area (A1) and the first adjacent area (ACA1). In one embodiment, the intermediate area (MCA) may extend between the second area (A2) and the second adjacent area (ACA2). In one embodiment, the intermediate area (MCA) may be curved.

[0050] A plurality of pixels (PX) may be disposed in at least one of the central region (CA), the first region (A1), the second region (A2), and the corner region (CNA). Each of the plurality of pixels (PX) is connected to a scan line (SL) and a data line (DL) and may include a display element. In one embodiment, the display element may be an organic light-emitting diode (OLED) comprising an organic light-emitting layer. Alternatively, the display element may be a light-emitting diode (LED) comprising an inorganic light-emitting layer. The size of the light-emitting diode (LED) may be micro-scale or nano-scale. For example, the light-emitting diode may be a micro-light-emitting diode. Alternatively, the light-emitting diode may be a nanorod light-emitting diode. The nanorod light-emitting diode may include gallium nitride (GaN). In one embodiment, a color conversion layer may be disposed on the nanorod light-emitting diode. The color conversion layer may include quantum dots. Alternatively, the display element may be a quantum dot light-emitting diode including a quantum dot light-emitting layer.

[0051] Each pixel (PX) can emit light of a predetermined color using a display element. In one embodiment, a plurality of pixels (PX) may include red pixels, green pixels, and blue pixels. Alternatively, a plurality of pixels (PX) may include red pixels, green pixels, blue pixels, and white pixels. In this specification, a pixel (PX) refers to a light-emitting region as the smallest unit for implementing an image. Therefore, in this specification, an array of pixels may refer to an array of display elements or an array of light-emitting regions. Meanwhile, when an organic light-emitting diode is employed as a display element, the light-emitting region may be defined by an opening of a pixel defining layer. This will be described later.

[0052] A peripheral area (PA) may be placed outside the first display area (DA1). Pixels (PX) may not be placed in the peripheral area (PA). Therefore, the peripheral area (PA) may be a non-display area that does not display an image. The peripheral area (PA) may include a first peripheral area (AA1), a second peripheral area (AA2), a third peripheral area (AA3), a bending area (BA), and a pad area (PADA).

[0053] A first peripheral region (AA1) may be positioned outside of a first region (A1). A first region (A1) may be positioned between a first peripheral region (AA1) and a central region (CA). A central region (CA) may be positioned between a pair of opposing first peripheral regions (AA1). In one embodiment, a first peripheral region (AA1) may extend from a first region (A1) in a first direction.

[0054] A second peripheral area (AA2) is positioned outside the upper second area (A2), and the upper second area (A2) may be positioned between the second peripheral area (AA2) and the central area (CA). A third peripheral area (AA3) is positioned outside the lower second area (A2), and the lower second area (A2) may be positioned between the third peripheral area (AA3) and the central area (CA). The second peripheral area (AA2) and the third peripheral area (AA3) may be extended in a second direction. The central area (CA) may be positioned between the second peripheral area (AA2) and the third peripheral area (AA3).

[0055] Driving circuits for providing electrical signals to pixels (PX) and / or power wiring for providing power may be disposed in the intermediate area (MCA) and the peripheral area (PA). In one embodiment, driving circuits and / or power wiring may be disposed in the intermediate area (MCA) and the first peripheral area (AA1). Pixels (PX) disposed in the intermediate area (MCA) may overlap with the driving circuits and / or power wiring of the intermediate area (MCA). In one embodiment, the display elements of the pixels (PX) disposed in the intermediate area (MCA) partially overlap with the driving circuits and / or power wiring of the intermediate area (MCA), and the pixel circuits of the pixels (PX) may be spaced apart from the driving circuits and / or power wiring without overlapping and provided on the same layer.

[0056] The driving circuit can provide a signal to each pixel (PX). In one embodiment, the driving circuit may be a scan driving circuit that provides a scan signal to each pixel (PX) via a scan line (SL). Alternatively, the driving circuit may be a light emission control driving circuit that provides a light emission control signal to each pixel (PX) via a light emission control line (EL). The data driving circuit may be placed in a third peripheral area (AA3) or a pad area (PADA). Alternatively, the data driving circuit may be placed on a circuit board connected via a pad.

[0057] The bending area (BA) may be positioned outside the second area (A2). The bending area (BA) may be positioned outside the third peripheral area (AA3). The third peripheral area (AA3) may be positioned between the bending area (BA) and the center area (CA). The display panel (10) may be bent in the bending area (BA). In this case, the pad area (PADA) may face the rear of the display panel (10) opposite to the top surface that displays the image. Therefore, the pad area (PADA) may not be visible to the user.

[0058] A pad area (PADA) may be placed outside the bending area (BA). The bending area (BA) may be placed between the third peripheral area (AA3) and the pad area (PADA). A pad (not shown) may be placed in the pad area (PADA). At least one of a driving chip and a printed circuit board electrically connected through the pad may be placed in the pad area (PADA). The display panel (10) may receive electrical signals and / or power voltage from the driving chip and the printed circuit board through the pad. At least one of the driving chip and the printed circuit board may be electrically connected to the pad through an anisotropic conductive film. The driving chip may include an integrated circuit (IC). The printed circuit board may be a flexible printed circuit board (FPCB) or a rigid printed circuit board (PCB).

[0059] A cover window (20) may be placed on a display panel (10). The cover window (20) may function to protect the display panel (10). In one embodiment, the cover window (20) may be a flexible window. The cover window (20) may include glass, sapphire, or plastic. The cover window (20) may be, for example, ultra-thin glass or colorless polyimide. The cover window (20) may be attached to the display panel (10) by a transparent adhesive member, such as an optically clear adhesive (OCA) film.

[0060] FIGS. 4a and FIGS. 4b are equivalent circuit diagrams of a pixel according to one embodiment, respectively.

[0061] Referring to FIG. 4a, a pixel (PX) includes a pixel circuit (PC) and an organic light-emitting diode (OLED) connected to the pixel circuit (PC). The pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), and a capacitor (Cst). Each pixel (PX) may emit light, for example, red, green, blue, or white, through the organic light-emitting diode (OLED). The first transistor (T1) and the second transistor (T2) may be implemented as thin-film transistors.

[0062] The second transistor (T2) is a switching transistor connected to the scan line (SL) and the data line (DL), and can transmit a data signal input from the data line (DL) to the first transistor (T1) in response to a scan signal input from the scan line (SL). The capacitor (Cst) is connected to the second transistor (T2) and the driving voltage line (PL), and can store a voltage corresponding to the difference between the voltage corresponding to the data signal received from the second transistor (T2) and the driving voltage (ELVDD) supplied to the driving voltage line (PL).

[0063] The first transistor (T1) is a driving transistor connected to the driving voltage line (PL) and the capacitor (Cst), and can control the driving current flowing from the driving voltage line (PL) to the organic light-emitting diode (OLED) in correspondence with the voltage value stored in the capacitor (Cst). The organic light-emitting diode (OLED) can emit light having a predetermined brightness by the driving current. The counter electrode of the organic light-emitting diode (OLED) can be supplied with a common voltage (ELVSS).

[0064] FIG. 4a illustrates a pixel circuit (PC) comprising two transistors and one capacitor, but the present invention is not limited thereto. It goes without saying that the number of transistors and the number of capacitors can be varied depending on the design of the pixel circuit (PC).

[0065] Referring to FIG. 4b, the pixel circuit (PC) may include a first transistor (T1) which is a driving transistor and second to seventh transistors (T2 to T7) which are switching transistors. Depending on the type of transistor (p-type or n-type) and / or operating conditions, the first terminal of each of the first to seventh transistors (T1 to T7) may be a source terminal or a drain terminal, and the second terminal may be a terminal different from the first terminal. For example, if the first terminal is a source terminal, the second terminal may be a drain terminal. In one embodiment, the source terminal and the drain terminal may be referred to interchangeably as a source electrode and a drain electrode, respectively.

[0066] The pixel circuit (PC) can be connected to a first scan line (SL1) that transmits a first scan signal, a second scan line (SL2) that transmits a second scan signal, a third scan line (SL3) that transmits a third scan signal, a light emission control line (EL) that transmits a light emission control signal, a data line (DL) that transmits a data signal, a driving voltage line (PL) that transmits a driving voltage (ELVDD), and an initialization voltage line (VIL) that transmits an initialization voltage (Vint).

[0067] The first transistor (T1) can be connected between the driving voltage line (PL) and the organic light-emitting diode (OLED). The first transistor (T1) can be connected to the driving voltage line (PL) via the fifth transistor (T5) and electrically connected to the organic light-emitting diode (OLED) via the sixth transistor (T6). The first transistor (T1) includes a gate terminal connected to the second node (N2), a first terminal connected to the first node (N1), and a second terminal connected to the third node (N3). The first transistor (T1) can receive a data signal according to the switching operation of the second transistor (T2) and supply a driving current to the organic light-emitting diode (OLED).

[0068] The second transistor (T2) (data writing transistor) is connected between the data line (DL) and the first node (N1) and can be connected to the driving voltage line (PL) via the fifth transistor (T5). The first node (N1) may be a node where the first transistor (T1) and the fifth transistor (T5) are connected. The second transistor (T2) includes a gate terminal connected to the first scan line (SL), a first terminal connected to the data line (DL), and a second terminal connected to the first node (N1) (or the first terminal of the first transistor (T1). The second transistor (T2) can perform a switching operation in which it is turned on according to the first scan signal received through the first scan line (SL1) and transmits the data signal transmitted to the data line (DL) to the first node (N1).

[0069] The third transistor (T3) (compensation transistor) may be connected between the second node (N2) and the third node (N3). The third transistor (T3) may be connected to an organic light-emitting diode (OLED) via the sixth transistor (T6). The second node (N2) may be a node connected to the gate electrode of the first transistor (T1), and the third node (N3) may be a node connected to the first transistor (T1) and the sixth transistor (T6). The third transistor (T3) includes a gate terminal connected to the first scan line (SL), a first terminal connected to the second node (N2) (or the gate terminal of the first transistor (T1)), and a second terminal connected to the third node (N3) (or the second terminal of the first transistor (T1)). The third transistor (T3) is turned on according to the first scan signal received through the first scan line (SL1) and can compensate the threshold voltage of the first transistor (T1) by connecting the first transistor (T1) to the diode.

[0070] The fourth transistor (T4) (first initialization transistor) can be connected between the second node (N2) and the initialization voltage line (VL). The fourth transistor (T4) includes a gate terminal connected to the second scan line (SL2), a first terminal connected to the second node (N2), and a second terminal connected to the initialization voltage line (VIL). The fourth transistor (T4) can be turned on according to the second scan signal received through the second scan line (SL2) to transmit the initialization voltage (Vint) to the gate terminal of the first transistor (T1) and initialize the gate voltage of the first transistor (T1).

[0071] The fifth transistor (T5) (first light-emitting control transistor) can be connected between the driving voltage line (PL) and the first node (N1). The sixth transistor (T6) (second light-emitting control transistor) can be connected between the third node (N3) and the organic light-emitting diode (OLED). The fifth transistor (T5) includes a gate terminal connected to the light-emitting control line (EL), a first terminal connected to the driving voltage line (PL), and a second terminal connected to the first node (N1). The sixth transistor (T6) includes a gate terminal connected to the light-emitting control line (EL), a first terminal connected to the third node (N3), and a second terminal connected to the pixel electrode of the organic light-emitting diode (OLED). The fifth transistor (T5) and the sixth transistor (T6) are simultaneously turned on according to the light emission control signal received through the light emission control line (EL), and a driving current flows through the organic light-emitting diode (OLED).

[0072] The seventh transistor (T7) (second initialization transistor) can be connected between the organic light-emitting diode (OLED) and the initialization voltage line (VL). The seventh transistor (T7) includes a gate terminal connected to the third scan line (SL3), a second terminal of the sixth transistor (T6), a first terminal connected to the pixel electrode of the organic light-emitting diode (OLED), and a second terminal connected to the initialization voltage line (VIL). The seventh transistor (T7) can be turned on according to the third scan signal received through the third scan line (SL3) to transmit an initialization voltage (Vint) to the pixel electrode of the organic light-emitting diode (OLED) and initialize the voltage of the pixel electrode of the organic light-emitting diode (OLED). The seventh transistor (T7) may be omitted.

[0073] The capacitor (Cst) includes a first electrode connected to the second node (N2) and a second electrode connected to the driving voltage line (PL). The capacitor (Cst) can maintain the voltage applied to the gate electrode of the first transistor (T1) by storing and maintaining a voltage corresponding to the difference between the voltages supplied to the ends of the first electrode and the second electrode, respectively.

[0074] An organic light-emitting diode (OLED) includes a pixel electrode (e.g., an anode) and a counter electrode (e.g., a cathode) facing the pixel electrode, and the counter electrode may receive a common voltage (ELVSS). The organic light-emitting diode (OLED) can display an image by receiving a driving current corresponding to a voltage value stored in a capacitor (Cst) from a first transistor (T1) and emitting light in a predetermined color.

[0075] Although the transistors of the pixel circuit in FIGS. 4a and 4b are illustrated as P-type transistors, the embodiments of the present invention are not limited thereto. For example, various embodiments are possible, such as the transistors of the pixel circuit being N-type transistors, or some being P-type transistors and others being N-type transistors.

[0076] FIG. 5 is a schematic diagram showing a cross-section taken along the D-D' line of the first display area (DA1) in the display panel (10) of FIG. 3.

[0077] Referring to FIG. 5, the display panel (10) may include a substrate (100), a pixel circuit layer (PCL), a display element layer (DEL), and an encapsulation layer (300).

[0078] The substrate (100) may include a material having flexible or bendable properties. In one embodiment, the substrate (100) may include a first base layer (100a), a first barrier layer (100b), a second base layer (100c), and a second barrier layer (100d). In one embodiment, the first base layer (100a), the first barrier layer (100b), the second base layer (100c), and the second barrier layer (100d) may be stacked in order and provided on the substrate (100). In another embodiment, the substrate (100) may include glass.

[0079] At least one of the first base layer (100a) and the second base layer (100c) may include a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc.

[0080] The first barrier layer (100b) and the second barrier layer (100d) are barrier layers that prevent the penetration of external foreign substances, and are silicon nitride (SiN x It may be a single layer or a multilayer containing inorganic materials such as silicon oxide (SiO2), and / or silicon oxynitride (SiON).

[0081] A pixel circuit layer (PCL) may be disposed on a substrate (100). The pixel circuit layer (PCL) may include a pixel circuit (PC). The pixel circuit (PC) may include a driving thin-film transistor (Td), a switching thin-film transistor (Ts), and a capacitor (Cst). The driving thin-film transistor (Td) may include a first semiconductor layer (Act1), a first gate electrode (GE1), a first source electrode (SE1), and a first drain electrode (DE1). The switching thin-film transistor (T2) may include a second semiconductor layer (Act2), a second gate electrode (GE2), a second source electrode (SE2), and a second drain electrode (DE2). Since the second semiconductor layer (Act2), the second gate electrode (GE2), the second source electrode (SE2), and the second drain electrode (DE2) are similar to the first semiconductor layer (Act1), the first gate electrode (GE1), the first source electrode (SE1), and the first drain electrode (DE1), a detailed description will be omitted.

[0082] The pixel circuit layer (PCL) may further include an inorganic insulating layer (IIL), a first insulating layer (115), and a second insulating layer (116) disposed below and / or above the components of the pixel circuit (PC). The inorganic insulating layer (IIL) may include a buffer layer (111), a first gate insulating layer (112), a second gate insulating layer (113), and an interlayer insulating layer (114).

[0083] The buffer layer (111) can be disposed on the substrate (100). The buffer layer (111) is silicon nitride (SiN x It may include inorganic insulating materials such as silicon oxynitride (SiON) and silicon oxide (SiO2), and may be a single layer or a multilayer containing the aforementioned inorganic insulating materials.

[0084] The first semiconductor layer (Act1) may be disposed on the buffer layer (111). The first semiconductor layer (Act1) may include polysilicon. Alternatively, the first semiconductor layer (Act1) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The first semiconductor layer (Act1) may include a channel region and a drain region and a source region disposed on both sides of the channel region, respectively.

[0085] The first gate electrode (GE1) may overlap with the channel region. The first gate electrode (GE1) may include a low-resistance metal material. The first gate electrode (GE1) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be provided as a multilayer or single layer including the above materials.

[0086] The first gate insulating layer (112) between the first semiconductor layer (Act1) and the first gate electrode (GE1) is silicon oxide (SiO2) or silicon nitride (SiN x), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and / or zinc oxide (ZnO x It may include inorganic insulating materials such as ). In one embodiment, zinc oxide (ZnO x ) may be zinc oxide (ZnO) and / or zinc peroxide (ZnO2).

[0087] The second gate insulating layer (113) can cover the first gate electrode (GE1). Similar to the first gate insulating layer (112), the second gate insulating layer (113) may be silicon oxide (SiO2) or silicon nitride (SiN2). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and / or zinc oxide (ZnO x It may include inorganic insulating materials such as ).

[0088] An upper electrode (CE2) of a capacitor (Cst) may be disposed on the upper portion of the second gate insulating layer (113). The upper electrode (CE2) may overlap with the first gate electrode (GE1) below it. The first gate electrode (GE1) of the driving thin-film transistor (Td) may function not only as a control electrode of the driving thin-film transistor (Td) but also as a lower electrode (CE1) of the capacitor (Cst). Accordingly, the capacitor (Cst) and the driving thin-film transistor (Td) may overlap. In some embodiments, the capacitor (Cst) may not overlap with the driving thin-film transistor (Td). The upper electrode (CE2) may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may be a single layer or a multilayer of the aforementioned materials.

[0089] The interlayer insulating layer (114) can cover the upper electrode (CE2) of the capacitor (Cst). The interlayer insulating layer (114) is silicon oxide (SiO2) or silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO x It may include ) etc. The interlayer insulation layer (114) may be a single layer or a multilayer including the aforementioned inorganic insulation material.

[0090] The first drain electrode (DE1) and the first source electrode (SE1) may each be disposed on an interlayer insulating layer (114). The first drain electrode (DE1) and the first source electrode (SE1) may include a highly conductive material. The first drain electrode (DE1) and the first source electrode (SE1) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be provided as a multilayer or single layer including the above materials. In one embodiment, the first drain electrode (DE1) and the first source electrode (SE1) may have a multilayer structure of Ti / Al / Ti.

[0091] The first insulating layer (115) may be disposed on the first drain electrode (DE1), the first source electrode (SE1), the second drain electrode (DE2), the second source electrode (SE2), and the interlayer insulating layer (114). In one embodiment, the first insulating layer (115) may include an organic material. For example, the first insulating layer (115) may include an organic insulating material such as a general-purpose polymer like polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, and blends thereof.

[0092] A connecting electrode (CML) may be disposed on the first insulating layer (115). The connecting electrode (CML) may be electrically connected to a pixel circuit (PC) through a hole in the first insulating layer (115). In one embodiment, the connecting electrode (CML) may be electrically connected to a first drain electrode (DE1) or a first source electrode (SE1). The connecting electrode (CML) may include a highly conductive material. The connecting electrode (CML) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials. In one embodiment, the connecting electrode (CML) may have a multilayer structure of Ti / Al / Ti.

[0093] A second insulating layer (116) may be disposed on the first insulating layer (115) and the connecting electrode (CML). In one embodiment, the second insulating layer (116) may include an organic material. The second insulating layer (116) may include an organic insulating material such as a general-purpose polymer like polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, and blends thereof.

[0094] A display element layer (DEL) may be disposed on a pixel circuit layer (PCL). The display element layer (DEL) may include an organic light-emitting diode (OLED) which is a display element and a pixel definition layer (220). In one embodiment, the display element layer (DEL) may further include a spacer (230). The organic light-emitting diode (OLED) may be electrically connected to a connecting electrode (CML) through a hole in the second insulating layer (116). The organic light-emitting diode (OLED) may include a pixel electrode (211), an intermediate layer (212), and a counter electrode (213). In one embodiment, the organic light-emitting diode (OLED) may overlap with the pixel circuit (PC).

[0095] The pixel electrode (211) may be disposed on the second insulating layer (116). The pixel electrode (211) may be electrically connected to the connecting electrode (CML) through a hole in the second insulating layer (116). The pixel electrode (211) may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode (211) may include a reflective film comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. In yet another embodiment, the pixel electrode (211) may further include a film made of ITO, IZO, ZnO, or In2O3 above and below the aforementioned reflective film.

[0096] The pixel defining layer (220) may be disposed on the pixel electrode (211) and has an opening (220OP) that exposes a portion of the pixel electrode (211). The opening (220OP) may define a light-emitting region of light emitted from an organic light-emitting diode (OLED). For example, the width of the opening (220OP) may correspond to the width of the light-emitting region. Additionally, the width of the opening (220OP) may correspond to the width of the pixel.

[0097] In one embodiment, the pixel defining layer (220) may include an organic insulator. In another embodiment, the pixel defining layer (220) may be silicon nitride (SiN xIt may include an inorganic insulating material such as silicon oxynitride (SiON) or silicon oxide (SiO2). In another embodiment, the pixel defining layer (220) may include an organic insulating material and an inorganic insulating material. In some embodiments, the pixel defining layer (220) may include a light-blocking material and may be provided in black. The light-blocking material may include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal particles such as nickel, aluminum, molybdenum and their alloys, metal oxide particles (e.g., chromium oxide), or metal nitride particles (e.g., chromium nitride). When the pixel defining layer (220) includes a light-blocking material, it may reduce external light reflection by metal structures placed below the pixel defining layer (220).

[0098] A spacer (230) may be placed on the pixel definition layer (220). The spacer (230) may be intended to prevent damage to the substrate (100) and / or films (layers) on the substrate (100) during the manufacture of the display device. The spacer (230) may include an organic material such as polyimide. Alternatively, the spacer (230) may be silicon nitride (SiN x It may include an inorganic insulating material such as silicon oxide (SiO2) or an organic insulating material and an inorganic insulating material. In one embodiment, the spacer (230) may include a material different from the pixel defining layer (220). Or in another embodiment, the spacer (230) may include the same material as the pixel defining layer (220), in which case the pixel defining layer (220) and the spacer (230) may be formed together in a mask process using a halftone mask, etc.

[0099] An intermediate layer (212) may be disposed on the pixel defining layer (220). The intermediate layer (212) may include a light-emitting layer (212b) disposed in the opening (220OP) of the pixel defining layer (220). The light-emitting layer (212b) may include a polymer or low-molecular-weight organic material that emits light of a predetermined color.

[0100] The intermediate layer (212) may further include at least one of a first functional layer (212a) between the pixel electrode (211) and the light-emitting layer (212b), and a second functional layer (212c) between the light-emitting layer (212b) and the counter electrode (213). In one embodiment, the first functional layer (212a) and the second functional layer (212c) may be disposed respectively below and above the light-emitting layer (212b). The first functional layer (212a) may include a hole transport layer (HTL) or may include a hole transport layer and a hole injection layer (HIL). The second functional layer (212c) may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The first functional layer (212a) and / or the second functional layer (212c) may be a common layer formed to cover the entire substrate (100), similar to the opposing electrode (213) described later.

[0101] The counter electrode (213) may be disposed on the intermediate layer (212). The counter electrode (213) may be made of a conductive material with a low work function. For example, the counter electrode (213) may include a (semi)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. Alternatively, the counter electrode (213) may further include a layer such as ITO, IZO, ZnO, or In2O3 on the (semi)transparent layer comprising the aforementioned materials.

[0102] In some embodiments, a capping layer (not shown) may be further disposed on the counter electrode (213). The capping layer may include LiF, an inorganic material, or / and an organic material.

[0103] The encapsulation layer (300) may be disposed on the counter electrode (213). In one embodiment, the encapsulation layer (300) may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In one embodiment, the encapsulation layer (300) may include a first inorganic encapsulation layer (310), an organic encapsulation layer (320), and a second inorganic encapsulation layer (330) that are sequentially stacked.

[0104] The first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330) are aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO x ), silicon oxide (SiO2), silicon nitride (SiN x It may include one or more inorganic materials such as silicon oxynitride (SiON). The organic encapsulation layer (320) may include a polymer-based material. Polymer-based materials may include acrylic resin, epoxy resin, polyimide, and polyethylene. In one embodiment, the organic encapsulation layer (320) may include acrylate.

[0105] A touch sensor layer may be disposed on the packaging layer (300). The touch sensor layer can acquire coordinate information based on external input, for example, a touch event.

[0106] An anti-reflective layer may be disposed on the touch sensor layer. The anti-reflective layer can reduce the reflectivity of light incident toward the display panel (10).

[0107] In one embodiment, the anti-reflection layer may include a phase retarder and / or a polarizer. The phase retarder may be of the film type or liquid crystal coating type and may include a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer may also be of the film type or liquid crystal coating type. The film type may include a stretched synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined array. The phase retarder and the polarizer may further include a protective film.

[0108] In another embodiment, the anti-reflective layer may include a black matrix and color filters. The color filters may be arranged considering the color of light emitted from an organic light-emitting diode (OLED). Each of the color filters may include a red, green, or blue pigment or dye. Alternatively, each of the color filters may further include quantum dots in addition to the aforementioned pigment or dye. Alternatively, some of the color filters may not include the aforementioned pigment or dye and may include scattering particles such as titanium oxide.

[0109] In another embodiment, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light reflected from the first reflective layer and the second reflective layer, respectively, may undergo destructive interference, and accordingly, the external light reflectance may be reduced.

[0110] FIG. 6 is an enlarged view of part E of the display panel (10) of FIG. 3. FIG. 7a and FIG. 7b are enlarged views of part F, which is part of part E of FIG. 6. FIG. 8a and FIG. 8b are example diagrams of the configuration of the second pixel unit (PXU2), respectively. FIG. 9a to FIG. 9c are schematic diagrams of the basic unit of FIG. 6, respectively.

[0111] Referring to FIG. 6, a plurality of pixels (PX) may be arranged in a central area (CA), a first area (A1), a second area (A2), and a corner area (CNA). Accordingly, the display panel (10) can display an image in the central area (CA), the first area (A1), the second area (A2), and the corner area (CNA). In this specification, the pixel array structure is described based on the light-emitting area of ​​each pixel.

[0112] Referring to FIG. 6, a plurality of pixels (PX) may be arranged in a first display area (DA1) and a second display area (DA2). The pixel (PX) array structure in the corner area (CNA) may be the same or different from the pixel (PX) array structure in the first display area (DA1).

[0113] In the intermediate area (MCA), pixels (PX) may be arranged along a direction away from the center area (CA). A driving circuit (DC) may be placed in the intermediate area (MCA). The driving circuit (DC) may include a plurality of sub-driving circuits. The plurality of sub-driving circuits may be arranged along the boundary between the intermediate area (MCA) and the first display area (DA1). The plurality of sub-driving circuits may be arranged to surround at least a portion of the center area (CA), the first area (A1), and the second area (A2). A plurality of pixels (PX) may be placed in the intermediate area (MCA). A plurality of pixels (PX) may overlap with a plurality of sub-driving circuits.

[0114] The center corner area (CCA) may include a linear stripe area (SPA). In one embodiment, the center corner area (CCA) may include a plurality of stripe areas (SPA) spaced apart from each other. Each of the plurality of stripe areas (SPA) may be an extension area extending from the boundary between the intermediate area (MCA) and the center corner area (CCA) in a direction away from the center area (CA) (hereinafter referred to as the 'extension direction of the stripe area (SPA)'). In one embodiment, each of the plurality of stripe areas (SPA) may extend in a predetermined direction between a first direction and a second direction.

[0115] A spacing area (SA) may be defined between adjacent stripe areas (SPA). The spacing area (SA) may be an area where no components of the display panel (10) are placed. When the center corner area (CCA) is bent, compressive strain may occur more significantly than tensile strain in the center corner area (CCA). In this embodiment, since a spacing area (SA) is defined between adjacent stripe areas (SPA), the center corner area (CCA) can contract. Therefore, the display panel (10) can be bent without damage in the center corner area (CCA).

[0116] In each stripe area (SPA), multiple pixels (PX) may be arranged in multiple columns. A column in a stripe area (SPA) may refer to a line that follows the direction of extension of the stripe area (SPA) within the stripe area (SPA). The columns within the stripe area (SPA) may be parallel to each other. The spacing between adjacent columns within the stripe area (SPA) may be equal. By arranging pixels (PX) in two or more columns within the stripe area (SPA), the resolution (Pixels Per Inch) of the corner area (CNA) can be increased. Accordingly, by reducing the difference in resolution between the first display area (DA1) and the second display area (DA2), the phenomenon in which the first display area (DA1) and the second display area (DA2) are distinguishably visible can be minimized.

[0117] A plurality of pixels (PX) may include a plurality of first pixels (PX1), a plurality of second pixels (PX2), and a plurality of third pixels (PX3). In one embodiment, the first pixel (PX1) may be a red pixel, the second pixel (PX2) may be a green pixel, and the third pixel (PX3) may be a blue pixel.

[0118] First pixel units (PXU1) may be arranged in the first display area (DA1), and second pixel units (PXU2) may be arranged in the second display area (DA2) and the corner area (CNA). A pixel unit may be defined as a pixel collection formed by grouping a plurality of pixels (PX) arranged according to a pixel array structure into a preset unit. In one embodiment, a pixel unit may be a pixel collection of the smallest unit that is repeated in a predetermined pixel array structure.

[0119] In the first display area (DA1), multiple pixels (PX) can be arranged in a Pentile Matrix structure or a Pentile structure. The Pentile structure can achieve high resolution with a small number of pixels by applying a rendering drive that expresses color by sharing adjacent pixels.

[0120] As illustrated in FIG. 7a, in the first display area (DA1), in the first sub-row (SR1) of each row (Ri), the first pixel (PX1) and the third pixel (PX3) may be alternately arranged along the first direction, and the second pixel (PX2) may be repeatedly arranged in the second sub-row (SR2). Accordingly, in each row (Ri), pixels (PX) may be repeatedly arranged in the order of the first pixel (PX1), the second pixel (PX2), the third pixel (PX3), and the second pixel (PX2) along the first direction. Also, the first column (C1), in which the first pixel (PX1) and the third pixel (PX3) are alternately arranged, and the second column (C2), in which the second pixel (PX2) is repeatedly arranged, may alternate along the first direction.

[0121] In the first display area (DA1), pixels (PX) can form a first pixel unit (PXU1). In the first display area (DA1) of a Pentile structure, the first pixel unit (PXU1) may be a pixel collection comprising one first pixel (PX1), one third pixel (PX3), and two second pixels (PX2). In the first display area (DA1), the first pixel unit (PXU1) may be repeatedly arranged in a first direction and a second direction.

[0122] In FIG. 7a, a plurality of pixels (PX) are shown arranged in a pentile structure in the first display area (DA1), but the present invention is not limited thereto. For example, the plurality of pixels (PX) can be arranged in various shapes such as a stripe structure, a mosaic structure, a delta structure, etc.

[0123] In one embodiment, pixels (PX) in a corner area (CNA) may be arranged in an S-stripe structure. A second pixel (PX3) may be repeatedly arranged along a first virtual line (IL1), and a first pixel (PX1) and a third pixel (PX3) may be alternately arranged along a second virtual line (IL2). In this case, the first pixel (PX1) and the third pixel (PX3) may have a rectangular shape with a longer side in the direction perpendicular to the second virtual line (IL2), and the second pixel (PX2) may have a rectangular shape with a longer side in the direction of extension of the first virtual line (IL1). The length of the second pixel (PX2) in the direction of extension of the first virtual line (IL1) may be equal to or greater than the sum of the length of the first pixel (PX1) in the direction of extension of the second virtual line (IL2) and the length of the third pixel (PX3) in the direction of extension of the second virtual line (IL2). The first virtual line (IL1) and the second virtual line (IL2) may be virtual lines extending along the boundary between the intermediate area (MCA) and the first display area (DA1).

[0124] Pixels (PX) in the corner area (CNA) can form a second pixel unit (PXU2). In the corner area (CNA) of an S-stripe structure, the second pixel unit (PXU2) may be a pixel set comprising one first pixel (PX1), one second pixel (PX3), and one third pixel (PX3). In the corner area (CNA), the second pixel unit (PXU2) may be repeatedly arranged in a predetermined direction.

[0125] As illustrated in FIG. 7a, the size of each of the first pixel (PX1), second pixel (PX2), and third pixel (PX3) in the second display area (DA2) (corner area) may be larger than the size of each of the first pixel (PX1), second pixel (PX2), and third pixel (PX3) in the first display area (DA1). The size of the second pixel unit (PXU2) may be larger than the size of the first pixel unit (PXU1).

[0126] In another embodiment, the size of each of the first pixel (PX1), second pixel (PX2), and third pixel (PX3) in the second display area (DA2) (corner area) may be the same as or smaller than the size of each of the first pixel (PX1), second pixel (PX2), and third pixel (PX3) in the first display area (DA1).

[0127] In FIG. 7a, among the pixels constituting the second pixel unit (PXU2), the second pixel (PX2) is positioned close to the boundary between the first display area (DA1) and the second display area (DA2), but the embodiment of the present invention is not limited thereto. As shown in FIG. 7b, among the pixels constituting the second pixel unit (PXU2), the first pixel (PX1) and the third pixel (PX3) may be positioned close to the boundary between the first display area (DA1) and the second display area (DA2).

[0128] In one embodiment, as shown in FIG. 8a, the arrangement of pixels constituting the second pixel unit (PXU2) may be a rectangular shape in which the first pixel (PX1) and the second pixel (PX2) have longer sides in the direction perpendicular to the second virtual line (IL2), and the third pixel (PX3) has longer sides in the direction extending the first virtual line (IL1). Alternatively, as shown in FIG. 8b, the arrangement of pixels constituting the second pixel unit (PXU2) may be a rectangular shape in which the second pixel (PX2) and the third pixel (PX3) have longer sides in the direction perpendicular to the second virtual line (IL2), and the first pixel (PX1) has longer sides in the direction extending the first virtual line (IL1). The second pixel unit (PXU2) shown in FIG. 8a and FIG. 8b may be arranged in the corner area (CNA) as shown in FIG. 7a or FIG. 7b.

[0129] Referring again to FIG. 6, pixels (PX) arranged in the intermediate area (MCA) and the center corner area (CCA) can be partitioned into a basic unit (BU). The basic unit (BU) partitions the repetitive shape of the pixel (PX) array in the corner area (CNA) and does not imply a break in the configuration. In one embodiment, the basic unit (BU) may include one stripe area (SPA) of the center corner area (CCA) and a corresponding partial area of ​​the intermediate corner area (MCA) (hereinafter referred to as "sub-area (SMCA)"). That is, the intermediate corner area (MCA) may include a plurality of sub-areas (SMCA) corresponding to each of the plurality of stripe areas (SPA).

[0130] As illustrated in FIGS. 9a to 9c, the first column (SCL1), second column (SCL2), and third column (SCL3) of the stripe area (SPA) may correspond to the first column (MCL1), second column (MCL2), and third column (MCL3) of the corresponding sub-area (SMCA), respectively. Second pixel units (PXU2) may be disposed in each of the first column (SCL1), second column (SCL2), and third column (SCL3) of the stripe area (SPA) and the first column (MCL1), second column (MCL2), and third column (MCL3) of the sub-area (SMCA). The number of second pixel units (PXU2) disposed in each of the first column (SCL1), second column (SCL2), and third column (SCL3) of the stripe area (SPA) may be determined according to the corner shape.

[0131] In one embodiment, as illustrated in FIG. 9a, the basic unit (BU) may include a linear stripe area (SPA) and a linear sub-area (SMCA). Multiple rows of the stripe area (SPA) and the sub-area (SMCA) may be parallel to each other. The emission pitch (EP1) of pixels arranged adjacently in the fifth direction (RD), which is approximately perpendicular to the fourth direction (CD) that is the extension direction of the stripe area (SPA) in the stripe area (SPA), may be the same as the emission pitch (EP2) of pixels arranged adjacently in the fourth direction (RD) in the sub-area (SMCA). Here, the emission pitch may be the pixel pitch of pixels emitting the same color. For example, the emission pitch (EP1) of second pixels (PX2) arranged adjacently in the fifth direction (RD) in the stripe area (SPA) may be the same as the emission pitch (EP2) of second pixels (PX2) arranged adjacently in the fifth direction (RD) in the sub-area (SMCA).

[0132] In one embodiment, as illustrated in FIG. 9b, the basic unit (BU) may include a linear stripe area (SPA) and a radial sub-area (SMCA). Multiple columns of the stripe area (SPA) are parallel to each other, and multiple columns of the sub-area (SMCA) may have a radial spacing between columns that increases as they move away from the center area (CA). The emission pitches (EP1) of pixels arranged adjacently in the fifth direction (RD) in the stripe area (SPA) may be the same. The emission pitches (EP2) of pixels arranged adjacently in the fifth direction (RD) in the sub-area (SMCA) are the same, but the emission pitch (EP2) may increase as they move away from the center area (CA). For example, the emission pitches (EP1) of second pixels (PX2) arranged adjacently in the fifth direction (RD) in the stripe area (SPA) may be the same. The emission pitches (EP2) of the second pixels (PX2) arranged adjacently in the fifth direction (RD) in the sub-region (SMCA) are the same, and the emission pitch (EP2) can increase as it goes toward the fourth direction (CD).

[0133] In the embodiment illustrated in FIG. 9c, some pixels in a linear stripe area (SPA) are rotated by a predetermined angle relative to the pixels in the stripe area (SPA) of FIG. 9a and FIG. 9b. Pixels placed in each column of the stripe area (SPA) may be rotated by the radial angle (α) of the column of the corresponding sub-area (SMCA). The radial angle (α) may be the angle formed by the radial direction of each column of the sub-area (SMCA) with the fourth direction (RD).

[0134] In one embodiment, a pixel placed in a column where the radiation angle (α) is 0 in the intermediate region (MCA) can be defined as a reference pixel. For example, if the second column (MCL2) of the sub-region (SMCA) in FIG. 9c is a column where the radiation angle (α) is 0, the first to third pixels placed in the second column (MCL2) can be defined as the first to third reference pixels.

[0135] In one embodiment, as shown in FIG. 9a and FIG. 9b, pixels placed in each of the plurality of columns within the stripe area (SPA) may be placed in the same manner as a reference pixel. In one embodiment, as shown in FIG. 9c, pixels placed in each of the plurality of columns within the stripe area (SPA) may be placed rotated by the radiation angle (α) of the corresponding column of the corresponding sub-area (SMCA) relative to the reference pixel.

[0136] The radiation angle (α) of each of the first column (MCL1), second column (MCL2), and third column (MCL3) of the sub-region (SMCA) illustrated in FIG. 9c and the rotation angle (β) of each of the pixels in the first column (SCL1), second column (SCL2), and third column (SCL3) of the stripe area (SPA) may be the same. For example, the radiation angle (α) of the first column (MCL1) of the sub-region (SMCA) and the rotation angle (β) of the pixels placed in the first column (SCL1) of the stripe area (SPA) may be the same as a predetermined value. The radiation angle (α) of the second column (MCL1) of the sub-region (SMCA) and the rotation angle (β) of the pixels placed in the second column (SCL2) of the stripe area (SPA) may be the same as "0". The radiation angle (α) of the third column (MCL3) of the sub-region and the rotation angle (β) of the pixels placed in the third column (SCL3) of the stripe region (SPA) may be the same as a predetermined value.

[0137] FIG. 10 is a schematic diagram showing the arrangement of two basic units when the display panel (10) is in an unbended state. FIG. 11 is a schematic diagram showing the corner area (CNA) when the display panel (10) is in a bent state.

[0138] Referring to FIG. 10, in the corner area (CNA), the first basic unit (BU1) and the second basic unit (BU2) can be arranged along the boundary line (BL1) between the intermediate area (MCA) and the first display area (DA1). The curvature of the boundary line (BL1) can correspond to the curvature of the corner area (CNA).

[0139] The emission pitch of pixels adjacent to the boundary line (BL1) within a basic unit (BU) and the emission pitch of pixels adjacent to the boundary line (BL1) between basic units (BU) may be the same. For example, the emission pitch (EP11) between the second pixels (PX2) of the first basic unit (BU1) adjacent to the boundary line (BL1), the emission pitch (EP12) between the second pixels (PX2) of the second basic unit (BU2), and the emission pitch (EP13) between the adjacent second pixels (PX2) of the first basic unit (BU1) and the second basic unit (BU2) may be the same.

[0140] The emission pitch of pixels adjacent to the boundary line (BL2) between the intermediate area (MCA) and the center corner area (CCA), where the stripe area (SPA) begins within the basic unit (BU), and the emission pitch of pixels adjacent to the boundary line (BL2) between the stripe areas (SPA) may be the same. For example, the emission pitch (EP21) between the second pixels (PX2) of the first basic unit (BU1) adjacent to the boundary line (BL2), the emission pitch (EP22) between the second pixels (PX2) of the second basic unit (BU2), and the emission pitch (EP23) between the adjacent second pixels (PX2) of the first basic unit (BU1) and the second basic unit (BU2) may be the same.

[0141] The light emission pitch of pixels placed at the end of a stripe area (SPA) can be determined based on when adjacent stripe areas (SPAs) are bent and bonded together. For example, as shown in FIG. 11, when stripe areas (SPAs) are bent and bonded together, the light emission pitch (EP23E) between the second pixel (PX2) of the first basic unit (BU1) and the second pixel (PX2) of the second basic unit (BU2), which are placed at the end of the stripe area (SPA) and are adjacent to each other, may be the same as the light emission pitch (EP23S) between the second pixel (PX2) of the first basic unit (BU1) and the second pixel (PX2) of the second basic unit (BU2), which are adjacent to the boundary line (BL2).

[0142] FIGS. 12a to 14c are drawings showing various examples of a basic unit (BU) according to one embodiment.

[0143] In the embodiments illustrated in FIGS. 6 to 10, the basic unit (BU) is composed of three columns, but this is exemplary, and the basic unit (BU) may be composed of two or more columns. For example, as illustrated in FIGS. 12a to 12c respectively, the basic unit (BU) may be composed of four columns, five columns, six columns, etc.

[0144] In the embodiments illustrated in FIGS. 6 to 10, the pixel array structure of the basic unit (BU) is configured as an S-stripe structure, but this is exemplary, and the pixel array structure of the basic unit (BU) can be arranged in various shapes such as a pentile structure, a stripe structure, a mosaic structure, a delta structure, etc. For example, as illustrated in FIGS. 13a and 13b, the pixel array structure of the basic unit (BU) may be a stripe structure. The stripe structure may be a structure in which a first pixel (PX1), a second pixel (PX2), and a third pixel (PX3) are arranged side by side along a predetermined direction. The direction of the long side of each of the first pixel (PX1), the second pixel (PX2), and the third pixel (PX3) may be the direction of extension of the stripe area (SPA) as in FIG. 13a, or a direction perpendicular to the direction of extension of the stripe area (SPA) as in FIG. 13b. Alternatively, as shown in FIG. 13c, the pixel array structure of the basic unit (BU) may be a pentile structure.

[0145] The embodiments illustrated in FIGS. 6 to 10 have the same arrangement of first to third pixels (PX1 to PX3) arranged in each column of the basic unit (BU) in an S-stripe structure. However, this is exemplary, and the arrangement of first to third pixels (PX1 to PX3) arranged in each column of the basic unit (BU) may differ.

[0146] In one embodiment, as illustrated in FIG. 14a, the basic unit (BU) is composed of four columns, and the pixel array structure may be an S-stripe structure. Then, a second-1 pixel unit (PXU21) may be placed in the odd columns (MCL1 / SCL1, MCL3 / SCL3) of the basic unit (BU) such that the second pixel (PX2) is positioned closer to the boundary line (BL1) than the first pixel (PX1) and the third pixel (PX3), and a second-2 pixel unit (PXU22) may be placed in the even columns (MCL2 / SCL2, MCL4 / SCL4) such that the first pixel (PX1) and the third pixel (PX3) are positioned closer to the boundary line (BL1) than the second pixel (PX2).

[0147] In one embodiment, as shown in FIG. 14b, the basic unit (BU) is composed of two columns, and the pixel array structure may be a pentile structure. Also, the arrangement of the first to third pixels (PX1 to PX3) constituting the second-1 pixel unit (PXU21) placed in the odd column (MCL1 / SCL1) of the basic unit (BU) may be different from the arrangement of the first to third pixels (PX1 to PX3) constituting the second-2 pixel unit (PXU22) placed in the even column (MCL2 / SCL2).

[0148] In one embodiment, as shown in FIG. 14c, the basic unit (BU) is composed of two columns, and the pixel array structure may be a stripe structure. Also, the long-side arrangement direction of the first to third pixels (PX1 to PX3) constituting the second-1 pixel unit (PXU21) placed in the odd column (MCL1 / SCL1) of the basic unit (BU) may be different from the long-side arrangement direction of the first to third pixels (PX1 to PX3) constituting the second pixel unit (PXU22) placed in the even column (MCL2 / SCL2).

[0149] FIG. 15 is a schematic diagram showing a cross-section of a stripe area (SPA) taken along the line G-G' of FIG. 6. FIG. 16 is a schematic diagram of a basic unit (BU) showing a corner dam (CDAM) of the stripe area (SPA) of FIG. 15. In FIG. 15, reference numerals identical to those in FIG. 5 denote identical components, so redundant descriptions will be omitted.

[0150] Referring to FIG. 15, in the stripe area (SPA), a pixel including a pixel circuit (PC) and an organic light-emitting diode (OLED), which is a display element connected to the pixel circuit (PC), may be disposed on the substrate (100). A pattern layer (PTL) may be disposed on the second insulating layer (116), and a pixel electrode (211) and a pixel defining layer (220) may be disposed in sequence on the pattern layer (PTL). The pixel electrode (211) may be electrically connected to a connecting electrode (CML) through holes in the pattern layer (PTL) and the second insulating layer (116). In one embodiment, the pattern layer (PTL) may be an inorganic layer. Other than that, the configuration of the pixel circuit (PC) and the organic light-emitting diode (OLED) is the same as that of the pixel circuit (PC) and the organic light-emitting diode (OLED) shown in FIG. 5, so a description is omitted. In the stripe area (SPA), a spacer may be omitted.

[0151] As illustrated in FIG. 16, a corner dam (CDAM) may be placed along the edge of a stripe area (SPA). In the first insulating layer (115) and the second insulating layer (116), a corner hole (CH) may be formed along the corner dam (CDAM) between a pixel (PX) and the corner dam (CDAM). The corner dam (CDAM) may have a multilayer structure comprising a plurality of layers. The corner dam (CDAM) may include a first layer (115P), a second layer (116P), a third layer (ILP), a fourth layer (220P), and a fifth layer (230P) stacked sequentially in a third direction (z-direction). The first layer (115P) may be formed simultaneously with the same material as the first insulating layer (115). The second layer (116P) may be formed simultaneously with the same material as the second insulating layer (116). The third layer (ILP) can be formed simultaneously with the same material as the inorganic layer (IL). The fourth layer (220P) can be formed simultaneously with the same material as the pixel definition layer (220). The fifth layer (230P) can be formed simultaneously with the same material as the spacer (230). In FIG. 15, the spacer is not placed on the pixel definition layer (220), but in other embodiments, the spacer may be placed on the pixel definition layer (220).

[0152] The first functional layer (212a) and the second functional layer (212c) and the counter electrode (213) of the organic light-emitting diode (OLED) can be arranged to extend to the portion exposed by the corner hole (CH) and to the top of the corner dam (CDAM).

[0153] An encapsulation layer (300) may be disposed on top of an organic light-emitting diode (OLED) and a corner dam (CDAM). The encapsulation layer (300) may include a first inorganic encapsulation layer (310), an organic encapsulation layer (320), and a second inorganic encapsulation layer (330). The first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330) cover the corner dam (CDAM) and may cover the sides of the corner dam (CDAM). The position of the organic encapsulation layer (320) may be limited by the corner dam (CDAM).

[0154] Although the present invention has been described with reference to an embodiment illustrated in the drawings, this is merely illustrative, and those skilled in the art will understand that various modifications and variations of the embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims. Explanation of the symbols

[0155] 1: Display device 10: Display panel 20: Cover Window 100: Substrate 118: Pixel definition layer CA, A1, A2: Central area, Area 1, Area 2 CNA: Corner area CCA, ACA1, ACA2, MCA: Center Corner Area, 1st Adjacent Area, 2nd Adjacent Area, Intermediate Area SPA: Striped area SMCA: Sub-area CDAM: Corner Dam

Claims

Claim 1 delete Claim 2 A display panel comprising: a substrate including a first display area and a second display area; and a plurality of pixels disposed in the first display area and the second display area of ​​the substrate; wherein the first display area includes a planar central area, a first area adjacent to the first direction of the central area, and a second area adjacent to the second direction intersecting the first direction of the central area, and the second display area includes a corner area between the first area and the second area, and the corner area includes an intermediate area adjacent to the first display area; and a plurality of mutually spaced linear extension areas extending from the intermediate area in a direction away from the first display area; wherein the intermediate area includes a plurality of sub-areas corresponding to each of the plurality of extension areas, and each of the plurality of sub-areas is radial, and in each of the plurality of extension areas, a pixel unit, which is a set of a plurality of pixels, is disposed along a plurality of parallel columns, and in each of the plurality of sub-areas, the pixel unit is disposed along a plurality of radial columns. Claim 3 A display panel according to paragraph 2, wherein a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region are arranged in the same manner as the reference pixel. Claim 4 A display panel according to paragraph 2, wherein a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region are arranged by being rotated by the radiation angle of the corresponding column of the corresponding sub-region relative to the reference pixel. Claim 5 In paragraph 2, a display panel in which the pixel arrangement structure of the plurality of pixels of the pixel unit is different from the pixel arrangement structure of the first display area. Claim 6 In paragraph 2, a display panel in which the pixel arrangement structure of the plurality of pixels of the pixel unit is identical to the pixel arrangement structure of the first display area. Claim 7 In paragraph 2, the pixel arrangement structure of the plurality of pixels of the pixel unit includes a Pentile structure, a Stripe structure, or an S-Stripe structure, in a display panel. Claim 8 A display panel according to claim 7, wherein the plurality of pixels include a first pixel, a second pixel, and a third pixel that emit different colors, and in each extended area, a plurality of columns include a first column and a second column in which the positions of the first to third pixels arranged within the pixel unit according to the pixel array structure are different, and the first column and the second column alternate. Claim 9 In paragraph 2, the plurality of extension regions include a first extension region and a second extension region adjacent to each other, and the plurality of sub-regions include a first sub-region corresponding to the first extension region and a second sub-region corresponding to the second extension region, and when the first extension region and the second extension region are unfolded, the light emission pitch of pixels arranged adjacent to the boundary between the first display region and the intermediate region within the first sub-region, within the second sub-region, and between the first sub-region and the second sub-region is the same, and the light emission pitch of pixels arranged adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region is the same, a display panel. Claim 10 A display panel according to claim 9, wherein, in a bent state between the first extension region and the second extension region, the light emission pitch of pixels disposed adjacent to the end of the first extension region and the end of the second extension region within the first extension region, within the second extension region, and between the first extension region and the second extension region is the same. Claim 11 A display panel according to claim 10, wherein, in a bent state between the first extended region and the second extended region, the light emission pitch of pixels positioned adjacent to the boundary between the intermediate region and the extended regions, and the light emission pitch of pixels positioned adjacent to the end of the first extended region and the end of the second extended region are the same. Claim 12 delete Claim 13 A display panel; and a cover window disposed on the display panel; wherein the display panel comprises a substrate including a first display area and a second display area; and a plurality of pixels disposed in the first display area and the second display area of ​​the substrate; wherein the first display area comprises a planar central area, a first area adjacent to the first direction of the central area, and a second area adjacent to the second direction intersecting the first direction of the central area; the second display area comprises a corner area between the first area and the second area, and the corner area comprises an intermediate area adjacent to the first display area; A display device comprising: a plurality of mutually spaced linear extension regions extending from the intermediate region in a direction away from the first display region; wherein the intermediate region comprises a plurality of sub-regions corresponding to each of the plurality of extension regions, each of the plurality of sub-regions is radial, and in each of the plurality of extension regions, a pixel unit, which is a set of a plurality of pixels, is arranged along a plurality of parallel columns, and in each of the plurality of sub-regions, the pixel unit is arranged along a plurality of radial columns. Claim 14 A display device according to claim 13, wherein a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region are arranged in the same manner as the reference pixel. Claim 15 A display device according to claim 13, wherein a pixel placed in a column with a radiation angle of 0 in the intermediate region is a reference pixel, and pixels placed in each of the plurality of columns of each extended region are arranged by rotating by the radiation angle of the corresponding column of the corresponding sub-region relative to the reference pixel. Claim 16 A display device according to claim 13, wherein the pixel arrangement structure of the plurality of pixels of the pixel unit is identical or different from the pixel arrangement structure of the first display area, and the pixel arrangement structure of the plurality of pixels of the pixel unit includes a Pentile structure, a Stripe structure, or an S-Stripe structure. Claim 17 A display device according to claim 16, wherein the plurality of pixels include a first pixel, a second pixel, and a third pixel that emit different colors, and in each extended area, a plurality of columns include a first column and a second column in which the positions of the first to third pixels arranged within the pixel unit according to the pixel array structure are different, and the first column and the second column alternate. Claim 18 A display device according to claim 13, wherein the plurality of extension regions include a first extension region and a second extension region adjacent to each other, and the plurality of sub-regions include a first sub-region corresponding to the first extension region and a second sub-region corresponding to the second extension region, and when the first extension region and the second extension region are unfolded, the light emission pitch of pixels arranged adjacent to the boundary between the first display region and the intermediate region within the first sub-region, within the second sub-region, and between the first sub-region and the second sub-region is the same, and the light emission pitch of pixels arranged adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region is the same. Claim 19 A display device according to claim 18, wherein, when the first extension region and the second extension region are bent, the light emission pitch of pixels disposed adjacent to the end of the first extension region and the end of the second extension region within the first extension region, within the second extension region, and between the first extension region and the second extension region is the same. Claim 20 A display device according to claim 19, wherein, when the first extension region and the second extension region are bent, the light emission pitch of pixels disposed adjacent to the boundary between the intermediate region and the extension regions within the first extension region, within the second extension region, and between the first extension region and the second extension region, and the light emission pitch of pixels disposed adjacent to the end of the first extension region and the end of the second extension region are the same.

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