Substrate for optical device and method of manufacturing the same, optical device including substrate for optical device and manufacturing the same and electronic apparatus including optical device

Abstract

A substrate for an optical device and a method for manufacturing the same, an optical device including the substrate and a method for manufacturing the same, and an electronic device including the optical device are disclosed. The disclosed substrate for an optical device (high-quality substrate) comprises a silicon layer, a multilayer buffer layer provided on the silicon layer, and an InP layer provided on the multilayer buffer layer, wherein the crystal growth direction of the silicon layer is a direction inclined with respect to the vertical direction, and the multilayer buffer layer comprises a buffer layer having a crystal growth direction inclined with respect to the vertical direction. The crystal growth direction of the silicon layer may be inclined by approximately 1° to 10°. The multilayer buffer layer comprises a first buffer layer formed on the silicon layer, a second buffer layer formed on the first buffer layer, and a third buffer layer formed on the second buffer layer, wherein the crystal growth direction of the first buffer layer may be inclined with respect to the vertical direction.

Description

Technology Field

[0001] The present disclosure relates to a substrate for an optical device and its application, and more specifically, to a substrate for an optical device and a method for manufacturing the same, an optical device including the substrate and a method for manufacturing the same, and an electronic device including the optical device. Background Technology

[0002] InGaAs avalanche photodiode (APD) chips are fabricated using InP substrates, but InP substrates are more expensive than silicon substrates. Therefore, when fabricating APD chips using InP substrates, the manufacturing cost of the chip is inevitably higher.

[0003] To fabricate InGaAs APD chips on a silicon substrate, it is necessary to form a single-crystal InP surface. However, even if a method of gradually increasing the lattice constant is applied, it is difficult to form a high-quality InP surface because defects occurring at the interface with the silicon substrate cannot be reduced. The problem to be solved

[0004] An exemplary embodiment provides a high-quality substrate for manufacturing high-performance optical devices.

[0005] An exemplary embodiment provides a substrate for an optical device that can lower manufacturing costs.

[0006] An exemplary embodiment provides a photonic element formed on such a substrate.

[0007] An exemplary embodiment provides a method for manufacturing such a substrate and an optical device.

[0008] An exemplary embodiment provides an electronic device comprising such a light element. means of solving the problem

[0009] A substrate for an optical device according to an exemplary embodiment comprises a silicon layer, a multilayer buffer layer provided on the silicon layer, and an InP layer provided on the multilayer buffer layer, wherein the crystal growth direction of the silicon layer is a direction tilted 1° to 10° with respect to the vertical direction, and the multilayer buffer layer comprises a buffer layer having a crystal growth direction tilted with respect to the vertical direction.

[0010] In one example, the multilayer buffer layer comprises a first buffer layer formed on the silicon layer, a second buffer layer formed on the first buffer layer, and a third buffer layer formed on the second buffer layer, and the crystal growth direction of the first buffer layer may be inclined with respect to the vertical direction.

[0011] In one example, the crystal growth direction of the first buffer layer may be tilted about 1° to 10° with respect to the vertical direction.

[0012] In one example, the first buffer layer may include a Ge layer with a thickness of 0.01 μm to 100 μm.

[0013] In one example, the second buffer layer may be a single layer or a multilayer including at least a GaAs layer with a thickness of 0.01 μm to 100 μm.

[0014] In one example, the third buffer layer may include a superlattice layer.

[0015] In one example, the third buffer layer comprises a first layer and a second layer formed on the first layer, and the first and second layers are alternately stacked, and the first and second layers may each be superlattice layers. One of the first and second layers may comprise a GaAs layer, an InGaAs layer, or an InGaAlAs layer, and the other layer may comprise an AlAs layer, an InAlAs layer, or an InGaAlAs layer.

[0016] In one example, the InP layer may include an n+InP layer with a thickness of 0.01㎛ to 100㎛. The InP layer may be a single layer or a multilayer.

[0017] An optical device according to an exemplary embodiment comprises a substrate, a first laminate provided on the substrate, a second laminate facing the first laminate, and an absorption layer with a thickness of 0.05 μm to 20 μm disposed between the first and second laminates, and the substrate comprises a high-quality substrate (substrate for an optical device) according to the exemplary embodiment.

[0018] In one example, the first laminate may be configured to function as a charge multiplication layer and may include an n-type doping layer, a non-doping layer provided on the n-type doping layer, and a p-type doping layer provided on the non-doping layer.

[0019] In one example, the second laminate may include a first p-type doping layer provided on the absorption layer and acting as a light-receiving layer, and a second p-type doping layer provided on the first p-type doping layer and acting as a p-type electrode contact.

[0020] In one example, a relaxation layer that alleviates the band gap difference between the laminate and the absorption layer may be further provided between at least one of the first and second laminates and the absorption layer.

[0021] A method for manufacturing a substrate for an optical device according to an exemplary embodiment comprises forming a silicon layer having a crystal growth direction inclined at a given angle with respect to the vertical direction, forming a multilayer buffer layer on the silicon layer, and forming an InP layer on the multilayer buffer layer, wherein the buffer layer formed directly on the silicon layer among the multilayer buffer layers is grown in the crystal growth direction having the silicon layer to reduce defects at the interface between the silicon layer and the buffer layer.

[0022] In one example, the multilayer buffer layer and the InP layer can be formed by an epitaxial growth method.

[0023] In one example, the process of forming the multilayer buffer layer may include the process of growing a first buffer layer on the silicon layer, the process of growing a second buffer layer formed on the first buffer layer, and the process of growing a third buffer layer formed on the second buffer layer.

[0024] In one example, the process of growing the second buffer layer may include a first step of growing a portion of the second buffer layer and a second step of growing the remainder of the second buffer layer under conditions different from those of the first step. The conditions of the first step (temperature, pressure, speed, and / or time) may be different from the conditions of the second step.

[0025] In one example, the process of forming the InP layer may include a first step of growing a portion of the InP layer under a first condition and a second step of growing the remainder of the InP layer under a second condition different from the first condition. The first condition and the second condition may include at least one of a temperature condition, a pressure condition, a rate condition, and a time condition.

[0026] A method for manufacturing an optical device according to an exemplary embodiment comprises the steps of forming a substrate, forming a first laminate on the substrate, forming an absorption layer on the first laminate, and forming a second laminate on the absorption layer, wherein the substrate is formed by the method for manufacturing a substrate for an optical device according to the exemplary embodiment.

[0027] In one example, the first laminate, the absorption layer, and the second laminate can be formed by an epitaxial growth method. An undoped InGaAlAs layer can be formed between the first laminate and the absorption layer. An undoped InGaAlAs layer can be formed between the second laminate and the absorption layer.

[0028] A lidar according to an exemplary embodiment comprises a light emitting unit that emits light in the form of a pulse or a continuous wave to the outside, a light modulating unit that provides a light modulation signal to the light emitting unit, a light detector that detects light incident from the outside and generates an electrical signal, a signal processing unit that processes the signal generated by the light detector, a calculation unit that performs a calculation operation to determine the distance to a subject, and a control unit that controls the operation of the light emitting unit, the light modulating unit, the light detector, the calculation unit, and the signal processing unit, wherein the light detector includes a light element according to the exemplary embodiment.

[0029] In one example, the optical modulation signal may include an amplitude modulation signal or a frequency modulation signal.

[0030] An electronic device according to an exemplary embodiment is an electronic device comprising a photoelectric conversion element, wherein the photoelectric conversion element comprises a photoelectric element according to the exemplary embodiment. Effects of the invention

[0031] In the case of the disclosed substrate for an optical device, it is a silicon-based InP substrate, and a multilayer buffer is formed between a lower silicon layer and an upper InP layer. Unlike a conventional silicon layer, the crystal growth direction of the lower silicon layer is inclined at a given angle from the vertical direction. Due to the interaction of this silicon layer and the multilayer buffer, lattice mismatch of each layer can be reduced during the formation process of the substrate, thereby minimizing or preventing the formation of defects at the interfaces of each layer. As a result, an InP substrate having a high-quality surface while being silicon-based can be formed.

[0032] Therefore, when manufacturing an optical device (e.g., avalanche photodiode) using the disclosed InP substrate for optical devices, an optical device with superior performance compared to existing ones can be manufactured.

[0033] In addition, since the disclosed high-quality substrate is silicon-based, it is possible to directly fabricate III-V compound semiconductor photodetector devices on the silicon substrate and apply them to a system, thereby facilitating the manufacturing process and lowering the manufacturing cost. Brief explanation of the drawing

[0034] FIG. 1 is a cross-sectional view showing a substrate for manufacturing an optical device, that is, a substrate for an optical device, according to an exemplary embodiment. Figure 2 is a cross-sectional view showing an example of the layer structure of the third buffer layer of Figure 1. FIG. 3 is a cross-sectional view showing an optical device including a substrate according to an exemplary embodiment. FIG. 4 is a cross-sectional view showing an example of the layer configuration of the first stack of the optical element of FIG. 3. FIG. 5 is a cross-sectional view showing the case where a relaxation layer is provided on the upper and lower parts of the absorption layer in the optical element of FIG. 3. FIG. 6 shows a first optical element in the form of a chip formed on a substrate according to an exemplary embodiment, and is a cross-sectional view taken by cutting FIG. 7 in the 6-6' direction. Figure 7 is a plan view of Figure 6. FIG. 8 shows scanning electron microscope (SEM) images of a substrate for an optical device according to an exemplary embodiment and a conventional substrate for an optical device. Figure 9 is an SEM image of the optical device of Figure 3, showing the SEM image when the thickness of the InGaAs absorption layer is about 1 μm. Figure 10 shows the X-ray diffraction (XRD) spectrum measured during the early stages of fabrication of the optical device that was the subject of the SEM image in Figure 9. Figure 11 shows the X-ray diffraction spectrum measured for the final completed form of the optical device that was the subject of the SEM image of Figure 9. Figure 12 is an SEM image of the optical device of Figure 3, showing the SEM image when the thickness of the InGaAs absorption layer is about 2 μm. Figure 13 shows the X-ray diffraction spectrum measured for the final completed form of the optical device that was the subject of the SEM image of Figure 12. FIG. 14 is a cross-sectional view showing an imaging system as an example of an electronic device including a light element according to an exemplary embodiment. FIG. 15 is a block diagram showing a LiDAR as an example of an electronic device according to an exemplary embodiment. FIG. 16 is a block diagram showing an electronic device according to an exemplary embodiment. FIG. 17 is a block diagram showing the schematic configuration of a camera module equipped in the electronic device of FIG. 16. FIG. 18 is a block diagram showing the schematic configuration of a 3D sensor equipped in the electronic device of FIG. 16. Specific details for implementing the invention

[0035] Hereinafter, a substrate for an optical device and a method for manufacturing the same according to exemplary embodiments, an optical device including said substrate and a method for manufacturing the same, and an electronic device including said optical device will be described in detail with reference to the attached drawings.

[0036] The method for manufacturing the above substrate is described together with the process of describing the above substrate, and the method for manufacturing the above optical device is also described together with the process of describing the above optical device.

[0037] In the following description, the thicknesses of the layers or regions depicted in the drawings may be somewhat exaggerated for the sake of clarity of the specification. Furthermore, the embodiments described below are merely illustrative, and various modifications are possible from these embodiments. Additionally, in the layer structures described below, expressions such as "top" or "top" may include not only those directly above in contact but also those above non-contact. In the description below, the same reference numeral in each drawing indicates the same component.

[0038] First, the substrate for optical devices will be explained.

[0039] FIG. 1 shows a substrate (100) for manufacturing an optical device according to an exemplary embodiment. In one example, the substrate (100) may be a substrate for an APD, but is not limited to such use. The substrate (100) may be a substrate formed based on silicon.

[0040] Referring to FIG. 1, the substrate (100) includes a lower layer (110), a first buffer layer (120), a second buffer layer (130), a third buffer layer (140), and an upper layer (150) that are sequentially stacked. The lower layer (110) may be a semiconductor layer or may include a semiconductor layer. For example, the lower layer (110) may be a silicon (Si) layer or may include a silicon layer, but is not limited thereto. In one example, the lower layer (110) may include a silicon layer in which the crystal growth direction is off-axis from the vertical direction; for example, the lower layer (110) may include a silicon layer in which the crystal growth direction is tilted 1° to 10° from the vertical direction. The layer structure or layer configuration of the first to third buffer layers (120, 130, 140) may differ from one another. The first to third buffer layers (120, 130, 140) may be collectively referred to as multilayer buffer layers. In one example, the multilayer buffer layer may include a buffer layer or material layer that has a different layer composition or layer structure from the first to third buffer layers (120, 130, 140). In one example, the first buffer layer (120) may be a semiconductor layer or may include a semiconductor layer. In one example, the first buffer layer (120) may be a germanium (Ge) layer or may include a germanium layer, but is not limited thereto. As the first buffer layer (120) grows on the lower layer (110) having a tilted crystal growth direction, the crystal growth direction of the first buffer layer (120) also becomes tilted. For example, the crystal growth direction of the first buffer layer (120) may also be tilted by about 1° to 10° with respect to the vertical direction. As the first buffer layer (120) is formed on the lower layer (110) having a tilted crystal growth direction, the APB (Anti-Phase Boundary) dislocation at the interface between the lower layer (110) and the first buffer layer (120) can be reduced. In one example, the thickness of the first buffer layer (120) may be about 0.1 μm to 5 μm.The first buffer layer (120) may be formed on the lower layer (110) by a method such as epitaxial growth, but is not limited to this method. The second buffer layer (130) may be a semiconductor layer or may include a semiconductor layer. In one example, the second buffer layer (130) may include a compound semiconductor layer. In one example, the second buffer layer (130) may be a GaAs layer or may include a GaAs layer. In one example, the thickness of the second buffer layer (130) may be approximately 0.1 μm to 5 μm. The second buffer layer (130) may be formed on the first buffer layer (120) by an epitaxial growth and growth method, but is not limited to this method. The second buffer layer (130) may be a single layer or a multilayer.

[0041] The third buffer layer (140) may be formed to include multiple layers or may be formed as a layer structure including multiple layers. In one example, the third buffer layer (140) may have a multilayer structure including a semiconductor layer. In one example, the third buffer layer (140) may be a multilayer structure including a compound semiconductor layer. In one example, the multilayer structure of the third buffer layer (140) may be formed by repeatedly alternating stacking superlattice layers of different materials. For example, the third buffer layer (140) may include a multilayer structure in which a first layer (2a), which is a superlattice layer, and a second layer (2b), which is a superlattice layer, are repeatedly alternately stacked as shown in FIG. 2. In one example, the first layer (2a) and the second layer (2b) may each be formed to have a thickness of about 1 nm to 10 nm. In one example, the first layer (2a) may include a GaAs layer and the second layer (2b) may include an AlAs layer, but is not limited to these materials. In one example, the number of alternating cycles of the first and second layers (2a, 2b) may be about 5 to 100 times, but is not limited thereto, and the number of alternating cycles may increase or decrease as needed. In one example, the third buffer layer (140) may be formed on the second buffer layer (130) by an epitaxial growth method, but is not limited to this method. The upper layer (150) is the top layer of the substrate (100) and may serve as a contact layer or a buffer layer. In one example, the upper layer (150) may be an InP layer or include an InP layer, but is not limited thereto. By growing the upper layer (150) on the third buffer layer (140) having a superlattice layer structure, the dislocation caused by lattice mismatch at the interface between the third buffer layer (140) and the upper layer (150) can be reduced. In this regard, the third buffer layer (140) may be described as a material layer that reduces lattice mismatch or a lattice mismatch reduction layer. In one example, the upper layer (150) is 0.It can be formed to have a thickness of approximately 5㎛ to 20㎛. In one example, during the process of forming the upper layer (150), a portion of the thickness (e.g., 0.01㎛ to 10㎛) may be doped with a dopant. In one example, a thickness corresponding to the portion of thickness doped with the dopant may be grown separately on the upper layer (150). In one example, the upper layer (150) may be a single layer or a multilayer.

[0042] When the second buffer layer (130) and the upper layer (150) are each formed as multiple layers, the growth temperature, growth pressure, and / or growth time of each layer forming the multiple layers may differ from each other. For example, when the second buffer layer (130) is formed by sequentially stacking a first GaAs layer and a second GaAs layer using an epitaxial growth method, the first GaAs layer may be grown in the first step and the second GaAs layer may be grown in the second step. The process conditions (temperature, pressure, and / or time) of the first and second steps may differ from each other. For example, the first step may be performed at a first temperature and the second step may be performed at a second temperature. The first and second temperatures are different. Therefore, one of the first and second steps may be performed at a relatively low temperature, and the other step may be performed at a relatively high temperature. When growing the upper layer (150) as multiple layers, it may be performed in the same manner as the second buffer layer (130). The above first and second temperatures may be first and second pressures, and may be first and second times.

[0043] The first to third buffer layers (120, 130, 140) may be collectively referred to as buffer layers, or may be referred to as buffer layers including the upper layer (150). A substrate (100) including a silicon-based compound semiconductor layer and an InP layer may be referred to as a Meta Morphic (MM) buffer layer.

[0044] Next, an optical device including such a substrate (100) will be described.

[0045] FIG. 3 shows an optical element (300) including a substrate according to an exemplary embodiment. In one example, the optical element (300) may be an APD.

[0046] Referring to FIG. 3, the optical element (300) may include a substrate (310), a first laminate (E1), an absorption layer (330), and a second laminate (E2) that are sequentially stacked. The optical element (300) may be formed by preparing a substrate (310), growing a first laminate (E1) on the prepared substrate (310), then growing an absorption layer (330) on the first laminate (E1), and then growing a second laminate (E2) on the absorption layer (330). An epitaxial growth method may be used for growing each layer, but is not limited to this method.

[0047] In one example, the substrate (310) may be the substrate (100) of FIG. 1 or may include the substrate (100). One of the first and second laminates (E1, E2) may include an n-type contact (electrode) and the other may include a p-type contact (electrode). In one example, the first laminate (E1) may include a multilayer structure consisting of first to fourth layers (32a-32d) sequentially stacked as shown in FIG. 4, but is not limited to four layers.

[0048] Referring to FIG. 4, the first layer (32a) is formed directly on the substrate (310) and may be in direct contact with the substrate (310). For example, the first layer (32a) is a dopant-doped layer and may be formed directly on the upper layer (150) of the substrate (100) of FIG. 1 by an epitaxial growth method, but is not limited to this method. In one example, the first layer (32a) may be an n+InP layer. The first layer (32a) may also be represented as a first cladding layer or an n+ cladding layer. In one example, the first layer (32a) may be formed to have a thickness of approximately 0.01 μm to 10 μm.

[0049] Meanwhile, if the area in contact with the first laminate (E1) of the uppermost layer of the substrate (310) is an n+InP layer, the first layer (32a) of the first laminate (E1) may be omitted.

[0050] The second layer (32b) is a dopant-doped layer and can be formed directly on the first layer (32a) by an epitaxial growth method, but is not limited to this method. In one example, the second layer (32b) may be an n+InAlAs layer or may include this layer. In one example, the second layer (32b) may be formed to have a thickness of about 0.05 μm to 1 μm. In one example, if the first layer (32a) is omitted, the second layer (32b) may be grown directly on the substrate (310).

[0051] In one example, the third layer (32c) may be an undoped layer formed on the second layer (32b). The third layer (32c) may be formed by an epitaxial growth method, but is not limited to this method. In one example, the third layer (32c) may be an undoped InAlAs layer or may include such a layer, but is not limited to this layer. In one example, the third layer (32c) may be formed to have a thickness of approximately 0.05 μm to 1 μm. The fourth layer (32d) may be a dopant-doped layer grown on the third layer (32c) by an epitaxial growth method. In one example, the fourth layer (32d) may be a p-InAlAs layer or may include such a layer, but is not limited to this layer. In one example, the fourth layer (32d) may be formed to have a thickness of approximately 0.05 μm to 1 μm. The second to fourth layers (32b-32d), which are avalanche regions, can act as charge multiplication layers that amplify the charge collected in the absorption layer (330).

[0052] The first laminate (E1) may have the entirety of the first to fourth layers (32a-32d) (or the entirety of the second to fourth layers (32b-32d) if the first layer (32a) is omitted) used as an electrode layer or an electrode contact layer, but the topmost fourth layer (32d) may also be used as an electrode contact layer.

[0053] The absorption layer (330) of FIG. 3 may be a layer that collects charges (e.g., electrons) generated by the photoelectric effect in the light-receiving layer included in the second laminate (E2). In one example, the absorption layer (330) may be an undoped layer, such as an InGaAs layer or may include such a layer. In one example, the absorption layer (330) may be formed with a thickness of approximately 0.1 μm to 5 μm. This absorption layer (330) may be formed by an epitaxial growth method, but is not limited to this method. In one example, the absorption layer (330) may be a single layer or a multilayer.

[0054] The second laminate (E2) may include first and second doping layers (340, 350) formed sequentially, but is not limited to these two doping layers and may include other layers (undoped layer or doping layer). The first doping layer (340) may be formed on the absorption layer (330) by an epitaxial growth method, but is not limited to this method. The first doping layer (340) may act as a light-receiving layer that receives incident light, and accordingly, electrons may be generated in the first doping layer (340) due to the photoelectric effect. In one example, the first doping layer (340) may include a material layer that exhibits a photoelectric effect superior to incident light of the first wavelength compared to other wavelengths. In one example, the first wavelength may belong to the infrared band, but may also belong to the visible light band or the ultraviolet band. If the first wavelength belongs to the infrared band, the first wavelength may belong to the short wavelength infrared (SWIR) band. In one example, the first doping layer (340) may be a material layer doped with a p-type dopant or may include such a material layer. For example, the first doping layer (340) may be a p-InAlAs layer or may include this layer. In one example, the first doping layer (340) may be grown to a thickness of about 0.1 μm to 2 μm. In one example, the second doping layer (350) may be grown on the first doping layer (340) by an epitaxial growth method, but is not limited to this method. In one example, the second doping layer (350) may be formed as a p-type electrode layer or a p-type electrode contact layer. In one example, the second doping layer (350) may be a p-type InGaAs layer or may include this layer. In one example, the p-type InGaAs layer may be a p+InGaAs layer. In one example, the second doping layer (350) may be grown to a thickness of about 0.01 μm to 0.2 μm. In one example, the entire second laminate (E2) may be used as an electrode layer or an electrode contact layer, but the uppermost second doping layer (350) may be used as an electrode contact layer.

[0055] In one example, as illustrated in FIG. 5, a first relaxation layer (graded layer) (520) may be provided on the first laminate (E1) and the absorption layer (330), and a second relaxation layer (540) may be provided between the absorption layer (330) and the first doping layer (340). In one example, only one of the first and second relaxation layers (520, 540) may be provided. In one example, the first and second relaxation layers (520, 540) may be formed by an epitaxial growth method, but are not limited to this method. In one example, the first relaxation layer (520) may be formed with a thickness of approximately 0.001 μm to 0.2 μm. In one example, the second relaxation layer (540) may be formed with a thickness of approximately 0.001 μm to 0.2 μm.

[0056] By providing the first and second relaxation layers (520, 540), the band gap between the absorption layer (330) and the fourth layer (32d) of the first laminate (E1) can be relaxed, and the band gap between the absorption layer (330) and the first doping layer (340) of the second laminate (E2) can be relaxed. The first and second relaxation layers (520, 540) can act to lower the band gap between two layers adjacent to themselves. In one example, the first relaxation layer (520) may be an undoped layer, such as an InGaAlAs layer or including this layer. The second relaxation layer (540) may be an undoped layer, such as an InGaAlAs layer or including this layer.

[0057] FIG. 6 shows a chip-shaped optical element (600) formed on a substrate according to an exemplary embodiment. In the following, reference numerals identical to those mentioned above represent the same components described, and descriptions thereof are omitted.

[0058] Referring to FIG. 6, an n-type electrode layer (620) is provided on a portion of the substrate (310). The remaining portion of the substrate (310) is covered with an insulating layer (650). In one example, the insulating layer (650) may include a polyimide layer, but is not limited thereto. The n-type electrode layer (620) may correspond to the first layer (32a) of FIG. 4. In one example, the n-type electrode layer (620) may be a portion of the substrate (310) that is doped.

[0059] A charge multiplier layer (630), an absorption layer (330), a first doping layer (340), and a second doping layer (350) are sequentially stacked on a portion of the n-type electrode layer (620). The remaining portion of the n-type electrode layer (620) is covered with an insulating layer (650). The sides of the charge multiplier layer (630), the absorption layer (330), the first doping layer (340), and the second doping layer (350) are also covered with an insulating layer (650). The charge multiplier layer (630) may correspond to the second to fourth layers (32b-32d) of FIG. 4. The second doping layer (350) is a p-type electrode contact layer, on which an electrode layer (6E2) exists. The electrode layer (6E2) may be a conductive layer. The electrode layer (6E2) is provided on the edge of the second doping layer (350) and is in direct contact with the second doping layer (350). Since the electrode layer (6E2) is in contact with the second doping layer (350), which is a p-type electrode contact layer, it may be described as a p-type electrode layer. A first electrode pad (6P1) is provided on an insulating layer (650) that covers the remaining area of ​​the n-type electrode layer (620). A via hole (6H1) is formed in the insulating layer (650) between the first electrode pad (6P1) and the n-type electrode layer (620), and the via hole (6H1) is filled with a conductive plug (670). Consequently, the first electrode pad (6P1) and the n-type electrode layer (620) are connected to each other by the conductive plug (670). Since the first electrode pad (6P1) is connected to the n-type electrode layer (620), it may be described as an n-type electrode pad.

[0060] Figure 7 is a plan view of Figure 6. Figure 6 may be a cross-section obtained by cutting Figure 7 in the 6-6' direction.

[0061] Referring to FIGS. 6 and 7, the electrode layer (6E2) is positioned along the edge of the second doping layer (350) and is arranged in a rectangular shape. The inner region (window) (7W1) of the electrode layer (6E2) of the second doping layer (350) is a region where light is received, and light incident on this region (7W1) passes through the second doping layer (350) and is incident on the first doping layer (340), which is the light receiving layer. To this end, the second doping layer (350) may be a material layer that is transparent to incident light. Since it is advantageous for as much light as possible to be incident on the light receiving layer, the electrode layer (6E2) may be positioned on the second doping layer (350) so that the occupied area is minimized. A second electrode pad (6P2) is positioned at a location spaced apart from the second doping layer (350). The second electrode pad (6P2) may be arranged parallel to the first electrode pad (6P1), but is not limited thereto. The second electrode pad (6P2) is connected to the electrode layer (6E2). Since the second electrode pad (6P2) is connected to the second doping layer (350), which is a p-type electrode layer, through the electrode layer (6E2), the second electrode pad (6P2) may be represented as a p-type electrode pad. The planar shape of the first and second electrode pads (6P1, 6P2) is rectangular, but is not limited to a rectangular shape and may have other shapes.

[0062] FIG. 8 shows scanning electron microscope (SEM) images of a substrate for an optical device according to an exemplary embodiment and a conventional substrate for an optical device.

[0063] In FIG. 8, (a) is a scanning electron microscope image of a conventional optical device substrate in which an InP buffer layer is directly grown on a Si substrate, and (b) is a scanning electron microscope image of an optical device substrate according to an exemplary embodiment.

[0064] Comparing (a) and (b) of FIG. 8, in case (a), it can be seen that many dislocations (85) caused by lattice mismatch during the growth process occurred, but in case (b), where InP was grown by applying multiple buffers, it can be seen that the dislocations caused by lattice mismatch during the growth process were greatly reduced. These results suggest that the substrate for an optical device according to an exemplary embodiment is a relatively high-quality substrate compared to conventional substrates for optical devices.

[0065] Figure 9 is an SEM image of the optical device (avalanche photodiode) of Figure 3, showing the SEM image when the thickness of the undoped InGaAs absorption layer is about 1 μm.

[0066] Figure 10 shows the X-ray diffraction (XRD) spectrum measured during the early stages of fabrication of the optical device that was the subject of the SEM image in Figure 9.

[0067] Figure 11 shows the X-ray diffraction spectrum measured for the final completed form of the optical device that was the subject of the SEM image of Figure 9.

[0068] Referring to FIGS. 9 to 11, in the initial stage of manufacturing the optical device, a fourth peak (P4 in FIG. 10) due to lattice mismatch appears in addition to the first to third peaks (P1-P3) as shown in FIG. 10, but in the case of the final completed optical device, only the first to third peaks (P1-P3) appear as shown in FIG. 11. These results suggest that all layers constituting the optical device, such as InGaAs and InAlAs, have lattice matched with the InP layer.

[0069] Figure 12 is an SEM image of the optical device (avalanche photodiode) of Figure 3, showing the SEM image when the thickness of the undoped InGaAs absorption layer is about 2 μm.

[0070] Figure 13 shows the X-ray diffraction spectrum measured for the final completed form of the optical device that was the subject of the SEM image of Figure 12.

[0071] The X-ray diffraction spectrum of Fig. 13 contains only the first to third peaks (P11-P33), and the positions of the first to third peaks (P11-P33) are the same as the positions of the first to third peaks (P1-P3) of Fig. 12.

[0072] These results of FIG. 13 suggest that even when the thickness of the absorption layer (330) of the optical device of FIG. 3 is about 2 μm, all layers constituting the optical device, such as InGaAs and InAlAs, are lattice-matched with the InP layer.

[0073] FIG. 14 shows an imaging system (1400) as an example of an electronic device including a light element according to an exemplary embodiment. The imaging system (1400) may be a camera.

[0074] Referring to FIG. 14, the imaging system (1400) includes a substrate (1410), an image sensor (1420), a filter (1430), and a lens unit (1440). The substrate (1410) may include a circuit for driving the image sensor (1420) and a readout IC. The image sensor (1420) may include a plurality of light-receiving elements. The plurality of light-receiving elements may form an array. The plurality of light-receiving elements may be photoelectric conversion elements. In one example, the light-receiving elements may be the light element of FIG. 3, which is an example of a photoelectric conversion element, or may include such a light element. The filter (1430) blocks a portion of the incident light so that only light of a specific wavelength or light of a specific wavelength band is incident on the image sensor (1420). In one example, the filter (1430) may be a filter that passes at least one of infrared, visible light, and ultraviolet light. In one example, the lens portion (1440) may include a lens optical system or lens system that focuses incident light. The lens optical system may include a single lens or a plurality of lenses.

[0075] FIG. 15 shows a LiDAR (1500) as an example of an electronic device according to an exemplary embodiment. In one example, the LiDAR (1500) may be a vehicle LiDAR, but is not limited thereto.

[0076] Referring to FIG. 15, the lidar (1500) includes a light emitting unit (1510) that emits light to a subject (1505), a modulation unit (1520), a light receiving unit (1530) that receives light reflected from the subject (1505), a calculation unit (1540) that performs a calculation operation to determine the distance to the subject (1505), and a control unit (1550) that controls the operation of each part of the lidar (1500). The subject (1505) may be a fixed subject (hereinafter, fixed body) or a moving or movable subject (hereinafter, movable body). The subject (1505) may be a natural object or an artificial object. The definitions of the fixed body and the movable body may be relative depending on whether the lidar (1500) is fixed or moving. The light emitting unit (1510) includes a light source (1510A) that emits light toward a subject (1505). The light emitted from the light emitting unit (1510) toward the subject (1505) may be in the form of a continuous wave or pulsed light (hereinafter, light pulse). The light pulse may be emitted periodically. The light pulse may be, for example, a laser pulse. The light source (1510A) included in the light emitting unit (1500) may include, for example, a laser diode. In one example, the light source (1510A) may include a light source that emits a continuous light wave.

[0077] The modulation unit (1520) is connected to the light emission unit (1510) and the control unit (1550). The modulation unit (1520) may have a configuration that applies a modulation signal (e.g., an amplitude modulation signal or a frequency modulation signal) to the light emission unit (1510). The modulation unit (1520) may also be directly connected to the light source (1510A) of the light emission unit (1510). The modulation signal applied from the modulation unit (1520) to the light emission unit (1510) may be generated using a randomly generated look-up table (LUT). Additionally, the modulation signal may be generated using a unique value or signal given or assigned to the lidar (1500). In this way, a unique modulation operation can be performed for each lidar, and the light pulses generated for each lidar may have a unique pattern, thereby preventing interference between lidars. The modulation unit (1520) may include an optical modulation device for amplitude modulation or frequency modulation. The light receiving unit (1530) is connected to the calculation unit (1540). The light receiving unit (1530) receives light reflected from the subject (1505) and generates an electrical signal. The electrical signal generated by the light receiving unit (1530) is transmitted to the calculation unit (1540). The light receiving unit (1530) may include photoelectric conversion elements forming an array. In one example, the photoelectric conversion elements may be the optical elements of FIG. 3 or include the optical elements of FIG. 3, but are not limited thereto. The calculation unit (1540) includes a Time to Digital Converter (TDC). The calculation unit (1540) uses the TDC to calculate the time delay based on the electrical signal given from the light receiving unit (1530) and calculates the distance between the LiDAR (1500) and the subject (1505). The above time delay refers to the time difference between the point in time when light is emitted from the light emitting unit (1510) toward the subject (1505) and the point in time when light reflected from the subject (1505) is received by the light receiving unit (1530). The operation of emitting light from the light emitting unit (1510) is controlled by the control unit (1550).The control unit (1550) simultaneously provides a light emission start signal to the light emission unit (1510) and the calculation unit (1540). In this way, the calculation unit (1540) can determine the time of light emission from the light emission unit (1510) and also determine the time of light reception based on the electrical signal provided by the light reception unit (1530), so the calculation unit (1540) can calculate the time delay. The calculation unit (1540) receives information regarding the modulated light pulse emitted from the light emission unit (1510) from the control unit (1550). Based on this information, the calculation unit (1540) calculates the time delay only for the modulated light pulse emitted from the light emission unit (1510) among the light received by the light reception unit (1530), and performs a distance calculation operation to the subject (1505). Distance information derived by the operation of the operation unit (1540) is given to the control unit (1550). The control unit (1550) can control the operation of other units (120, 130, 140) from the operation of the light emission unit (1510). The control unit (1550) may include a central processing unit. The control unit (1550) may also include a computer (PC). The LiDAR (1500) can be applied to various fields such as autonomous driving devices like vehicles or drones, depth cameras, robot navigation, military and medical fields, and the configuration of the control unit (1550) may vary slightly depending on the field of application.

[0078] A substrate for an optical device according to the exemplary embodiment described above, or an optical device including said substrate, can be applied to various electronic devices that require an optical device capable of photoelectric conversion, in addition to the electronic devices shown in FIGS. 13 and 14. For example, it can be mounted on electronic devices such as smartphones, wearable devices, AR and VR devices, Internet of Things (IoT) devices, home appliances, tablet PCs (Personal Computers), PDAs (Personal Digital Assistants), PMPs (Portable Multimedia Players), navigation systems, drones, robots, unmanned vehicles, autonomous vehicles, and Advanced Driver Assistance Systems (ADAS).

[0079] FIGS. 16 to 18 show some examples of such electronic devices.

[0080] FIG. 16 shows a schematic configuration of an electronic device according to an exemplary embodiment.

[0081] Referring to FIG. 16, in a network environment (2200), the electronic device (2201) includes several devices and modules as illustrated.

[0082] One of the modules, the camera module (2280), can capture still images and video. In one example, the camera module (2280) may include the imaging system (1400) of FIG. 14. In one example, the camera module (2280) may include a member (e.g., a window assembly) that collects incident light and focuses it at a given location, image sensors, image signal processors, and / or flashes. The image sensors may include a plurality of photoelectric conversion elements. In one example, the photoelectric conversion elements may include the light elements of FIG. 3 to FIG. 5.

[0083] The power management module (2288) can manage the power supplied to the electronic device (2201). The power management module (388) can be implemented as part of a Power Management Integrated Circuit (PMIC).

[0084] The battery (2289) can supply power to the components of the electronic device (2201). The battery (2289) may include a non-rechargeable primary battery, a rechargeable secondary battery and / or a fuel cell.

[0085] The communication module (2290) can support the establishment of a direct (wired) communication channel and / or a wireless communication channel between an electronic device (2201) and another electronic device (electronic device (2102), electronic device (2104), server (2108), etc.), and the performance of communication through the established communication channel. The communication module (2290) may include one or more communication processors that operate independently of the processor (2220) (application processor, etc.) and support direct communication and / or wireless communication. The communication module (2290) may include a wireless communication module (2292) (cellular communication module, short-range wireless communication module, GNSS (Global Navigation Satellite System, etc.) communication module) and / or a wired communication module (2294) (LAN (Local Area Network) communication module, power line communication module, etc.). Among these communication modules, the corresponding communication module can communicate with other electronic devices through a first network (2298) (a short-range communication network such as Bluetooth, WiFi Direct, or IrDA (Infrared Data Association)) or a second network (2299) (a long-range communication network such as a cellular network, the Internet, or a computer network (LAN, WAN, etc.). These various types of communication modules may be integrated into a single component (single chip, etc.) or implemented as multiple separate components (multiple chips). The wireless communication module (2292) can identify and authenticate an electronic device (2201) within a communication network such as the first network (2298) and / or the second network (2299) using subscriber information (such as an International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (2296).

[0086] The antenna module (2297) can transmit signals and / or power to or from the outside (other electronic devices, etc.). The antenna may include a radiator made of a conductive pattern formed on a substrate (PCB, etc.). The antenna module (2297) may include one or multiple antennas. If multiple antennas are included, the communication module (2290) may select an antenna suitable for a communication method used in a communication network, such as a first network (2298) and / or a second network (2299), from among the multiple antennas. Through the selected antenna, signals and / or power may be transmitted or received between the communication module (2290) and other electronic devices. In addition to the antenna, other components (RFIC, etc.) may be included as part of the antenna module (2297).

[0087] Some of the components can be connected to each other and exchange signals (commands, data, etc.) through communication methods between peripheral devices (bus, GPIO (General Purpose Input and Output), SPI (Serial Peripheral Interface), MIPI (Mobile Industry Processor Interface), etc.).

[0088] Commands or data may be transmitted or received between the electronic device (2201) and an external electronic device (2204) through a server (2108) connected to a second network (2299). The other electronic devices (2202, 2204) may be of the same or different type as the electronic device (2201). All or part of the operations performed on the electronic device (2201) may be performed on one or more of the other electronic devices (2202, 2204, 2208). For example, when the electronic device (2201) needs to perform a function or service, instead of performing the function or service itself, it may request one or more other electronic devices to perform part or all of that function or service. Upon receiving the request, one or more other electronic devices may perform additional functions or services related to the request and transmit the results of the execution to the electronic device (2201). To this end, cloud computing, distributed computing, and / or client-server computing technologies may be used.

[0089] FIG. 17 is a block diagram showing the schematic configuration of a camera module equipped in the electronic device of FIG. 16.

[0090] Referring to FIG. 17, the camera module (2280) may include a window assembly (2310), a flash (2320), an image sensor (2330), an image stabilizer (2340), a memory (2350) (such as a buffer memory), and / or an image signal processor (2360). The window assembly (2310) may collect light emitted from a subject that is the target of image capture and may include a filter layer and an anti-reflective film.

[0091] The camera module (2280) may include a plurality of window assemblies (2310), in which case the camera module (2280) may be a dual camera, a 360° camera, or a spherical camera. Some of the plurality of window assemblies (2310) may have the same optical characteristics (angle of view, focal length, autofocus, F-number, optical zoom, etc.) or may have different optical characteristics. The window assembly (2310) may include optical characteristics corresponding to a wide-angle lens or a telephoto lens.

[0092] The flash (2320) may emit light used to enhance light emitted or reflected from a subject. The flash (2320) may include one or more light-emitting diodes (RGB (Red-Green-Blue) LED, White LED, Infrared LED, Ultraviolet LED, etc.), and / or a Xenon lamp. The image sensor (2330) may acquire an image corresponding to a subject by converting light emitted or reflected from the subject and transmitted through the window assembly (2310) into an electrical signal. The image sensor (2330) may include the light elements described in FIGS. 3 through 5 as photoelectric conversion elements.

[0093] The image stabilizer (2340) may respond to the movement of the camera module (2280) or the electronic device (2301) containing it to move the window assembly (2310) or the image sensor (2330) in a specific direction or control the operational characteristics of the image sensor (2330) (such as adjusting the read-out timing) so as to compensate for the negative effects caused by the movement. The image stabilizer (2340) may detect the movement of the camera module (2280) or the electronic device (2301) using a gyroscope sensor (not shown) or an accelerometer sensor (not shown) placed inside or outside the camera module (2280). The image stabilizer (2340) may also be implemented optically.

[0094] The memory (2350) can store part or all of the data of an image acquired through the image sensor (2330) for the next image processing operation. For example, when multiple images are acquired at high speed, the acquired original data (Bayer-Patterned data, high-resolution data, etc.) can be stored in the memory (2350), and after displaying only the low-resolution image, the original data of the selected image (user selection, etc.) can be transmitted to the image signal processor (2360). The memory (2350) may be integrated into the memory (2230) of the electronic device (2201) or configured as a separate memory that operates independently. The memory (2350) may also include a restoration algorithm for an image restoration operation to be performed in the image signal processor (2360).

[0095] The image signal processor (2360) can perform one or more image processing operations on an image acquired through the image sensor (2330) or image data stored in memory (2350). One or more image processing operations may include depth map generation, 3D modeling, panorama generation, feature point extraction, image synthesis, image restoration, and / or image compensation (noise reduction, resolution adjustment, brightness adjustment, blurring, sharpening, softing, etc.). The image signal processor (2360) can perform control (exposure time control, or readout timing control, etc.) over components (image sensor (2330), etc.) included in the camera module (2280). The image processed by the image signal processor (2360) may be stored back in memory (2350) for further processing or provided to external components of the camera module (2280) (memory (2230), display device (2260), electronic device (2202), electronic device (2204), server (2208), etc.). The image signal processor (2360) may be integrated into the processor (2220) or configured as a separate processor operating independently of the processor (2220). If the image signal processor (2360) is configured as a separate processor from the processor (2220), the image processed by the image signal processor (2360) may be displayed through the display device (2260) after undergoing further image processing by the processor (2220).

[0096] The electronic device (2201) may include a plurality of camera modules (2280) each having different attributes or functions. In this case, one of the plurality of camera modules (2280) may be a wide-angle camera and another may be a telephoto camera. Similarly, one of the plurality of camera modules (2280) may be a front camera and another may be a rear camera.

[0097] FIG. 18 is a block diagram showing the schematic configuration of a 3D sensor equipped in the electronic device of FIG. 16.

[0098] The 3D sensor (2214) irradiates a subject with a predetermined light and receives and analyzes the light reflected from the subject to sense the shape, movement, etc. of the subject. The 3D sensor (2214) includes a light source (2420), a meta-optical element (2410), a light detection unit (2430), a signal processing unit (2440), and a memory (2450). As the meta-optical element (2410), a meta-optical element with a phase profile set to function as a structured light generator may be employed.

[0099] A light source (2420) irradiates light to be used for analyzing the shape or position of a subject. The light source (2420) may include a light source that generates and irradiates light of a predetermined wavelength. The light source (2420) may include a light source such as an LD (laser diode), LED (light emitting diode), or SLD (super luminescent diode) that generates and irradiates light of a wavelength band suitable for analyzing the position and shape of a subject, for example, light of an infrared band wavelength. The light source (2420) may be a wavelength-tunable laser diode. The light source (2420) may generate and irradiate light of multiple different wavelength bands. The light source (2420) may generate and irradiate pulsed light or continuous light.

[0100] The meta-optical element (2410) modulates light irradiated from the light source (1100) and transmits it to the subject. The meta-optical element (2410) modulates the incident light so that the incident light has a distribution having a predetermined pattern. The meta-optical element (2410) may also form structured light in which predetermined position coordinates are coded as bright and dark points to be suitable for three-dimensional shape analysis.

[0101] As described above, the meta-optical element (2410) is designed such that the shape distribution of the nanostructure is designed by considering not only the phase value by position but also the phase change rate, so it has high efficiency in forming an intended structured light pattern and can improve the accuracy of three-dimensional information analysis of the subject.

[0102] The light detector (2430) receives reflected light of light irradiated onto a subject via a meta-optical element (2410). The light detector (2430) may include an array of multiple sensors that sense light, or it may consist of only one sensor. In addition, the light detector (2430) may employ the light element described in FIGS. 3 to 5 as a photoelectric conversion element.

[0103] The signal processing unit (2440) can process the signal sensed by the light detection unit (2430) to analyze the shape of the subject, etc. The signal processing unit (2440) can analyze the three-dimensional shape including the depth position of the subject.

[0104] When structured light is irradiated onto a subject, the depth position of the subject can be calculated from the pattern change of the structured light reflected from the subject, that is, from the result of comparing it with the incident structured light pattern. Depth information of the subject can be extracted by tracking the pattern change of the structured light reflected from the subject by coordinates, and from this, three-dimensional information related to the shape and movement of the subject can be extracted.

[0105] The memory (2450) may store programs and other data required for the operation of the signal processing unit (2440).

[0106] The calculation result from the signal processing unit (2440), that is, information regarding the shape and position of the subject, may be transmitted to another unit within the electronic device (2200) or to another electronic device. For example, this information may be used in an application (2246) stored in memory (2230). The other electronic device to which the result is transmitted may be a display device or a printer that outputs the result. In addition, it may be, but is not limited to, autonomous driving devices such as unmanned vehicles, autonomous vehicles, robots, drones, etc., smartphones, smartwatches, mobile phones, PDAs (personal digital assistants), laptops, PCs, various wearable devices, other mobile or non-mobile computing devices, and Internet of Things devices.

[0107] Although many details are described in detail in the foregoing description, they should be interpreted as examples of preferred embodiments rather than as limiting the scope of the invention. Therefore, the scope of the invention should not be determined by the described embodiments, but by the technical concept described in the patent claims. Explanation of the symbols

[0108] 2a, 2b: First and second layers 6E2: Electrode layer 6P1, 6P2: 1st and 2nd electrode pads 7W1: Window 32a to 32d: 1st to 4th layers 85: Dislocation 100, 310: Substrate 110: Lower layer 120, 130, 140: First to third buffer layers 150: Upper layer 330: Absorption layer 520, 540: First and second relaxation layers 300, 600: Optical device 340, 350: First and second doping layers 620: n-type electrode layer 630: Charge multiplication layer 650: Insulation layer 1500: Lidar 1505: Subject 1510: Light emitter 1510A: Light source 1520: Modulation unit 1530: Receiving unit 1540: Arithmetic Unit 1550: Control Unit 2200:Network environment 2201:Electronic device 2280: Module E1, E2: First and second laminates

Claims

Claim 1 A high-quality substrate comprising: a silicon layer; a multilayer buffer layer provided on the silicon layer; and an InP layer provided on the multilayer buffer layer; wherein the crystal growth direction of the silicon layer is inclined to a direction of about 1° to 10° with respect to the vertical direction, and the multilayer buffer layer comprises a buffer layer having a crystal growth direction inclined to the vertical direction, and wherein the multilayer buffer layer comprises: a first buffer layer formed on the silicon layer; a second buffer layer formed on the first buffer layer; and a third buffer layer formed on the second buffer layer; and wherein the first buffer layer comprises a Ge layer having a thickness of 0.01㎛ to 100㎛. Claim 2 In claim 1, the crystal growth direction of the first buffer layer is a high-quality substrate tilted away from the vertical direction. Claim 3 In claim 2, the crystal growth direction of the first buffer layer is a high-quality substrate tilted about 1° to 10° with respect to the vertical direction. Claim 4 In claim 2, the second buffer layer is a high-quality substrate that is a single layer or a multilayer and includes at least a GaAs layer with a thickness of 0.01 μm to 100 μm. Claim 5 In claim 2, the third buffer layer comprises a first layer; and a second layer formed on the first layer; wherein the first and second layers are repeatedly alternately stacked, and the first and second layers are each superlattice layers, a high-quality substrate. Claim 6 A high-quality substrate according to claim 5, wherein one of the first and second layers comprises a GaAs layer, an InGaAs layer, or an InGaAlAs layer, and the other layer comprises an AlAs layer, an InAlAs layer, or an InGaAlAs layer. Claim 7 In claim 1, the high-quality substrate comprising an n+InP layer having a thickness of 0.01㎛ to 100㎛. Claim 8 In claim 1, the InP layer is a high-quality substrate that is a single layer or a multilayer. Claim 9 An optical device comprising: a substrate; a first laminate provided on the substrate; a second laminate facing the first laminate; and an absorption layer having a thickness of 0.05 μm to 20 μm disposed between the first and second laminates, wherein the substrate comprises a high-quality substrate according to any one of claims 1 to 8. Claim 10 In claim 9, the surface of the InP layer is an optical device comprising an n+InP layer. Claim 11 In claim 10, the first laminate is configured to function as a charge multiplication layer and comprises: an N-type doping layer; a non-doping layer provided on the n-type doping layer; and a p-type doping layer provided on the non-doping layer. Claim 12 In claim 9, the second laminate comprises: a first p-type doping layer provided on the absorption layer and acting as a light-receiving layer; and a second p-type doping layer provided on the first p-type doping layer and acting as a p-type electrode contact; an optical device. Claim 13 In claim 10, an optical device further comprising a relaxation layer between at least one of the first and second laminates and the absorption layer to mitigate the band gap difference between the laminate and the absorption layer. Claim 14 A method for manufacturing a high-quality substrate comprising: a step of forming a silicon layer having a crystal growth direction inclined at a given angle with respect to the vertical direction; a step of forming a multilayer buffer layer on the silicon layer; and a step of forming an InP layer on the multilayer buffer layer; wherein the buffer layer formed directly on the silicon layer among the multilayer buffer layers is grown in the crystal growth direction having the silicon layer to reduce defects at the interface between the silicon layer and the buffer layer, and the step of forming the multilayer buffer layer comprises: a step of growing a first buffer layer on the silicon layer; a step of growing a second buffer layer formed on the first buffer layer; and a step of growing a third buffer layer formed on the second buffer layer; wherein the first buffer layer comprises a Ge layer with a thickness of 0.01㎛ to 100㎛. Claim 15 delete Claim 16 A method for manufacturing a high-quality substrate according to claim 14, wherein the step of growing the second buffer layer comprises: a first step of growing a portion of the second buffer layer; and a second step of growing the remainder of the second buffer layer under conditions different from the conditions of the first step. Claim 17 A method for manufacturing a high-quality substrate according to claim 16, wherein the conditions of the first step (temperature, pressure, speed and / or time) are different from the conditions of the second step. Claim 18 A method for manufacturing a high-quality substrate according to claim 14, wherein the step of forming the InP layer comprises: a first step of growing a portion of the InP layer under a first condition; and a second step of growing the remainder of the InP layer under a second condition different from the first condition. Claim 19 In claim 18, the method for manufacturing a high-quality substrate wherein the first condition and the second condition comprise at least one of a temperature condition, a pressure condition, a speed condition, and a time condition.

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